Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Bump Capstone to newest next #4758

Merged
merged 5 commits into from
Dec 18, 2024
Merged

Bump Capstone to newest next #4758

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
5 commits
Select commit Hold shift + click to select a range
d8fc1f6
Fix check for rfe, operand is now an memory operand.
Rot127 Dec 6, 2024
c56c1c3
Use ARM features upper case identifiers.
Rot127 Dec 6, 2024
07c16bc
Bump Capstone to newest next.
Rot127 Dec 16, 2024
e0ef56b
Fix trivial tests
Rot127 Dec 16, 2024
795a0f2
Update capstone-next.wrap
XVilka Dec 17, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
24 changes: 12 additions & 12 deletions librz/arch/isa/arm/arm_il32.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1947,10 +1947,10 @@ static RzILOpEffect *revsh(cs_insn *insn, bool is_thumb) {
* ARM: rfeda, rfedb, rfaia, rfeib
*/
static RzILOpEffect *rfe(cs_insn *insn, bool is_thumb) {
if (!ISREG(0)) {
if (!ISMEM(0)) {
return NULL;
}
RzILOpBitVector *base = REG(0);
RzILOpBitVector *base = MEMBASE(0);
if (!base) {
return NULL;
}
Expand Down Expand Up @@ -3623,12 +3623,12 @@ RZ_IPI bool rz_arm_cs_is_float_insn(const cs_insn *insn) {
switch (group_it) {
default:
break;
case ARM_FEATURE_HasNEON:
case ARM_FEATURE_HasVFP2:
case ARM_FEATURE_HasVFP3:
case ARM_FEATURE_HasVFP4:
case ARM_FEATURE_HasDPVFP:
case ARM_FEATURE_HasMVEFloat:
case ARM_FEATURE_HASNEON:
case ARM_FEATURE_HASVFP2:
case ARM_FEATURE_HASVFP3:
case ARM_FEATURE_HASVFP4:
case ARM_FEATURE_HASDPVFP:
case ARM_FEATURE_HASMVEFLOAT:
return true;
}
group_it = insn->detail->groups[++i];
Expand All @@ -3653,7 +3653,7 @@ static RzILOpEffect *try_as_int_cvt(cs_insn *insn, bool is_thumb, bool *success)
ut32 fl_sz = rz_float_get_format_info(is_f2i ? from_fmt : to_fmt, RZ_FLOAT_INFO_TOTAL_LEN);

#if CS_NEXT_VERSION >= 6
if (!rz_arm_cs_is_group_member(insn, ARM_FEATURE_HasNEON)) {
if (!rz_arm_cs_is_group_member(insn, ARM_FEATURE_HASNEON)) {
#else
if (!rz_arm_cs_is_group_member(insn, ARM_GRP_NEON)) {
#endif
Expand Down Expand Up @@ -3890,7 +3890,7 @@ static RzILOpEffect *vadd(cs_insn *insn, bool is_thumb) {
bool is_float_vec = fmt == RZ_FLOAT_UNK ? false : true;

#if CS_NEXT_VERSION >= 6
if (!rz_arm_cs_is_group_member(insn, ARM_FEATURE_HasNEON)) {
if (!rz_arm_cs_is_group_member(insn, ARM_FEATURE_HASNEON)) {
#else
if (!rz_arm_cs_is_group_member(insn, ARM_GRP_NEON)) {
#endif
Expand Down Expand Up @@ -3941,7 +3941,7 @@ static RzILOpEffect *vsub(cs_insn *insn, bool is_thumb) {
bool is_float_vec = fmt == RZ_FLOAT_UNK ? false : true;

#if CS_NEXT_VERSION >= 6
if (!rz_arm_cs_is_group_member(insn, ARM_FEATURE_HasNEON)) {
if (!rz_arm_cs_is_group_member(insn, ARM_FEATURE_HASNEON)) {
#else
if (!rz_arm_cs_is_group_member(insn, ARM_GRP_NEON)) {
#endif
Expand Down Expand Up @@ -3990,7 +3990,7 @@ static RzILOpEffect *vmul(cs_insn *insn, bool is_thumb) {
RzFloatFormat fmt = dt2fmt(dt);

#if CS_NEXT_VERSION >= 6
if (!rz_arm_cs_is_group_member(insn, ARM_FEATURE_HasNEON)) {
if (!rz_arm_cs_is_group_member(insn, ARM_FEATURE_HASNEON)) {
#else
if (!rz_arm_cs_is_group_member(insn, ARM_GRP_NEON)) {
#endif
Expand Down
14 changes: 7 additions & 7 deletions librz/arch/p/analysis/analysis_arm_cs.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1292,20 +1292,20 @@ static void anop32(RzAnalysis *a, csh handle, RzAnalysisOp *op, cs_insn *insn, b

/* grab family */
#if CS_NEXT_VERSION >= 6
if (cs_insn_group(handle, insn, ARM_FEATURE_HasAES)) {
if (cs_insn_group(handle, insn, ARM_FEATURE_HASAES)) {
op->family = RZ_ANALYSIS_OP_FAMILY_CRYPTO;
} else if (cs_insn_group(handle, insn, ARM_FEATURE_HasCRC)) {
} else if (cs_insn_group(handle, insn, ARM_FEATURE_HASCRC)) {
op->family = RZ_ANALYSIS_OP_FAMILY_CRYPTO;
} else if (cs_insn_group(handle, insn, ARM_GRP_PRIVILEGE)) {
op->family = RZ_ANALYSIS_OP_FAMILY_PRIV;
} else if (cs_insn_group(handle, insn, ARM_FEATURE_HasVirtualization)) {
} else if (cs_insn_group(handle, insn, ARM_FEATURE_HASVIRTUALIZATION)) {
op->family = RZ_ANALYSIS_OP_FAMILY_VIRT;
} else if (cs_insn_group(handle, insn, ARM_FEATURE_HasNEON)) {
} else if (cs_insn_group(handle, insn, ARM_FEATURE_HASNEON)) {
op->family = RZ_ANALYSIS_OP_FAMILY_MMX;
} else if (cs_insn_group(handle, insn, ARM_FEATURE_HasFPARMv8)) {
} else if (cs_insn_group(handle, insn, ARM_FEATURE_HASFPARMV8)) {
op->family = RZ_ANALYSIS_OP_FAMILY_FPU;
} else if (cs_insn_group(handle, insn, ARM_FEATURE_HasDSP) &&
cs_insn_group(handle, insn, ARM_FEATURE_HasDSP)) {
} else if (cs_insn_group(handle, insn, ARM_FEATURE_HASDSP) &&
cs_insn_group(handle, insn, ARM_FEATURE_HASDSP)) {
op->family = RZ_ANALYSIS_OP_FAMILY_MMX;
} else {
op->family = RZ_ANALYSIS_OP_FAMILY_CPU;
Expand Down
6 changes: 3 additions & 3 deletions librz/arch/p/asm/asm_arm_cs.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -41,9 +41,9 @@ static bool check_features(RzAsm *a, cs_insn *insn) {
int id = insn->detail->groups[i];
switch (id) {
#if CS_NEXT_VERSION >= 6
case ARM_FEATURE_IsARM:
case ARM_FEATURE_IsThumb:
case ARM_FEATURE_IsThumb2:
case ARM_FEATURE_ISARM:
case ARM_FEATURE_ISTHUMB:
case ARM_FEATURE_ISTHUMB2:
#else
case ARM_GRP_ARM:
case ARM_GRP_THUMB:
Expand Down
2 changes: 1 addition & 1 deletion subprojects/capstone-next.wrap
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
[wrap-git]
url = https://github.com/capstone-engine/capstone.git
revision = 1ecfb5b04235539e0d94cc67b8984347be2f6a73
revision = 9907b22d33693f3beb4b8b7ba261fbdd219afee3
directory = capstone-next
patch_directory = capstone-next
depth = 1
4 changes: 2 additions & 2 deletions test/db/analysis/arm
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -912,7 +912,7 @@ pseudo: push (r3, lr)
mnemonic: push
mask: ffffffff
prefix: 0
id: 438
id: 440
bytes: 08402de9
refptr: 0
size: 4
Expand All @@ -935,7 +935,7 @@ mnemonic: add
description: add two values
mask: ffff
prefix: 0
id: 31
id: 33
bytes: 00af
refptr: 0
size: 2
Expand Down
2 changes: 1 addition & 1 deletion test/db/analysis/ppc
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -716,7 +716,7 @@ EXPECT=<<EOF
},
"sign": false,
"prefix": 0,
"id": 942,
"id": 1004,
"opex": {
"operands": [
{
Expand Down
Loading