v1.3.0

Timing Manager & Scheduler

• Create new Timing Manager IP to synchronize sensors and control with PWM carrier
• Convert scheduler times from uint32_t to double type, added tolerance margin

Sensor Interfaces

• Update sensor interfaces for Timing Manager compatibility
• Rename AMDS IP/driver from motherboard to amds
• Remove SYNC_TX interrupt from AMDS IP
• Add/change behavior of AMDS IP debug counters

FPGA Changes

• Remove FPGA Timer IP, as interrupts are now generated by Timing Manager
• Enable Inverter IP to flush duty ratios immediately, at next peak/valley, or next trigger
• Replace hardcoded AXI interface addresses with definitions from xparameters.h

Miscellaneous

• Convert any commands using 0-indexing for hardware port numbers to also be 1-indexed
• Remove obsolete driver documentation