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[snippy] fix IR building for load symbol address and JALR generation routine #120

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Nov 27, 2024
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[snippy] fix IR building for load symbol address and JALR generation routine #120

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57 changes: 57 additions & 0 deletions llvm/test/tools/llvm-snippy/calls/calls-jalr-error.yaml
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Original file line number Diff line number Diff line change
@@ -0,0 +1,57 @@
# XFAIL: *

# RUN: llvm-snippy %s -march=riscv64-linux-gnu -function-number=20 -function-layers=5 -num-instrs=100 \
# RUN: --dump-mf -stack-size=10240 -num-instr-ancil=50 -verify-mi |& Filcheck %s

options:
redefine-sp: SP
reserved-regs-list:
- X5
- X6
- X7
- X8
- X9
- X10
- X11
- X12
- X13
- X14
- X15
- X16
- X17
- X18
- X19
- X20
- X21
- X22
- X23
- X24
- X25
- X26
- X27
- X28
- X29
- X30
- X31



sections:
- no: 1
VMA: 0x210000
SIZE: 0x100000
LMA: 0x210000
ACCESS: rx
- no: 2
VMA: 0x100000
SIZE: 0x100000
LMA: 0x100000
ACCESS: rw

histogram:
- [ADD, 1.0]
- [ADDI, 1.0]
- [SUB, 1.0]
- [JALR, 10]

#CHECK: error: No available register GPRJALR: scratch register for storing function address
6 changes: 3 additions & 3 deletions llvm/test/tools/llvm-snippy/calls/calls-with-loops.yaml
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Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@

options:
march: "riscv64-linux-gnu"
num-instrs: 20
num-instrs: 50
stack-size: 32768
last-instr: "RET"
function-number: 32
Expand Down Expand Up @@ -59,8 +59,7 @@ histogram:
- [BNE, 1.0]
- [BLT, 1.0]
- [BLTU, 1.0]
- [JAL, 1.0]
- [JALR, 1.0]
- [JAL, 6.0]

branches:
permutation: on
Expand All @@ -71,6 +70,7 @@ branches:
min: 1
max: 1

# CHECK: SnippyFunction
# CHECK: SD $x1, $x2, 0, pcsections
# CHECK-NEXT: PseudoCALL
# CHECK-NEXT: $x1 = LD $x2, 0, pcsections
2 changes: 1 addition & 1 deletion llvm/test/tools/llvm-snippy/calls/calls.yaml
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# RUN: llvm-snippy %s -march=riscv64-linux-gnu -function-number=20 -function-layers=5 -num-instrs=100 \
# RUN: --dump-mf -stack-size=10240 -num-instr-ancil=50 |& FileCheck %s
# RUN: --dump-mf -stack-size=10240 -num-instr-ancil=50 -verify-mi |& FileCheck %s

sections:
- no: 1
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/tools/llvm-snippy/gen-plan-verification-calls.yaml
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
# RUN: llvm-snippy %s -march=riscv64-linux-gnu -function-number=20 -function-layers=5 -num-instrs=100 \
# RUN: -stack-size=10240 -num-instr-ancil=50 -verify-gen-plan |& FileCheck %s
# RUN: -stack-size=10240 -num-instr-ancil=50 -verify-gen-plan -verify-mi |& FileCheck %s

sections:
- no: 1
Expand Down
7 changes: 3 additions & 4 deletions llvm/tools/llvm-snippy/lib/Generator/Generation.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,7 @@
#include "snippy/Generator/Policy.h"
#include "snippy/Support/Options.h"

#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/Support/FormatVariadic.h"

namespace llvm {
Expand Down Expand Up @@ -1092,10 +1093,8 @@ void spillPseudoInstImplicitReg(MachineInstr &MI, Register Reg,
auto &MBB = *MBBPtr;
auto RealStackPointer = GC.getProgramContext().getStackPointer();

auto PointBeforeSpill = std::find_if(
std::next(MachineBasicBlock::reverse_iterator(MI)), MBB.rend(),
[](auto &&Inst) { return checkSupportMetadata(Inst); });
auto SpillPoint = std::next(PointBeforeSpill.getReverse());
// FIXME: This code can be unsuitable for some platforms
auto SpillPoint = MachineBasicBlock::iterator(MI);
SnpTgt.generateSpillToStack(MBB, SpillPoint, Reg, GC, RealStackPointer);

auto ReloadPoint = std::next(MachineBasicBlock::iterator(MI));
Expand Down
6 changes: 3 additions & 3 deletions llvm/tools/llvm-snippy/lib/Target/RISCV/Target.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2097,14 +2097,14 @@ class SnippyRISCVTarget final : public SnippyTarget {

MachineInstr *MIAUIPC =
getSupportInstBuilder(*this, MBB, Ins, Ctx, InstrInfo.get(RISCV::AUIPC))
.addReg(DestReg)
.addDef(DestReg)
.addGlobalAddress(Target, 0, RISCVII::MO_PCREL_HI);
MCSymbol *AUIPCSymbol = MF->getContext().createNamedTempSymbol("pcrel_hi");
MIAUIPC->setPreInstrSymbol(*MF, AUIPCSymbol);

return getSupportInstBuilder(*this, MBB, Ins, Ctx,
InstrInfo.get(RISCV::ADDI))
.addReg(DestReg)
.addDef(DestReg)
.addReg(DestReg)
.addSym(AUIPCSymbol, RISCVII::MO_PCREL_LO);
}
Expand All @@ -2131,7 +2131,7 @@ class SnippyRISCVTarget final : public SnippyTarget {
auto &State = GC.getLLVMState();
auto &Ctx = State.getCtx();
const auto &RI = State.getRegInfo();
const auto &RegClass = RI.getRegClass(RISCV::GPRRegClassID);
const auto &RegClass = RI.getRegClass(RISCV::GPRJALRRegClassID);
auto RP = GC.getRegisterPool();
auto Reg = getNonZeroReg("scratch register for storing function address",
RI, RegClass, RP, MBB);
Expand Down