memH: Missed test ref file updates for standardCPU changes

sstsimulator · Jan 22, 2025 · 9f18c6a · 9f18c6a
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commit 9f18c6a
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Showing 10 changed files with 777 additions and 789 deletions.
diff --git a/src/sst/elements/cacheTracer/tests/refFiles/test_cacheTracer_1.out b/src/sst/elements/cacheTracer/tests/refFiles/test_cacheTracer_1.out
@@ -1,5 +1,4 @@
 l2cache: No MSHR lookup latency provided (mshr_latency_cycles)...intrapolated to 5 cycles.
-memory, WARNING: Memories no longer inherit address regions from directories and no region parameters (addr_range_start, addr_range_end, interleave_size, interleave_step) were detected. All addresses will map to this memory: if this is intended, you may ignore this warning or set addr_range_start to 0 in your input deck to eliminate this warning.
 FINAL STATS:
 -----------------------------------------------------------------
 - Events at NorthBus                 : 1000
@@ -10,52 +9,52 @@ FINAL STATS:
 Address Histogram:
 -----------------------------------------------------------------
 Address_Range: Count
-- [0-4095]: 45
-- [4096-8191]: 44
-- [8192-12287]: 43
-- [12288-16383]: 36
-- [16384-20479]: 39
-- [20480-24575]: 43
-- [24576-28671]: 40
-- [28672-32767]: 43
-- [32768-36863]: 37
-- [36864-40959]: 34
-- [40960-45055]: 35
-- [45056-49151]: 45
-- [49152-53247]: 31
-- [53248-57343]: 44
-- [57344-61439]: 46
-- [61440-65535]: 38
-- [65536-69631]: 36
-- [69632-73727]: 41
-- [73728-77823]: 37
-- [77824-81919]: 41
-- [81920-86015]: 41
-- [86016-90111]: 34
-- [90112-94207]: 48
-- [94208-98303]: 44
-- [98304-102399]: 35
+- [0-4095]: 31
+- [4096-8191]: 38
+- [8192-12287]: 25
+- [12288-16383]: 42
+- [16384-20479]: 31
+- [20480-24575]: 47
+- [24576-28671]: 43
+- [28672-32767]: 40
+- [32768-36863]: 43
+- [36864-40959]: 40
+- [40960-45055]: 37
+- [45056-49151]: 48
+- [49152-53247]: 56
+- [53248-57343]: 67
+- [57344-61439]: 32
+- [61440-65535]: 28
+- [65536-69631]: 32
+- [69632-73727]: 42
+- [73728-77823]: 47
+- [77824-81919]: 47
+- [81920-86015]: 43
+- [86016-90111]: 40
+- [90112-94207]: 39
+- [94208-98303]: 32
+- [98304-102399]: 30
 -----------------------------------------------------------------
 - Total_Events_Address: 1000
 -----------------------------------------------------------------
 
 Access Latency Distribution (ns):
 -----------------------------------------------------------------
-Min-Latency(ns): 3  Max-Latency(ns): 195  #Bins: 10
+Min-Latency(ns): 3  Max-Latency(ns): 175  #Bins: 10
 -----------------------------------------------------------------
 Latency Range(ns): Count
-- [0-19]: 238
-- [20-39]: 3
-- [40-59]: 3
-- [60-79]: 0
-- [80-99]: 2
-- [100-119]: 2
-- [120-139]: 742
-- [140-159]: 4
-- [160-179]: 5
-- [180-199]: 1
+- [0-17]: 259
+- [18-35]: 2
+- [36-53]: 1
+- [54-71]: 0
+- [72-89]: 1
+- [90-107]: 1
+- [108-125]: 724
+- [126-143]: 3
+- [144-161]: 7
+- [162-179]: 2
 -----------------------------------------------------------------
 - Total_Events_Latency: 1000
 -----------------------------------------------------------------
 
-Simulation is complete, simulated time: 6.2635 us
+Simulation is complete, simulated time: 6.17 us
diff --git a/src/sst/elements/cacheTracer/tests/refFiles/test_cacheTracer_2_memRef.out b/src/sst/elements/cacheTracer/tests/refFiles/test_cacheTracer_2_memRef.out
diff --git a/src/sst/elements/memHierarchy/tests/refFiles/test_hybridsim.out b/src/sst/elements/memHierarchy/tests/refFiles/test_hybridsim.out
@@ -2,4 +2,4 @@ l2cache: No MSHR lookup latency provided (mshr_latency_cycles)...intrapolated to
 got to save state in nvdimm 
 save file was state/nvdimm_restore.txt
 NVDIMM is saving the used table, dirty table and address map 
-Simulation is complete, simulated time: 12.2825 us
+Simulation is complete, simulated time: 9.37 us
diff --git a/src/sst/elements/memHierarchy/tests/refFiles/test_memHA_BackendRamulator_1.out b/src/sst/elements/memHierarchy/tests/refFiles/test_memHA_BackendRamulator_1.out
diff --git a/src/sst/elements/memHierarchy/tests/refFiles/test_memHA_BackendRamulator_2.out b/src/sst/elements/memHierarchy/tests/refFiles/test_memHA_BackendRamulator_2.out
diff --git a/src/sst/elements/samba/tests/refFiles/test_Samba_gupsgen_mmu.out b/src/sst/elements/samba/tests/refFiles/test_Samba_gupsgen_mmu.out
@@ -14,7 +14,6 @@
 0:cpu:RequestGenCPU[RequestGenCPU:165]: - Max Store requests pending:     16
 0:cpu:RequestGenCPU[RequestGenCPU:166]: - Max Custom requests pending:     16
 0:cpu:RequestGenCPU[RequestGenCPU:167]: Configuration completed.
-memory, WARNING: Memories no longer inherit address regions from directories and no region parameters (addr_range_start, addr_range_end, interleave_size, interleave_step) were detected. All addresses will map to this memory: if this is intended, you may ignore this warning or set addr_range_start to 0 in your input deck to eliminate this warning.
 Initialized with 1 cores
 Before initialization 
 Assigning the PTW correctly

diff --git a/src/sst/elements/samba/tests/refFiles/test_Samba_gupsgen_mmu_4KB.out b/src/sst/elements/samba/tests/refFiles/test_Samba_gupsgen_mmu_4KB.out
@@ -14,7 +14,6 @@
 0:cpu:RequestGenCPU[RequestGenCPU:165]: - Max Store requests pending:     16
 0:cpu:RequestGenCPU[RequestGenCPU:166]: - Max Custom requests pending:     16
 0:cpu:RequestGenCPU[RequestGenCPU:167]: Configuration completed.
-memory, WARNING: Memories no longer inherit address regions from directories and no region parameters (addr_range_start, addr_range_end, interleave_size, interleave_step) were detected. All addresses will map to this memory: if this is intended, you may ignore this warning or set addr_range_start to 0 in your input deck to eliminate this warning.
 Initialized with 1 cores
 Before initialization 
 Assigning the PTW correctly

diff --git a/src/sst/elements/samba/tests/refFiles/test_Samba_gupsgen_mmu_three_levels.out b/src/sst/elements/samba/tests/refFiles/test_Samba_gupsgen_mmu_three_levels.out
@@ -14,7 +14,6 @@
 0:cpu:RequestGenCPU[RequestGenCPU:165]: - Max Store requests pending:     16
 0:cpu:RequestGenCPU[RequestGenCPU:166]: - Max Custom requests pending:     16
 0:cpu:RequestGenCPU[RequestGenCPU:167]: Configuration completed.
-memory, WARNING: Memories no longer inherit address regions from directories and no region parameters (addr_range_start, addr_range_end, interleave_size, interleave_step) were detected. All addresses will map to this memory: if this is intended, you may ignore this warning or set addr_range_start to 0 in your input deck to eliminate this warning.
 Initialized with 1 cores
 Before initialization 
 Assigning the PTW correctly

diff --git a/src/sst/elements/samba/tests/refFiles/test_Samba_stencil3dbench_mmu.out b/src/sst/elements/samba/tests/refFiles/test_Samba_stencil3dbench_mmu.out
@@ -14,7 +14,6 @@
 0:cpu:RequestGenCPU[RequestGenCPU:165]: - Max Store requests pending:     16
 0:cpu:RequestGenCPU[RequestGenCPU:166]: - Max Custom requests pending:     16
 0:cpu:RequestGenCPU[RequestGenCPU:167]: Configuration completed.
-memory, WARNING: Memories no longer inherit address regions from directories and no region parameters (addr_range_start, addr_range_end, interleave_size, interleave_step) were detected. All addresses will map to this memory: if this is intended, you may ignore this warning or set addr_range_start to 0 in your input deck to eliminate this warning.
 Initialized with 1 cores
 Before initialization 
 Assigning the PTW correctly

diff --git a/src/sst/elements/samba/tests/refFiles/test_Samba_streambench_mmu.out b/src/sst/elements/samba/tests/refFiles/test_Samba_streambench_mmu.out
@@ -1,4 +1,3 @@
-memory, WARNING: Memories no longer inherit address regions from directories and no region parameters (addr_range_start, addr_range_end, interleave_size, interleave_step) were detected. All addresses will map to this memory: if this is intended, you may ignore this warning or set addr_range_start to 0 in your input deck to eliminate this warning.
 Initialized with 1 cores
 Before initialization 
 Assigning the PTW correctly