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riscv: define mvendorid CSR with macro helpers Build check (riscv-peripheral) #377: Pull request #255 synchronize by rmsyn
January 11, 2025 17:38 6m 7s rmsyn:riscv/mvendorid-csr-macro
rmsyn:riscv/mvendorid-csr-macro
January 11, 2025 17:38 6m 7s
riscv: define mvendorid CSR with macro helpers Build check (riscv-peripheral) #376: Pull request #255 synchronize by rmsyn
January 11, 2025 17:36 7m 36s rmsyn:riscv/mvendorid-csr-macro
rmsyn:riscv/mvendorid-csr-macro
January 11, 2025 17:36 7m 36s
RFC template for nominating CSRs to be write-safe Build check (riscv-peripheral) #375: Pull request #256 opened by romancardenas
January 11, 2025 12:14 4m 1s csr-write-rfc
csr-write-rfc
January 11, 2025 12:14 4m 1s
riscv: define mvendorid CSR with macro helpers Build check (riscv-peripheral) #374: Pull request #255 opened by rmsyn
January 11, 2025 10:39 4m 27s rmsyn:riscv/mvendorid-csr-macro
rmsyn:riscv/mvendorid-csr-macro
January 11, 2025 10:39 4m 27s
Remove weak symbols, use abort for defaults. Build check (riscv-peripheral) #373: Pull request #254 synchronize by rslawson
January 9, 2025 13:29 4m 15s rslawson:rs/lto-fixes
rslawson:rs/lto-fixes
January 9, 2025 13:29 4m 15s
Remove weak symbols, use abort for defaults. Build check (riscv-peripheral) #372: Pull request #254 synchronize by rslawson
January 9, 2025 13:26 Action required rslawson:rs/lto-fixes
rslawson:rs/lto-fixes
January 9, 2025 13:26 Action required
Remove weak symbols, use abort for defaults. Build check (riscv-peripheral) #371: Pull request #254 opened by rslawson
January 8, 2025 10:06 4m 4s rslawson:rs/lto-fixes
rslawson:rs/lto-fixes
January 8, 2025 10:06 4m 4s
Merge pull request #253 from ia0/fix Build check (riscv-peripheral) #370: Commit bc21d25 pushed by github-merge-queue bot
January 7, 2025 20:58 3m 26s master
master
January 7, 2025 20:58 3m 26s
Build check (riscv-peripheral) Build check (riscv-peripheral) #369: Merge group checks requested
January 7, 2025 20:54 3m 58s
January 7, 2025 20:54 3m 58s
Make sure .heap is 4-byte aligned Build check (riscv-peripheral) #368: Pull request #253 synchronize by ia0
January 7, 2025 16:42 3m 3s ia0:fix
ia0:fix
January 7, 2025 16:42 3m 3s
Merge pull request #252 from rmsyn/riscv/mtvec-csr-macro Build check (riscv-peripheral) #367: Commit 4038a13 pushed by github-merge-queue bot
January 7, 2025 15:35 3m 50s master
master
January 7, 2025 15:35 3m 50s
Build check (riscv-peripheral) Build check (riscv-peripheral) #366: Merge group checks requested
January 7, 2025 15:30 7m 53s
January 7, 2025 15:30 7m 53s
riscv: define mtvec CSR with macro helpers Build check (riscv-peripheral) #365: Pull request #252 synchronize by rmsyn
January 7, 2025 14:33 4m 9s rmsyn:riscv/mtvec-csr-macro
rmsyn:riscv/mtvec-csr-macro
January 7, 2025 14:33 4m 9s
Make sure .heap is 4-byte aligned Build check (riscv-peripheral) #364: Pull request #253 synchronize by ia0
January 7, 2025 09:11 7m 18s ia0:fix
ia0:fix
January 7, 2025 09:11 7m 18s
Make sure .heap is 4-byte aligned Build check (riscv-peripheral) #363: Pull request #253 synchronize by ia0
January 7, 2025 09:11 7m 7s ia0:fix
ia0:fix
January 7, 2025 09:11 7m 7s
Build check (riscv-peripheral) Build check (riscv-peripheral) #362: Merge group checks requested
January 7, 2025 08:12 3m 47s
January 7, 2025 08:12 3m 47s
Make sure .heap is 4-byte aligned Build check (riscv-peripheral) #361: Pull request #253 opened by ia0
December 30, 2024 11:09 Action required ia0:fix
ia0:fix
December 30, 2024 11:09 Action required
riscv: define mtvec CSR with macro helpers Build check (riscv-peripheral) #360: Pull request #252 synchronize by rmsyn
December 26, 2024 19:17 3m 44s rmsyn:riscv/mtvec-csr-macro
rmsyn:riscv/mtvec-csr-macro
December 26, 2024 19:17 3m 44s
riscv: define mtvec CSR with macro helpers Build check (riscv-peripheral) #359: Pull request #252 opened by rmsyn
December 21, 2024 21:15 4m 52s rmsyn:riscv/mtvec-csr-macro
rmsyn:riscv/mtvec-csr-macro
December 21, 2024 21:15 4m 52s
Make all CSR writes unsafe by default Build check (riscv-peripheral) #358: Pull request #251 opened by romancardenas
December 19, 2024 08:19 3m 26s crs-write-unsafe
crs-write-unsafe
December 19, 2024 08:19 3m 26s
Merge pull request #250 from rust-embedded/crs-write-unsafe Build check (riscv-peripheral) #357: Commit fe6da17 pushed by github-merge-queue bot
December 19, 2024 07:51 3m 27s master
master
December 19, 2024 07:51 3m 27s
Build check (riscv-peripheral) Build check (riscv-peripheral) #356: Merge group checks requested
December 19, 2024 07:48 3m 33s
December 19, 2024 07:48 3m 33s
Merge pull request #249 from rmsyn/register/mstatush-csr-macro Build check (riscv-peripheral) #355: Commit 433366f pushed by github-merge-queue bot
December 18, 2024 16:52 3m 33s master
master
December 18, 2024 16:52 3m 33s
Build check (riscv-peripheral) Build check (riscv-peripheral) #354: Merge group checks requested
December 18, 2024 16:48 3m 44s
December 18, 2024 16:48 3m 44s
Simplify register macros Build check (riscv-peripheral) #353: Pull request #250 opened by romancardenas
December 18, 2024 12:53 4m 6s crs-write-unsafe
crs-write-unsafe
December 18, 2024 12:53 4m 6s