Build stabilization (shadps4-emu#413)

* shader_recompiler: fix for float convert and debug asserts * libraries: kernel: correct return code on invalid semaphore * amdgpu: additional case for cb extents retrieval heuristic * removed redundant check in assert * amdgpu: fix for linear tiling mode detection fin color buffers * texture_cache: fix for unexpected scheduler flushes by detiler * renderer_vulkan: missing depth barrier * texture_cache: missed slices in rt view; + detiler format
roamic · Aug 12, 2024 · 3d0fdf1 · 3d0fdf1
1 parent ace3995
commit 3d0fdf1
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Showing 15 changed files with 69 additions and 25 deletions.
diff --git a/src/core/libraries/kernel/threads/semaphore.cpp b/src/core/libraries/kernel/threads/semaphore.cpp
@@ -174,21 +174,33 @@ s32 PS4_SYSV_ABI sceKernelCreateSema(OrbisKernelSema* sem, const char* pName, u3
 }
 
 s32 PS4_SYSV_ABI sceKernelWaitSema(OrbisKernelSema sem, s32 needCount, u32* pTimeout) {
+    if (!sem) {
+        return ORBIS_KERNEL_ERROR_ESRCH;
+    }
     return sem->Wait(true, needCount, pTimeout);
 }
 
 s32 PS4_SYSV_ABI sceKernelSignalSema(OrbisKernelSema sem, s32 signalCount) {
+    if (!sem) {
+        return ORBIS_KERNEL_ERROR_ESRCH;
+    }
     if (!sem->Signal(signalCount)) {
         return ORBIS_KERNEL_ERROR_EINVAL;
     }
     return ORBIS_OK;
 }
 
 s32 PS4_SYSV_ABI sceKernelPollSema(OrbisKernelSema sem, s32 needCount) {
+    if (!sem) {
+        return ORBIS_KERNEL_ERROR_ESRCH;
+    }
     return sem->Wait(false, needCount, nullptr);
 }
 
 int PS4_SYSV_ABI sceKernelCancelSema(OrbisKernelSema sem, s32 setCount, s32* pNumWaitThreads) {
+    if (!sem) {
+        return ORBIS_KERNEL_ERROR_ESRCH;
+    }
     return sem->Cancel(setCount, pNumWaitThreads);
 }
 

diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
@@ -386,19 +386,12 @@ static Id GetBufferFormatValue(EmitContext& ctx, u32 handle, Id address, u32 com
                 if (is_signed) {
                     value = ctx.OpBitFieldSExtract(ctx.S32[1], value, comp_offset,
                                                    ctx.ConstU32(bit_width));
-                    value = ctx.OpConvertSToF(ctx.F32[1], value);
                 } else {
                     value = ctx.OpBitFieldUExtract(ctx.U32[1], value, comp_offset,
                                                    ctx.ConstU32(bit_width));
-                    value = ctx.OpConvertUToF(ctx.F32[1], value);
-                }
-            } else {
-                if (is_signed) {
-                    value = ctx.OpConvertSToF(ctx.F32[1], value);
-                } else {
-                    value = ctx.OpConvertUToF(ctx.F32[1], value);
                 }
             }
+            value = ctx.OpBitcast(ctx.F32[1], value);
             return ConvertValue(ctx, value, num_format, bit_width);
         }
         break;

diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
@@ -33,14 +33,14 @@ Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id c
                                         operands.operands);
 }
 
-Id EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id bias_lc,
+Id EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id lod,
                               Id offset) {
     const auto& texture = ctx.images[handle & 0xFFFF];
     const Id image = ctx.OpLoad(texture.image_type, texture.id);
     const Id sampler = ctx.OpLoad(ctx.sampler_type, ctx.samplers[handle >> 16]);
     const Id sampled_image = ctx.OpSampledImage(texture.sampled_type, image, sampler);
     return ctx.OpImageSampleExplicitLod(ctx.F32[4], sampled_image, coords,
-                                        spv::ImageOperandsMask::Lod, ctx.ConstF32(0.f));
+                                        spv::ImageOperandsMask::Lod, lod);
 }
 
 Id EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id dref,

diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
@@ -359,7 +359,7 @@ Id EmitConvertU32U16(EmitContext& ctx, Id value);
 
 Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id bias_lc,
                               Id offset);
-Id EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id bias_lc,
+Id EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id lod,
                               Id offset);
 Id EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id dref,
                                   Id bias_lc, const IR::Value& offset);

diff --git a/src/shader_recompiler/ir/passes/resource_tracking_pass.cpp b/src/shader_recompiler/ir/passes/resource_tracking_pass.cpp
@@ -376,9 +376,11 @@ s32 TryHandleInlineCbuf(IR::Inst& inst, Info& info, Descriptors& descriptors,
         return -1;
     }
     // We have found this pattern. Build the sharp.
-    std::array<u64, 2> buffer;
+    std::array<u32, 4> buffer;
     buffer[0] = info.pgm_base + p0->Arg(0).U32() + p0->Arg(1).U32();
-    buffer[1] = handle->Arg(2).U32() | handle->Arg(3).U64() << 32;
+    buffer[1] = 0;
+    buffer[2] = handle->Arg(2).U32();
+    buffer[3] = handle->Arg(3).U32();
     cbuf = std::bit_cast<AmdGpu::Buffer>(buffer);
     // Assign a binding to this sharp.
     return descriptors.Add(BufferResource{

diff --git a/src/shader_recompiler/runtime_info.h b/src/shader_recompiler/runtime_info.h
@@ -116,7 +116,7 @@ struct PushData {
     std::array<u8, 32> buf_offsets;
 
     void AddOffset(u32 binding, u32 offset) {
-        ASSERT(offset < 64 && binding < 32);
+        ASSERT(offset < 256 && binding < buf_offsets.size());
         buf_offsets[binding] = offset;
     }
 };

diff --git a/src/video_core/amdgpu/liverpool.cpp b/src/video_core/amdgpu/liverpool.cpp
@@ -237,7 +237,7 @@ Liverpool::Task Liverpool::ProcessGraphics(std::span<const u32> dcb, std::span<c
                 ASSERT(col_buf_id < NumColorBuffers);
 
                 const auto nop_offset = header->type3.count;
-                if (nop_offset == 0x0e || nop_offset == 0x0d) {
+                if (nop_offset == 0x0e || nop_offset == 0x0d || nop_offset == 0x0b) {
                     ASSERT_MSG(payload[nop_offset] == 0xc0001000,
                                "NOP hint is missing in CB setup sequence");
                     last_cb_extent[col_buf_id].raw = payload[nop_offset + 1];

diff --git a/src/video_core/amdgpu/liverpool.h b/src/video_core/amdgpu/liverpool.h
@@ -766,7 +766,7 @@ struct Liverpool {
         }
 
         TilingMode GetTilingMode() const {
-            return attrib.tile_mode_index;
+            return info.linear_general ? TilingMode::Display_Linear : attrib.tile_mode_index;
         }
 
         bool IsTiled() const {

diff --git a/src/video_core/buffer_cache/buffer.h b/src/video_core/buffer_cache/buffer.h
@@ -146,6 +146,10 @@ class StreamBuffer : public Buffer {
         return offset;
     }
 
+    u64 GetFreeSize() const {
+        return size_bytes - offset - mapped_size;
+    }
+
 private:
     struct Watch {
         u64 tick{};

diff --git a/src/video_core/renderer_vulkan/vk_rasterizer.cpp b/src/video_core/renderer_vulkan/vk_rasterizer.cpp
@@ -152,7 +152,8 @@ void Rasterizer::BeginRendering() {
                                                           .stencil = regs.stencil_clear}},
         };
         texture_cache.TouchMeta(htile_address, false);
-        state.num_depth_attachments++;
+        state.has_depth = true;
+        state.has_stencil = image.info.usage.stencil;
     }
     scheduler.BeginRendering(state);
 }

diff --git a/src/video_core/renderer_vulkan/vk_scheduler.cpp b/src/video_core/renderer_vulkan/vk_scheduler.cpp
@@ -38,8 +38,7 @@ void Scheduler::BeginRendering(const RenderState& new_state) {
         .layerCount = 1,
         .colorAttachmentCount = render_state.num_color_attachments,
         .pColorAttachments = render_state.color_attachments.data(),
-        .pDepthAttachment =
-            render_state.num_depth_attachments ? &render_state.depth_attachment : nullptr,
+        .pDepthAttachment = render_state.has_depth ? &render_state.depth_attachment : nullptr,
     };
 
     current_cmdbuf.beginRendering(rendering_info);
@@ -50,6 +49,8 @@ void Scheduler::EndRendering() {
         return;
     }
     is_rendering = false;
+    current_cmdbuf.endRendering();
+
     boost::container::static_vector<vk::ImageMemoryBarrier, 9> barriers;
     for (size_t i = 0; i < render_state.num_color_attachments; ++i) {
         barriers.push_back(vk::ImageMemoryBarrier{
@@ -70,10 +71,35 @@ void Scheduler::EndRendering() {
                 },
         });
     }
-    current_cmdbuf.endRendering();
+    if (render_state.has_depth) {
+        barriers.push_back(vk::ImageMemoryBarrier{
+            .srcAccessMask = vk::AccessFlagBits::eDepthStencilAttachmentWrite,
+            .dstAccessMask = vk::AccessFlagBits::eShaderRead | vk::AccessFlagBits::eShaderWrite,
+            .oldLayout = render_state.depth_attachment.imageLayout,
+            .newLayout = render_state.depth_attachment.imageLayout,
+            .srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
+            .dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
+            .image = render_state.depth_image,
+            .subresourceRange =
+                {
+                    .aspectMask = vk::ImageAspectFlagBits::eDepth |
+                                  (render_state.has_stencil ? vk::ImageAspectFlagBits::eStencil
+                                                            : vk::ImageAspectFlagBits::eNone),
+                    .baseMipLevel = 0,
+                    .levelCount = VK_REMAINING_MIP_LEVELS,
+                    .baseArrayLayer = 0,
+                    .layerCount = VK_REMAINING_ARRAY_LAYERS,
+                },
+        });
+    }
+
     if (!barriers.empty()) {
-        current_cmdbuf.pipelineBarrier(vk::PipelineStageFlagBits::eColorAttachmentOutput,
-                                       vk::PipelineStageFlagBits::eFragmentShader,
+        const auto src_stages =
+            vk::PipelineStageFlagBits::eColorAttachmentOutput |
+            (render_state.has_depth ? vk::PipelineStageFlagBits::eLateFragmentTests |
+                                          vk::PipelineStageFlagBits::eEarlyFragmentTests
+                                    : vk::PipelineStageFlagBits::eNone);
+        current_cmdbuf.pipelineBarrier(src_stages, vk::PipelineStageFlagBits::eFragmentShader,
                                        vk::DependencyFlagBits::eByRegion, {}, {}, barriers);
     }
 }

diff --git a/src/video_core/renderer_vulkan/vk_scheduler.h b/src/video_core/renderer_vulkan/vk_scheduler.h
@@ -20,7 +20,8 @@ struct RenderState {
     vk::RenderingAttachmentInfo depth_attachment{};
     vk::Image depth_image{};
     u32 num_color_attachments{};
-    u32 num_depth_attachments{};
+    bool has_depth{};
+    bool has_stencil{};
     u32 width = std::numeric_limits<u32>::max();
     u32 height = std::numeric_limits<u32>::max();
 

diff --git a/src/video_core/texture_cache/image_info.cpp b/src/video_core/texture_cache/image_info.cpp
@@ -189,6 +189,8 @@ ImageInfo::ImageInfo(const AmdGpu::Liverpool::DepthBuffer& buffer, u32 num_slice
     resources.layers = num_slices;
     meta_info.htile_addr = buffer.z_info.tile_surface_en ? htile_address : 0;
     usage.depth_target = true;
+    usage.stencil =
+        buffer.stencil_info.format != AmdGpu::Liverpool::DepthBuffer::StencilFormat::Invalid;
 
     guest_address = buffer.Address();
     const auto depth_slice_sz = buffer.GetDepthSliceSize();
@@ -260,7 +262,7 @@ ImageInfo::ImageInfo(const AmdGpu::Image& image) noexcept {
         case AmdGpu::TilingMode::Display_MacroTiled:
         case AmdGpu::TilingMode::Texture_MacroTiled:
         case AmdGpu::TilingMode::Depth_MacroTiled: {
-            // ASSERT(!props.is_cube && !props.is_block);
+            ASSERT(!props.is_block);
             ASSERT(num_samples == 1);
             std::tie(mip_info.pitch, mip_info.size) =
                 ImageSizeMacroTiled(mip_w, mip_h, bpp, num_samples, image.tiling_index);

diff --git a/src/video_core/texture_cache/image_view.cpp b/src/video_core/texture_cache/image_view.cpp
@@ -92,6 +92,8 @@ ImageViewInfo::ImageViewInfo(const AmdGpu::Liverpool::ColorBuffer& col_buffer,
                              bool is_vo_surface) noexcept {
     const auto base_format =
         Vulkan::LiverpoolToVK::SurfaceFormat(col_buffer.info.format, col_buffer.NumFormat());
+    range.base.layer = col_buffer.view.slice_start;
+    range.extent.layers = col_buffer.NumSlices();
     format = Vulkan::LiverpoolToVK::AdjustColorBufferFormat(
         base_format, col_buffer.info.comp_swap.Value(), is_vo_surface);
 }

diff --git a/src/video_core/texture_cache/tile_manager.cpp b/src/video_core/texture_cache/tile_manager.cpp
@@ -194,6 +194,7 @@ vk::Format DemoteImageFormatForDetiling(vk::Format format) {
     case vk::Format::eR32G32Sfloat:
     case vk::Format::eR32G32Uint:
     case vk::Format::eR16G16B16A16Unorm:
+    case vk::Format::eR16G16B16A16Sfloat:
         return vk::Format::eR32G32Uint;
     case vk::Format::eBc2SrgbBlock:
     case vk::Format::eBc2UnormBlock:
@@ -397,7 +398,7 @@ std::optional<vk::Buffer> TileManager::TryDetile(Image& image) {
     const u32 image_size = image.info.guest_size_bytes;
     const auto [in_buffer, in_offset] = [&] -> std::pair<vk::Buffer, u32> {
         // Use stream buffer for smaller textures.
-        if (image_size <= StreamBufferSize) {
+        if (image_size <= stream_buffer.GetFreeSize()) {
             u32 offset = stream_buffer.Copy(image.info.guest_address, image_size);
             return {stream_buffer.Handle(), offset};
         }