Support ARM ELF THM_PC22 / THM_JUMP24 relocs

[timiv]

This revision adds proper support for the following ARM ELF relocations:

• RZ_ARM_THM_PC22
• RZ_ARM_THM_JUMP24

These require a rather special encoding as some bits of the relative offset are encoded in a non-common fashion.

Your checklist for this pull request

• I've read the guidelines for contributing to this repository
• I made sure to follow the project's coding style
• I've documented or updated the documentation of every function and struct this PR changes. If not so I've explained why.
• I've added tests that prove my fix is effective or that my feature works (if possible)
• I've updated the rizin book with the relevant information (if needed)

Detailed description

As of now, rizin implements a rather rudimentary handling of ARM ELF Relocation: it just overwrites the the patch address with the value calculated for the symbol. While this works in some cases, there are others that do not, most notably ARM_THM_PC22 and ARM_THM_JUMP24 that use a quite different encoding.

With this change, the relocations are correctly handled and lead to properly encoded values. Note that this change doesn't handle possible overflows for which some thunk would need to be inserted.

The implementation was heavily inspired by lld's implementation, although the special cases (e.g. BL/BLX patching, missing J1J2 support) are not considered in this change.

I did not extend the documentation as it is not that detailed / does not even exist here.

Test plan

To test the change, it would be sufficient to check that after relocation, the bl instruction to the proper target exists and is not replaced by some unrelated instruction.

Example:

Previously:

┌ sym.mbedtls_md5_init();
│           0x08000034      push  {r3, lr}                             ; RELOC TARGET 32 .text.mbedtls_md5_init @ 0x08000034 ; [04] -r-x section size 12 named .text.mbedtls_md5_init
│           0x08000036      movs  r1, 0
│           0x08000038      movs  r2, 0x58                             ; 'X'
│           ;-- memset:
│           0x0800003a      ldr   r0, [r1, 0xc]                        ; RELOC 32 memset
│           0x0800003c      lsrs  r0, r0, 0x20
└           0x0800003e      pop   {r3, pc}

With this change:

┌ sym.mbedtls_md5_init();
│           0x08000034      push  {r3, lr}                             ; RELOC TARGET 32 .text.mbedtls_md5_init @ 0x08000034 ; [04] -r-x section size 12 named .text.mbedtls_md5_init
│           0x08000036      movs  r1, 0
│           0x08000038      movs  r2, 0x58                             ; 'X'
│           ;-- memset:
│           0x0800003a      bl    memset                               ; RELOC 24 memset
└           0x0800003e      pop   {r3, pc}

I added a test for a binary that contains THM_PC22.

Closing issues

[XVilka]

To add a test you need:

1. Add a binary to https://github.com/rizinorg/rizin-testbins
2. Create a test in test/db/formats/elf/ files, e.g. in test/db/formats/elf/elf-relarm

[timiv]

Thanks @XVilka!

I added a test bin with rizinorg/rizin-testbins#151 as a prerequisite for this PR.