Merge pull request #2773 from o1-labs/dw/implement-sltu-riscv32

o1vm/riscv32: implement R type instruction sltu
o1-labs · Nov 20, 2024 · 9471b25 · 9471b25
2 parents d83c807 + 2e9ecdd
commit 9471b25
Showing 1 changed file with 11 additions and 1 deletion.
diff --git a/o1vm/src/interpreters/riscv32im/interpreter.rs b/o1vm/src/interpreters/riscv32im/interpreter.rs
@@ -1338,7 +1338,17 @@ pub fn interpret_rtype<Env: InterpreterEnv>(env: &mut Env, instr: RInstruction)
             env.set_next_instruction_pointer(next_instruction_pointer + Env::constant(4u32));
         }
         RInstruction::SetLessThanUnsigned => {
-            unimplemented!("SetLessThanUnsigned");
+            /* sltu: x[rd] = (x[rs1] < (u)x[rs2]) ? 1 : 0 */
+            let local_rs1 = env.read_register(&rs1);
+            let local_rs2 = env.read_register(&rs2);
+            let local_rd = unsafe {
+                let pos = env.alloc_scratch();
+                env.test_less_than(&local_rs1, &local_rs2, pos)
+            };
+            env.write_register(&rd, local_rd);
+
+            env.set_instruction_pointer(next_instruction_pointer.clone());
+            env.set_next_instruction_pointer(next_instruction_pointer + Env::constant(4u32));
         }
         RInstruction::Xor => {
             unimplemented!("Xor");