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Finnaly fixed subtle reverse ident mistake
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@Rojods
Rojods committed Oct 30, 2023
1 parent 3c4361a commit 8a6afbf
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Showing 13 changed files with 306 additions and 280 deletions.
2 changes: 1 addition & 1 deletion build.sbt
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Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ ThisBuild / publishTo := Some(Opts.resolver.sonatypeStaging)

ThisBuild / resolvers += "jitpack" at "https://jitpack.io"

lazy val forsydeIoVersion = "develop-SNAPSHOT"
lazy val forsydeIoVersion = "0.7.14"
lazy val jgraphtVersion = "1.5.1"
lazy val scribeVersion = "3.10.2"
lazy val scalaGraphVersion = "1.13.5"
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45 changes: 36 additions & 9 deletions java-blueprints/src/main/java/idesyde/blueprints/StandaloneIdentificationModule.java
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Expand Up @@ -145,16 +145,43 @@ default Optional<Javalin> standaloneIdentificationModule(
ctx.status(500);
}
})
.get(
"/integrate",
.post(
"/reverse",
ctx -> {
var integrated = reverseIdentification(
globalSolvedDecisionModels,
globalDesignModels);
ctx.result(objectMapper.writeValueAsString(integrated
.stream()
.map(x -> DesignModelMessage.from(x))
.collect(Collectors.toList())));
if (ctx.isMultipartFormData()) {
var decisionModels = new HashSet<DecisionModel>();
var designModels = new HashSet<DesignModel>();
ctx.formParamMap().forEach((name, entries) -> {
if (name.startsWith("decisionModel")) {
for (var msg : entries) {
DecisionModelMessage
.fromJsonString(msg)
.flatMap(this::decisionMessageToModel)
.ifPresent(decisionModels::add);
}
} else if (name.startsWith(
"designModel")) {
for (var msg : entries) {
DesignModelMessage
.fromJsonString(msg)
.flatMap(this::designMessageToModel)
.ifPresent(designModels::add);

}
}
});
var integrated = reverseIdentification(
decisionModels, designModels);
ctx.result(objectMapper
.writeValueAsString(integrated
.stream()
.map(x -> DesignModelMessage
.from(x))
.collect(Collectors
.toList())));
} else {
ctx.status(500);
}
})
.exception(
Exception.class,
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2 changes: 1 addition & 1 deletion java-bridge-forsyde-io/build.gradle
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Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@ plugins {
id 'idesyde.java-standalone-imodule'
}

def forsydeioVersion = "develop-SNAPSHOT"
def forsydeioVersion = "0.7.14"

dependencies {
testImplementation 'org.junit.jupiter:junit-jupiter-api:5.8.1'
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171 changes: 87 additions & 84 deletions ...eriodicAsynchronousDataflowToPartitionedMemoryMappableMulticoreReverseIdentification.java
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Expand Up @@ -12,95 +12,98 @@
import forsyde.io.lib.hierarchy.ForSyDeHierarchy;

public class AperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticoreReverseIdentification
implements ReverseIdentificationRule {
implements ReverseIdentificationRule {

private Set<DesignModel> innerReverseIdentifyAperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticore(
Set<AperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticore> solvedModels,
Set<ForSyDeIODesignModel> designModels) {
return solvedModels.stream().map(model -> {
var reversedSystemGraph = new SystemGraph();
model.processesToMemoryMapping().forEach((process, mem) -> {
designModels.stream().flatMap(m -> m.systemGraph().queryVertex(process).stream()).findAny()
.ifPresent(procVertex -> {
designModels.stream().flatMap(m -> m.systemGraph().queryVertex(mem).stream()).findAny()
.ifPresent(memVertex -> {
reversedSystemGraph.addVertex(procVertex);
reversedSystemGraph.addVertex(memVertex);
var memMapped = ForSyDeHierarchy.MemoryMapped.enforce(reversedSystemGraph,
procVertex);
memMapped.mappingHost(ForSyDeHierarchy.GenericMemoryModule
.enforce(reversedSystemGraph, memVertex));
ForSyDeHierarchy.GreyBox.enforce(reversedSystemGraph, memVertex)
.addContained(ForSyDeHierarchy.Visualizable.enforce(memMapped));
});
private Set<DesignModel> innerReverseIdentifyAperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticore(
Set<AperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticore> solvedModels,
Set<ForSyDeIODesignModel> designModels) {
return solvedModels.stream().map(model -> {
var reversedSystemGraph = new SystemGraph();
model.processesToMemoryMapping().forEach((process, mem) -> {
var procVertex = reversedSystemGraph.newVertex(process);
var memVertex = reversedSystemGraph.newVertex(mem);
var memMapped = ForSyDeHierarchy.MemoryMapped
.enforce(reversedSystemGraph,
procVertex);
memMapped.mappingHost(
ForSyDeHierarchy.GenericMemoryModule
.enforce(reversedSystemGraph,
memVertex));
ForSyDeHierarchy.GreyBox.enforce(
reversedSystemGraph,
memVertex)
.addContained(ForSyDeHierarchy.Visualizable
.enforce(memMapped));
});
});
model.bufferToMemoryMappings().forEach((buf, mem) -> {
designModels.stream().flatMap(m -> m.systemGraph().queryVertex(buf).stream()).findAny()
.ifPresent(procVertex -> {
designModels.stream().flatMap(m -> m.systemGraph().queryVertex(mem).stream()).findAny()
.ifPresent(memVertex -> {
reversedSystemGraph.addVertex(procVertex);
reversedSystemGraph.addVertex(memVertex);
var memMapped = ForSyDeHierarchy.MemoryMapped.enforce(reversedSystemGraph,
procVertex);
memMapped.mappingHost(ForSyDeHierarchy.GenericMemoryModule
.enforce(reversedSystemGraph, memVertex));
ForSyDeHierarchy.GreyBox.enforce(reversedSystemGraph, memVertex)
.addContained(ForSyDeHierarchy.Visualizable.enforce(memMapped));
});
model.bufferToMemoryMappings().forEach((buf, mem) -> {
var bufVertex = reversedSystemGraph.newVertex(buf);
var memVertex = reversedSystemGraph.newVertex(mem);
var memMapped = ForSyDeHierarchy.MemoryMapped
.enforce(reversedSystemGraph,
bufVertex);
memMapped.mappingHost(
ForSyDeHierarchy.GenericMemoryModule
.enforce(reversedSystemGraph,
memVertex));
ForSyDeHierarchy.GreyBox.enforce(
reversedSystemGraph,
memVertex)
.addContained(ForSyDeHierarchy.Visualizable
.enforce(memMapped));
});
});
model.processesToRuntimeScheduling().forEach((process, sched) -> {
designModels.stream().flatMap(m -> m.systemGraph().queryVertex(process).stream()).findAny()
.ifPresent(procVertex -> {
designModels.stream().flatMap(m -> m.systemGraph().queryVertex(sched).stream()).findAny()
.ifPresent(schedVertex -> {
reversedSystemGraph.addVertex(procVertex);
reversedSystemGraph.addVertex(schedVertex);
var scheduled = ForSyDeHierarchy.Scheduled.enforce(reversedSystemGraph,
procVertex);
scheduled.runtimeHost(ForSyDeHierarchy.AbstractRuntime
.enforce(reversedSystemGraph, schedVertex));
ForSyDeHierarchy.GreyBox.enforce(reversedSystemGraph, schedVertex)
.addContained(ForSyDeHierarchy.Visualizable.enforce(scheduled));
});
model.processesToRuntimeScheduling().forEach((process, sched) -> {
var procVertex = reversedSystemGraph.newVertex(process);
var schedVertex = reversedSystemGraph.newVertex(sched);
var scheduled = ForSyDeHierarchy.Scheduled
.enforce(reversedSystemGraph,
procVertex);
scheduled.runtimeHost(
ForSyDeHierarchy.AbstractRuntime
.enforce(reversedSystemGraph,
schedVertex));
ForSyDeHierarchy.GreyBox.enforce(
reversedSystemGraph,
schedVertex)
.addContained(ForSyDeHierarchy.Visualizable
.enforce(scheduled));
});
});
model.superLoopSchedules().forEach((sched, looplist) -> {
designModels.stream().flatMap(m -> m.systemGraph().queryVertex(sched).stream()).findAny()
.ifPresent(schedVertex -> {
var scheduler = ForSyDeHierarchy.SuperLoopRuntime.enforce(reversedSystemGraph, schedVertex);
scheduler.superLoopEntries(looplist);
model.superLoopSchedules().forEach((sched, looplist) -> {
var schedVertex = reversedSystemGraph.newVertex(sched);
var scheduler = ForSyDeHierarchy.SuperLoopRuntime
.enforce(reversedSystemGraph, schedVertex);
scheduler.superLoopEntries(looplist);
});
});
model.aperiodicAsynchronousDataflows()
.forEach(app -> app.processMinimumThroughput().entrySet().forEach(e -> {
var process = reversedSystemGraph.queryVertex(e.getKey())
.orElse(reversedSystemGraph.newVertex(e.getKey()));
var behaviour = ForSyDeHierarchy.AnalyzedBehavior
.enforce(reversedSystemGraph, process);
var scale = 1.0;
while (Math.ceil(e.getValue() * scale)
- (e.getValue() * scale) > 0.0001) {
scale *= 10.0;
model.aperiodicAsynchronousDataflows()
.forEach(app -> app.processMinimumThroughput().entrySet().forEach(e -> {
var process = reversedSystemGraph.queryVertex(e.getKey())
.orElse(reversedSystemGraph.newVertex(e.getKey()));
var behaviour = ForSyDeHierarchy.AnalyzedBehavior
.enforce(reversedSystemGraph, process);
var scale = 1.0;
while (Math.ceil(e.getValue() * scale)
- (e.getValue() * scale) > 0.0001) {
scale *= 10.0;
}
behaviour.setThroughputInSecsDenominator((long) (e.getValue() * scale));
behaviour.setThroughputInSecsNumerator((long) scale);
}));
for (var x : designModels) {
reversedSystemGraph.mergeInPlace(x.systemGraph());
}
behaviour.setThroughputInSecsDenominator((long) (e.getValue() * scale));
behaviour.setThroughputInSecsNumerator((long) scale);
}));
return new ForSyDeIODesignModel(reversedSystemGraph);
}).collect(Collectors.toSet());
}
return new ForSyDeIODesignModel(reversedSystemGraph);
}).collect(Collectors.toSet());
}

@Override
public Set<DesignModel> apply(Set<? extends DecisionModel> t, Set<? extends DesignModel> u) {
var filteredSolved = t.stream()
.filter(x -> x instanceof AperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticore)
.map(x -> (AperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticore) x)
.collect(Collectors.toSet());
var filteredDesign = u.stream().filter(x -> x instanceof ForSyDeIODesignModel)
.map(x -> (ForSyDeIODesignModel) x).collect(Collectors.toSet());
return innerReverseIdentifyAperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticore(filteredSolved,
filteredDesign);
}
@Override
public Set<DesignModel> apply(Set<? extends DecisionModel> t, Set<? extends DesignModel> u) {
var filteredSolved = t.stream()
.filter(x -> x instanceof AperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticore)
.map(x -> (AperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticore) x)
.collect(Collectors.toSet());
var filteredDesign = u.stream().filter(x -> x instanceof ForSyDeIODesignModel)
.map(x -> (ForSyDeIODesignModel) x).collect(Collectors.toSet());
return innerReverseIdentifyAperiodicAsynchronousDataflowToPartitionedMemoryMappableMulticore(
filteredSolved,
filteredDesign);
}
}
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