Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

solved some problemsgit add .git add .git add .git add .git add .git … #68

Open
wants to merge 2 commits into
base: master
Choose a base branch
from
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
7 changes: 5 additions & 2 deletions tmc/ic/TMC2130/TMC2130.c
Original file line number Diff line number Diff line change
Expand Up @@ -121,10 +121,13 @@ void tmc2130_initCache()
{
for (id = 0; id < TMC2130_IC_CACHE_COUNT; id++)
{
tmc2130_cache(id, TMC2130_CACHE_FILL_DEFAULT, i, &tmc2130_RegisterConstants[j].value);
uint32_t value = tmc2130_RegisterConstants[j].value;
tmc2130_cache(id, TMC2130_CACHE_FILL_DEFAULT, i, &value);
}
}
}

(void)motor;
}
#else
// User must implement their own cache
Expand Down Expand Up @@ -186,6 +189,6 @@ void writeRegisterSPI(uint16_t icID, uint8_t address, int32_t value)
// Send the write request
tmc2130_readWriteSPI(icID, &data[0], sizeof(data));
//Cache the registers with write-only access
tmc2130_cache(icID, TMC2130_CACHE_WRITE, address, &value);
tmc2130_cache(icID, TMC2130_CACHE_WRITE, address, (uint32_t*)&value);
}
/***************************************************************************************************************************************************************/
6 changes: 4 additions & 2 deletions tmc/ic/TMC2160/TMC2160.c
Original file line number Diff line number Diff line change
Expand Up @@ -119,10 +119,12 @@ void tmc2160_initCache()
{
for (id = 0; id < TMC2160_IC_CACHE_COUNT; id++)
{
tmc2160_cache(id, TMC2160_CACHE_FILL_DEFAULT, i, &tmc2160_RegisterConstants[j].value);
uint32_t value = tmc2160_RegisterConstants[j].value;
tmc2160_cache(id, TMC2160_CACHE_FILL_DEFAULT, i, &value);
}
}
}
(void)motor;
}
#else
// User must implement their own cache
Expand Down Expand Up @@ -184,6 +186,6 @@ void writeRegisterSPI(uint16_t icID, uint8_t address, int32_t value)
tmc2160_readWriteSPI(icID, &data[0], sizeof(data));

//Cache the registers with write-only access
tmc2160_cache(icID, TMC2160_CACHE_WRITE, address, &value);
tmc2160_cache(icID, TMC2160_CACHE_WRITE, address, (uint32_t*)&value);

}
4 changes: 2 additions & 2 deletions tmc/ic/TMC2208/TMC2208.c
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@
#ifdef TMC_API_EXTERNAL_CRC_TABLE
extern const uint8_t tmcCRCTable_Poly7Reflected[256];
#else
const uint8_t tmcCRCTable_Poly7Reflected[256] = {
static const uint8_t tmcCRCTable_Poly7Reflected[256] = {
0x00, 0x91, 0xE3, 0x72, 0x07, 0x96, 0xE4, 0x75, 0x0E, 0x9F, 0xED, 0x7C, 0x09, 0x98, 0xEA, 0x7B,
0x1C, 0x8D, 0xFF, 0x6E, 0x1B, 0x8A, 0xF8, 0x69, 0x12, 0x83, 0xF1, 0x60, 0x15, 0x84, 0xF6, 0x67,
0x38, 0xA9, 0xDB, 0x4A, 0x3F, 0xAE, 0xDC, 0x4D, 0x36, 0xA7, 0xD5, 0x44, 0x31, 0xA0, 0xD2, 0x43,
Expand Down Expand Up @@ -188,7 +188,7 @@ void writeRegisterUART(uint16_t icID, uint8_t registerAddress, int32_t value)
tmc2208_readWriteUART(icID, &data[0], 8, 0);

//Cache the registers with write-only access
tmc2208_cache(icID, TMC2208_CACHE_WRITE, registerAddress, &value);
tmc2208_cache(icID, TMC2208_CACHE_WRITE, registerAddress, (uint32_t*)&value);
}

static uint8_t CRC8(uint8_t *data, uint32_t bytes)
Expand Down
2 changes: 1 addition & 1 deletion tmc/ic/TMC2209/Examples/TMC2209_Simple_Rotation.c
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@
* Configures the registers with the right settings that are needed for rotating the motor.
* E.g Enabling driver, setting IRUN current etc.
*/
void initAllMotors(uint16_t icID)
void TMC2209initAllMotors(uint16_t icID)
{
tmc2209_writeRegister(icID, TMC2209_GCONF, 0x00000040);
tmc2209_writeRegister(icID, TMC2209_IHOLD_IRUN, 0x00071703);
Expand Down
4 changes: 2 additions & 2 deletions tmc/ic/TMC2209/Examples/TMC2209_Simple_Rotation.h
Original file line number Diff line number Diff line change
Expand Up @@ -7,8 +7,8 @@
#ifndef TMC2209_SIMPLE_ROTATION_H_
#define TMC2209_SIMPLE_ROTATION_H_

#include "TMC2209.h"
#include "../TMC2209.h"

void initAllMotors(uint16_t icID);
void TMC2209initAllMotors(uint16_t icID);

#endif
4 changes: 2 additions & 2 deletions tmc/ic/TMC2209/TMC2209.c
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@
#ifdef TMC_API_EXTERNAL_CRC_TABLE
extern const uint8_t tmcCRCTable_Poly7Reflected[256];
#else
const uint8_t tmcCRCTable_Poly7Reflected[256] = {
static const uint8_t tmcCRCTable_Poly7Reflected[256] = {
0x00, 0x91, 0xE3, 0x72, 0x07, 0x96, 0xE4, 0x75, 0x0E, 0x9F, 0xED, 0x7C, 0x09, 0x98, 0xEA, 0x7B,
0x1C, 0x8D, 0xFF, 0x6E, 0x1B, 0x8A, 0xF8, 0x69, 0x12, 0x83, 0xF1, 0x60, 0x15, 0x84, 0xF6, 0x67,
0x38, 0xA9, 0xDB, 0x4A, 0x3F, 0xAE, 0xDC, 0x4D, 0x36, 0xA7, 0xD5, 0x44, 0x31, 0xA0, 0xD2, 0x43,
Expand Down Expand Up @@ -185,7 +185,7 @@ void writeRegisterUART(uint16_t icID, uint8_t address, int32_t value)
tmc2209_readWriteUART(icID, &data[0], 8, 0);

//Cache the registers with write-only access
tmc2209_cache(icID, TMC2209_CACHE_WRITE, address, &value);
tmc2209_cache(icID, TMC2209_CACHE_WRITE, address, (uint32_t*)&value);
}

static uint8_t CRC8(uint8_t *data, uint32_t bytes)
Expand Down
4 changes: 2 additions & 2 deletions tmc/ic/TMC2224/TMC2224.c
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@
#ifdef TMC_API_EXTERNAL_CRC_TABLE
extern const uint8_t tmcCRCTable_Poly7Reflected[256];
#else
const uint8_t tmcCRCTable_Poly7Reflected[256] = {
static const uint8_t tmcCRCTable_Poly7Reflected[256] = {
0x00, 0x91, 0xE3, 0x72, 0x07, 0x96, 0xE4, 0x75, 0x0E, 0x9F, 0xED, 0x7C, 0x09, 0x98, 0xEA, 0x7B,
0x1C, 0x8D, 0xFF, 0x6E, 0x1B, 0x8A, 0xF8, 0x69, 0x12, 0x83, 0xF1, 0x60, 0x15, 0x84, 0xF6, 0x67,
0x38, 0xA9, 0xDB, 0x4A, 0x3F, 0xAE, 0xDC, 0x4D, 0x36, 0xA7, 0xD5, 0x44, 0x31, 0xA0, 0xD2, 0x43,
Expand Down Expand Up @@ -187,7 +187,7 @@ void writeRegisterUART(uint16_t icID, uint8_t address, int32_t value)
tmc2224_readWriteUART(icID, &data[0], 8, 0);

//Cache the registers with write-only access
tmc2224_cache(icID, TMC2224_CACHE_WRITE, address, &value);
tmc2224_cache(icID, TMC2224_CACHE_WRITE, address, (uint32_t*)&value);
}

static uint8_t CRC8(uint8_t *data, uint32_t bytes)
Expand Down
5 changes: 3 additions & 2 deletions tmc/ic/TMC2225/TMC2225.c
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@
#ifdef TMC_API_EXTERNAL_CRC_TABLE
extern const uint8_t tmcCRCTable_Poly7Reflected[256];
#else
const uint8_t tmcCRCTable_Poly7Reflected[256] = {
static const uint8_t tmcCRCTable_Poly7Reflected[256] = {
0x00, 0x91, 0xE3, 0x72, 0x07, 0x96, 0xE4, 0x75, 0x0E, 0x9F, 0xED, 0x7C, 0x09, 0x98, 0xEA, 0x7B,
0x1C, 0x8D, 0xFF, 0x6E, 0x1B, 0x8A, 0xF8, 0x69, 0x12, 0x83, 0xF1, 0x60, 0x15, 0x84, 0xF6, 0x67,
0x38, 0xA9, 0xDB, 0x4A, 0x3F, 0xAE, 0xDC, 0x4D, 0x36, 0xA7, 0xD5, 0x44, 0x31, 0xA0, 0xD2, 0x43,
Expand Down Expand Up @@ -190,7 +190,7 @@ void writeRegisterUART(uint16_t icID, uint8_t registerAddress, int32_t value)
tmc2225_readWriteUART(icID, &data[0], 8, 0);

//Cache the registers with write-only access
tmc2225_cache(icID, TMC2225_CACHE_WRITE, registerAddress, &value);
tmc2225_cache(icID, TMC2225_CACHE_WRITE, registerAddress, (uint32_t*)&value);
}

static uint8_t CRC8(uint8_t *data, uint32_t bytes)
Expand All @@ -208,5 +208,6 @@ static uint8_t CRC8(uint8_t *data, uint32_t bytes)
// swap nibbles ...
result = ((result >> 4) & 0x0F) | ((result & 0x0F) << 4);

(void)table;
return result;
}
4 changes: 2 additions & 2 deletions tmc/ic/TMC2226/TMC2226.c
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@
#ifdef TMC_API_EXTERNAL_CRC_TABLE
extern const uint8_t tmcCRCTable_Poly7Reflected[256];
#else
const uint8_t tmcCRCTable_Poly7Reflected[256] = {
static const uint8_t tmcCRCTable_Poly7Reflected[256] = {
0x00, 0x91, 0xE3, 0x72, 0x07, 0x96, 0xE4, 0x75, 0x0E, 0x9F, 0xED, 0x7C, 0x09, 0x98, 0xEA, 0x7B,
0x1C, 0x8D, 0xFF, 0x6E, 0x1B, 0x8A, 0xF8, 0x69, 0x12, 0x83, 0xF1, 0x60, 0x15, 0x84, 0xF6, 0x67,
0x38, 0xA9, 0xDB, 0x4A, 0x3F, 0xAE, 0xDC, 0x4D, 0x36, 0xA7, 0xD5, 0x44, 0x31, 0xA0, 0xD2, 0x43,
Expand Down Expand Up @@ -190,7 +190,7 @@ void writeRegisterUART(uint16_t icID, uint8_t registerAddress, int32_t value)
tmc2226_readWriteUART(icID, &data[0], 8, 0);

//Cache the registers with write-only access
tmc2226_cache(icID, TMC2226_CACHE_WRITE, registerAddress, &value);
tmc2226_cache(icID, TMC2226_CACHE_WRITE, registerAddress, (uint32_t*)&value);
}

static uint8_t CRC8(uint8_t *data, uint32_t bytes)
Expand Down
7 changes: 4 additions & 3 deletions tmc/ic/TMC2240/TMC2240.c
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
#ifdef TMC_API_EXTERNAL_CRC_TABLE
extern const uint8_t tmcCRCTable_Poly7Reflected[256];
#else
const uint8_t tmcCRCTable_Poly7Reflected[256] = {
static const uint8_t tmcCRCTable_Poly7Reflected[256] = {
0x00, 0x91, 0xE3, 0x72, 0x07, 0x96, 0xE4, 0x75, 0x0E, 0x9F, 0xED, 0x7C, 0x09, 0x98, 0xEA, 0x7B,
0x38, 0xA9, 0xDB, 0x4A, 0x3F, 0xAE, 0xDC, 0x4D, 0x36, 0xA7, 0xD5, 0x44, 0x31, 0xA0, 0xD2, 0x43,
0x24, 0xB5, 0xC7, 0x56, 0x23, 0xB2, 0xC0, 0x51, 0x2A, 0xBB, 0xC9, 0x58, 0x2D, 0xBC, 0xCE, 0x5F,
Expand Down Expand Up @@ -142,7 +142,8 @@ void tmc2240_initCache()
{
for (id = 0; id < TMC2240_IC_CACHE_COUNT; id++)
{
tmc2240_cache(id, TMC2240_CACHE_FILL_DEFAULT, i, &tmc2240_RegisterConstants[j].value);
uint32_t value = tmc2240_RegisterConstants[j].value;
tmc2240_cache(id, TMC2240_CACHE_FILL_DEFAULT, i, &value);
}
}
}
Expand Down Expand Up @@ -199,7 +200,7 @@ void tmc2240_writeRegister(uint16_t icID, uint8_t address, int32_t value)
writeRegisterUART(icID, address, value);
}
//Cache the registers with write-only access
tmc2240_cache(icID, TMC2240_CACHE_WRITE, address, &value);
tmc2240_cache(icID, TMC2240_CACHE_WRITE, address, (uint32_t*)&value);
}

int32_t readRegisterSPI(uint16_t icID, uint8_t address)
Expand Down
8 changes: 5 additions & 3 deletions tmc/ic/TMC2300/TMC2300.c
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
#ifdef TMC_API_EXTERNAL_CRC_TABLE
extern const uint8_t tmcCRCTable_Poly7Reflected[256];
#else
const uint8_t tmcCRCTable_Poly7Reflected[256] = {
static const uint8_t tmcCRCTable_Poly7Reflected[256] = {
0x00, 0x91, 0xE3, 0x72, 0x07, 0x96, 0xE4, 0x75, 0x0E, 0x9F, 0xED, 0x7C, 0x09, 0x98, 0xEA, 0x7B,
0x1C, 0x8D, 0xFF, 0x6E, 0x1B, 0x8A, 0xF8, 0x69, 0x12, 0x83, 0xF1, 0x60, 0x15, 0x84, 0xF6, 0x67,
0x38, 0xA9, 0xDB, 0x4A, 0x3F, 0xAE, 0xDC, 0x4D, 0x36, 0xA7, 0xD5, 0x44, 0x31, 0xA0, 0xD2, 0x43,
Expand Down Expand Up @@ -142,10 +142,12 @@ void tmc2300_initCache()
{
for (id = 0; id < TMC2300_IC_CACHE_COUNT; id++)
{
tmc2300_cache(id, TMC2300_CACHE_FILL_DEFAULT, i, &tmc2300_RegisterConstants[j].value);
uint32_t value = tmc2300_RegisterConstants[j].value;
tmc2300_cache(id, TMC2300_CACHE_FILL_DEFAULT, i, &value);
}
}
}
(void)motor;
}
#else
// User must implement their own cache
Expand Down Expand Up @@ -226,7 +228,7 @@ void writeRegisterUART(uint16_t icID, uint8_t registerAddress, int32_t value)
tmc2300_readWriteUART(icID, &data[0], 8, 0);

//Cache the registers with write-only access
tmc2300_cache(icID, TMC2300_CACHE_WRITE, registerAddress, &value);
tmc2300_cache(icID, TMC2300_CACHE_WRITE, registerAddress, (uint32_t*)&value);

}

Expand Down
6 changes: 4 additions & 2 deletions tmc/ic/TMC5031/TMC5031.c
Original file line number Diff line number Diff line change
Expand Up @@ -119,10 +119,12 @@ void tmc5031_initCache()
{
for (id = 0; id < TMC5031_IC_CACHE_COUNT; id++)
{
tmc5031_cache(id, TMC5031_CACHE_FILL_DEFAULT, i, &tmc5031_RegisterConstants[j].value);
uint32_t value = tmc5031_RegisterConstants[j].value;
tmc5031_cache(id, TMC5031_CACHE_FILL_DEFAULT, i, &value);
}
}
}
(void)motor;
}
#else
// User must implement their own cache
Expand Down Expand Up @@ -186,5 +188,5 @@ void writeRegisterSPI(uint16_t icID, uint8_t address, int32_t value)
tmc5031_readWriteSPI(icID, &data[0], sizeof(data));

//Cache the registers with write-only access
tmc5031_cache(icID, TMC5031_CACHE_WRITE, address, &value);
tmc5031_cache(icID, TMC5031_CACHE_WRITE, address, (uint32_t*)&value);
}
11 changes: 9 additions & 2 deletions tmc/ic/TMC5041/TMC5041.c
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,11 @@

#include "TMC5041.h"

// => SPI wrapper
extern void tmc5041_readWriteSPI(uint16_t icID, uint8_t *data, size_t dataLength);
// <= SPI wrapper



/**************************************************************** Cache Implementation *************************************************************************/

Expand Down Expand Up @@ -121,10 +126,12 @@ void tmc5041_initCache()
{
for (id = 0; id < TMC5041_IC_CACHE_COUNT; id++)
{
tmc5041_cache(id, TMC5041_CACHE_FILL_DEFAULT, i, &tmc5041_RegisterConstants[j].value);
uint32_t value = tmc5041_RegisterConstants[j].value;
tmc5041_cache(id, TMC5041_CACHE_FILL_DEFAULT, i, &value);
}
}
}
(void)motor;
}
#else
// User must implement their own cache
Expand Down Expand Up @@ -189,5 +196,5 @@ void writeRegisterSPI(uint16_t icID, uint8_t address, int32_t value)
tmc5041_readWriteSPI(icID, &data[0], sizeof(data));

//Cache the registers with write-only access
tmc5041_cache(icID, TMC5041_CACHE_WRITE, address, &value);
tmc5041_cache(icID, TMC5041_CACHE_WRITE, address, (uint32_t*)&value);
}
10 changes: 6 additions & 4 deletions tmc/ic/TMC5062/TMC5062.c
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@
#ifdef TMC_API_EXTERNAL_CRC_TABLE
extern const uint8_t tmcCRCTable_Poly7Reflected[256];
#else
const uint8_t tmcCRCTable_Poly7Reflected[256] = {
static const uint8_t tmcCRCTable_Poly7Reflected[256] = {
0x00, 0x91, 0xE3, 0x72, 0x07, 0x96, 0xE4, 0x75, 0x0E, 0x9F, 0xED, 0x7C, 0x09, 0x98, 0xEA, 0x7B,
0x1C, 0x8D, 0xFF, 0x6E, 0x1B, 0x8A, 0xF8, 0x69, 0x12, 0x83, 0xF1, 0x60, 0x15, 0x84, 0xF6, 0x67,
0x38, 0xA9, 0xDB, 0x4A, 0x3F, 0xAE, 0xDC, 0x4D, 0x36, 0xA7, 0xD5, 0x44, 0x31, 0xA0, 0xD2, 0x43,
Expand Down Expand Up @@ -141,7 +141,8 @@ void tmc5062_initCache()
{
for (id = 0; id < TMC5062_IC_CACHE_COUNT; id++)
{
tmc5062_cache(id, TMC5062_CACHE_FILL_DEFAULT, i, &tmc5062_RegisterConstants[j].value);
uint32_t value = tmc5062_RegisterConstants[j].value;
tmc5062_cache(id, TMC5062_CACHE_FILL_DEFAULT, i, &value);
}
}
}
Expand Down Expand Up @@ -235,7 +236,7 @@ void writeRegisterSPI(uint16_t icID, uint8_t address, int32_t value)
tmc5062_readWriteSPI(icID, &data[0], sizeof(data));

//Cache the registers with write-only access
tmc5062_cache(icID, TMC5062_CACHE_WRITE, address, &value);
tmc5062_cache(icID, TMC5062_CACHE_WRITE, address, (uint32_t*)&value);
}

int32_t readRegisterUART(uint16_t icID, uint8_t address)
Expand Down Expand Up @@ -281,7 +282,7 @@ void writeRegisterUART(uint16_t icID, uint8_t address, int32_t value)
tmc5062_readWriteUART(icID, &data[0], 7, 0);

//Cache the registers with write-only access
tmc5062_cache(icID, TMC5062_CACHE_WRITE, address, &value);
tmc5062_cache(icID, TMC5062_CACHE_WRITE, address, (uint32_t*)&value);
}

void tmc5062_rotateMotor(uint16_t icID, uint8_t motor, int32_t velocity)
Expand Down Expand Up @@ -309,5 +310,6 @@ static uint8_t CRC8(uint8_t *data, uint32_t bytes)
// swap nibbles ...
result = ((result >> 4) & 0x0F) | ((result & 0x0F) << 4);

(void)table;
return result;
}
9 changes: 6 additions & 3 deletions tmc/ic/TMC5072/TMC5072.c
Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,7 @@
#ifdef TMC_API_EXTERNAL_CRC_TABLE
extern const uint8_t tmcCRCTable_Poly7Reflected[256];
#else
const uint8_t tmcCRCTable_Poly7Reflected[256] = {
static const uint8_t tmcCRCTable_Poly7Reflected[256] = {
0x00, 0x91, 0xE3, 0x72, 0x07, 0x96, 0xE4, 0x75, 0x0E, 0x9F, 0xED, 0x7C, 0x09, 0x98, 0xEA, 0x7B,
0x1C, 0x8D, 0xFF, 0x6E, 0x1B, 0x8A, 0xF8, 0x69, 0x12, 0x83, 0xF1, 0x60, 0x15, 0x84, 0xF6, 0x67,
0x38, 0xA9, 0xDB, 0x4A, 0x3F, 0xAE, 0xDC, 0x4D, 0x36, 0xA7, 0xD5, 0x44, 0x31, 0xA0, 0xD2, 0x43,
Expand Down Expand Up @@ -141,10 +141,12 @@ void tmc5072_initCache()
{
for (id = 0; id < TMC5072_IC_CACHE_COUNT; id++)
{
tmc5072_cache(id, TMC5072_CACHE_FILL_DEFAULT, i, &tmc5072_RegisterConstants[j].value);
uint32_t value = tmc5072_RegisterConstants[j].value;
tmc5072_cache(id, TMC5072_CACHE_FILL_DEFAULT, i, &value);
}
}
}
(void)motor;
}
#else
// User must implement their own cache
Expand Down Expand Up @@ -196,7 +198,7 @@ void tmc5072_writeRegister(uint16_t icID, uint8_t address, int32_t value)
}

//Cache the registers with write-only access
tmc5072_cache(icID, TMC5072_CACHE_WRITE, address, &value);
tmc5072_cache(icID, TMC5072_CACHE_WRITE, address, (uint32_t*)&value);
}

int32_t readRegisterSPI(uint16_t icID, uint8_t address)
Expand Down Expand Up @@ -298,6 +300,7 @@ static uint8_t CRC8(uint8_t *data, uint32_t bytes)
// swap nibbles ...
result = ((result >> 4) & 0x0F) | ((result & 0x0F) << 4);

(void)table;
return result;
}

Expand Down
2 changes: 1 addition & 1 deletion tmc/ic/TMC5130/Examples/TMC5130_Simple_Rotation.c
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@
* Configures the registers with the right settings that are needed for rotating the motor.
* E.g Enabling driver, setting IRUN current etc.
*/
void initAllMotors(uint16_t icID)
void TMC5130initAllMotors(uint16_t icID)
{
tmc5130_writeRegister(icID, TMC5130_GCONF, 0x00000000); // Digital current scaling, SpreadCycle mode

Expand Down
4 changes: 2 additions & 2 deletions tmc/ic/TMC5130/Examples/TMC5130_Simple_Rotation.h
Original file line number Diff line number Diff line change
Expand Up @@ -7,8 +7,8 @@
#ifndef TMC5130_SIMPLE_ROTATION_H_
#define TMC5130_SIMPLE_ROTATION_H_

#include "TMC5130.h"
#include "../TMC5130.h"

void initAllMotors(uint16_t icID);
void TMC5130initAllMotors(uint16_t icID);

#endif
Loading