OS-6731 expose microcode level as property on strand topo nodes

usr/src/lib/fm/topo/modules/i86pc/chip/chip.c

@@ -213,11 +213,14 @@ create_strand(topo_mod_t *mod, tnode_t *pnode, nvlist_t *cpu,
 {
 	tnode_t *strand;
 	int32_t strandid, cpuid;
+	uint32_t ucode_rev;
 	int err, perr, nerr = 0;
 	nvlist_t *fmri;
 	char *serial = NULL;
 	char *part = NULL;
 	char *rev = NULL;
+	char *ucode_rev_str;
+	topo_ufm_slot_info_t slotinfo = { 0 };
 
 	if ((err = nvlist_lookup_int32(cpu, FM_PHYSCPU_INFO_STRAND_ID,
 	    &strandid)) != 0) {
@@ -331,6 +334,23 @@ create_strand(topo_mod_t *mod, tnode_t *pnode, nvlist_t *cpu,
 		topo_mod_strfree(mod, serial);
 	}
 
+	if (nvlist_lookup_uint32(cpu, FM_PHYSCPU_INFO_UCODE_REV, &ucode_rev) !=
+	    0 ||
+	    asprintf(&ucode_rev_str, "%d", ucode_rev) < 0) {
+		whinge(mod, NULL, "failed to lookup ucode version on %s=%d",
+		    STRAND, strandid);
+	} else {
+		slotinfo.usi_version = ucode_rev_str;
+		slotinfo.usi_active = B_TRUE;
+		slotinfo.usi_mode = TOPO_UFM_SLOT_MODE_WO;
+		if (topo_node_range_create(mod, strand, UFM, 0, 0) != 0 ||
+		    topo_mod_create_ufm(mod, strand, "microcode", &slotinfo) ==
+		    NULL) {
+			whinge(mod, NULL, "failed to create %s node on %s/%d",
+			    UFM, STRAND, strandid);
+		}
+	}
+
 	return (err == 0 && nerr == 0 ? 0 : -1);
 }
 

usr/src/uts/common/sys/devfm.h

@@ -21,7 +21,7 @@
 /*
  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
- * Copyright (c) 2018, Joyent, Inc.
+ * Copyright 2019 Joyent, Inc.
  */
 
 #ifndef	_SYS_DEVFM_H
@@ -122,6 +122,7 @@ typedef struct fm_ioc_data32 {
 #define	FM_PHYSCPU_INFO_SOCKET_TYPE	"socket_type"
 #define	FM_PHYSCPU_INFO_CPU_ID		"cpuid"
 #define	FM_PHYSCPU_INFO_CHIP_IDENTSTR	"chip_identstr"
+#define	FM_PHYSCPU_INFO_UCODE_REV	"ucode_revision"
 
 #ifdef	__cplusplus
 }

usr/src/uts/i86pc/os/cmi_hw.c

@@ -21,7 +21,7 @@
 
 /*
  * Copyright (c) 2007, 2010, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2019, Joyent, Inc.
+ * Copyright 2019 Joyent, Inc.
  */
 /*
  * Copyright (c) 2010, Intel Corporation.
@@ -125,6 +125,8 @@ struct cmi_hdl_ops {
 	uint_t (*cmio_chipsig)(cmi_hdl_impl_t *);
 
 	id_t (*cmio_logical_id)(cmi_hdl_impl_t *);
+	uint32_t (*cmio_ucode_rev)(cmi_hdl_impl_t *);
+
 	/*
 	 * These ops are optional in an implementation.
 	 */
@@ -867,6 +869,13 @@ ntv_online(cmi_hdl_impl_t *hdl, int new_status, int *old_status)
 	return (rc);
 }
 
+static uint32_t
+ntv_ucode_rev(cmi_hdl_impl_t *hdl)
+{
+	return (cpuid_get_ucode_rev(HDLPRIV(hdl)));
+}
+
+
 #else	/* __xpv */
 
 /*
@@ -1641,6 +1650,14 @@ CMI_HDL_OPFUNC(smb_bboard, nvlist_t *)
 CMI_HDL_OPFUNC(chipsig, uint_t)
 /* END CSTYLED */
 
+#ifndef __xpv
+uint32_t
+cmi_hdl_ucode_rev(cmi_hdl_t ophdl)
+{
+	return (ntv_ucode_rev(IMPLHDL(ophdl)));
+}
+#endif
+
 boolean_t
 cmi_hdl_is_cmt(cmi_hdl_t ophdl)
 {
@@ -2018,6 +2035,7 @@ static const struct cmi_hdl_ops cmi_hdl_ops = {
 	xpv_getsocketstr,	/* cmio_getsocketstr */
 	xpv_chipsig,		/* cmio_chipsig */
 	xpv_logical_id,		/* cmio_logical_id */
+	NULL,			/* cmio_ucoderev */
 	NULL,			/* cmio_getcr4 */
 	NULL,			/* cmio_setcr4 */
 	xpv_rdmsr,		/* cmio_rdmsr */
@@ -2051,6 +2069,7 @@ static const struct cmi_hdl_ops cmi_hdl_ops = {
 	ntv_getsocketstr,	/* cmio_getsocketstr */
 	ntv_chipsig,		/* cmio_chipsig */
 	ntv_logical_id,		/* cmio_logical_id */
+	ntv_ucode_rev,		/* cmio_ucoderev */
 	ntv_getcr4,		/* cmio_getcr4 */
 	ntv_setcr4,		/* cmio_setcr4 */
 	ntv_rdmsr,		/* cmio_rdmsr */

usr/src/uts/i86pc/os/cpuid.c

@@ -5177,6 +5177,12 @@ cpuid_get_dtlb_nent(cpu_t *cpu, size_t pagesize)
 	return (dtlb_nent);
 }
 
+uint32_t
+cpuid_get_ucode_rev(cpu_t *cpu)
+{
+	return (cpu->cpu_m.mcpu_ucode_info->cui_rev);
+}
+
 /*
  * Return 0 if the erratum is not present or not applicable, positive
  * if it is, and negative if the status of the erratum is unknown.

usr/src/uts/intel/io/devfm_machdep.c

@@ -21,7 +21,7 @@
 /*
  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
- * Copyright (c) 2018, Joyent, Inc.
+ * Copyright 2019 Joyent, Inc.
  */
 
 #include <sys/stat.h>
@@ -204,6 +204,8 @@ populate_cpu(nvlist_t **nvlp, cmi_hdl_t hdl)
 	    (uint32_t)cmi_hdl_getsockettype(hdl),
 	    FM_PHYSCPU_INFO_CPU_ID, DATA_TYPE_INT32,
 	    (int32_t)cmi_hdl_logical_id(hdl),
+	    FM_PHYSCPU_INFO_UCODE_REV, DATA_TYPE_UINT32,
+	    cmi_hdl_ucode_rev(hdl),
 	    NULL);
 
 	/*

usr/src/uts/intel/sys/cpu_module.h

@@ -22,7 +22,7 @@
 /*
  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
- * Copyright (c) 2018, Joyent, Inc.
+ * Copyright 2019 Joyent, Inc.
  */
 
 #ifndef _SYS_CPU_MODULE_H
@@ -166,6 +166,7 @@ extern uint_t cmi_hdl_smb_chipid(cmi_hdl_t);
 extern nvlist_t *cmi_hdl_smb_bboard(cmi_hdl_t);
 extern uint_t cmi_hdl_chipsig(cmi_hdl_t);
 extern const char *cmi_hdl_chipident(cmi_hdl_t);
+extern uint32_t cmi_hdl_ucode_rev(cmi_hdl_t);
 
 extern int cmi_hdl_online(cmi_hdl_t, int, int *);
 

usr/src/uts/intel/sys/x86_archext.h

@@ -1186,6 +1186,8 @@ extern int cpuid_have_cr8access(struct cpu *);
 
 extern int cpuid_opteron_erratum(struct cpu *, uint_t);
 
+extern uint32_t cpuid_get_ucode_rev(struct cpu *);
+
 struct cpuid_info;
 
 extern void setx86isalist(void);