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[SC64][SW] Server performance increase / USB save writeback / bootloa…
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…der fixes (#37)
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Polprzewodnikowy authored Apr 4, 2023
1 parent 066f3b0 commit 7afb0ef
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Showing 24 changed files with 993 additions and 656 deletions.
1 change: 1 addition & 0 deletions docs/02_usb_commands.md
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,7 @@
| `M` | **MEMORY_WRITE** | address | length | data | --- | Write data to specified memory address |
| `U` | **USB_WRITE** | type | length | data | N/A | Send data to be received by app running on N64 (no response!) |
| `D` | **DD_SET_BLOCK_READY** | success | --- | --- | --- | Notify flashcart about 64DD block readiness |
| `W` | **WRITEBACK_ENABLE** | --- | --- | --- | --- | Enable save writeback through USB packet |
| `p` | **FLASH_WAIT_BUSY** | wait | --- | --- | erase_block_size | Wait until flash ready / Get flash block erase size |
| `P` | **FLASH_ERASE_BLOCK** | address | --- | --- | --- | Start flash block erase |
| `f` | **FIRMWARE_BACKUP** | address | --- | --- | status/length | Backup firmware to specified memory address |
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7 changes: 4 additions & 3 deletions docs/04_config_options.md
Original file line number Diff line number Diff line change
Expand Up @@ -132,9 +132,10 @@ type: *enum* | default: `0`
- `3` - SRAM 256 kib save is enabled
- `4` - FlashRAM 1 Mib save is enabled
- `5` - SRAM 768 kib save is enabled
- `6` - SRAM 1 Mib save is enabled

Use this setting for selecting save type that will be emulated. Only one save type can be enabled.
Any successful write to this config will disable automatic save writeback to SD card when previously enabled.
Any successful write to this config will disable automatic save writeback to USB or SD card when previously enabled.

---

Expand All @@ -158,10 +159,10 @@ type: *enum* | default: `3`
- `0` - PAL TV type will be used
- `1` - NTSC TV type will be used
- `2` - MPAL TV type will be used
- `3` - TV type will be autodetected
- `3` - Console native TV type will be used

Use this setting to force specific TV type.
By setting value `3` bootloader will try to guess TV type from loaded ROM header.
By setting value `3` bootloader will passthrough TV type native to the console.
This setting is not used when **BOOT_MODE** is set to `3` or `4` (direct boot).

---
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35 changes: 3 additions & 32 deletions sw/bootloader/src/boot.c
Original file line number Diff line number Diff line change
Expand Up @@ -37,33 +37,6 @@ static io32_t *boot_get_device_base (boot_info_t *info) {
return device_base_address;
}

static bool boot_get_tv_type (boot_info_t *info) {
io32_t *base = boot_get_device_base(info);

char region = ((pi_io_read(&base[15]) >> 8) & 0xFF);

switch (region) {
case 'P':
case 'U':
info->tv_type = BOOT_TV_TYPE_PAL;
break;

case 'E':
case 'J':
info->tv_type = BOOT_TV_TYPE_NTSC;
break;

case 'B':
info->tv_type = BOOT_TV_TYPE_MPAL;
break;

default:
return false;
}

return true;
}

static bool boot_get_cic_seed (boot_info_t *info) {
io32_t *base = boot_get_device_base(info);

Expand All @@ -83,11 +56,9 @@ static bool boot_get_cic_seed (boot_info_t *info) {
return false;
}

void boot (boot_info_t *info, bool detect_tv_type, bool detect_cic_seed) {
if (detect_tv_type) {
if (!boot_get_tv_type(info)) {
info->tv_type = OS_INFO->tv_type;
}
void boot (boot_info_t *info, bool detect_cic_seed) {
if (info->tv_type == BOOT_TV_TYPE_PASSTHROUGH) {
info->tv_type = OS_INFO->tv_type;
}

if (detect_cic_seed) {
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3 changes: 2 additions & 1 deletion sw/bootloader/src/boot.h
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,7 @@ typedef enum {
BOOT_TV_TYPE_PAL = 0,
BOOT_TV_TYPE_NTSC = 1,
BOOT_TV_TYPE_MPAL = 2,
BOOT_TV_TYPE_PASSTHROUGH = 3,
} boot_tv_type_t;


Expand All @@ -31,7 +32,7 @@ typedef struct {
} boot_info_t;


void boot (boot_info_t *info, bool detect_tv_type, bool detect_cic_seed);
void boot (boot_info_t *info, bool detect_cic_seed);


#endif
34 changes: 19 additions & 15 deletions sw/bootloader/src/display.c
Original file line number Diff line number Diff line change
Expand Up @@ -13,18 +13,14 @@
#define TEXT_COLOR (0xFFFFFFFFUL)
#define LINE_SPACING (2)

#define VI_CR (VI_CR_PIXEL_ADVANCE_1 | VI_CR_PIXEL_ADVANCE_0 | VI_CR_ANTIALIAS_1 | VI_CR_ANTIALIAS_0 | VI_CR_TYPE_32)


static io32_t display_framebuffer[SCREEN_WIDTH * SCREEN_HEIGHT] __attribute__((section(".framebuffer, \"aw\", %nobits#")));
static int char_x;
static int char_y;
static const vi_regs_t vi_config[] = {{
.CR = (
VI_CR_PIXEL_ADVANCE_1 |
VI_CR_PIXEL_ADVANCE_0 |
VI_CR_ANTIALIAS_1 |
VI_CR_ANTIALIAS_0 |
VI_CR_TYPE_32
),
.CR = VI_CR,
.H_WIDTH = SCREEN_WIDTH,
.V_INTR = 0x000003FF,
.CURR_LINE = 0x00000000,
Expand All @@ -38,13 +34,7 @@ static const vi_regs_t vi_config[] = {{
.H_SCALE = 0x00000400,
.V_SCALE = 0x00000400,
}, {
.CR = (
VI_CR_PIXEL_ADVANCE_1 |
VI_CR_PIXEL_ADVANCE_0 |
VI_CR_ANTIALIAS_1 |
VI_CR_ANTIALIAS_0 |
VI_CR_TYPE_32
),
.CR = VI_CR,
.H_WIDTH = SCREEN_WIDTH,
.V_INTR = 0x000003FF,
.CURR_LINE = 0x00000000,
Expand All @@ -57,7 +47,21 @@ static const vi_regs_t vi_config[] = {{
.COLOR_BURST = 0x000E0204,
.H_SCALE = 0x00000400,
.V_SCALE = 0x00000400,
}};
}, {
.CR = VI_CR,
.H_WIDTH = SCREEN_WIDTH,
.V_INTR = 0x000003FF,
.CURR_LINE = 0x00000000,
.TIMING = 0x04651E39,
.V_SYNC = 0x0000020D,
.H_SYNC = 0x00040C11,
.H_SYNC_LEAP = 0x0C190C1A,
.H_LIMITS = 0x006C02EC,
.V_LIMITS = 0x002501FF,
.COLOR_BURST = 0x000E0204,
.H_SCALE = 0x00000400,
.V_SCALE = 0x00000400,
}};


static void display_decompress_background (uint32_t *background) {
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6 changes: 2 additions & 4 deletions sw/bootloader/src/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -30,14 +30,12 @@ void main (void) {
break;
}

bool detect_tv_type = (sc64_boot_info.tv_type == TV_TYPE_UNKNOWN);
bool detect_cic_seed = (sc64_boot_info.cic_seed == CIC_SEED_UNKNOWN);

boot_info.reset_type = OS_INFO->reset_type;
boot_info.tv_type = sc64_boot_info.tv_type;
boot_info.cic_seed = (sc64_boot_info.cic_seed & 0xFF);
bool detect_cic_seed = (sc64_boot_info.cic_seed == CIC_SEED_AUTO);

deinit();

boot(&boot_info, detect_tv_type, detect_cic_seed);
boot(&boot_info, detect_cic_seed);
}
7 changes: 4 additions & 3 deletions sw/bootloader/src/sc64.h
Original file line number Diff line number Diff line change
Expand Up @@ -59,18 +59,19 @@ typedef enum {
SAVE_TYPE_EEPROM_16K = 2,
SAVE_TYPE_SRAM = 3,
SAVE_TYPE_FLASHRAM = 4,
SAVE_TYPE_SRAM_BANKED = 5
SAVE_TYPE_SRAM_BANKED = 5,
SAVE_TYPE_SRAM_1M = 6
} sc64_save_type_t;

typedef enum {
CIC_SEED_UNKNOWN = 0xFFFF
CIC_SEED_AUTO = 0xFFFF
} sc64_cic_seed_t;

typedef enum {
TV_TYPE_PAL = 0,
TV_TYPE_NTSC = 1,
TV_TYPE_MPAL = 2,
TV_TYPE_UNKNOWN = 3
TV_TYPE_PASSTHROUGH = 3
} sc64_tv_type_t;

typedef enum {
Expand Down
15 changes: 9 additions & 6 deletions sw/controller/src/cfg.c
Original file line number Diff line number Diff line change
Expand Up @@ -54,14 +54,14 @@ typedef enum {
} boot_mode_t;

typedef enum {
CIC_SEED_UNKNOWN = 0xFFFF
CIC_SEED_AUTO = 0xFFFF
} cic_seed_t;

typedef enum {
TV_TYPE_PAL = 0,
TV_TYPE_NTSC = 1,
TV_TYPE_MPAL = 2,
TV_TYPE_UNKNOWN = 3
TV_TYPE_PASSTHROUGH = 3
} tv_type_t;

typedef enum {
Expand Down Expand Up @@ -210,6 +210,9 @@ static bool cfg_set_save_type (save_type_t save_type) {
case SAVE_TYPE_SRAM_BANKED:
cfg_change_scr_bits(CFG_SCR_SRAM_BANKED | CFG_SCR_SRAM_ENABLED, true);
break;
case SAVE_TYPE_SRAM_1M:
cfg_change_scr_bits(CFG_SCR_SRAM_ENABLED, true);
break;
default:
save_type = SAVE_TYPE_NONE;
break;
Expand Down Expand Up @@ -337,7 +340,7 @@ bool cfg_update (uint32_t *args) {
p.cic_seed = (cic_seed_t) (args[1] & 0xFFFF);
break;
case CFG_ID_TV_TYPE:
if (args[1] > TV_TYPE_UNKNOWN) {
if (args[1] > TV_TYPE_PASSTHROUGH) {
return true;
}
p.tv_type = (tv_type_t) (args[1] & 0x03);
Expand Down Expand Up @@ -440,8 +443,8 @@ void cfg_reset_state (void) {
dd_set_disk_state(DD_DISK_STATE_EJECTED);
dd_set_sd_mode(false);
isv_set_address(0);
p.cic_seed = CIC_SEED_UNKNOWN;
p.tv_type = TV_TYPE_UNKNOWN;
p.cic_seed = CIC_SEED_AUTO;
p.tv_type = TV_TYPE_PASSTHROUGH;
p.boot_mode = BOOT_MODE_MENU;
}

Expand Down Expand Up @@ -628,7 +631,7 @@ void cfg_process (void) {
return;
}
writeback_load_sector_table(args[0]);
writeback_enable();
writeback_enable(WRITEBACK_SD);
break;

case 'K':
Expand Down
3 changes: 2 additions & 1 deletion sw/controller/src/cfg.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,8 @@ typedef enum {
SAVE_TYPE_EEPROM_16K = 2,
SAVE_TYPE_SRAM = 3,
SAVE_TYPE_FLASHRAM = 4,
SAVE_TYPE_SRAM_BANKED = 5
SAVE_TYPE_SRAM_BANKED = 5,
SAVE_TYPE_SRAM_1M = 6,
} save_type_t;


Expand Down
7 changes: 7 additions & 0 deletions sw/controller/src/usb.c
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,7 @@
#include "update.h"
#include "usb.h"
#include "version.h"
#include "writeback.h"


#define BOOTLOADER_ADDRESS (0x04E00000UL)
Expand Down Expand Up @@ -307,6 +308,12 @@ static void usb_rx_process (void) {
p.response_pending = true;
break;

case 'W':
writeback_enable(WRITEBACK_USB);
p.rx_state = RX_STATE_IDLE;
p.response_pending = true;
break;

case 'p':
if (p.rx_args[0]) {
flash_wait_busy();
Expand Down
1 change: 1 addition & 0 deletions sw/controller/src/usb.h
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,7 @@ typedef enum packet_cmd {
PACKET_CMD_DD_REQUEST = 'D',
PACKET_CMD_DEBUG_OUTPUT = 'U',
PACKET_CMD_ISV_OUTPUT = 'I',
PACKET_CMD_SAVE_WRITEBACK = 'S',
PACKET_CMD_UPDATE_STATUS = 'F',
} usb_packet_cmd_e;

Expand Down
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