take into account MeteorLake CPU

Signed-off-by: Slice <[email protected]>
CloverHackyColor · Oct 24, 2023 · 5fb1f0b · 5fb1f0b
1 parent 06e0d72
commit 5fb1f0b
Show file tree

Hide file tree

Showing 4 changed files with 8 additions and 0 deletions.
diff --git a/Include/IndustryStandard/ProcessorInfo.h b/Include/IndustryStandard/ProcessorInfo.h
@@ -201,6 +201,7 @@ enum {
 #define CPU_MODEL_ALDERLAKE     0x97  /* 12h generation Alder Lake */
 #define CPU_MODEL_ROCKETLAKE    0xA7  /* 11h Rocket Lake */
 #define CPU_MODEL_RAPTORLAKE    0xB7  /* 13h Raptor Lake */
+#define CPU_MODEL_METEORLAKE    0xAA  /* 14h Meteor Lake */
 
 #define CPU_SOCKET_UNKNOWN  0x02
 #define CPU_SOCKET_PGA478   0x0F

diff --git a/rEFIt_UEFI/Platform/StateGenerator.cpp b/rEFIt_UEFI/Platform/StateGenerator.cpp
@@ -278,6 +278,7 @@ SSDT_TABLE *generate_pss_ssdt(UINTN Number)
           case CPU_MODEL_ALDERLAKE:
           case CPU_MODEL_ROCKETLAKE:
           case CPU_MODEL_RAPTORLAKE:
+          case CPU_MODEL_METEORLAKE:
           {
             maximum.Control.Control = RShiftU64(AsmReadMsr64(MSR_PLATFORM_INFO), 8) & 0xff;
             if (gSettings.ACPI.SSDT.MaxMultiplier) {
@@ -349,6 +350,7 @@ SSDT_TABLE *generate_pss_ssdt(UINTN Number)
                     (gCPUStructure.Model == CPU_MODEL_ROCKETLAKE) ||
                     (gCPUStructure.Model == CPU_MODEL_ALDERLAKE)  ||
                     (gCPUStructure.Model == CPU_MODEL_RAPTORLAKE) ||
+                    (gCPUStructure.Model == CPU_MODEL_METEORLAKE) ||
                     (gCPUStructure.Model == CPU_MODEL_COMETLAKE_S) ||
                     (gCPUStructure.Model == CPU_MODEL_COMETLAKE_Y) ||
                     (gCPUStructure.Model == CPU_MODEL_COMETLAKE_U)) {

diff --git a/rEFIt_UEFI/Platform/cpu.cpp b/rEFIt_UEFI/Platform/cpu.cpp
@@ -329,6 +329,7 @@ void GetCPUProperties (void)
       case CPU_MODEL_ALDERLAKE:
       case CPU_MODEL_ROCKETLAKE:
       case CPU_MODEL_RAPTORLAKE:
+      case CPU_MODEL_METEORLAKE:
         msr = AsmReadMsr64(MSR_CORE_THREAD_COUNT);  //0x35
         DBG("MSR 0x35    %16llX\n", msr);
         gCPUStructure.Cores   = (UINT8)bitfield((UINT32)msr, 31, 16);
@@ -525,6 +526,7 @@ void GetCPUProperties (void)
            case CPU_MODEL_ALDERLAKE:
            case CPU_MODEL_ROCKETLAKE:
            case CPU_MODEL_RAPTORLAKE:
+           case CPU_MODEL_METEORLAKE:
 
             gCPUStructure.TSCFrequency = MultU64x32(gCPUStructure.CurrentSpeed, Mega); //MHz -> Hz
              gCPUStructure.CPUFrequency = gCPUStructure.TSCFrequency;
@@ -1405,6 +1407,7 @@ UINT16 GetAdvancedCpuType()
           case CPU_MODEL_ALDERLAKE:
           case CPU_MODEL_ROCKETLAKE:
           case CPU_MODEL_RAPTORLAKE:
+          case CPU_MODEL_METEORLAKE:
             if ( gCPUStructure.BrandString.contains("Core(TM) i3") )
               return 0x905; // Core i3 - Apple doesn't use it
             if ( gCPUStructure.BrandString.contains("Core(TM) i5-1") )
@@ -1655,6 +1658,7 @@ MacModel GetDefaultModel()
       case CPU_MODEL_ALDERLAKE:
       case CPU_MODEL_COMETLAKE_S:
       case CPU_MODEL_RAPTORLAKE:
+      case CPU_MODEL_METEORLAKE:
         DefaultType = MacPro71;
         break;
       default:

diff --git a/rEFIt_UEFI/Platform/cpu.h b/rEFIt_UEFI/Platform/cpu.h
@@ -79,6 +79,7 @@
 #define CPU_MODEL_COMETLAKE_U   0xA6  /* 10h Comet Lake */
 #define CPU_MODEL_ROCKETLAKE    0xA7  /* 11h Rocket Lake */
 #define CPU_MODEL_RAPTORLAKE    0xB7  /* 13h Raptor Lake */
+#define CPU_MODEL_METEORLAKE    0xAA
 
 #define CPU_VENDOR_INTEL        0x756E6547
 #define CPU_VENDOR_AMD          0x68747541