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Merge pull request #21 from CESM-Development/fischer/B_CROP
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Add -CROP to B compsets that have CLM50%BGC.
Answer changes for affected B compsets.
Also tweaked wallclocks in the test lists.
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@fischer-ncar
fischer-ncar authored Jun 15, 2017
2 parents 93dc1a7 + a6530ea commit 1113db9
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44 changes: 14 additions & 30 deletions config_compsets.xml
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Original file line number Diff line number Diff line change
Expand Up @@ -41,18 +41,18 @@

<compset>
<alias>B1850Ws</alias>
<lname>1850_CAM60_CLM50%BGC_CICE_POP2%ECO_MOSART_CISM2%NOEVOLVE_SWAV_BGC%BDRD</lname>
<lname>1850_CAM60_CLM50%BGC-CROP_CICE_POP2%ECO_MOSART_CISM2%NOEVOLVE_SWAV_BGC%BDRD</lname>
</compset>

<compset>
<alias>B1850</alias>
<lname>1850_CAM60_CLM50%BGC_CICE_POP2%ECO_MOSART_CISM2%NOEVOLVE_WW3_BGC%BDRD</lname>
<lname>1850_CAM60_CLM50%BGC-CROP_CICE_POP2%ECO_MOSART_CISM2%NOEVOLVE_WW3_BGC%BDRD</lname>
<science_support grid="f09_g16"/>
</compset>

<compset>
<alias>BW1850</alias>
<lname>1850_CAM60%WCTS_CLM50%BGC_CICE_POP2%ECO_MOSART_CISM2%NOEVOLVE_WW3</lname>
<lname>1850_CAM60%WCTS_CLM50%BGC-CROP_CICE_POP2%ECO_MOSART_CISM2%NOEVOLVE_WW3</lname>
<science_support grid="f09_g16"/>
</compset>

Expand Down Expand Up @@ -100,12 +100,12 @@

<compset>
<alias>BHIST</alias>
<lname>HIST_CAM60_CLM50%BGC_CICE_POP2%ECO_MOSART_CISM2%NOEVOLVE_WW3_BGC%BDRD</lname>
<lname>HIST_CAM60_CLM50%BGC-CROP_CICE_POP2%ECO_MOSART_CISM2%NOEVOLVE_WW3_BGC%BDRD</lname>
</compset>

<compset>
<alias>BHISTWs</alias>
<lname>HIST_CAM60_CLM50%BGC_CICE_POP2%ECO_MOSART_CISM2%NOEVOLVE_SWAV_BGC%BDRD</lname>
<lname>HIST_CAM60_CLM50%BGC-CROP_CICE_POP2%ECO_MOSART_CISM2%NOEVOLVE_SWAV_BGC%BDRD</lname>
</compset>

<!-- <compset> -->
Expand Down Expand Up @@ -236,15 +236,15 @@

<compset>
<alias>B1850G</alias>
<lname>1850_CAM60_CLM50%BGC_CICE_POP2%ECO_MOSART_CISM2%EVOLVE_WW3_BGC%BDRD</lname>
<lname>1850_CAM60_CLM50%BGC-CROP_CICE_POP2%ECO_MOSART_CISM2%EVOLVE_WW3_BGC%BDRD</lname>
</compset>

<!-- Include one CISM1 compset, mainly for testing purposes, to make sure that
CISM1 can operate in a fully-coupled configuration. Main point is to
check the PE layout. -->
<compset>
<alias>B1850G1</alias>
<lname>1850_CAM60_CLM50%BGC_CICE_POP2%ECO_MOSART_CISM1%EVOLVE_WW3_BGC%BDRD</lname>
<lname>1850_CAM60_CLM50%BGC-CROP_CICE_POP2%ECO_MOSART_CISM1%EVOLVE_WW3_BGC%BDRD</lname>
</compset>

<!-- Prognostic wave -->
Expand Down Expand Up @@ -273,34 +273,18 @@

<compset>
<alias>J1850G</alias>
<lname>1850_DATM%CRU_CLM50%BGC_CICE_POP2_MOSART_CISM2%EVOLVE_SWAV</lname>
<lname>1850_DATM%CRU_CLM50%BGC-CROP_CICE_POP2_MOSART_CISM2%EVOLVE_SWAV</lname>
</compset>

<entries>

<entry id="RUN_TYPE">
<values>
<value grid="a%0.9x1.25_l%0.9x1.25_oi%gx1v6_r%r05_m%gx1v6_g%gland5UM_w%null" compset="1850_CAM60_CLM50%BGC_CICE_POP2%ECO_MOSART_CISM1%NOEVOLVE_SWAV_BGC%BDRD" >hybrid</value>
</values>
</entry>
<entry id="RUN_REFCASE">
<values>
<value grid="a%0.9x1.25_l%0.9x1.25_oi%gx1v6_r%r05_m%gx1v6_g%gland5UM_w%null" compset="1850_CAM60_CLM50%BGC_CICE_POP2%ECO_MOSART_CISM1%NOEVOLVE_SWAV_BGC%BDRD">b.e15.B1850G.f09_g16.pi_control.25</value>
</values>
</entry>
<entry id="RUN_REFDATE">
<values>
<value grid="a%0.9x1.25_l%0.9x1.25_oi%gx1v6_r%r05_m%gx1v6_g%gland5UM_w%null" compset="1850_CAM60_CLM50%BGC_CICE_POP2%ECO_MOSART_CISM1%NOEVOLVE_SWAV_BGC%BDRD" >0041-01-01</value>
</values>
</entry>
<entry id="RUN_STARTDATE">
<values>
<value compset="1850_" >0001-01-01</value>
<value compset="2000_" >0001-01-01</value>
<value compset="HIST_" >1850-01-01</value>
<value compset="5505_" >1955-01-01</value>
<value compset="RCP[2468]_">2005-01-01</value>
<value compset="2013_" >2013-01-01</value>
<value compset="1850_" >0001-01-01</value>
<value compset="2000_" >0001-01-01</value>
<value compset="HIST_" >1850-01-01</value>
<value compset="5505_" >1955-01-01</value>
<value compset="RCP[2468]_">2005-01-01</value>
<value compset="2013_" >2013-01-01</value>
</values>
</entry>
</entries>
Expand Down
52 changes: 26 additions & 26 deletions testlist_allactive.xml
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Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,7 @@
<machine name="edison" compiler="intel" category="prealpha"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="NCK" grid="f19_g17" compset="B1850Ws" testmods="allactive/defaultio">
Expand All @@ -53,7 +53,7 @@
<machines>
<machine name="bluewaters" compiler="pgi" category="prebeta"/>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</machines>
</test>
Expand All @@ -80,15 +80,15 @@
<machine name="cheyenne" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="ERS_Ld7" grid="ne30_g17" compset="B1850" testmods="allactive/defaultio">
<machines>
<machine name="cheyenne" compiler="gnu" category="prebeta"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="ERS_Ld7" grid="f09_g17" compset="BHIST" testmods="allactive/defaultio">
Expand All @@ -97,7 +97,7 @@
<machine name="cheyenne" compiler="intel" category="prealpha"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="SMS_Ld5" grid="f09_g17" compset="BW1850" testmods="allactive/default">
Expand All @@ -122,7 +122,7 @@
<machine name="cheyenne" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="ERS_Ld7" grid="f19_g17" compset="B1850" testmods="allactive/defaultio">
Expand All @@ -131,7 +131,7 @@
<machine name="cheyenne" compiler="intel" category="prealpha"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="ERS_Ld7" grid="ne30_g17" compset="B1850" testmods="allactive/defaultio">
Expand All @@ -140,23 +140,23 @@
<machine name="cheyenne" compiler="gnu" category="prebeta"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="ERS_Ld7" grid="f09_g17" compset="BHISTC5L45BGCR" testmods="allactive/defaultio">
<machines>
<machine name="bluewaters" compiler="pgi" category="prebeta"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="ERS_Ld9" grid="ne120_g17" compset="B1850" testmods="allactive/defaultio">
<machines>
<machine name="edison" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="ERS_N3_Ld7" grid="f19_g17" compset="BHISTWs" testmods="allactive/defaultio">
Expand All @@ -174,15 +174,15 @@
<machine name="edison" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="NCK_Ld5" grid="f19_g17" compset="BC5L45BGCR" testmods="allactive/defaultio">
<machines>
<machine name="cheyenne" compiler="gnu" category="prebeta"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="NCK_Ld5" grid="f19_g17" compset="B1850G" testmods="allactive/defaultio">
Expand All @@ -191,7 +191,7 @@
<machine name="cheyenne" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="PEA_P1" grid="f19_g17" compset="B1850" testmods="allactive/defaultio">
Expand All @@ -200,31 +200,31 @@
<machine name="hobart" compiler="pgi" category="prebeta"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="PET" grid="f19_g17" compset="B1850" testmods="allactive/defaultio">
<machines>
<machine name="cheyenne" compiler="gnu" category="prealpha"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="PET" grid="ne30_g17" compset="B1850" testmods="allactive/defaultio">
<machines>
<machine name="edison" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<!-- <test name="PET" grid="f19_g17" compset="B1850C5L40SPRWs" testmods="allactive/defaultio"> -->
<!-- <machines> -->
<!-- <machine name="bluewaters" compiler="pgi" category="prebeta"/> -->
<!-- </machines> -->
<!-- <options> -->
<!-- <option name="wallclock"> 00:20 </option> -->
<!-- <option name="wallclock"> 00:30 </option> -->
<!-- </options> -->
<!-- </test> -->
<test name="PFS" grid="f09_g17" compset="B1850" testmods="allactive/default">
Expand Down Expand Up @@ -269,7 +269,7 @@
<machine name="cheyenne" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>

Expand All @@ -278,15 +278,15 @@
<machine name="edison" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="SMS_D" grid="f09_g17" compset="BHIST" testmods="allactive/defaultio">
<machines>
<machine name="edison" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="SMS_Ld5" grid="T31_g37_gl20" compset="B1850G" testmods="allactive/defaultio">
Expand All @@ -295,14 +295,14 @@
<machine name="cheyenne" compiler="intel" category="prebeta"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="SMS_Ld5" grid="T31_g37_gl20" compset="B1850G1" testmods="allactive/defaultio">
<machines>
<machine name="cheyenne" compiler="gnu" category="prebeta">
<options>
<option name="wallclock">0:20</option>
<option name="wallclock">0:30</option>
<option name="comment">Include a fully-coupled test with CISM1, mainly to make sure the PE layout works</option>
</options>
</machine>
Expand All @@ -313,31 +313,31 @@
<machine name="hobart" compiler="nag" category="prebeta"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<!-- <test name="SMS_Ld5" grid="f09_g17" compset="BRCP85C4L40CNRBPRP" testmods="allactive/defaultio"> -->
<!-- <machines> -->
<!-- <machine name="edison" compiler="intel" category="prebeta"/> -->
<!-- </machines> -->
<!-- <options> -->
<!-- <option name="wallclock"> 00:20 </option> -->
<!-- <option name="wallclock"> 00:30 </option> -->
<!-- </options> -->
<!-- </test> -->
<test name="SMS_Ld5" grid="f09_g17_gl4" compset="J1850G" testmods="allactive/defaultio">
<machines>
<machine name="cheyenne" compiler="gnu" category="prebeta"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
<test name="SMS_Ld7" grid="f09_g17" compset="B1850" testmods="allactive/defaultio">
<machines>
<machine name="cheyenne" compiler="intel" category="prealpha"/>
</machines>
<options>
<option name="wallclock"> 00:20 </option>
<option name="wallclock"> 00:30 </option>
</options>
</test>
</testlist>

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