From a7849d839fe2dc8fb08898c8834050f681009ebf Mon Sep 17 00:00:00 2001 From: Danny Willems Date: Mon, 23 Dec 2024 13:53:49 +0100 Subject: [PATCH 1/2] o1vm/riscv32im: simple example with multiple add calls --- o1vm/resources/programs/riscv32im/bin/add_1 | Bin 0 -> 488 bytes o1vm/resources/programs/riscv32im/src/add_1.S | 29 ++++++++++++++++++ o1vm/tests/test_riscv_elf.rs | 16 ++++++++++ 3 files changed, 45 insertions(+) create mode 100755 o1vm/resources/programs/riscv32im/bin/add_1 create mode 100644 o1vm/resources/programs/riscv32im/src/add_1.S diff --git a/o1vm/resources/programs/riscv32im/bin/add_1 b/o1vm/resources/programs/riscv32im/bin/add_1 new file mode 100755 index 0000000000000000000000000000000000000000..6fc6fe9837f2bc1c9cc707dc662a75eab8cd0ea2 GIT binary patch literal 488 zcma)2!A-+J5S+6KL_!Kd*FdCvcv*=_0q_9v;E@M!EZaE3QViDJB|`Zir3E)Y59t6= z0VU7^4KQnS;mcaHGrO8Q+w*#Ld##j$uK?eW$+6GKHyjSgGmH@6j5_3l`okX}C%;;J za#qk)H;Gr!ljRU-0zijDG~oz(FhMi8fIgXHx6KGcysO>zllW4ahZ;g3k_ml8CUl?N ze+w+Hyu4>KrOnq+ca%M|K99?|o+edXPm)yBBCg})LE5Iwt&#nvTog}vK_hilt(H>} zX<9vZVrgtn1w{7II^)s|kt<#tqV`=;>YORFl`G^M{#(a1N-F%7He*Mg6TT!vsZ&C7 YZU;8W&*v;VpRq7~`x::create(PAGE_SIZE.try_into().unwrap(), state); + + while !witness.halt { + witness.step(); + } + + assert_eq!(witness.registers[T0], 15); +} From 8a260b3b38428b04ff7244f078294ed222346879 Mon Sep 17 00:00:00 2001 From: Danny Willems Date: Mon, 23 Dec 2024 14:00:09 +0100 Subject: [PATCH 2/2] o1vm/riscv32im: tests for add, a bit more complicated --- o1vm/resources/programs/riscv32im/bin/add_2 | Bin 0 -> 476 bytes o1vm/resources/programs/riscv32im/src/add_2.S | 32 ++++++++++++++++++ o1vm/tests/test_riscv_elf.rs | 22 ++++++++++++ 3 files changed, 54 insertions(+) create mode 100755 o1vm/resources/programs/riscv32im/bin/add_2 create mode 100644 o1vm/resources/programs/riscv32im/src/add_2.S diff --git a/o1vm/resources/programs/riscv32im/bin/add_2 b/o1vm/resources/programs/riscv32im/bin/add_2 new file mode 100755 index 0000000000000000000000000000000000000000..6a35810533d1bec5a325af15ca95b9ddcef7fe6e GIT binary patch literal 476 zcma)2F;2rk5M0}YL_!LnD`+T?Xs9fFPDz6VR4FK^vChU3C&gghT_ThMcmXN=0iJ;5 zhX3#cKESNag_gBuXLdDrw&&$?dKCl#`3mWqcyj0y@EL|J@Pv*iq!Z`}57nRk066>A z?BlbHzWRy1i~%qAh??+YD5BTHCb~}2x18GXGo@=o?e165uE!)`Yyhzh2E-5yh!J@7 z9$H*;ev4+bEtVAAKn~0@m0H$GR>}G_Q>Odl~e4>Cr5Gju2?x|biQyUf5U%k2S!c;ztZLEz!!io&W&py;B31A WjWhGv^3LbV4Bw^>usGgKf4(0-&q5sl literal 0 HcmV?d00001 diff --git a/o1vm/resources/programs/riscv32im/src/add_2.S b/o1vm/resources/programs/riscv32im/src/add_2.S new file mode 100644 index 0000000000..83f4063ef1 --- /dev/null +++ b/o1vm/resources/programs/riscv32im/src/add_2.S @@ -0,0 +1,32 @@ +.section .text +.globl _start + +_start: + # Initialize registers with some numbers + li t0, 123 # First number + li t1, 456 # Second number + li t2, 789 # Third number + + # Perform first addition + add t3, t0, t1 # t3 = t0 + t1 (123 + 456 = 579) + + # Perform second addition + add t4, t3, t2 # t4 = t3 + t2 (579 + 789 = 1368) + + # Add all numbers in a more complex way for redundancy + add t5, t0, t2 # t5 = t0 + t2 (123 + 789 = 912) + add t6, t1, t5 # t6 = t1 + t5 (456 + 912 = 1368) + + # Ensure final result matches expectations + add t6, t4, x0 # t6 = t4 + x0 (Copy t4 to t6 for validation) + + # Custom exit syscall + li a0, 0 # Set a0 to 0 + li a1, 0 # Set a1 to 0 + li a2, 0 # Set a2 to 0 + li a3, 0 # Set a3 to 0 + li a4, 0 # Set a4 to 0 + li a5, 0 # Set a5 to 0 + li a6, 0 # Set a6 to 0 + li a7, 42 # Set a7 to 42 (custom ecall number) + ecall # Trigger syscall diff --git a/o1vm/tests/test_riscv_elf.rs b/o1vm/tests/test_riscv_elf.rs index ba3940ef4a..de5709fc23 100644 --- a/o1vm/tests/test_riscv_elf.rs +++ b/o1vm/tests/test_riscv_elf.rs @@ -136,3 +136,25 @@ fn test_add_1() { assert_eq!(witness.registers[T0], 15); } + +#[test] +fn test_add_2() { + let curr_dir = std::env::current_dir().unwrap(); + let path = curr_dir.join(std::path::PathBuf::from( + "resources/programs/riscv32im/bin/add_2", + )); + let state = o1vm::elf_loader::parse_riscv32(&path).unwrap(); + let mut witness = Env::::create(PAGE_SIZE.try_into().unwrap(), state); + + while !witness.halt { + witness.step(); + } + + assert_eq!(witness.registers[T0], 123); // First number + assert_eq!(witness.registers[T1], 456); // Second number + assert_eq!(witness.registers[T2], 789); // Third number + assert_eq!(witness.registers[T3], 579); // t3 = t0 + t1 + assert_eq!(witness.registers[T4], 1368); // t4 = t3 + t2 + assert_eq!(witness.registers[T5], 912); // t5 = t0 + t2 + assert_eq!(witness.registers[T6], 1368); // t6 = t4 + x0 (Copy t4 to t6) +}