diff --git a/o1vm/resources/programs/riscv32im/bin/add_1 b/o1vm/resources/programs/riscv32im/bin/add_1 new file mode 100755 index 0000000000..6fc6fe9837 Binary files /dev/null and b/o1vm/resources/programs/riscv32im/bin/add_1 differ diff --git a/o1vm/resources/programs/riscv32im/bin/add_2 b/o1vm/resources/programs/riscv32im/bin/add_2 new file mode 100755 index 0000000000..6a35810533 Binary files /dev/null and b/o1vm/resources/programs/riscv32im/bin/add_2 differ diff --git a/o1vm/resources/programs/riscv32im/src/add_1.S b/o1vm/resources/programs/riscv32im/src/add_1.S new file mode 100644 index 0000000000..845a3172c1 --- /dev/null +++ b/o1vm/resources/programs/riscv32im/src/add_1.S @@ -0,0 +1,29 @@ +.section .text +.globl _start + +_start: + # Initialize registers + li t0, 0 # t0 will hold the running total (initialize to 0) + li t1, 1 # First number + li t2, 2 # Second number + li t3, 3 # Third number + li t4, 4 # Fourth number + li t5, 5 # Fifth number + + # Perform additions + add t0, t0, t1 # t0 = t0 + t1 (0 + 1) + add t0, t0, t2 # t0 = t0 + t2 (1 + 2) + add t0, t0, t3 # t0 = t0 + t3 (3 + 3) + add t0, t0, t4 # t0 = t0 + t4 (6 + 4) + add t0, t0, t5 # t0 = t0 + t5 (10 + 5) + + # Custom exit syscall + li a0, 0 # Set a0 to 0 + li a1, 0 # Set a1 to 0 + li a2, 0 # Set a2 to 0 + li a3, 0 # Set a3 to 0 + li a4, 0 # Set a4 to 0 + li a5, 0 # Set a5 to 0 + li a6, 0 # Set a6 to 0 + li a7, 42 # Set a7 to 42 (custom ecall number) + ecall # Trigger syscall diff --git a/o1vm/resources/programs/riscv32im/src/add_2.S b/o1vm/resources/programs/riscv32im/src/add_2.S new file mode 100644 index 0000000000..83f4063ef1 --- /dev/null +++ b/o1vm/resources/programs/riscv32im/src/add_2.S @@ -0,0 +1,32 @@ +.section .text +.globl _start + +_start: + # Initialize registers with some numbers + li t0, 123 # First number + li t1, 456 # Second number + li t2, 789 # Third number + + # Perform first addition + add t3, t0, t1 # t3 = t0 + t1 (123 + 456 = 579) + + # Perform second addition + add t4, t3, t2 # t4 = t3 + t2 (579 + 789 = 1368) + + # Add all numbers in a more complex way for redundancy + add t5, t0, t2 # t5 = t0 + t2 (123 + 789 = 912) + add t6, t1, t5 # t6 = t1 + t5 (456 + 912 = 1368) + + # Ensure final result matches expectations + add t6, t4, x0 # t6 = t4 + x0 (Copy t4 to t6 for validation) + + # Custom exit syscall + li a0, 0 # Set a0 to 0 + li a1, 0 # Set a1 to 0 + li a2, 0 # Set a2 to 0 + li a3, 0 # Set a3 to 0 + li a4, 0 # Set a4 to 0 + li a5, 0 # Set a5 to 0 + li a6, 0 # Set a6 to 0 + li a7, 42 # Set a7 to 42 (custom ecall number) + ecall # Trigger syscall diff --git a/o1vm/tests/test_riscv_elf.rs b/o1vm/tests/test_riscv_elf.rs index 444249b11b..de5709fc23 100644 --- a/o1vm/tests/test_riscv_elf.rs +++ b/o1vm/tests/test_riscv_elf.rs @@ -120,3 +120,41 @@ fn test_addi() { assert_eq!(witness.registers[T0], 15); } + +#[test] +fn test_add_1() { + let curr_dir = std::env::current_dir().unwrap(); + let path = curr_dir.join(std::path::PathBuf::from( + "resources/programs/riscv32im/bin/add_1", + )); + let state = o1vm::elf_loader::parse_riscv32(&path).unwrap(); + let mut witness = Env::::create(PAGE_SIZE.try_into().unwrap(), state); + + while !witness.halt { + witness.step(); + } + + assert_eq!(witness.registers[T0], 15); +} + +#[test] +fn test_add_2() { + let curr_dir = std::env::current_dir().unwrap(); + let path = curr_dir.join(std::path::PathBuf::from( + "resources/programs/riscv32im/bin/add_2", + )); + let state = o1vm::elf_loader::parse_riscv32(&path).unwrap(); + let mut witness = Env::::create(PAGE_SIZE.try_into().unwrap(), state); + + while !witness.halt { + witness.step(); + } + + assert_eq!(witness.registers[T0], 123); // First number + assert_eq!(witness.registers[T1], 456); // Second number + assert_eq!(witness.registers[T2], 789); // Third number + assert_eq!(witness.registers[T3], 579); // t3 = t0 + t1 + assert_eq!(witness.registers[T4], 1368); // t4 = t3 + t2 + assert_eq!(witness.registers[T5], 912); // t5 = t0 + t2 + assert_eq!(witness.registers[T6], 1368); // t6 = t4 + x0 (Copy t4 to t6) +}