GOWIN GW2AR port

[drom]

I am thinking to port this project to GOWIN GW2AR-18 FPGA
Got new board for it https://github.com/AI6YP/goryn
Where do you recommend to start?

[smunaut]

So the two things that are ice40 specific are :
The SB_IO blocks that need to be replaced by whatever DDR input IO block primitive that FPGA uses.
The block ram that can honestly be replaced by generic behavioral descriptions in most FPGAs. For the ice40 I instanciate the exact block because the timings are so tight that I can't afford the toolchain to do stuff even a tiny bit wrong ...

[drom]

Great. I will try it out.