diff --git a/src/USBPowerDelivery.h b/src/USBPowerDelivery.h
index 2fbd046..0445937 100644
--- a/src/USBPowerDelivery.h
+++ b/src/USBPowerDelivery.h
@@ -15,4 +15,4 @@
 #include "PDController.h"
 #include "PDSink.h"
 #include "PDProtocolAnalyzer.h"
-#include "NucleoSNK1MK1.h"
+#include "./phy/NucleoSNK1MK1/NucleoSNK1MK1.h"
diff --git a/src/CMSISHelper.h b/src/phy/CMSISHelper.h
similarity index 100%
rename from src/CMSISHelper.h
rename to src/phy/CMSISHelper.h
diff --git a/src/CRC32.cpp b/src/phy/CRC32.cpp
similarity index 100%
rename from src/CRC32.cpp
rename to src/phy/CRC32.cpp
diff --git a/src/CRC32.h b/src/phy/CRC32.h
similarity index 100%
rename from src/CRC32.h
rename to src/phy/CRC32.h
diff --git a/src/NucleoSNK1MK1.cpp b/src/phy/NucleoSNK1MK1/NucleoSNK1MK1.cpp
similarity index 100%
rename from src/NucleoSNK1MK1.cpp
rename to src/phy/NucleoSNK1MK1/NucleoSNK1MK1.cpp
diff --git a/src/NucleoSNK1MK1.h b/src/phy/NucleoSNK1MK1/NucleoSNK1MK1.h
similarity index 100%
rename from src/NucleoSNK1MK1.h
rename to src/phy/NucleoSNK1MK1/NucleoSNK1MK1.h
diff --git a/src/PDMessageDecoder.cpp b/src/phy/PDMessageDecoder.cpp
similarity index 100%
rename from src/PDMessageDecoder.cpp
rename to src/phy/PDMessageDecoder.cpp
diff --git a/src/PDMessageDecoder.h b/src/phy/PDMessageDecoder.h
similarity index 100%
rename from src/PDMessageDecoder.h
rename to src/phy/PDMessageDecoder.h
diff --git a/src/PDMessageEncoder.cpp b/src/phy/PDMessageEncoder.cpp
similarity index 100%
rename from src/PDMessageEncoder.cpp
rename to src/phy/PDMessageEncoder.cpp
diff --git a/src/PDMessageEncoder.h b/src/phy/PDMessageEncoder.h
similarity index 100%
rename from src/PDMessageEncoder.h
rename to src/phy/PDMessageEncoder.h
diff --git a/src/PDPhySTM32F1.cpp b/src/phy/STM32F1/PDPhySTM32F1.cpp
similarity index 99%
rename from src/PDPhySTM32F1.cpp
rename to src/phy/STM32F1/PDPhySTM32F1.cpp
index 6d1ac40..3203d09 100644
--- a/src/PDPhySTM32F1.cpp
+++ b/src/phy/STM32F1/PDPhySTM32F1.cpp
@@ -10,10 +10,10 @@
 
 #include <Arduino.h>
 #include <string.h>
-#include "CMSISHelper.h"
+#include "phy/CMSISHelper.h"
 #include "PDController.h"
-#include "PDMessageDecoder.h"
-#include "PDMessageEncoder.h"
+#include "phy/PDMessageDecoder.h"
+#include "phy/PDMessageEncoder.h"
 #include "PDPhySTM32F1.h"
 #include "TaskScheduler.h"
 
@@ -180,7 +180,7 @@ void PDPhySTM32F1::initRx() {
     RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_AFIOEN | RCC_APB2ENR_ADC1EN;
     // enable clock for DMA1
     RCC->AHBENR |= RCC_AHBENR_DMA1EN;
-    
+
     // wait for clock
     asm("nop");
     asm("nop");
@@ -205,7 +205,7 @@ void PDPhySTM32F1::initRx() {
     timer.resume();
 
     // configure DMA1 / channel 5 (connected to timer 2 / channel 1)
-    DMA1_Channel5->CCR = 
+    DMA1_Channel5->CCR =
         DMA_CCR_CIRC // circular mode
         | DMA_CCR_MINC // increment memory
         | (0b01 << DMA_CCR_PSIZE_Pos) // peripheral size 16 bit
@@ -216,7 +216,7 @@ void PDPhySTM32F1::initRx() {
     DMA1_Channel5->CMAR = (uint32_t) &timestampsRising;
 
     // configure DMA1 / channel 1 (connected to timer 2 / channel 3)
-    DMA1_Channel1->CCR = 
+    DMA1_Channel1->CCR =
         DMA_CCR_CIRC // circular mode
         | DMA_CCR_MINC // increment memory
         | (0b01 << DMA_CCR_PSIZE_Pos) // peripheral size 16 bit
@@ -275,7 +275,7 @@ void PDPhySTM32F1::configureRx(RxConfig config) {
         uint32_t cnt = TIM2->CNT;
         TIM2->CCR2 = (cnt + CC_SAMPLE_INTERVAL) & 0xffff;
         setRegBits(ADC1->CR1, ADC_CR1_EOSIE, ADC_CR1_EOSIE_Msk); // enable interrupt
-    
+
     } else {
         // disable voltage measurement
         clearRegBits(ADC1->CR1, ADC_CR1_EOSIE_Msk); // disable interrupt
@@ -284,7 +284,7 @@ void PDPhySTM32F1::configureRx(RxConfig config) {
     if (config == RxConfig::rxWaitForMessage) {
         // enable EXTI interrupt
         setRegBits(EXTI->IMR, EXTI_IMR_MR15, EXTI_IMR_MR15_Msk);
-    
+
     } else {
         // disable EXTI interrupt
         clearRegBits(EXTI->IMR, EXTI_IMR_MR15_Msk);
@@ -420,7 +420,7 @@ void PDPhySTM32F1::processData() {
             hasRxActivity = true;
         }
     }
-    
+
     // check for timeout (a gap without new data)
     int index = (TIMESTAMPS_EDGE_SIZE - DMA1_Channel1->CNDTR) * 2;
     uint16_t diff2 = ((uint16_t)TIM2->CNT) - decoder.lastTimeStamp();
@@ -596,7 +596,7 @@ bool PDPhySTM32F1::transmitMessage(const PDMessage* msg) {
         // enable PA6 as CC2_TX_EN
         setRegBits(GPIOA->CRL, GPIO_CRL_CNF_OUTPUT(6) | GPIO_CRL_MODE_OUTPUT_2MHZ(6), GPIO_CRL_CNF_MASK(6) | GPIO_CRL_MODE_MASK(6));
     }
-    
+
     DMA1_Channel3->CNDTR = txBitStreamLength;
     setRegBits(DMA1_Channel3->CCR, DMA_CCR_EN, DMA_CCR_EN_Msk);
     setRegBits(SPI1->CR2, SPI_CR2_TXDMAEN, SPI_CR2_TXDMAEN_Msk);
diff --git a/src/PDPhySTM32F1.h b/src/phy/STM32F1/PDPhySTM32F1.h
similarity index 99%
rename from src/PDPhySTM32F1.h
rename to src/phy/STM32F1/PDPhySTM32F1.h
index e6bb790..d27bc00 100644
--- a/src/PDPhySTM32F1.h
+++ b/src/phy/STM32F1/PDPhySTM32F1.h
@@ -17,7 +17,7 @@ extern "C" void DMA1_Channel3_IRQHandler();
 
 /**
  * @brief Physical layer for USB PD communication.
- * 
+ *
  */
 struct PDPhySTM32F1 : PDPhy {
 private:
diff --git a/src/PDPhySTM32F4.cpp b/src/phy/STM32F4/PDPhySTM32F4.cpp
similarity index 99%
rename from src/PDPhySTM32F4.cpp
rename to src/phy/STM32F4/PDPhySTM32F4.cpp
index 1f6ac1d..c68207f 100644
--- a/src/PDPhySTM32F4.cpp
+++ b/src/phy/STM32F4/PDPhySTM32F4.cpp
@@ -10,10 +10,10 @@
 
 #include <Arduino.h>
 #include <string.h>
-#include "CMSISHelper.h"
+#include "phy/CMSISHelper.h"
 #include "PDController.h"
-#include "PDMessageDecoder.h"
-#include "PDMessageEncoder.h"
+#include "phy/PDMessageDecoder.h"
+#include "phy/PDMessageEncoder.h"
 #include "PDPhySTM32F4.h"
 #include "TaskScheduler.h"
 
@@ -169,7 +169,7 @@ void PDPhySTM32F4::initRx() {
     RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN | RCC_AHB1ENR_GPIOBEN | RCC_AHB1ENR_DMA1EN;
     // enable clock for DMA1
     RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;
-    
+
     // wait for clock
     asm("nop");
     asm("nop");
@@ -247,7 +247,7 @@ void PDPhySTM32F4::configureRx(RxConfig config) {
         uint32_t cnt = TIM2->CNT;
         TIM2->CCR3 = (cnt + CC_SAMPLE_INTERVAL) & 0xffff;
         setRegBits(ADC1->CR1, ADC_CR1_EOCIE, ADC_CR1_EOCIE_Msk); // enable interrupt
-    
+
     } else {
         // disable voltage measurement
         clearRegBits(ADC1->CR1, ADC_CR1_EOCIE_Msk); // disable interrupt
@@ -256,7 +256,7 @@ void PDPhySTM32F4::configureRx(RxConfig config) {
     if (config == RxConfig::rxWaitForMessage) {
         // enable EXTI interrupt
         setRegBits(EXTI->IMR, EXTI_IMR_MR1, EXTI_IMR_MR1_Msk);
-    
+
     } else {
         // disable EXTI interrupt
         clearRegBits(EXTI->IMR, EXTI_IMR_MR1_Msk);
@@ -384,7 +384,7 @@ void PDPhySTM32F4::processData() {
             hasRxActivity = true;
         }
     }
-    
+
     // check for timeout (a gap without new data)
     int index = TIMESTAMPS_SIZE - DMA1_Stream6->NDTR;
     uint16_t diff2 = ((uint16_t)TIM2->CNT) - decoder.lastTimeStamp();
@@ -546,7 +546,7 @@ bool PDPhySTM32F4::transmitMessage(const PDMessage* msg) {
         // enable PB4 as CC2_TX_EN
         setRegBits(GPIOB->MODER, GPIO_MODER_OUTPUT(4), GPIO_MODER_Msk(4));
     }
-    
+
     // configure and enable DMA (for SPI1_TX)
     DMA2_Stream3->NDTR = txBitStreamLength;
     setRegBits(DMA2_Stream3->CR , DMA_SxCR_EN, DMA_SxCR_EN_Msk);
diff --git a/src/PDPhySTM32F4.h b/src/phy/STM32F4/PDPhySTM32F4.h
similarity index 99%
rename from src/PDPhySTM32F4.h
rename to src/phy/STM32F4/PDPhySTM32F4.h
index 19ef94c..60d00f4 100644
--- a/src/PDPhySTM32F4.h
+++ b/src/phy/STM32F4/PDPhySTM32F4.h
@@ -17,7 +17,7 @@ extern "C" void DMA2_Stream3_IRQHandler();
 
 /**
  * @brief Physical layer for USB PD communication.
- * 
+ *
  */
 struct PDPhySTM32F4 : PDPhy {
 private:
diff --git a/src/PDPhySTM32L4.cpp b/src/phy/STM32L4/PDPhySTM32L4.cpp
similarity index 99%
rename from src/PDPhySTM32L4.cpp
rename to src/phy/STM32L4/PDPhySTM32L4.cpp
index 77e293f..7b172aa 100644
--- a/src/PDPhySTM32L4.cpp
+++ b/src/phy/STM32L4/PDPhySTM32L4.cpp
@@ -10,10 +10,10 @@
 
 #include <Arduino.h>
 #include <string.h>
-#include "CMSISHelper.h"
+#include "phy/CMSISHelper.h"
 #include "PDController.h"
-#include "PDMessageDecoder.h"
-#include "PDMessageEncoder.h"
+#include "phy/PDMessageDecoder.h"
+#include "phy/PDMessageEncoder.h"
 #include "PDPhySTM32L4.h"
 #include "TaskScheduler.h"
 
@@ -179,13 +179,13 @@ void PDPhySTM32L4::initRx() {
     RCC->AHB1ENR |= RCC_AHB1ENR_DMA1EN | RCC_AHB1ENR_CRCEN;
     // enable clock for GPIOA, GPIOB and ADC1
     RCC->AHB2ENR |= RCC_AHB2ENR_GPIOAEN | RCC_AHB2ENR_GPIOBEN | RCC_AHB2ENR_ADCEN;
-    
+
     // wait for clock
     asm("nop");
     asm("nop");
 
     // configure comparator 1
-    COMP1->CSR = 
+    COMP1->CSR =
           (0b10 << COMP_CSR_INPSEL_Pos) // select PA1 as input+
         | COMP_CSR_SCALEN // enable Vrefint scaling
         | COMP_CSR_BRGEN // enable voltage bridge
@@ -207,7 +207,7 @@ void PDPhySTM32L4::initRx() {
     }
 
     // configure comparator 2
-    COMP2->CSR = 
+    COMP2->CSR =
           (0b10 << COMP_CSR_INPSEL_Pos) // select PA3 as input+
         | COMP_CSR_SCALEN // enable Vrefint scaling
         | COMP_CSR_BRGEN // enable voltage bridge
@@ -313,7 +313,7 @@ void PDPhySTM32L4::configureRx(RxConfig config) {
         uint32_t cnt = TIM2->CNT;
         TIM2->CCR2 = (cnt + CC_SAMPLE_INTERVAL) & 0xffff;
         setRegBits(ADC1->CR, ADC_CR_ADSTART, ADC_CR_ADSTART_Msk); // start ADC
-    
+
     } else {
         // disable voltage measurement
         setRegBits(ADC1->CR, ADC_CR_ADSTP, ADC_CR_ADSTP_Msk); // stop ADC
@@ -325,7 +325,7 @@ void PDPhySTM32L4::configureRx(RxConfig config) {
             setRegBits(EXTI->IMR1, EXTI_COMP1, EXTI_COMP1_Msk);
         else
             setRegBits(EXTI->IMR1, EXTI_COMP2, EXTI_COMP2_Msk);
-    
+
     } else {
         // disable COMP interrupt
         clearRegBits(EXTI->IMR1, ccActive == 1 ? EXTI_COMP1_Msk : EXTI_COMP2_Msk);
@@ -478,7 +478,7 @@ void PDPhySTM32L4::processData() {
             hasRxActivity = true;
         }
     }
-    
+
     // check for timeout (a gap without new data)
     int index = BUF_SIZE - DMA1_Channel7->CNDTR;
     uint16_t diff2 = ((uint16_t)TIM2->CNT) - decoder.lastTimeStamp();
@@ -544,7 +544,7 @@ void PDPhySTM32L4::initTx() {
     setRegBits(GPIOA->OTYPER, GPIO_OTYPER_PUSH_PULL(12), GPIO_OTYPER_Msk(12));
     setRegBits(GPIOA->OSPEEDR, GPIO_OSPEEDR_MEDIUM(12), GPIO_OSPEEDR_Msk(12));
     setRegBits(GPIOA->PUPDR, GPIO_PUPDR_NONE(12), GPIO_PUPDR_Msk(12));
-    setRegBits(GPIOA->AFR[1], GPIO_AFRH(12, 5), GPIO_AFRH_Msk(12)); 
+    setRegBits(GPIOA->AFR[1], GPIO_AFRH(12, 5), GPIO_AFRH_Msk(12));
 
     // Configure PB0 as CC1_TX_EN
     gpioSetOutputHigh(GPIOB, 0); // set high (open drain)
@@ -558,7 +558,7 @@ void PDPhySTM32L4::initTx() {
     setRegBits(GPIOB->OTYPER, GPIO_OTYPER_PUSH_PULL(5), GPIO_OTYPER_Msk(5));
     setRegBits(GPIOB->OSPEEDR, GPIO_OSPEEDR_MEDIUM(5), GPIO_OSPEEDR_Msk(5));
     setRegBits(GPIOB->PUPDR, GPIO_PUPDR_NONE(5), GPIO_PUPDR_Msk(5));
-    setRegBits(GPIOB->AFR[0], GPIO_AFRL(5, 5), GPIO_AFRL_Msk(5)); 
+    setRegBits(GPIOB->AFR[0], GPIO_AFRL(5, 5), GPIO_AFRL_Msk(5));
 
     // Configure PB4 as CC2_TX_EN
     gpioSetOutputHigh(GPIOB, 4); // set high (open drain)
@@ -643,9 +643,9 @@ bool PDPhySTM32L4::transmitMessage(const PDMessage* msg) {
         setRegBits(GPIOB->MODER, GPIO_MODER_ALTERNATE(5), GPIO_MODER_Msk(5));
         gpioSetOutputLow(GPIOB, 4); // pull low
     }
-    
+
     setRegBits(SPI1->CR1, SPI_CR1_SPE, SPI_CR1_SPE);
-    
+
     __enable_irq();
     return true;
 }
diff --git a/src/PDPhySTM32L4.h b/src/phy/STM32L4/PDPhySTM32L4.h
similarity index 99%
rename from src/PDPhySTM32L4.h
rename to src/phy/STM32L4/PDPhySTM32L4.h
index b19093b..2de3620 100644
--- a/src/PDPhySTM32L4.h
+++ b/src/phy/STM32L4/PDPhySTM32L4.h
@@ -19,7 +19,7 @@ extern "C" void DMA2_Channel2_IRQHandler();
 
 /**
  * @brief Physical layer for USB PD communication.
- * 
+ *
  */
 struct PDPhySTM32L4 : PDPhy {
 private:
diff --git a/src/PDPhySTM32UCPD.cpp b/src/phy/STM32UCPD/PDPhySTM32UCPD.cpp
similarity index 100%
rename from src/PDPhySTM32UCPD.cpp
rename to src/phy/STM32UCPD/PDPhySTM32UCPD.cpp
diff --git a/src/PDPhySTM32UCPD.h b/src/phy/STM32UCPD/PDPhySTM32UCPD.h
similarity index 99%
rename from src/PDPhySTM32UCPD.h
rename to src/phy/STM32UCPD/PDPhySTM32UCPD.h
index 6a54f3a..f396382 100644
--- a/src/PDPhySTM32UCPD.h
+++ b/src/phy/STM32UCPD/PDPhySTM32UCPD.h
@@ -17,7 +17,7 @@ extern "C" void UCPD1_2_IRQHandler();
 
 /**
  * @brief Physical layer for USB PD communication.
- * 
+ *
  */
 struct PDPhySTM32UCPD : PDPhy {
 private: