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No Rx TLP with s7pciephy #112

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xdev-x opened this issue Apr 2, 2023 · 0 comments
Open

No Rx TLP with s7pciephy #112

xdev-x opened this issue Apr 2, 2023 · 0 comments
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@xdev-x
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xdev-x commented Apr 2, 2023

Hi,

I am working with the pci_screamer project of your own, and I am experiencing issues with the PCIe PHY from the Xilinx 7 series.

I am able to send TLP (read or write), I have been able to validate that write TLPs are working (by checking the address where I am writing to), but I have issues with the read TLPs. Indeed, I never get the completion TLPs.

I used litescope to probe some signals, and it seems nothing come from the PHY...

Any idea ?

Thanks

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