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I am working with the pci_screamer project of your own, and I am experiencing issues with the PCIe PHY from the Xilinx 7 series.
I am able to send TLP (read or write), I have been able to validate that write TLPs are working (by checking the address where I am writing to), but I have issues with the read TLPs. Indeed, I never get the completion TLPs.
I used litescope to probe some signals, and it seems nothing come from the PHY...
Any idea ?
Thanks
The text was updated successfully, but these errors were encountered:
Hi,
I am working with the pci_screamer project of your own, and I am experiencing issues with the PCIe PHY from the Xilinx 7 series.
I am able to send TLP (read or write), I have been able to validate that write TLPs are working (by checking the address where I am writing to), but I have issues with the read TLPs. Indeed, I never get the completion TLPs.
I used litescope to probe some signals, and it seems nothing come from the PHY...
Any idea ?
Thanks
The text was updated successfully, but these errors were encountered: