From 1572b25c5e0d869a0c3ed6b8855da157d3ade781 Mon Sep 17 00:00:00 2001 From: IstvanZsSzekely <122256380+IstvanZsSzekely@users.noreply.github.com> Date: Thu, 6 Jun 2024 22:58:29 +0300 Subject: [PATCH] SV files generation (#15) Added other delimiters and use-cases for the regmap Rename parsed dict dependencies to parameters SV files generation: Changed default value definition - In Docs, default value can be a simple value, followed by (*), and expanded in the main body - In Testbenches, default value is expanded for evaluation Updated parameter parsing to use regex Changed default value description to be SV compatible when writing the txt files Signed-off-by: Istvan-Zsolt Szekely --- adi_doctools/parser/hdl.py | 48 +++++++++++++++++------------ adi_doctools/writer/hdl.py | 51 +++++++++++++------------------ tests/asset/adi_regmap_parent.txt | 2 +- 3 files changed, 51 insertions(+), 50 deletions(-) diff --git a/adi_doctools/parser/hdl.py b/adi_doctools/parser/hdl.py index 3c5228a..ff1dcdc 100644 --- a/adi_doctools/parser/hdl.py +++ b/adi_doctools/parser/hdl.py @@ -84,7 +84,7 @@ def get_where(desc: str, warn: List, reg: str, fi=None) -> Tuple[any]: while "REG" in data: regi = data.index("REG") rfi = data.index("ENDREG") - reg_deps = [] + reg_params = [] if not regi: break @@ -134,7 +134,7 @@ def get_where(desc: str, warn: List, reg: str, fi=None) -> Tuple[any]: reg_addr_incr = 0 reg_name = data[regi + 1] reg_desc = None - reg_deps = [] + reg_params = [] with contextlib.suppress(ValueError): tet = data.index("TITLE") if "TITLE" in data else -1 @@ -184,7 +184,7 @@ def get_where(desc: str, warn: List, reg: str, fi=None) -> Tuple[any]: try: bit_tmp = int(str_part) except Exception: - reg_deps.append(str_part) + reg_params.append(str_part) try: bit1_ = int(bits_[1]) except Exception: @@ -196,11 +196,12 @@ def get_where(desc: str, warn: List, reg: str, fi=None) -> Tuple[any]: try: bit_tmp = int(str_part) except Exception: - reg_deps.append(str_part) + reg_params.append(str_part) field_bits = (bit0_, bit1_) if len(field_loc) > 1: field_default = ' '.join(field_loc[1:]) + field_default_long = ' '.join(field_loc[1:]) try: fd_ = int(field_default, 16) if type(field_bits) is tuple: @@ -213,27 +214,32 @@ def get_where(desc: str, warn: List, reg: str, fi=None) -> Tuple[any]: f"{field_loc[0]} at reg " f"'{reg_name}'!") field_default = fd_ + field_default_long = fd_ except Exception: # Convert parameter delimiter into Sphinx literal - field_default = field_default.replace("''", "``") + split_field = field_default.split(" = ", 1) + field_default = split_field[0] + field_default_long = split_field[0] if "0xX" not in field_default: - default_str = field_default - default_str = default_str.replace("``", "") - default_str = default_str.replace("log2", "") - default_str = default_str.replace("max", "") - default_str = default_str.replace("min", "") - delimiters = ["+", "-", "*", "/", "^", "(", ")", ","] - for delimiter in delimiters: - default_str = " ".join(default_str.split(delimiter)) - for str_part in default_str.split(): + try: + default_str = split_field[1] + field_default_long = split_field[1] + field_default = split_field[0] + " (*)" + except Exception: + default_str = split_field[0] + default_str = re.sub("`[A-Z0-9_]+", "", default_str) + default_str = re.findall("[A-Z0-9_]+", default_str) + for str_part in default_str: try: default_tmp = int(str_part) except Exception: - reg_deps.append(str_part) + reg_params.append(re.sub('\[[0-9:]+\]', ' ', str_part)) + # TODO: Check if parameter exist in the parameters dict from the parsed pkg.ttcl (when it gets implemented) else: field_default = None + field_default_long = None fi_d = data[fi + 2] where_desc = '' @@ -278,6 +284,7 @@ def get_where(desc: str, warn: List, reg: str, fi=None) -> Tuple[any]: "name": field_name, "bits": field_bits, "default": field_default, + "default_long": field_default_long, "rw": field_rw, "description": field_desc, }) @@ -290,16 +297,17 @@ def get_where(desc: str, warn: List, reg: str, fi=None) -> Tuple[any]: "name": data[i], "bits": None, "default": None, + "default_long": None, "rw": None, "description": None, }) data = data[efi + 1:] - if len(reg_deps): - reg_deps_set = set(reg_deps) - reg_deps = list(reg_deps_set) - reg_deps.sort() + if len(reg_params): + reg_params_set = set(reg_params) + reg_params = list(reg_params_set) + reg_params.sort() regmap['subregmap'][title_tool]['regmap'].append( { 'import': reg_import, @@ -309,7 +317,7 @@ def get_where(desc: str, warn: List, reg: str, fi=None) -> Tuple[any]: 'addr_incr': reg_addr_incr, 'description': reg_desc, 'fields': fields, - 'dependencies': reg_deps + 'parameters': reg_params } ) regmap['subregmap'][title_tool]['access_type'] = access_type diff --git a/adi_doctools/writer/hdl.py b/adi_doctools/writer/hdl.py index 2074319..1a47ecd 100644 --- a/adi_doctools/writer/hdl.py +++ b/adi_doctools/writer/hdl.py @@ -23,13 +23,13 @@ def svpkg_regmap(f, regmap: Dict, key: str): for reg in regmap['regmap']: row = f" class {reg['name']}" - reg_dep_dec = [] - for reg_dep in reg['dependencies']: - reg_dep_dec.append("int " + reg_dep) - reg_dep_dec.sort() - if len(reg_dep_dec): + reg_param_dec = [] + for reg_param in reg['parameters']: + reg_param_dec.append("int " + reg_param) + reg_param_dec.sort() + if len(reg_param_dec): row += " #(" - row += ", ".join(reg_dep_dec) + row += ", ".join(reg_param_dec) row += ")" row += " extends register_base;""\n" f.write(row) @@ -45,19 +45,12 @@ def svpkg_regmap(f, regmap: Dict, key: str): row = f" this.{field['name']}_F = "'new("'f"{field['name']}" bits = f"{field['bits'][0]}, {field['bits'][1]}" - if field['default'] is None: + if field['default_long'] is None: default = "'hXXXXXXXX" else: - default = field['default'] + default = field['default_long'] if type(default) is int: - default = hex(field['default']).replace("0x", "'h") - else: - if "0xX" not in default: - default = default.replace("``", "") - default = default.replace("log2", "$clog2") - default = default.replace("min", "`MIN") - default = default.replace("max", "`MAX") - default = default.replace("^", "**") + default = hex(field['default_long']).replace("0x", "'h") row += '"'f", {bits}, {field['rw']}, {default}, this);""\n" f.write(row) @@ -113,18 +106,18 @@ def svpkg_head(f, key: str, regmap: Dict): f.write(f"package {pkgname};\n") f.write(" import regmap_pkg::*;\n\n") f.write(f" class {classname}") - reg_dep_dec = [] + reg_param_dec = [] for rm in regmap: for reg in regmap[rm]['regmap']: - for reg_dep in reg['dependencies']: - reg_dep_dec.append("int " + reg_dep) - if len(reg_dep_dec): - reg_deps_set = set(reg_dep_dec) - reg_dep_dec = list(reg_deps_set) - reg_dep_dec.sort() - if len(reg_dep_dec): + for reg_param in reg['parameters']: + reg_param_dec.append("int " + reg_param) + if len(reg_param_dec): + reg_params_set = set(reg_param_dec) + reg_param_dec = list(reg_params_set) + reg_param_dec.sort() + if len(reg_param_dec): f.write(f" #(") - f.write(f", ".join(reg_dep_dec)) + f.write(f", ".join(reg_param_dec)) f.write(f")") f.write(f";\n\n") @@ -136,17 +129,17 @@ def svpkg_reg_decl(f, regmap: Dict): reg_ = reg.copy() reg_['name'] = reg_['name'].replace('n', str(n)) row = f" {reg['name']}" - if len(reg['dependencies']): + if len(reg['parameters']): row += " #(" - row += ", ".join(reg['dependencies']) + row += ", ".join(reg['parameters']) row += ")" row += f" {reg_['name']}_R;\n" f.write(row) else: row = f" {reg['name']}" - if len(reg['dependencies']): + if len(reg['parameters']): row += " #(" - row += ", ".join(reg['dependencies']) + row += ", ".join(reg['parameters']) row += ")" row += f" {reg['name']}_R;\n" f.write(row) diff --git a/tests/asset/adi_regmap_parent.txt b/tests/asset/adi_regmap_parent.txt index 6235a89..8303a1e 100644 --- a/tests/asset/adi_regmap_parent.txt +++ b/tests/asset/adi_regmap_parent.txt @@ -61,7 +61,7 @@ Reserved. ENDFIELD FIELD -[B-1:3] (log2(VAL3^9)-VAL4)*7^2 +[B-1:3] ($clog2(VAL3**9)-VAL4)*7**2 THIRD RO Reserved.