From 3c535035c0aea27218094fbcb5fdf734cd66503c Mon Sep 17 00:00:00 2001
From: Ty Lamontagne <amfobes@gmail.com>
Date: Thu, 26 Dec 2024 12:53:35 -0500
Subject: [PATCH] EE Cache: Use std::array for cached tlb entries

---
 pcsx2/COP0.cpp  | 13 ++++++++-----
 pcsx2/R5900.cpp |  2 +-
 pcsx2/R5900.h   | 26 +++++++-------------------
 3 files changed, 16 insertions(+), 25 deletions(-)

diff --git a/pcsx2/COP0.cpp b/pcsx2/COP0.cpp
index 89a8a1de462120..251e437ae9c213 100644
--- a/pcsx2/COP0.cpp
+++ b/pcsx2/COP0.cpp
@@ -337,11 +337,14 @@ void UnmapTLB(const tlbs& t, int i)
 	{
 		if (cachedTlbs.PFN0s[i] == t.PFN0() && cachedTlbs.PFN1s[i] == t.PFN1() && cachedTlbs.PageMasks[i] == ConvertPageMask(t.PageMask.UL))
 		{
-			cachedTlbs.PFN0s.erase(cachedTlbs.PFN0s.begin() + i);
-			cachedTlbs.PFN1s.erase(cachedTlbs.PFN1s.begin() + i);
-			cachedTlbs.PageMasks.erase(cachedTlbs.PageMasks.begin() + i);
-			cachedTlbs.CacheEnabled0.erase(cachedTlbs.CacheEnabled0.begin() + i);
-			cachedTlbs.CacheEnabled1.erase(cachedTlbs.CacheEnabled1.begin() + i);
+			for (size_t j = i; j < cachedTlbs.count - 1; j++)
+			{
+				cachedTlbs.CacheEnabled0[j] = cachedTlbs.CacheEnabled0[j + 1];
+				cachedTlbs.CacheEnabled1[j] = cachedTlbs.CacheEnabled1[j + 1];
+				cachedTlbs.PFN0s[j] = cachedTlbs.PFN0s[j + 1];
+				cachedTlbs.PFN1s[j] = cachedTlbs.PFN1s[j + 1];
+				cachedTlbs.PageMasks[j] = cachedTlbs.PageMasks[j + 1];
+			}
 			cachedTlbs.count--;
 			break;
 		}
diff --git a/pcsx2/R5900.cpp b/pcsx2/R5900.cpp
index a4ff7bc2221325..3c7381273f439b 100644
--- a/pcsx2/R5900.cpp
+++ b/pcsx2/R5900.cpp
@@ -61,7 +61,7 @@ void cpuReset()
 	std::memset(&cpuRegs, 0, sizeof(cpuRegs));
 	std::memset(&fpuRegs, 0, sizeof(fpuRegs));
 	std::memset(&tlb, 0, sizeof(tlb));
-	cachedTlbs.reset();
+	cachedTlbs.count = 0;
 
 	cpuRegs.pc				= 0xbfc00000; //set pc reg to stack
 	cpuRegs.CP0.n.Config	= 0x440;
diff --git a/pcsx2/R5900.h b/pcsx2/R5900.h
index 66f8b00145a711..ad0310dda6b4ef 100644
--- a/pcsx2/R5900.h
+++ b/pcsx2/R5900.h
@@ -5,6 +5,8 @@
 
 #include "common/Pcsx2Defs.h"
 
+#include <array>
+
 // --------------------------------------------------------------------------------------
 //  EE Bios function name tables.
 // --------------------------------------------------------------------------------------
@@ -266,26 +268,12 @@ alignas(16) extern tlbs tlb[48];
 struct cachedTlbs_t
 {
 	u32 count;
-	std::vector<u32> PageMasks;
-	std::vector<u32> PFN1s;
-	std::vector<u32> CacheEnabled1;
-	std::vector<u32> PFN0s;
-	std::vector<u32> CacheEnabled0;
 
-	inline void reset()
-	{
-		count = 0;
-		PageMasks.clear();
-		PageMasks.resize(48);
-		PFN1s.clear();
-		PFN1s.resize(48);
-		PFN0s.clear();
-		PFN0s.resize(48);
-		CacheEnabled1.clear();
-		CacheEnabled1.resize(48);
-		CacheEnabled0.clear();
-		CacheEnabled0.resize(48);
-	}
+	alignas(16) std::array<u32, 48> PageMasks;
+	alignas(16) std::array<u32, 48> PFN1s;
+	alignas(16) std::array<u32, 48> CacheEnabled1;
+	alignas(16) std::array<u32, 48> PFN0s;
+	alignas(16) std::array<u32, 48> CacheEnabled0;
 };
 
 extern cachedTlbs_t cachedTlbs;