diff --git a/.github/workflows/make.yml b/.github/workflows/make.yml index 88f84e2d..ee58d7f4 100644 --- a/.github/workflows/make.yml +++ b/.github/workflows/make.yml @@ -5,21 +5,230 @@ on: [push, pull_request] jobs: build_repo: - name: Build repo and run tests + name: Build repo runs-on: ubuntu-latest steps: - - name: Checkout reposistory - uses: actions/checkout@v4 + - name: Checkout reposistory + uses: actions/checkout@v4 - - name: make - run: make -j $(nproc) WERROR=1 + - name: make + run: make -j $(nproc) WERROR=1 - - name: Run build info checks - run: ./tests/run_build_info_checks.sh + - name: Upload artifact + uses: actions/upload-artifact@v4 + with: + path: build/ - - name: Run logic checks - run: ./tests/run_logic_checks.sh + build_info_checks: + name: Test - build_info_checks + needs: [build_repo] + runs-on: ubuntu-latest + + steps: + - name: Checkout reposistory + uses: actions/checkout@v4 + + - name: Download build artifacts + uses: actions/download-artifact@v4 + with: + name: artifact + path: build/ + + - name: Make tests executable + run: chmod --recursive +x build/ + + - name: Run build info checks + run: ./tests/run_build_info_checks.sh + + logic_checks: + name: Test - logic_checks + needs: [build_repo] + runs-on: ubuntu-latest + + steps: + - name: Checkout reposistory + uses: actions/checkout@v4 + + - name: Download build artifacts + uses: actions/download-artifact@v4 + with: + name: artifact + path: build/ + + - name: Make tests executable + run: chmod --recursive +x build/ + + - name: Run logic checks + run: ./tests/run_logic_checks.sh + + instruction_checks_all: + name: Test - instruction_checks_all + needs: [build_repo] + runs-on: ubuntu-latest + + steps: + - name: Checkout reposistory + uses: actions/checkout@v4 + + - name: Download build artifacts + uses: actions/download-artifact@v4 + with: + name: artifact + path: build/ + + - name: Make tests executable + run: chmod --recursive +x build/ + + - name: test + run: tree build/ + + - name: Run instruction checks + run: ./tests/run_instruction_checks.sh + + instruction_checks_jalr: + name: Test - instruction_checks_jalr + needs: [build_repo] + runs-on: ubuntu-latest + + steps: + - name: Checkout reposistory + uses: actions/checkout@v4 + + - name: Download build artifacts + uses: actions/download-artifact@v4 + with: + name: artifact + path: build/ + + - name: Make tests executable + run: chmod --recursive +x build/ + + - name: Run instruction check - jalr + run: ./build/tests/c/instruction_checks/jalr.elf + + instruction_checks_plain_disassembly: + name: Test - instruction_checks_plain_disassembly + needs: [build_repo] + runs-on: ubuntu-latest + + steps: + - name: Checkout reposistory + uses: actions/checkout@v4 + + - name: Download build artifacts + uses: actions/download-artifact@v4 + with: + name: artifact + path: build/ + + - name: Make tests executable + run: chmod --recursive +x build/ + + - name: Run instruction check - plain_disassembly + run: ./build/tests/c/instruction_checks/plain_disassembly.elf + + instruction_checks_r3000gte_disasm: + name: Test - instruction_checks_r3000gte_disasm + needs: [build_repo] + runs-on: ubuntu-latest + + steps: + - name: Checkout reposistory + uses: actions/checkout@v4 + + - name: Download build artifacts + uses: actions/download-artifact@v4 + with: + name: artifact + path: build/ + + - name: Make tests executable + run: chmod --recursive +x build/ + + - name: Run instruction check - r3000gte_disasm + run: ./build/tests/c/instruction_checks/r3000gte_disasm.elf + + instruction_checks_r4000allegrex_disasm: + name: Test - instruction_checks_r4000allegrex_disasm + needs: [build_repo] + runs-on: ubuntu-latest + + steps: + - name: Checkout reposistory + uses: actions/checkout@v4 + + - name: Download build artifacts + uses: actions/download-artifact@v4 + with: + name: artifact + path: build/ + + - name: Make tests executable + run: chmod --recursive +x build/ + + - name: Run instruction check - r4000allegrex_disasm + run: ./build/tests/c/instruction_checks/r4000allegrex_disasm.elf + + instruction_checks_r4000allegrex_vfpu_disasm: + name: Test - instruction_checks_r4000allegrex_vfpu_disasm + needs: [build_repo] + runs-on: ubuntu-latest + + steps: + - name: Checkout reposistory + uses: actions/checkout@v4 + + - name: Download build artifacts + uses: actions/download-artifact@v4 + with: + name: artifact + path: build/ + + - name: Make tests executable + run: chmod --recursive +x build/ + + - name: Run instruction check - r4000allegrex_vfpu_disasm + run: ./build/tests/c/instruction_checks/r4000allegrex_vfpu_disasm.elf + + instruction_checks_r5900_trunc_cvt: + name: Test - instruction_checks_r5900_trunc_cvt + needs: [build_repo] + runs-on: ubuntu-latest + + steps: + - name: Checkout reposistory + uses: actions/checkout@v4 + + - name: Download build artifacts + uses: actions/download-artifact@v4 + with: + name: artifact + path: build/ + + - name: Make tests executable + run: chmod --recursive +x build/ + + - name: Run instruction check - r5900_trunc_cvt + run: ./build/tests/c/instruction_checks/r5900_trunc_cvt.elf + + instruction_checks_r5900_vcallms: + name: Test - instruction_checks_r5900_vcallms + needs: [build_repo] + runs-on: ubuntu-latest + + steps: + - name: Checkout reposistory + uses: actions/checkout@v4 + + - name: Download build artifacts + uses: actions/download-artifact@v4 + with: + name: artifact + path: build/ + + - name: Make tests executable + run: chmod --recursive +x build/ - - name: Run instruction checks - run: ./tests/run_instruction_checks.sh + - name: Run instruction check - r5900_vcallms + run: ./build/tests/c/instruction_checks/r5900_vcallms.elf diff --git a/.gitignore b/.gitignore index 86ce3910..0311671a 100644 --- a/.gitignore +++ b/.gitignore @@ -229,3 +229,5 @@ Cargo.lock # Added by cargo /target + +.make_options diff --git a/CHANGELOG.md b/CHANGELOG.md index 3a778622..2b309c9b 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,29 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 ## [Unreleased] +## [1.10.0] - 2024-04-22 + +### Added + +- Add PSP's ALLEGREX instruction set support. +- The global `regNames.r4000AllegrexVfpuControlNamedRegisters` option controls + if named registers should be used for the VFPU control registers of the R4000 + ALLEGREX. +- `Utils.floatRepr_32From16` function. + - Converts a half float to a single precision float. + - Both the argument and the return value correspond to their hex + representation instead of an actual float. + +### Changed + +- Cleanups in tests code. + +### Fixed + +- Fix typo on C++ bindings. + - The registers getters of the R5900 instruction class was checking for the + wrong operands. + ## [1.9.5] - 2024-04-03 ### Changed @@ -578,6 +601,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - First version [unreleased]: https://github.com/Decompollaborate/rabbitizer/compare/master...develop +[1.10.0]: https://github.com/Decompollaborate/rabbitizer/compare/1.9.5...1.10.0 [1.9.5]: https://github.com/Decompollaborate/rabbitizer/compare/1.9.4...1.9.5 [1.9.4]: https://github.com/Decompollaborate/rabbitizer/compare/1.9.3...1.9.4 [1.9.3]: https://github.com/Decompollaborate/rabbitizer/compare/1.9.2...1.9.3 diff --git a/Cargo.toml b/Cargo.toml index 4a8d68a9..f281bef1 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -4,7 +4,7 @@ [package] name = "rabbitizer" # Version should be synced with include/common/RabbitizerVersion.h -version = "1.9.5" +version = "1.10.0" edition = "2021" authors = ["Anghelo Carvajal "] description = "MIPS instruction decoder" diff --git a/Makefile b/Makefile index 916840a5..eea2125c 100644 --- a/Makefile +++ b/Makefile @@ -1,4 +1,8 @@ # Build options can be changed by modifying the makefile or by building with 'make SETTING=value'. +# It is also possible to override the settings in Defaults in a file called .make_options as 'SETTING=value'. + +-include .make_options + DEBUG ?= 0 WERROR ?= 0 ASAN ?= 0 @@ -24,6 +28,7 @@ WARNINGS += -Werror=unused-parameter -Werror=shadow -Werror=switch -Werro WARNINGS_C := -Werror=implicit-function-declaration -Werror=incompatible-pointer-types WARNINGS += -Werror=type-limits WARNINGS_CXX := +WARNINGS_ELFS := -Wno-override-init ifeq ($(CC),gcc) WARNINGS += -Wno-cast-function-type -Wformat-truncation -Wformat-overflow -Wno-nonnull-compare @@ -67,13 +72,13 @@ CXX_FILES := $(foreach dir,$(SRCXX_DIRS),$(wildcard $(dir)/*.cpp)) HXX_FILES := $(foreach dir,$(IINC_XX),$(wildcard $(dir)/**/*.hpp)) OXX_FILES := $(foreach f,$(CXX_FILES:.cpp=.o),build/$f) -DEP_FILES := $(O_FILES:%.o=%.d) $(OXX_FILES:%.o=%.d) - -TESTS_DIRS := $(shell find tests -type d) +TESTS_DIRS := $(shell find tests -mindepth 1 -type d -not -path "tests/asm*") TESTS_C := $(foreach dir,$(TESTS_DIRS),$(wildcard $(dir)/*.c)) TESTS_CXX := $(foreach dir,$(TESTS_DIRS),$(wildcard $(dir)/*.cpp)) TESTS_ELFS := $(foreach f,$(TESTS_C:.c=.elf) $(TESTS_CXX:.cpp=.elf),build/$f) +DEP_FILES := $(O_FILES:%.o=%.d) $(OXX_FILES:%.o=%.d) $(TESTS_ELFS:%.elf=%.d) + STATIC_LIB := build/librabbitizer.a DYNAMIC_LIB := build/librabbitizer.so @@ -132,10 +137,10 @@ tests: $(TESTS_ELFS) #### Various Recipes #### build/%.elf: %.c $(STATIC_LIB) - $(CC) -MMD -MP $(CSTD) $(OPTFLAGS) $(IINC) $(WARNINGS) $(WARNINGS_C) $(CFLAGS) -o $@ $< $(LDFLAGS) + $(CC) -MMD -MP $(CSTD) $(OPTFLAGS) $(IINC) $(WARNINGS) $(WARNINGS_C) $(WARNINGS_ELFS) $(CFLAGS) -o $@ $< $(LDFLAGS) build/%.elf: %.cpp $(STATIC_LIB_XX) - $(CXX) -MMD -MP $(CXXSTD) $(OPTFLAGS) $(IINC_XX) $(WARNINGS) $(WARNINGS_CXX) $(CXXFLAGS) -o $@ $< $(LDXXFLAGS) + $(CXX) -MMD -MP $(CXXSTD) $(OPTFLAGS) $(IINC_XX) $(WARNINGS) $(WARNINGS_CXX) $(WARNINGS_ELFS) $(CXXFLAGS) -o $@ $< $(LDXXFLAGS) build/%.a: $(AR) rcs $@ $^ diff --git a/README.md b/README.md index cad795dc..d392ca02 100644 --- a/README.md +++ b/README.md @@ -41,6 +41,8 @@ MIPS instruction decoder API. - Main focus on MIPS I, II and III architectures. Partial support for MIPS IV too. - N64 RSP instruction decoding support. - RSP decoding has been tested to build back to matching assemblies with [armips](https://github.com/Kingcom/armips/). + - R3000 GTE (PSX's CPU) decoding support. + - R4000 ALLEGREX (PSP's CPU) decoding support. - R5900 (PS2's Emotion Engine processor) decoding support. ## Non-features @@ -63,7 +65,7 @@ If you use a `requirements.txt` file in your repository, then you can add this library with the following line: ```txt -rabbitizer>=1.9.5,<2.0.0 +rabbitizer>=1.10.0,<2.0.0 ``` ### Development version @@ -72,6 +74,13 @@ The unstable development version is located at the [develop](https://github.com/Decompollaborate/rabbitizer/tree/develop) branch. PRs should be made into that branch instead of the main one. +Note that building the Python bindings from source require the Python +development package. Under Ubuntu/Debian based distros it can be installed with: + +```bash +apt install python3-dev +``` + In case you want to mess with the latest development version without wanting to clone the repository, then you could use the following command: @@ -96,7 +105,7 @@ cargo add rabbitizer Or you can add it manually to your `Cargo.toml`: ```toml -rabbitizer = "1.9.5" +rabbitizer = "1.10.0" ``` See this crate at . @@ -118,6 +127,15 @@ See this crate at . - no$psx documentation: - +- R4000 ALLEGREX: + - ALLEGREX-Instruction_Manual-English + - FPU-Instruction_Manual-English + - VFPU-Instruction_Manual-English + - VFPU-Users_Manual-English + - yet another PlayStationPortable Documentation + - Chapter "4.8 Allegrex Instructions" + - GNU binutils: + - R5900: - EmotionEngine instruction decoding: - Official documentation from Toshiba: diff --git a/cplusplus/include/generated/InstrIdType_enum_class.hpp b/cplusplus/include/generated/InstrIdType_enum_class.hpp index 2ad76f2b..2453c441 100644 --- a/cplusplus/include/generated/InstrIdType_enum_class.hpp +++ b/cplusplus/include/generated/InstrIdType_enum_class.hpp @@ -40,6 +40,52 @@ enum class IdType { R3000GTE_COP1, R3000GTE_COP2, R3000GTE_COP2_GTE, + R4000ALLEGREX_INVALID, + R4000ALLEGREX_NORMAL, + R4000ALLEGREX_SPECIAL, + R4000ALLEGREX_SPECIAL_RS, + R4000ALLEGREX_SPECIAL_SA, + R4000ALLEGREX_REGIMM, + R4000ALLEGREX_SPECIAL2, + R4000ALLEGREX_SPECIAL3, + R4000ALLEGREX_SPECIAL3_BSHFL, + R4000ALLEGREX_COP0, + R4000ALLEGREX_COP0_BC0, + R4000ALLEGREX_COP0_TLB, + R4000ALLEGREX_COP1, + R4000ALLEGREX_COP1_BC1, + R4000ALLEGREX_COP1_FPUS, + R4000ALLEGREX_COP1_FPUW, + R4000ALLEGREX_COP2, + R4000ALLEGREX_COP2_BC2, + R4000ALLEGREX_COP2_MFHC2, + R4000ALLEGREX_COP2_MFHC2_P, + R4000ALLEGREX_COP2_MFHC2_P_S, + R4000ALLEGREX_COP2_MTHC2, + R4000ALLEGREX_VFPU0, + R4000ALLEGREX_VFPU1, + R4000ALLEGREX_VFPU3, + R4000ALLEGREX_VFPU4, + R4000ALLEGREX_VFPU4_FMT0, + R4000ALLEGREX_VFPU4_FMT0_FMT0, + R4000ALLEGREX_VFPU4_FMT0_FMT2, + R4000ALLEGREX_VFPU4_FMT0_FMT3, + R4000ALLEGREX_VFPU4_FMT0_RND, + R4000ALLEGREX_VFPU4_FMT0_CVTFLT, + R4000ALLEGREX_VFPU4_FMT0_CVTINT, + R4000ALLEGREX_VFPU4_FMT0_FMT8, + R4000ALLEGREX_VFPU4_FMT0_FMT9, + R4000ALLEGREX_VFPU4_FMT0_CONTROL, + R4000ALLEGREX_VFPU4_FMT0_COLOR, + R4000ALLEGREX_VFPU4_FMT0_CST, + R4000ALLEGREX_VFPU4_FMT2, + R4000ALLEGREX_VFPU4_FMT2_CNDMOVE, + R4000ALLEGREX_VFPU5, + R4000ALLEGREX_VFPU6, + R4000ALLEGREX_VFPU6_FMT7, + R4000ALLEGREX_VFPU6_FMT7_FMT0, + R4000ALLEGREX_VFPU7, + R4000ALLEGREX_QUADLR, R5900_INVALID, R5900_NORMAL, R5900_SPECIAL, diff --git a/cplusplus/include/generated/OperandType_enum_class.hpp b/cplusplus/include/generated/OperandType_enum_class.hpp index 6427962d..aab88819 100644 --- a/cplusplus/include/generated/OperandType_enum_class.hpp +++ b/cplusplus/include/generated/OperandType_enum_class.hpp @@ -52,6 +52,63 @@ enum class OperandType { r3000gte_v, r3000gte_cv, r3000gte_lm, + r4000allegrex_s_vs, + r4000allegrex_s_vt, + r4000allegrex_s_vd, + r4000allegrex_s_vt_imm, + r4000allegrex_s_vd_imm, + r4000allegrex_p_vs, + r4000allegrex_p_vt, + r4000allegrex_p_vd, + r4000allegrex_t_vs, + r4000allegrex_t_vt, + r4000allegrex_t_vd, + r4000allegrex_q_vs, + r4000allegrex_q_vt, + r4000allegrex_q_vd, + r4000allegrex_q_vt_imm, + r4000allegrex_mp_vs, + r4000allegrex_mp_vt, + r4000allegrex_mp_vd, + r4000allegrex_mp_vs_transpose, + r4000allegrex_mt_vs, + r4000allegrex_mt_vt, + r4000allegrex_mt_vd, + r4000allegrex_mt_vs_transpose, + r4000allegrex_mq_vs, + r4000allegrex_mq_vt, + r4000allegrex_mq_vd, + r4000allegrex_mq_vs_transpose, + r4000allegrex_cop2cs, + r4000allegrex_cop2cd, + r4000allegrex_pos, + r4000allegrex_size, + r4000allegrex_size_plus_pos, + r4000allegrex_imm3, + r4000allegrex_offset14_base, + r4000allegrex_offset14_base_maybe_wb, + r4000allegrex_vcmp_cond, + r4000allegrex_vcmp_cond_s_maybe_vs_maybe_vt, + r4000allegrex_vcmp_cond_p_maybe_vs_maybe_vt, + r4000allegrex_vcmp_cond_t_maybe_vs_maybe_vt, + r4000allegrex_vcmp_cond_q_maybe_vs_maybe_vt, + r4000allegrex_vconstant, + r4000allegrex_power_of_two, + r4000allegrex_vfpu_cc_bit, + r4000allegrex_bn, + r4000allegrex_int16, + r4000allegrex_float16, + r4000allegrex_p_vrot_code, + r4000allegrex_t_vrot_code, + r4000allegrex_q_vrot_code, + r4000allegrex_rpx, + r4000allegrex_rpy, + r4000allegrex_rpz, + r4000allegrex_rpw, + r4000allegrex_wpx, + r4000allegrex_wpy, + r4000allegrex_wpz, + r4000allegrex_wpw, r5900_I, r5900_Q, r5900_R, diff --git a/cplusplus/include/generated/Registers_enum_classes.hpp b/cplusplus/include/generated/Registers_enum_classes.hpp index d0c8e46b..dfb95277 100644 --- a/cplusplus/include/generated/Registers_enum_classes.hpp +++ b/cplusplus/include/generated/Registers_enum_classes.hpp @@ -436,6 +436,1082 @@ RSP_VECTOR_v31, }; }; + namespace R4000Allegrex { + enum class S { + R4000ALLEGREX_S_S000, + R4000ALLEGREX_S_S010, + R4000ALLEGREX_S_S020, + R4000ALLEGREX_S_S030, + R4000ALLEGREX_S_S100, + R4000ALLEGREX_S_S110, + R4000ALLEGREX_S_S120, + R4000ALLEGREX_S_S130, + R4000ALLEGREX_S_S200, + R4000ALLEGREX_S_S210, + R4000ALLEGREX_S_S220, + R4000ALLEGREX_S_S230, + R4000ALLEGREX_S_S300, + R4000ALLEGREX_S_S310, + R4000ALLEGREX_S_S320, + R4000ALLEGREX_S_S330, + R4000ALLEGREX_S_S400, + R4000ALLEGREX_S_S410, + R4000ALLEGREX_S_S420, + R4000ALLEGREX_S_S430, + R4000ALLEGREX_S_S500, + R4000ALLEGREX_S_S510, + R4000ALLEGREX_S_S520, + R4000ALLEGREX_S_S530, + R4000ALLEGREX_S_S600, + R4000ALLEGREX_S_S610, + R4000ALLEGREX_S_S620, + R4000ALLEGREX_S_S630, + R4000ALLEGREX_S_S700, + R4000ALLEGREX_S_S710, + R4000ALLEGREX_S_S720, + R4000ALLEGREX_S_S730, + R4000ALLEGREX_S_S001, + R4000ALLEGREX_S_S011, + R4000ALLEGREX_S_S021, + R4000ALLEGREX_S_S031, + R4000ALLEGREX_S_S101, + R4000ALLEGREX_S_S111, + R4000ALLEGREX_S_S121, + R4000ALLEGREX_S_S131, + R4000ALLEGREX_S_S201, + R4000ALLEGREX_S_S211, + R4000ALLEGREX_S_S221, + R4000ALLEGREX_S_S231, + R4000ALLEGREX_S_S301, + R4000ALLEGREX_S_S311, + R4000ALLEGREX_S_S321, + R4000ALLEGREX_S_S331, + R4000ALLEGREX_S_S401, + R4000ALLEGREX_S_S411, + R4000ALLEGREX_S_S421, + R4000ALLEGREX_S_S431, + R4000ALLEGREX_S_S501, + R4000ALLEGREX_S_S511, + R4000ALLEGREX_S_S521, + R4000ALLEGREX_S_S531, + R4000ALLEGREX_S_S601, + R4000ALLEGREX_S_S611, + R4000ALLEGREX_S_S621, + R4000ALLEGREX_S_S631, + R4000ALLEGREX_S_S701, + R4000ALLEGREX_S_S711, + R4000ALLEGREX_S_S721, + R4000ALLEGREX_S_S731, + R4000ALLEGREX_S_S002, + R4000ALLEGREX_S_S012, + R4000ALLEGREX_S_S022, + R4000ALLEGREX_S_S032, + R4000ALLEGREX_S_S102, + R4000ALLEGREX_S_S112, + R4000ALLEGREX_S_S122, + R4000ALLEGREX_S_S132, + R4000ALLEGREX_S_S202, + R4000ALLEGREX_S_S212, + R4000ALLEGREX_S_S222, + R4000ALLEGREX_S_S232, + R4000ALLEGREX_S_S302, + R4000ALLEGREX_S_S312, + R4000ALLEGREX_S_S322, + R4000ALLEGREX_S_S332, + R4000ALLEGREX_S_S402, + R4000ALLEGREX_S_S412, + R4000ALLEGREX_S_S422, + R4000ALLEGREX_S_S432, + R4000ALLEGREX_S_S502, + R4000ALLEGREX_S_S512, + R4000ALLEGREX_S_S522, + R4000ALLEGREX_S_S532, + R4000ALLEGREX_S_S602, + R4000ALLEGREX_S_S612, + R4000ALLEGREX_S_S622, + R4000ALLEGREX_S_S632, + R4000ALLEGREX_S_S702, + R4000ALLEGREX_S_S712, + R4000ALLEGREX_S_S722, + R4000ALLEGREX_S_S732, + R4000ALLEGREX_S_S003, + R4000ALLEGREX_S_S013, + R4000ALLEGREX_S_S023, + R4000ALLEGREX_S_S033, + R4000ALLEGREX_S_S103, + R4000ALLEGREX_S_S113, + R4000ALLEGREX_S_S123, + R4000ALLEGREX_S_S133, + R4000ALLEGREX_S_S203, + R4000ALLEGREX_S_S213, + R4000ALLEGREX_S_S223, + R4000ALLEGREX_S_S233, + R4000ALLEGREX_S_S303, + R4000ALLEGREX_S_S313, + R4000ALLEGREX_S_S323, + R4000ALLEGREX_S_S333, + R4000ALLEGREX_S_S403, + R4000ALLEGREX_S_S413, + R4000ALLEGREX_S_S423, + R4000ALLEGREX_S_S433, + R4000ALLEGREX_S_S503, + R4000ALLEGREX_S_S513, + R4000ALLEGREX_S_S523, + R4000ALLEGREX_S_S533, + R4000ALLEGREX_S_S603, + R4000ALLEGREX_S_S613, + R4000ALLEGREX_S_S623, + R4000ALLEGREX_S_S633, + R4000ALLEGREX_S_S703, + R4000ALLEGREX_S_S713, + R4000ALLEGREX_S_S723, + R4000ALLEGREX_S_S733, + }; + enum class V2D { + R4000ALLEGREX_V2D_C000, + R4000ALLEGREX_V2D_C010, + R4000ALLEGREX_V2D_C020, + R4000ALLEGREX_V2D_C030, + R4000ALLEGREX_V2D_C100, + R4000ALLEGREX_V2D_C110, + R4000ALLEGREX_V2D_C120, + R4000ALLEGREX_V2D_C130, + R4000ALLEGREX_V2D_C200, + R4000ALLEGREX_V2D_C210, + R4000ALLEGREX_V2D_C220, + R4000ALLEGREX_V2D_C230, + R4000ALLEGREX_V2D_C300, + R4000ALLEGREX_V2D_C310, + R4000ALLEGREX_V2D_C320, + R4000ALLEGREX_V2D_C330, + R4000ALLEGREX_V2D_C400, + R4000ALLEGREX_V2D_C410, + R4000ALLEGREX_V2D_C420, + R4000ALLEGREX_V2D_C430, + R4000ALLEGREX_V2D_C500, + R4000ALLEGREX_V2D_C510, + R4000ALLEGREX_V2D_C520, + R4000ALLEGREX_V2D_C530, + R4000ALLEGREX_V2D_C600, + R4000ALLEGREX_V2D_C610, + R4000ALLEGREX_V2D_C620, + R4000ALLEGREX_V2D_C630, + R4000ALLEGREX_V2D_C700, + R4000ALLEGREX_V2D_C710, + R4000ALLEGREX_V2D_C720, + R4000ALLEGREX_V2D_C730, + R4000ALLEGREX_V2D_R000, + R4000ALLEGREX_V2D_R001, + R4000ALLEGREX_V2D_R002, + R4000ALLEGREX_V2D_R003, + R4000ALLEGREX_V2D_R100, + R4000ALLEGREX_V2D_R101, + R4000ALLEGREX_V2D_R102, + R4000ALLEGREX_V2D_R103, + R4000ALLEGREX_V2D_R200, + R4000ALLEGREX_V2D_R201, + R4000ALLEGREX_V2D_R202, + R4000ALLEGREX_V2D_R203, + R4000ALLEGREX_V2D_R300, + R4000ALLEGREX_V2D_R301, + R4000ALLEGREX_V2D_R302, + R4000ALLEGREX_V2D_R303, + R4000ALLEGREX_V2D_R400, + R4000ALLEGREX_V2D_R401, + R4000ALLEGREX_V2D_R402, + R4000ALLEGREX_V2D_R403, + R4000ALLEGREX_V2D_R500, + R4000ALLEGREX_V2D_R501, + R4000ALLEGREX_V2D_R502, + R4000ALLEGREX_V2D_R503, + R4000ALLEGREX_V2D_R600, + R4000ALLEGREX_V2D_R601, + R4000ALLEGREX_V2D_R602, + R4000ALLEGREX_V2D_R603, + R4000ALLEGREX_V2D_R700, + R4000ALLEGREX_V2D_R701, + R4000ALLEGREX_V2D_R702, + R4000ALLEGREX_V2D_R703, + R4000ALLEGREX_V2D_C002, + R4000ALLEGREX_V2D_C012, + R4000ALLEGREX_V2D_C022, + R4000ALLEGREX_V2D_C032, + R4000ALLEGREX_V2D_C102, + R4000ALLEGREX_V2D_C112, + R4000ALLEGREX_V2D_C122, + R4000ALLEGREX_V2D_C132, + R4000ALLEGREX_V2D_C202, + R4000ALLEGREX_V2D_C212, + R4000ALLEGREX_V2D_C222, + R4000ALLEGREX_V2D_C232, + R4000ALLEGREX_V2D_C302, + R4000ALLEGREX_V2D_C312, + R4000ALLEGREX_V2D_C322, + R4000ALLEGREX_V2D_C332, + R4000ALLEGREX_V2D_C402, + R4000ALLEGREX_V2D_C412, + R4000ALLEGREX_V2D_C422, + R4000ALLEGREX_V2D_C432, + R4000ALLEGREX_V2D_C502, + R4000ALLEGREX_V2D_C512, + R4000ALLEGREX_V2D_C522, + R4000ALLEGREX_V2D_C532, + R4000ALLEGREX_V2D_C602, + R4000ALLEGREX_V2D_C612, + R4000ALLEGREX_V2D_C622, + R4000ALLEGREX_V2D_C632, + R4000ALLEGREX_V2D_C702, + R4000ALLEGREX_V2D_C712, + R4000ALLEGREX_V2D_C722, + R4000ALLEGREX_V2D_C732, + R4000ALLEGREX_V2D_R020, + R4000ALLEGREX_V2D_R021, + R4000ALLEGREX_V2D_R022, + R4000ALLEGREX_V2D_R023, + R4000ALLEGREX_V2D_R120, + R4000ALLEGREX_V2D_R121, + R4000ALLEGREX_V2D_R122, + R4000ALLEGREX_V2D_R123, + R4000ALLEGREX_V2D_R220, + R4000ALLEGREX_V2D_R221, + R4000ALLEGREX_V2D_R222, + R4000ALLEGREX_V2D_R223, + R4000ALLEGREX_V2D_R320, + R4000ALLEGREX_V2D_R321, + R4000ALLEGREX_V2D_R322, + R4000ALLEGREX_V2D_R323, + R4000ALLEGREX_V2D_R420, + R4000ALLEGREX_V2D_R421, + R4000ALLEGREX_V2D_R422, + R4000ALLEGREX_V2D_R423, + R4000ALLEGREX_V2D_R520, + R4000ALLEGREX_V2D_R521, + R4000ALLEGREX_V2D_R522, + R4000ALLEGREX_V2D_R523, + R4000ALLEGREX_V2D_R620, + R4000ALLEGREX_V2D_R621, + R4000ALLEGREX_V2D_R622, + R4000ALLEGREX_V2D_R623, + R4000ALLEGREX_V2D_R720, + R4000ALLEGREX_V2D_R721, + R4000ALLEGREX_V2D_R722, + R4000ALLEGREX_V2D_R723, + }; + enum class V3D { + R4000ALLEGREX_V3D_C000, + R4000ALLEGREX_V3D_C010, + R4000ALLEGREX_V3D_C020, + R4000ALLEGREX_V3D_C030, + R4000ALLEGREX_V3D_C100, + R4000ALLEGREX_V3D_C110, + R4000ALLEGREX_V3D_C120, + R4000ALLEGREX_V3D_C130, + R4000ALLEGREX_V3D_C200, + R4000ALLEGREX_V3D_C210, + R4000ALLEGREX_V3D_C220, + R4000ALLEGREX_V3D_C230, + R4000ALLEGREX_V3D_C300, + R4000ALLEGREX_V3D_C310, + R4000ALLEGREX_V3D_C320, + R4000ALLEGREX_V3D_C330, + R4000ALLEGREX_V3D_C400, + R4000ALLEGREX_V3D_C410, + R4000ALLEGREX_V3D_C420, + R4000ALLEGREX_V3D_C430, + R4000ALLEGREX_V3D_C500, + R4000ALLEGREX_V3D_C510, + R4000ALLEGREX_V3D_C520, + R4000ALLEGREX_V3D_C530, + R4000ALLEGREX_V3D_C600, + R4000ALLEGREX_V3D_C610, + R4000ALLEGREX_V3D_C620, + R4000ALLEGREX_V3D_C630, + R4000ALLEGREX_V3D_C700, + R4000ALLEGREX_V3D_C710, + R4000ALLEGREX_V3D_C720, + R4000ALLEGREX_V3D_C730, + R4000ALLEGREX_V3D_R000, + R4000ALLEGREX_V3D_R001, + R4000ALLEGREX_V3D_R002, + R4000ALLEGREX_V3D_R003, + R4000ALLEGREX_V3D_R100, + R4000ALLEGREX_V3D_R101, + R4000ALLEGREX_V3D_R102, + R4000ALLEGREX_V3D_R103, + R4000ALLEGREX_V3D_R200, + R4000ALLEGREX_V3D_R201, + R4000ALLEGREX_V3D_R202, + R4000ALLEGREX_V3D_R203, + R4000ALLEGREX_V3D_R300, + R4000ALLEGREX_V3D_R301, + R4000ALLEGREX_V3D_R302, + R4000ALLEGREX_V3D_R303, + R4000ALLEGREX_V3D_R400, + R4000ALLEGREX_V3D_R401, + R4000ALLEGREX_V3D_R402, + R4000ALLEGREX_V3D_R403, + R4000ALLEGREX_V3D_R500, + R4000ALLEGREX_V3D_R501, + R4000ALLEGREX_V3D_R502, + R4000ALLEGREX_V3D_R503, + R4000ALLEGREX_V3D_R600, + R4000ALLEGREX_V3D_R601, + R4000ALLEGREX_V3D_R602, + R4000ALLEGREX_V3D_R603, + R4000ALLEGREX_V3D_R700, + R4000ALLEGREX_V3D_R701, + R4000ALLEGREX_V3D_R702, + R4000ALLEGREX_V3D_R703, + R4000ALLEGREX_V3D_C001, + R4000ALLEGREX_V3D_C011, + R4000ALLEGREX_V3D_C021, + R4000ALLEGREX_V3D_C031, + R4000ALLEGREX_V3D_C101, + R4000ALLEGREX_V3D_C111, + R4000ALLEGREX_V3D_C121, + R4000ALLEGREX_V3D_C131, + R4000ALLEGREX_V3D_C201, + R4000ALLEGREX_V3D_C211, + R4000ALLEGREX_V3D_C221, + R4000ALLEGREX_V3D_C231, + R4000ALLEGREX_V3D_C301, + R4000ALLEGREX_V3D_C311, + R4000ALLEGREX_V3D_C321, + R4000ALLEGREX_V3D_C331, + R4000ALLEGREX_V3D_C401, + R4000ALLEGREX_V3D_C411, + R4000ALLEGREX_V3D_C421, + R4000ALLEGREX_V3D_C431, + R4000ALLEGREX_V3D_C501, + R4000ALLEGREX_V3D_C511, + R4000ALLEGREX_V3D_C521, + R4000ALLEGREX_V3D_C531, + R4000ALLEGREX_V3D_C601, + R4000ALLEGREX_V3D_C611, + R4000ALLEGREX_V3D_C621, + R4000ALLEGREX_V3D_C631, + R4000ALLEGREX_V3D_C701, + R4000ALLEGREX_V3D_C711, + R4000ALLEGREX_V3D_C721, + R4000ALLEGREX_V3D_C731, + R4000ALLEGREX_V3D_R010, + R4000ALLEGREX_V3D_R011, + R4000ALLEGREX_V3D_R012, + R4000ALLEGREX_V3D_R013, + R4000ALLEGREX_V3D_R110, + R4000ALLEGREX_V3D_R111, + R4000ALLEGREX_V3D_R112, + R4000ALLEGREX_V3D_R113, + R4000ALLEGREX_V3D_R210, + R4000ALLEGREX_V3D_R211, + R4000ALLEGREX_V3D_R212, + R4000ALLEGREX_V3D_R213, + R4000ALLEGREX_V3D_R310, + R4000ALLEGREX_V3D_R311, + R4000ALLEGREX_V3D_R312, + R4000ALLEGREX_V3D_R313, + R4000ALLEGREX_V3D_R410, + R4000ALLEGREX_V3D_R411, + R4000ALLEGREX_V3D_R412, + R4000ALLEGREX_V3D_R413, + R4000ALLEGREX_V3D_R510, + R4000ALLEGREX_V3D_R511, + R4000ALLEGREX_V3D_R512, + R4000ALLEGREX_V3D_R513, + R4000ALLEGREX_V3D_R610, + R4000ALLEGREX_V3D_R611, + R4000ALLEGREX_V3D_R612, + R4000ALLEGREX_V3D_R613, + R4000ALLEGREX_V3D_R710, + R4000ALLEGREX_V3D_R711, + R4000ALLEGREX_V3D_R712, + R4000ALLEGREX_V3D_R713, + }; + enum class V4D { + R4000ALLEGREX_V4D_C000, + R4000ALLEGREX_V4D_C010, + R4000ALLEGREX_V4D_C020, + R4000ALLEGREX_V4D_C030, + R4000ALLEGREX_V4D_C100, + R4000ALLEGREX_V4D_C110, + R4000ALLEGREX_V4D_C120, + R4000ALLEGREX_V4D_C130, + R4000ALLEGREX_V4D_C200, + R4000ALLEGREX_V4D_C210, + R4000ALLEGREX_V4D_C220, + R4000ALLEGREX_V4D_C230, + R4000ALLEGREX_V4D_C300, + R4000ALLEGREX_V4D_C310, + R4000ALLEGREX_V4D_C320, + R4000ALLEGREX_V4D_C330, + R4000ALLEGREX_V4D_C400, + R4000ALLEGREX_V4D_C410, + R4000ALLEGREX_V4D_C420, + R4000ALLEGREX_V4D_C430, + R4000ALLEGREX_V4D_C500, + R4000ALLEGREX_V4D_C510, + R4000ALLEGREX_V4D_C520, + R4000ALLEGREX_V4D_C530, + R4000ALLEGREX_V4D_C600, + R4000ALLEGREX_V4D_C610, + R4000ALLEGREX_V4D_C620, + R4000ALLEGREX_V4D_C630, + R4000ALLEGREX_V4D_C700, + R4000ALLEGREX_V4D_C710, + R4000ALLEGREX_V4D_C720, + R4000ALLEGREX_V4D_C730, + R4000ALLEGREX_V4D_R000, + R4000ALLEGREX_V4D_R001, + R4000ALLEGREX_V4D_R002, + R4000ALLEGREX_V4D_R003, + R4000ALLEGREX_V4D_R100, + R4000ALLEGREX_V4D_R101, + R4000ALLEGREX_V4D_R102, + R4000ALLEGREX_V4D_R103, + R4000ALLEGREX_V4D_R200, + R4000ALLEGREX_V4D_R201, + R4000ALLEGREX_V4D_R202, + R4000ALLEGREX_V4D_R203, + R4000ALLEGREX_V4D_R300, + R4000ALLEGREX_V4D_R301, + R4000ALLEGREX_V4D_R302, + R4000ALLEGREX_V4D_R303, + R4000ALLEGREX_V4D_R400, + R4000ALLEGREX_V4D_R401, + R4000ALLEGREX_V4D_R402, + R4000ALLEGREX_V4D_R403, + R4000ALLEGREX_V4D_R500, + R4000ALLEGREX_V4D_R501, + R4000ALLEGREX_V4D_R502, + R4000ALLEGREX_V4D_R503, + R4000ALLEGREX_V4D_R600, + R4000ALLEGREX_V4D_R601, + R4000ALLEGREX_V4D_R602, + R4000ALLEGREX_V4D_R603, + R4000ALLEGREX_V4D_R700, + R4000ALLEGREX_V4D_R701, + R4000ALLEGREX_V4D_R702, + R4000ALLEGREX_V4D_R703, + R4000ALLEGREX_V4D_C002, + R4000ALLEGREX_V4D_C012, + R4000ALLEGREX_V4D_C022, + R4000ALLEGREX_V4D_C032, + R4000ALLEGREX_V4D_C102, + R4000ALLEGREX_V4D_C112, + R4000ALLEGREX_V4D_C122, + R4000ALLEGREX_V4D_C132, + R4000ALLEGREX_V4D_C202, + R4000ALLEGREX_V4D_C212, + R4000ALLEGREX_V4D_C222, + R4000ALLEGREX_V4D_C232, + R4000ALLEGREX_V4D_C302, + R4000ALLEGREX_V4D_C312, + R4000ALLEGREX_V4D_C322, + R4000ALLEGREX_V4D_C332, + R4000ALLEGREX_V4D_C402, + R4000ALLEGREX_V4D_C412, + R4000ALLEGREX_V4D_C422, + R4000ALLEGREX_V4D_C432, + R4000ALLEGREX_V4D_C502, + R4000ALLEGREX_V4D_C512, + R4000ALLEGREX_V4D_C522, + R4000ALLEGREX_V4D_C532, + R4000ALLEGREX_V4D_C602, + R4000ALLEGREX_V4D_C612, + R4000ALLEGREX_V4D_C622, + R4000ALLEGREX_V4D_C632, + R4000ALLEGREX_V4D_C702, + R4000ALLEGREX_V4D_C712, + R4000ALLEGREX_V4D_C722, + R4000ALLEGREX_V4D_C732, + R4000ALLEGREX_V4D_R020, + R4000ALLEGREX_V4D_R021, + R4000ALLEGREX_V4D_R022, + R4000ALLEGREX_V4D_R023, + R4000ALLEGREX_V4D_R120, + R4000ALLEGREX_V4D_R121, + R4000ALLEGREX_V4D_R122, + R4000ALLEGREX_V4D_R123, + R4000ALLEGREX_V4D_R220, + R4000ALLEGREX_V4D_R221, + R4000ALLEGREX_V4D_R222, + R4000ALLEGREX_V4D_R223, + R4000ALLEGREX_V4D_R320, + R4000ALLEGREX_V4D_R321, + R4000ALLEGREX_V4D_R322, + R4000ALLEGREX_V4D_R323, + R4000ALLEGREX_V4D_R420, + R4000ALLEGREX_V4D_R421, + R4000ALLEGREX_V4D_R422, + R4000ALLEGREX_V4D_R423, + R4000ALLEGREX_V4D_R520, + R4000ALLEGREX_V4D_R521, + R4000ALLEGREX_V4D_R522, + R4000ALLEGREX_V4D_R523, + R4000ALLEGREX_V4D_R620, + R4000ALLEGREX_V4D_R621, + R4000ALLEGREX_V4D_R622, + R4000ALLEGREX_V4D_R623, + R4000ALLEGREX_V4D_R720, + R4000ALLEGREX_V4D_R721, + R4000ALLEGREX_V4D_R722, + R4000ALLEGREX_V4D_R723, + }; + enum class M2x2 { + R4000ALLEGREX_M2X2_M000, + R4000ALLEGREX_M2X2_M010, + R4000ALLEGREX_M2X2_M020, + R4000ALLEGREX_M2X2_M030, + R4000ALLEGREX_M2X2_M100, + R4000ALLEGREX_M2X2_M110, + R4000ALLEGREX_M2X2_M120, + R4000ALLEGREX_M2X2_M130, + R4000ALLEGREX_M2X2_M200, + R4000ALLEGREX_M2X2_M210, + R4000ALLEGREX_M2X2_M220, + R4000ALLEGREX_M2X2_M230, + R4000ALLEGREX_M2X2_M300, + R4000ALLEGREX_M2X2_M310, + R4000ALLEGREX_M2X2_M320, + R4000ALLEGREX_M2X2_M330, + R4000ALLEGREX_M2X2_M400, + R4000ALLEGREX_M2X2_M410, + R4000ALLEGREX_M2X2_M420, + R4000ALLEGREX_M2X2_M430, + R4000ALLEGREX_M2X2_M500, + R4000ALLEGREX_M2X2_M510, + R4000ALLEGREX_M2X2_M520, + R4000ALLEGREX_M2X2_M530, + R4000ALLEGREX_M2X2_M600, + R4000ALLEGREX_M2X2_M610, + R4000ALLEGREX_M2X2_M620, + R4000ALLEGREX_M2X2_M630, + R4000ALLEGREX_M2X2_M700, + R4000ALLEGREX_M2X2_M710, + R4000ALLEGREX_M2X2_M720, + R4000ALLEGREX_M2X2_M730, + R4000ALLEGREX_M2X2_E000, + R4000ALLEGREX_M2X2_E001, + R4000ALLEGREX_M2X2_E002, + R4000ALLEGREX_M2X2_E003, + R4000ALLEGREX_M2X2_E100, + R4000ALLEGREX_M2X2_E101, + R4000ALLEGREX_M2X2_E102, + R4000ALLEGREX_M2X2_E103, + R4000ALLEGREX_M2X2_E200, + R4000ALLEGREX_M2X2_E201, + R4000ALLEGREX_M2X2_E202, + R4000ALLEGREX_M2X2_E203, + R4000ALLEGREX_M2X2_E300, + R4000ALLEGREX_M2X2_E301, + R4000ALLEGREX_M2X2_E302, + R4000ALLEGREX_M2X2_E303, + R4000ALLEGREX_M2X2_E400, + R4000ALLEGREX_M2X2_E401, + R4000ALLEGREX_M2X2_E402, + R4000ALLEGREX_M2X2_E403, + R4000ALLEGREX_M2X2_E500, + R4000ALLEGREX_M2X2_E501, + R4000ALLEGREX_M2X2_E502, + R4000ALLEGREX_M2X2_E503, + R4000ALLEGREX_M2X2_E600, + R4000ALLEGREX_M2X2_E601, + R4000ALLEGREX_M2X2_E602, + R4000ALLEGREX_M2X2_E603, + R4000ALLEGREX_M2X2_E700, + R4000ALLEGREX_M2X2_E701, + R4000ALLEGREX_M2X2_E702, + R4000ALLEGREX_M2X2_E703, + R4000ALLEGREX_M2X2_M002, + R4000ALLEGREX_M2X2_M012, + R4000ALLEGREX_M2X2_M022, + R4000ALLEGREX_M2X2_M032, + R4000ALLEGREX_M2X2_M102, + R4000ALLEGREX_M2X2_M112, + R4000ALLEGREX_M2X2_M122, + R4000ALLEGREX_M2X2_M132, + R4000ALLEGREX_M2X2_M202, + R4000ALLEGREX_M2X2_M212, + R4000ALLEGREX_M2X2_M222, + R4000ALLEGREX_M2X2_M232, + R4000ALLEGREX_M2X2_M302, + R4000ALLEGREX_M2X2_M312, + R4000ALLEGREX_M2X2_M322, + R4000ALLEGREX_M2X2_M332, + R4000ALLEGREX_M2X2_M402, + R4000ALLEGREX_M2X2_M412, + R4000ALLEGREX_M2X2_M422, + R4000ALLEGREX_M2X2_M432, + R4000ALLEGREX_M2X2_M502, + R4000ALLEGREX_M2X2_M512, + R4000ALLEGREX_M2X2_M522, + R4000ALLEGREX_M2X2_M532, + R4000ALLEGREX_M2X2_M602, + R4000ALLEGREX_M2X2_M612, + R4000ALLEGREX_M2X2_M622, + R4000ALLEGREX_M2X2_M632, + R4000ALLEGREX_M2X2_M702, + R4000ALLEGREX_M2X2_M712, + R4000ALLEGREX_M2X2_M722, + R4000ALLEGREX_M2X2_M732, + R4000ALLEGREX_M2X2_E020, + R4000ALLEGREX_M2X2_E021, + R4000ALLEGREX_M2X2_E022, + R4000ALLEGREX_M2X2_E023, + R4000ALLEGREX_M2X2_E120, + R4000ALLEGREX_M2X2_E121, + R4000ALLEGREX_M2X2_E122, + R4000ALLEGREX_M2X2_E123, + R4000ALLEGREX_M2X2_E220, + R4000ALLEGREX_M2X2_E221, + R4000ALLEGREX_M2X2_E222, + R4000ALLEGREX_M2X2_E223, + R4000ALLEGREX_M2X2_E320, + R4000ALLEGREX_M2X2_E321, + R4000ALLEGREX_M2X2_E322, + R4000ALLEGREX_M2X2_E323, + R4000ALLEGREX_M2X2_E420, + R4000ALLEGREX_M2X2_E421, + R4000ALLEGREX_M2X2_E422, + R4000ALLEGREX_M2X2_E423, + R4000ALLEGREX_M2X2_E520, + R4000ALLEGREX_M2X2_E521, + R4000ALLEGREX_M2X2_E522, + R4000ALLEGREX_M2X2_E523, + R4000ALLEGREX_M2X2_E620, + R4000ALLEGREX_M2X2_E621, + R4000ALLEGREX_M2X2_E622, + R4000ALLEGREX_M2X2_E623, + R4000ALLEGREX_M2X2_E720, + R4000ALLEGREX_M2X2_E721, + R4000ALLEGREX_M2X2_E722, + R4000ALLEGREX_M2X2_E723, + }; + enum class M3x3 { + R4000ALLEGREX_M3X3_M000, + R4000ALLEGREX_M3X3_M010, + R4000ALLEGREX_M3X3_M020, + R4000ALLEGREX_M3X3_M030, + R4000ALLEGREX_M3X3_M100, + R4000ALLEGREX_M3X3_M110, + R4000ALLEGREX_M3X3_M120, + R4000ALLEGREX_M3X3_M130, + R4000ALLEGREX_M3X3_M200, + R4000ALLEGREX_M3X3_M210, + R4000ALLEGREX_M3X3_M220, + R4000ALLEGREX_M3X3_M230, + R4000ALLEGREX_M3X3_M300, + R4000ALLEGREX_M3X3_M310, + R4000ALLEGREX_M3X3_M320, + R4000ALLEGREX_M3X3_M330, + R4000ALLEGREX_M3X3_M400, + R4000ALLEGREX_M3X3_M410, + R4000ALLEGREX_M3X3_M420, + R4000ALLEGREX_M3X3_M430, + R4000ALLEGREX_M3X3_M500, + R4000ALLEGREX_M3X3_M510, + R4000ALLEGREX_M3X3_M520, + R4000ALLEGREX_M3X3_M530, + R4000ALLEGREX_M3X3_M600, + R4000ALLEGREX_M3X3_M610, + R4000ALLEGREX_M3X3_M620, + R4000ALLEGREX_M3X3_M630, + R4000ALLEGREX_M3X3_M700, + R4000ALLEGREX_M3X3_M710, + R4000ALLEGREX_M3X3_M720, + R4000ALLEGREX_M3X3_M730, + R4000ALLEGREX_M3X3_E000, + R4000ALLEGREX_M3X3_E001, + R4000ALLEGREX_M3X3_E002, + R4000ALLEGREX_M3X3_E003, + R4000ALLEGREX_M3X3_E100, + R4000ALLEGREX_M3X3_E101, + R4000ALLEGREX_M3X3_E102, + R4000ALLEGREX_M3X3_E103, + R4000ALLEGREX_M3X3_E200, + R4000ALLEGREX_M3X3_E201, + R4000ALLEGREX_M3X3_E202, + R4000ALLEGREX_M3X3_E203, + R4000ALLEGREX_M3X3_E300, + R4000ALLEGREX_M3X3_E301, + R4000ALLEGREX_M3X3_E302, + R4000ALLEGREX_M3X3_E303, + R4000ALLEGREX_M3X3_E400, + R4000ALLEGREX_M3X3_E401, + R4000ALLEGREX_M3X3_E402, + R4000ALLEGREX_M3X3_E403, + R4000ALLEGREX_M3X3_E500, + R4000ALLEGREX_M3X3_E501, + R4000ALLEGREX_M3X3_E502, + R4000ALLEGREX_M3X3_E503, + R4000ALLEGREX_M3X3_E600, + R4000ALLEGREX_M3X3_E601, + R4000ALLEGREX_M3X3_E602, + R4000ALLEGREX_M3X3_E603, + R4000ALLEGREX_M3X3_E700, + R4000ALLEGREX_M3X3_E701, + R4000ALLEGREX_M3X3_E702, + R4000ALLEGREX_M3X3_E703, + R4000ALLEGREX_M3X3_M001, + R4000ALLEGREX_M3X3_M011, + R4000ALLEGREX_M3X3_M021, + R4000ALLEGREX_M3X3_M031, + R4000ALLEGREX_M3X3_M101, + R4000ALLEGREX_M3X3_M111, + R4000ALLEGREX_M3X3_M121, + R4000ALLEGREX_M3X3_M131, + R4000ALLEGREX_M3X3_M201, + R4000ALLEGREX_M3X3_M211, + R4000ALLEGREX_M3X3_M221, + R4000ALLEGREX_M3X3_M231, + R4000ALLEGREX_M3X3_M301, + R4000ALLEGREX_M3X3_M311, + R4000ALLEGREX_M3X3_M321, + R4000ALLEGREX_M3X3_M331, + R4000ALLEGREX_M3X3_M401, + R4000ALLEGREX_M3X3_M411, + R4000ALLEGREX_M3X3_M421, + R4000ALLEGREX_M3X3_M431, + R4000ALLEGREX_M3X3_M501, + R4000ALLEGREX_M3X3_M511, + R4000ALLEGREX_M3X3_M521, + R4000ALLEGREX_M3X3_M531, + R4000ALLEGREX_M3X3_M601, + R4000ALLEGREX_M3X3_M611, + R4000ALLEGREX_M3X3_M621, + R4000ALLEGREX_M3X3_M631, + R4000ALLEGREX_M3X3_M701, + R4000ALLEGREX_M3X3_M711, + R4000ALLEGREX_M3X3_M721, + R4000ALLEGREX_M3X3_M731, + R4000ALLEGREX_M3X3_E010, + R4000ALLEGREX_M3X3_E011, + R4000ALLEGREX_M3X3_E012, + R4000ALLEGREX_M3X3_E013, + R4000ALLEGREX_M3X3_E110, + R4000ALLEGREX_M3X3_E111, + R4000ALLEGREX_M3X3_E112, + R4000ALLEGREX_M3X3_E113, + R4000ALLEGREX_M3X3_E210, + R4000ALLEGREX_M3X3_E211, + R4000ALLEGREX_M3X3_E212, + R4000ALLEGREX_M3X3_E213, + R4000ALLEGREX_M3X3_E310, + R4000ALLEGREX_M3X3_E311, + R4000ALLEGREX_M3X3_E312, + R4000ALLEGREX_M3X3_E313, + R4000ALLEGREX_M3X3_E410, + R4000ALLEGREX_M3X3_E411, + R4000ALLEGREX_M3X3_E412, + R4000ALLEGREX_M3X3_E413, + R4000ALLEGREX_M3X3_E510, + R4000ALLEGREX_M3X3_E511, + R4000ALLEGREX_M3X3_E512, + R4000ALLEGREX_M3X3_E513, + R4000ALLEGREX_M3X3_E610, + R4000ALLEGREX_M3X3_E611, + R4000ALLEGREX_M3X3_E612, + R4000ALLEGREX_M3X3_E613, + R4000ALLEGREX_M3X3_E710, + R4000ALLEGREX_M3X3_E711, + R4000ALLEGREX_M3X3_E712, + R4000ALLEGREX_M3X3_E713, + }; + enum class M4x4 { + R4000ALLEGREX_M4X4_M000, + R4000ALLEGREX_M4X4_M010, + R4000ALLEGREX_M4X4_M020, + R4000ALLEGREX_M4X4_M030, + R4000ALLEGREX_M4X4_M100, + R4000ALLEGREX_M4X4_M110, + R4000ALLEGREX_M4X4_M120, + R4000ALLEGREX_M4X4_M130, + R4000ALLEGREX_M4X4_M200, + R4000ALLEGREX_M4X4_M210, + R4000ALLEGREX_M4X4_M220, + R4000ALLEGREX_M4X4_M230, + R4000ALLEGREX_M4X4_M300, + R4000ALLEGREX_M4X4_M310, + R4000ALLEGREX_M4X4_M320, + R4000ALLEGREX_M4X4_M330, + R4000ALLEGREX_M4X4_M400, + R4000ALLEGREX_M4X4_M410, + R4000ALLEGREX_M4X4_M420, + R4000ALLEGREX_M4X4_M430, + R4000ALLEGREX_M4X4_M500, + R4000ALLEGREX_M4X4_M510, + R4000ALLEGREX_M4X4_M520, + R4000ALLEGREX_M4X4_M530, + R4000ALLEGREX_M4X4_M600, + R4000ALLEGREX_M4X4_M610, + R4000ALLEGREX_M4X4_M620, + R4000ALLEGREX_M4X4_M630, + R4000ALLEGREX_M4X4_M700, + R4000ALLEGREX_M4X4_M710, + R4000ALLEGREX_M4X4_M720, + R4000ALLEGREX_M4X4_M730, + R4000ALLEGREX_M4X4_E000, + R4000ALLEGREX_M4X4_E001, + R4000ALLEGREX_M4X4_E002, + R4000ALLEGREX_M4X4_E003, + R4000ALLEGREX_M4X4_E100, + R4000ALLEGREX_M4X4_E101, + R4000ALLEGREX_M4X4_E102, + R4000ALLEGREX_M4X4_E103, + R4000ALLEGREX_M4X4_E200, + R4000ALLEGREX_M4X4_E201, + R4000ALLEGREX_M4X4_E202, + R4000ALLEGREX_M4X4_E203, + R4000ALLEGREX_M4X4_E300, + R4000ALLEGREX_M4X4_E301, + R4000ALLEGREX_M4X4_E302, + R4000ALLEGREX_M4X4_E303, + R4000ALLEGREX_M4X4_E400, + R4000ALLEGREX_M4X4_E401, + R4000ALLEGREX_M4X4_E402, + R4000ALLEGREX_M4X4_E403, + R4000ALLEGREX_M4X4_E500, + R4000ALLEGREX_M4X4_E501, + R4000ALLEGREX_M4X4_E502, + R4000ALLEGREX_M4X4_E503, + R4000ALLEGREX_M4X4_E600, + R4000ALLEGREX_M4X4_E601, + R4000ALLEGREX_M4X4_E602, + R4000ALLEGREX_M4X4_E603, + R4000ALLEGREX_M4X4_E700, + R4000ALLEGREX_M4X4_E701, + R4000ALLEGREX_M4X4_E702, + R4000ALLEGREX_M4X4_E703, + R4000ALLEGREX_M4X4_M002, + R4000ALLEGREX_M4X4_M012, + R4000ALLEGREX_M4X4_M022, + R4000ALLEGREX_M4X4_M032, + R4000ALLEGREX_M4X4_M102, + R4000ALLEGREX_M4X4_M112, + R4000ALLEGREX_M4X4_M122, + R4000ALLEGREX_M4X4_M132, + R4000ALLEGREX_M4X4_M202, + R4000ALLEGREX_M4X4_M212, + R4000ALLEGREX_M4X4_M222, + R4000ALLEGREX_M4X4_M232, + R4000ALLEGREX_M4X4_M302, + R4000ALLEGREX_M4X4_M312, + R4000ALLEGREX_M4X4_M322, + R4000ALLEGREX_M4X4_M332, + R4000ALLEGREX_M4X4_M402, + R4000ALLEGREX_M4X4_M412, + R4000ALLEGREX_M4X4_M422, + R4000ALLEGREX_M4X4_M432, + R4000ALLEGREX_M4X4_M502, + R4000ALLEGREX_M4X4_M512, + R4000ALLEGREX_M4X4_M522, + R4000ALLEGREX_M4X4_M532, + R4000ALLEGREX_M4X4_M602, + R4000ALLEGREX_M4X4_M612, + R4000ALLEGREX_M4X4_M622, + R4000ALLEGREX_M4X4_M632, + R4000ALLEGREX_M4X4_M702, + R4000ALLEGREX_M4X4_M712, + R4000ALLEGREX_M4X4_M722, + R4000ALLEGREX_M4X4_M732, + R4000ALLEGREX_M4X4_E020, + R4000ALLEGREX_M4X4_E021, + R4000ALLEGREX_M4X4_E022, + R4000ALLEGREX_M4X4_E023, + R4000ALLEGREX_M4X4_E120, + R4000ALLEGREX_M4X4_E121, + R4000ALLEGREX_M4X4_E122, + R4000ALLEGREX_M4X4_E123, + R4000ALLEGREX_M4X4_E220, + R4000ALLEGREX_M4X4_E221, + R4000ALLEGREX_M4X4_E222, + R4000ALLEGREX_M4X4_E223, + R4000ALLEGREX_M4X4_E320, + R4000ALLEGREX_M4X4_E321, + R4000ALLEGREX_M4X4_E322, + R4000ALLEGREX_M4X4_E323, + R4000ALLEGREX_M4X4_E420, + R4000ALLEGREX_M4X4_E421, + R4000ALLEGREX_M4X4_E422, + R4000ALLEGREX_M4X4_E423, + R4000ALLEGREX_M4X4_E520, + R4000ALLEGREX_M4X4_E521, + R4000ALLEGREX_M4X4_E522, + R4000ALLEGREX_M4X4_E523, + R4000ALLEGREX_M4X4_E620, + R4000ALLEGREX_M4X4_E621, + R4000ALLEGREX_M4X4_E622, + R4000ALLEGREX_M4X4_E623, + R4000ALLEGREX_M4X4_E720, + R4000ALLEGREX_M4X4_E721, + R4000ALLEGREX_M4X4_E722, + R4000ALLEGREX_M4X4_E723, + }; + enum class VfpuControl { + R4000ALLEGREX_VFPUCONTROL_VFPU_PFXS, + R4000ALLEGREX_VFPUCONTROL_VFPU_PFXT, + R4000ALLEGREX_VFPUCONTROL_VFPU_PFXD, + R4000ALLEGREX_VFPUCONTROL_VFPU_CC, + R4000ALLEGREX_VFPUCONTROL_VFPU_INF4, + R4000ALLEGREX_VFPUCONTROL_VFPU_RSV5, + R4000ALLEGREX_VFPUCONTROL_VFPU_RSV6, + R4000ALLEGREX_VFPUCONTROL_VFPU_REV, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX0, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX1, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX2, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX3, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX4, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX5, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX6, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX7, + R4000ALLEGREX_VFPUCONTROL_144, + R4000ALLEGREX_VFPUCONTROL_145, + R4000ALLEGREX_VFPUCONTROL_146, + R4000ALLEGREX_VFPUCONTROL_147, + R4000ALLEGREX_VFPUCONTROL_148, + R4000ALLEGREX_VFPUCONTROL_149, + R4000ALLEGREX_VFPUCONTROL_150, + R4000ALLEGREX_VFPUCONTROL_151, + R4000ALLEGREX_VFPUCONTROL_152, + R4000ALLEGREX_VFPUCONTROL_153, + R4000ALLEGREX_VFPUCONTROL_154, + R4000ALLEGREX_VFPUCONTROL_155, + R4000ALLEGREX_VFPUCONTROL_156, + R4000ALLEGREX_VFPUCONTROL_157, + R4000ALLEGREX_VFPUCONTROL_158, + R4000ALLEGREX_VFPUCONTROL_159, + R4000ALLEGREX_VFPUCONTROL_160, + R4000ALLEGREX_VFPUCONTROL_161, + R4000ALLEGREX_VFPUCONTROL_162, + R4000ALLEGREX_VFPUCONTROL_163, + R4000ALLEGREX_VFPUCONTROL_164, + R4000ALLEGREX_VFPUCONTROL_165, + R4000ALLEGREX_VFPUCONTROL_166, + R4000ALLEGREX_VFPUCONTROL_167, + R4000ALLEGREX_VFPUCONTROL_168, + R4000ALLEGREX_VFPUCONTROL_169, + R4000ALLEGREX_VFPUCONTROL_170, + R4000ALLEGREX_VFPUCONTROL_171, + R4000ALLEGREX_VFPUCONTROL_172, + R4000ALLEGREX_VFPUCONTROL_173, + R4000ALLEGREX_VFPUCONTROL_174, + R4000ALLEGREX_VFPUCONTROL_175, + R4000ALLEGREX_VFPUCONTROL_176, + R4000ALLEGREX_VFPUCONTROL_177, + R4000ALLEGREX_VFPUCONTROL_178, + R4000ALLEGREX_VFPUCONTROL_179, + R4000ALLEGREX_VFPUCONTROL_180, + R4000ALLEGREX_VFPUCONTROL_181, + R4000ALLEGREX_VFPUCONTROL_182, + R4000ALLEGREX_VFPUCONTROL_183, + R4000ALLEGREX_VFPUCONTROL_184, + R4000ALLEGREX_VFPUCONTROL_185, + R4000ALLEGREX_VFPUCONTROL_186, + R4000ALLEGREX_VFPUCONTROL_187, + R4000ALLEGREX_VFPUCONTROL_188, + R4000ALLEGREX_VFPUCONTROL_189, + R4000ALLEGREX_VFPUCONTROL_190, + R4000ALLEGREX_VFPUCONTROL_191, + R4000ALLEGREX_VFPUCONTROL_192, + R4000ALLEGREX_VFPUCONTROL_193, + R4000ALLEGREX_VFPUCONTROL_194, + R4000ALLEGREX_VFPUCONTROL_195, + R4000ALLEGREX_VFPUCONTROL_196, + R4000ALLEGREX_VFPUCONTROL_197, + R4000ALLEGREX_VFPUCONTROL_198, + R4000ALLEGREX_VFPUCONTROL_199, + R4000ALLEGREX_VFPUCONTROL_200, + R4000ALLEGREX_VFPUCONTROL_201, + R4000ALLEGREX_VFPUCONTROL_202, + R4000ALLEGREX_VFPUCONTROL_203, + R4000ALLEGREX_VFPUCONTROL_204, + R4000ALLEGREX_VFPUCONTROL_205, + R4000ALLEGREX_VFPUCONTROL_206, + R4000ALLEGREX_VFPUCONTROL_207, + R4000ALLEGREX_VFPUCONTROL_208, + R4000ALLEGREX_VFPUCONTROL_209, + R4000ALLEGREX_VFPUCONTROL_210, + R4000ALLEGREX_VFPUCONTROL_211, + R4000ALLEGREX_VFPUCONTROL_212, + R4000ALLEGREX_VFPUCONTROL_213, + R4000ALLEGREX_VFPUCONTROL_214, + R4000ALLEGREX_VFPUCONTROL_215, + R4000ALLEGREX_VFPUCONTROL_216, + R4000ALLEGREX_VFPUCONTROL_217, + R4000ALLEGREX_VFPUCONTROL_218, + R4000ALLEGREX_VFPUCONTROL_219, + R4000ALLEGREX_VFPUCONTROL_220, + R4000ALLEGREX_VFPUCONTROL_221, + R4000ALLEGREX_VFPUCONTROL_222, + R4000ALLEGREX_VFPUCONTROL_223, + R4000ALLEGREX_VFPUCONTROL_224, + R4000ALLEGREX_VFPUCONTROL_225, + R4000ALLEGREX_VFPUCONTROL_226, + R4000ALLEGREX_VFPUCONTROL_227, + R4000ALLEGREX_VFPUCONTROL_228, + R4000ALLEGREX_VFPUCONTROL_229, + R4000ALLEGREX_VFPUCONTROL_230, + R4000ALLEGREX_VFPUCONTROL_231, + R4000ALLEGREX_VFPUCONTROL_232, + R4000ALLEGREX_VFPUCONTROL_233, + R4000ALLEGREX_VFPUCONTROL_234, + R4000ALLEGREX_VFPUCONTROL_235, + R4000ALLEGREX_VFPUCONTROL_236, + R4000ALLEGREX_VFPUCONTROL_237, + R4000ALLEGREX_VFPUCONTROL_238, + R4000ALLEGREX_VFPUCONTROL_239, + R4000ALLEGREX_VFPUCONTROL_240, + R4000ALLEGREX_VFPUCONTROL_241, + R4000ALLEGREX_VFPUCONTROL_242, + R4000ALLEGREX_VFPUCONTROL_243, + R4000ALLEGREX_VFPUCONTROL_244, + R4000ALLEGREX_VFPUCONTROL_245, + R4000ALLEGREX_VFPUCONTROL_246, + R4000ALLEGREX_VFPUCONTROL_247, + R4000ALLEGREX_VFPUCONTROL_248, + R4000ALLEGREX_VFPUCONTROL_249, + R4000ALLEGREX_VFPUCONTROL_250, + R4000ALLEGREX_VFPUCONTROL_251, + R4000ALLEGREX_VFPUCONTROL_252, + R4000ALLEGREX_VFPUCONTROL_253, + R4000ALLEGREX_VFPUCONTROL_254, + R4000ALLEGREX_VFPUCONTROL_255, + }; + enum class VConstant { + R4000ALLEGREX_VCONSTANT_INVALID_0, + R4000ALLEGREX_VCONSTANT_VFPU_HUGE, + R4000ALLEGREX_VCONSTANT_VFPU_SQRT2, + R4000ALLEGREX_VCONSTANT_VFPU_SQRT1_2, + R4000ALLEGREX_VCONSTANT_VFPU_2_SQRTPI, + R4000ALLEGREX_VCONSTANT_VFPU_2_PI, + R4000ALLEGREX_VCONSTANT_VFPU_1_PI, + R4000ALLEGREX_VCONSTANT_VFPU_PI_4, + R4000ALLEGREX_VCONSTANT_VFPU_PI_2, + R4000ALLEGREX_VCONSTANT_VFPU_PI, + R4000ALLEGREX_VCONSTANT_VFPU_E, + R4000ALLEGREX_VCONSTANT_VFPU_LOG2E, + R4000ALLEGREX_VCONSTANT_VFPU_LOG10E, + R4000ALLEGREX_VCONSTANT_VFPU_LN2, + R4000ALLEGREX_VCONSTANT_VFPU_LN10, + R4000ALLEGREX_VCONSTANT_VFPU_2PI, + R4000ALLEGREX_VCONSTANT_VFPU_PI_6, + R4000ALLEGREX_VCONSTANT_VFPU_LOG10TWO, + R4000ALLEGREX_VCONSTANT_VFPU_LOG2TEN, + R4000ALLEGREX_VCONSTANT_VFPU_SQRT3_2, + R4000ALLEGREX_VCONSTANT_INVALID_20, + R4000ALLEGREX_VCONSTANT_INVALID_21, + R4000ALLEGREX_VCONSTANT_INVALID_22, + R4000ALLEGREX_VCONSTANT_INVALID_23, + R4000ALLEGREX_VCONSTANT_INVALID_24, + R4000ALLEGREX_VCONSTANT_INVALID_25, + R4000ALLEGREX_VCONSTANT_INVALID_26, + R4000ALLEGREX_VCONSTANT_INVALID_27, + R4000ALLEGREX_VCONSTANT_INVALID_28, + R4000ALLEGREX_VCONSTANT_INVALID_29, + R4000ALLEGREX_VCONSTANT_INVALID_30, + R4000ALLEGREX_VCONSTANT_INVALID_31, + }; + }; namespace R5900 { enum class VF { R5900_VF_vf0, diff --git a/cplusplus/include/generated/UniqueId_enum_class.hpp b/cplusplus/include/generated/UniqueId_enum_class.hpp index 090858ab..8c2acd6f 100644 --- a/cplusplus/include/generated/UniqueId_enum_class.hpp +++ b/cplusplus/include/generated/UniqueId_enum_class.hpp @@ -460,6 +460,320 @@ enum class UniqueId { r3000gte_USERDEF_18, r3000gte_USERDEF_19, r3000gte_MAX, + r4000allegrex_INVALID, + r4000allegrex_lv_s, + r4000allegrex_sv_s, + r4000allegrex_lv_q, + r4000allegrex_sv_q, + r4000allegrex_clz, + r4000allegrex_clo, + r4000allegrex_madd, + r4000allegrex_maddu, + r4000allegrex_msub, + r4000allegrex_msubu, + r4000allegrex_max, + r4000allegrex_min, + r4000allegrex_srl, + r4000allegrex_rotr, + r4000allegrex_srlv, + r4000allegrex_rotrv, + r4000allegrex_sleep, + r4000allegrex_mfie, + r4000allegrex_mtie, + r4000allegrex_ext, + r4000allegrex_ins, + r4000allegrex_wsbh, + r4000allegrex_wsbw, + r4000allegrex_seb, + r4000allegrex_seh, + r4000allegrex_bitrev, + r4000allegrex_bvf, + r4000allegrex_bvt, + r4000allegrex_bvfl, + r4000allegrex_bvtl, + r4000allegrex_mfv, + r4000allegrex_mfvc, + r4000allegrex_vsync2, + r4000allegrex_mtv, + r4000allegrex_mtvc, + r4000allegrex_vadd_s, + r4000allegrex_vadd_p, + r4000allegrex_vadd_t, + r4000allegrex_vadd_q, + r4000allegrex_vsub_s, + r4000allegrex_vsub_p, + r4000allegrex_vsub_t, + r4000allegrex_vsub_q, + r4000allegrex_vsbn_s, + r4000allegrex_vdiv_s, + r4000allegrex_vdiv_p, + r4000allegrex_vdiv_t, + r4000allegrex_vdiv_q, + r4000allegrex_vmul_s, + r4000allegrex_vmul_p, + r4000allegrex_vmul_t, + r4000allegrex_vmul_q, + r4000allegrex_vdot_p, + r4000allegrex_vdot_t, + r4000allegrex_vdot_q, + r4000allegrex_vscl_p, + r4000allegrex_vscl_t, + r4000allegrex_vscl_q, + r4000allegrex_vhdp_p, + r4000allegrex_vhdp_t, + r4000allegrex_vhdp_q, + r4000allegrex_vcrs_t, + r4000allegrex_vdet_p, + r4000allegrex_vcmp_s, + r4000allegrex_vcmp_p, + r4000allegrex_vcmp_t, + r4000allegrex_vcmp_q, + r4000allegrex_vmin_s, + r4000allegrex_vmin_p, + r4000allegrex_vmin_t, + r4000allegrex_vmin_q, + r4000allegrex_vmax_s, + r4000allegrex_vmax_p, + r4000allegrex_vmax_t, + r4000allegrex_vmax_q, + r4000allegrex_vscmp_s, + r4000allegrex_vscmp_p, + r4000allegrex_vscmp_t, + r4000allegrex_vscmp_q, + r4000allegrex_vsge_s, + r4000allegrex_vsge_p, + r4000allegrex_vsge_t, + r4000allegrex_vsge_q, + r4000allegrex_vslt_s, + r4000allegrex_vslt_p, + r4000allegrex_vslt_t, + r4000allegrex_vslt_q, + r4000allegrex_vwbn_s, + r4000allegrex_vmov_s, + r4000allegrex_vmov_p, + r4000allegrex_vmov_t, + r4000allegrex_vmov_q, + r4000allegrex_vabs_s, + r4000allegrex_vabs_p, + r4000allegrex_vabs_t, + r4000allegrex_vabs_q, + r4000allegrex_vneg_s, + r4000allegrex_vneg_p, + r4000allegrex_vneg_t, + r4000allegrex_vneg_q, + r4000allegrex_vidt_p, + r4000allegrex_vidt_q, + r4000allegrex_vsat0_s, + r4000allegrex_vsat0_p, + r4000allegrex_vsat0_t, + r4000allegrex_vsat0_q, + r4000allegrex_vsat1_s, + r4000allegrex_vsat1_p, + r4000allegrex_vsat1_t, + r4000allegrex_vsat1_q, + r4000allegrex_vzero_s, + r4000allegrex_vzero_p, + r4000allegrex_vzero_t, + r4000allegrex_vzero_q, + r4000allegrex_vone_s, + r4000allegrex_vone_p, + r4000allegrex_vone_t, + r4000allegrex_vone_q, + r4000allegrex_vrcp_s, + r4000allegrex_vrcp_p, + r4000allegrex_vrcp_t, + r4000allegrex_vrcp_q, + r4000allegrex_vrsq_s, + r4000allegrex_vrsq_p, + r4000allegrex_vrsq_t, + r4000allegrex_vrsq_q, + r4000allegrex_vsin_s, + r4000allegrex_vsin_p, + r4000allegrex_vsin_t, + r4000allegrex_vsin_q, + r4000allegrex_vcos_s, + r4000allegrex_vcos_p, + r4000allegrex_vcos_t, + r4000allegrex_vcos_q, + r4000allegrex_vexp2_s, + r4000allegrex_vexp2_p, + r4000allegrex_vexp2_t, + r4000allegrex_vexp2_q, + r4000allegrex_vlog2_s, + r4000allegrex_vlog2_p, + r4000allegrex_vlog2_t, + r4000allegrex_vlog2_q, + r4000allegrex_vsqrt_s, + r4000allegrex_vsqrt_p, + r4000allegrex_vsqrt_t, + r4000allegrex_vsqrt_q, + r4000allegrex_vasin_s, + r4000allegrex_vasin_p, + r4000allegrex_vasin_t, + r4000allegrex_vasin_q, + r4000allegrex_vnrcp_s, + r4000allegrex_vnrcp_p, + r4000allegrex_vnrcp_t, + r4000allegrex_vnrcp_q, + r4000allegrex_vnsin_s, + r4000allegrex_vnsin_p, + r4000allegrex_vnsin_t, + r4000allegrex_vnsin_q, + r4000allegrex_vrexp2_s, + r4000allegrex_vrexp2_p, + r4000allegrex_vrexp2_t, + r4000allegrex_vrexp2_q, + r4000allegrex_vrnds_s, + r4000allegrex_vrndi_s, + r4000allegrex_vrndi_p, + r4000allegrex_vrndi_t, + r4000allegrex_vrndi_q, + r4000allegrex_vrndf1_s, + r4000allegrex_vrndf1_p, + r4000allegrex_vrndf1_t, + r4000allegrex_vrndf1_q, + r4000allegrex_vrndf2_s, + r4000allegrex_vrndf2_p, + r4000allegrex_vrndf2_t, + r4000allegrex_vrndf2_q, + r4000allegrex_vf2h_p, + r4000allegrex_vf2h_q, + r4000allegrex_vh2f_s, + r4000allegrex_vh2f_p, + r4000allegrex_vsbz_s, + r4000allegrex_vlgb_s, + r4000allegrex_vuc2ifs_s, + r4000allegrex_vc2i_s, + r4000allegrex_vus2i_s, + r4000allegrex_vus2i_p, + r4000allegrex_vs2i_s, + r4000allegrex_vs2i_p, + r4000allegrex_vi2uc_q, + r4000allegrex_vi2c_q, + r4000allegrex_vi2us_p, + r4000allegrex_vi2us_q, + r4000allegrex_vi2s_p, + r4000allegrex_vi2s_q, + r4000allegrex_vsrt1_q, + r4000allegrex_vsrt2_q, + r4000allegrex_vbfy1_p, + r4000allegrex_vbfy1_q, + r4000allegrex_vbfy2_q, + r4000allegrex_vocp_s, + r4000allegrex_vocp_p, + r4000allegrex_vocp_t, + r4000allegrex_vocp_q, + r4000allegrex_vsocp_s, + r4000allegrex_vsocp_p, + r4000allegrex_vfad_p, + r4000allegrex_vfad_t, + r4000allegrex_vfad_q, + r4000allegrex_vavg_p, + r4000allegrex_vavg_t, + r4000allegrex_vavg_q, + r4000allegrex_vsrt3_q, + r4000allegrex_vsrt4_q, + r4000allegrex_vsgn_s, + r4000allegrex_vsgn_p, + r4000allegrex_vsgn_t, + r4000allegrex_vsgn_q, + r4000allegrex_vmfvc, + r4000allegrex_vmtvc, + r4000allegrex_vt4444_q, + r4000allegrex_vt5551_q, + r4000allegrex_vt5650_q, + r4000allegrex_vcst_s, + r4000allegrex_vcst_p, + r4000allegrex_vcst_t, + r4000allegrex_vcst_q, + r4000allegrex_vf2in_s, + r4000allegrex_vf2in_p, + r4000allegrex_vf2in_t, + r4000allegrex_vf2in_q, + r4000allegrex_vf2iz_s, + r4000allegrex_vf2iz_p, + r4000allegrex_vf2iz_t, + r4000allegrex_vf2iz_q, + r4000allegrex_vf2iu_s, + r4000allegrex_vf2iu_p, + r4000allegrex_vf2iu_t, + r4000allegrex_vf2iu_q, + r4000allegrex_vf2id_s, + r4000allegrex_vf2id_p, + r4000allegrex_vf2id_t, + r4000allegrex_vf2id_q, + r4000allegrex_vi2f_s, + r4000allegrex_vi2f_p, + r4000allegrex_vi2f_t, + r4000allegrex_vi2f_q, + r4000allegrex_vcmovt_s, + r4000allegrex_vcmovt_p, + r4000allegrex_vcmovt_t, + r4000allegrex_vcmovt_q, + r4000allegrex_vcmovf_s, + r4000allegrex_vcmovf_p, + r4000allegrex_vcmovf_t, + r4000allegrex_vcmovf_q, + r4000allegrex_vpfxs, + r4000allegrex_vpfxt, + r4000allegrex_vpfxd, + r4000allegrex_viim_s, + r4000allegrex_vfim_s, + r4000allegrex_vmmul_p, + r4000allegrex_vmmul_t, + r4000allegrex_vmmul_q, + r4000allegrex_vhtfm2_p, + r4000allegrex_vtfm2_p, + r4000allegrex_vhtfm3_t, + r4000allegrex_vtfm3_t, + r4000allegrex_vhtfm4_q, + r4000allegrex_vtfm4_q, + r4000allegrex_vmscl_p, + r4000allegrex_vmscl_t, + r4000allegrex_vmscl_q, + r4000allegrex_vcrsp_t, + r4000allegrex_vqmul_q, + r4000allegrex_vrot_p, + r4000allegrex_vrot_t, + r4000allegrex_vrot_q, + r4000allegrex_vmmov_p, + r4000allegrex_vmmov_t, + r4000allegrex_vmmov_q, + r4000allegrex_vmidt_p, + r4000allegrex_vmidt_t, + r4000allegrex_vmidt_q, + r4000allegrex_vmzero_p, + r4000allegrex_vmzero_t, + r4000allegrex_vmzero_q, + r4000allegrex_vmone_p, + r4000allegrex_vmone_t, + r4000allegrex_vmone_q, + r4000allegrex_vnop, + r4000allegrex_vsync, + r4000allegrex_vflush, + r4000allegrex_svl_q, + r4000allegrex_svr_q, + r4000allegrex_USERDEF_00, + r4000allegrex_USERDEF_01, + r4000allegrex_USERDEF_02, + r4000allegrex_USERDEF_03, + r4000allegrex_USERDEF_04, + r4000allegrex_USERDEF_05, + r4000allegrex_USERDEF_06, + r4000allegrex_USERDEF_07, + r4000allegrex_USERDEF_08, + r4000allegrex_USERDEF_09, + r4000allegrex_USERDEF_10, + r4000allegrex_USERDEF_11, + r4000allegrex_USERDEF_12, + r4000allegrex_USERDEF_13, + r4000allegrex_USERDEF_14, + r4000allegrex_USERDEF_15, + r4000allegrex_USERDEF_16, + r4000allegrex_USERDEF_17, + r4000allegrex_USERDEF_18, + r4000allegrex_USERDEF_19, + r4000allegrex_MAX, r5900_INVALID, r5900_lq, r5900_sq, diff --git a/cplusplus/include/instructions/InstructionR4000Allegrex.hpp b/cplusplus/include/instructions/InstructionR4000Allegrex.hpp new file mode 100644 index 00000000..32d1a070 --- /dev/null +++ b/cplusplus/include/instructions/InstructionR4000Allegrex.hpp @@ -0,0 +1,85 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +#ifndef RABBITIZER_INSTRUCTION_R4000ALLEGREX_HPP +#define RABBITIZER_INSTRUCTION_R4000ALLEGREX_HPP +#pragma once + +#include "InstructionBase.hpp" + + +namespace rabbitizer { + class InstructionR4000Allegrex : public InstructionBase { + public: + InstructionR4000Allegrex(uint32_t word, uint32_t vram); + virtual ~InstructionR4000Allegrex(); + + Registers::R4000Allegrex::S GetR4000Allegrex_s_vs() const; + Registers::R4000Allegrex::S GetR4000Allegrex_s_vt() const; + Registers::R4000Allegrex::S GetR4000Allegrex_s_vd() const; + Registers::R4000Allegrex::S GetR4000Allegrex_s_vt_imm() const; + Registers::R4000Allegrex::S GetR4000Allegrex_s_vd_imm() const; + + Registers::R4000Allegrex::V2D GetR4000Allegrex_p_vs() const; + Registers::R4000Allegrex::V2D GetR4000Allegrex_p_vt() const; + Registers::R4000Allegrex::V2D GetR4000Allegrex_p_vd() const; + + Registers::R4000Allegrex::V3D GetR4000Allegrex_t_vs() const; + Registers::R4000Allegrex::V3D GetR4000Allegrex_t_vt() const; + Registers::R4000Allegrex::V3D GetR4000Allegrex_t_vd() const; + + Registers::R4000Allegrex::V4D GetR4000Allegrex_q_vs() const; + Registers::R4000Allegrex::V4D GetR4000Allegrex_q_vt() const; + Registers::R4000Allegrex::V4D GetR4000Allegrex_q_vd() const; + Registers::R4000Allegrex::V4D GetR4000Allegrex_q_vt_imm() const; + + Registers::R4000Allegrex::M2x2 GetR4000Allegrex_mp_vs() const; + Registers::R4000Allegrex::M2x2 GetR4000Allegrex_mp_vt() const; + Registers::R4000Allegrex::M2x2 GetR4000Allegrex_mp_vd() const; + Registers::R4000Allegrex::M2x2 GetR4000Allegrex_mp_vs_transpose() const; + + Registers::R4000Allegrex::M3x3 GetR4000Allegrex_mt_vs() const; + Registers::R4000Allegrex::M3x3 GetR4000Allegrex_mt_vt() const; + Registers::R4000Allegrex::M3x3 GetR4000Allegrex_mt_vd() const; + Registers::R4000Allegrex::M3x3 GetR4000Allegrex_mt_vs_transpose() const; + + Registers::R4000Allegrex::M4x4 GetR4000Allegrex_mq_vs() const; + Registers::R4000Allegrex::M4x4 GetR4000Allegrex_mq_vt() const; + Registers::R4000Allegrex::M4x4 GetR4000Allegrex_mq_vd() const; + Registers::R4000Allegrex::M4x4 GetR4000Allegrex_mq_vs_transpose() const; + + Registers::R4000Allegrex::VfpuControl GetR4000Allegrex_cop2cs() const; + Registers::R4000Allegrex::VfpuControl GetR4000Allegrex_cop2cd() const; + + uint8_t GetR4000Allegrex_pos() const; + uint8_t GetR4000Allegrex_size() const; + uint8_t GetR4000Allegrex_size_plus_pos() const; + + uint8_t GetR4000Allegrex_imm3() const; + + uint16_t GetR4000Allegrex_offset14() const; + + uint8_t GetR4000Allegrex_vcmp_cond() const; + + Registers::R4000Allegrex::VConstant GetR4000Allegrex_vconstant() const; + + uint8_t GetR4000Allegrex_power_of_two() const; + uint8_t GetR4000Allegrex_vfpu_cc_bit() const; + uint8_t GetR4000Allegrex_bn() const; + + uint16_t GetR4000Allegrex_intfloat16() const; + uint8_t GetR4000Allegrex_vrot_code() const; + + uint8_t GetR4000Allegrex_rpx() const; + uint8_t GetR4000Allegrex_rpy() const; + uint8_t GetR4000Allegrex_rpz() const; + uint8_t GetR4000Allegrex_rpw() const; + + uint8_t GetR4000Allegrex_wpx() const; + uint8_t GetR4000Allegrex_wpy() const; + uint8_t GetR4000Allegrex_wpz() const; + uint8_t GetR4000Allegrex_wpw() const; + }; +}; + +#endif diff --git a/cplusplus/include/rabbitizer.hpp b/cplusplus/include/rabbitizer.hpp index d6abac2d..2dc7b6f0 100644 --- a/cplusplus/include/rabbitizer.hpp +++ b/cplusplus/include/rabbitizer.hpp @@ -20,6 +20,7 @@ #include "instructions/InstructionCpu.hpp" #include "instructions/InstructionRsp.hpp" #include "instructions/InstructionR3000GTE.hpp" +#include "instructions/InstructionR4000Allegrex.hpp" #include "instructions/InstructionR5900.hpp" #include "analysis/LoPairingInfo.hpp" diff --git a/cplusplus/src/instructions/InstructionR4000Allegrex.cpp b/cplusplus/src/instructions/InstructionR4000Allegrex.cpp new file mode 100644 index 00000000..8884f1cd --- /dev/null +++ b/cplusplus/src/instructions/InstructionR4000Allegrex.cpp @@ -0,0 +1,560 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +#include "instructions/InstructionR4000Allegrex.hpp" + +#include + +#include "instructions/RabbitizerInstructionR4000Allegrex.h" + +using namespace rabbitizer; + +InstructionR4000Allegrex::InstructionR4000Allegrex(uint32_t word, uint32_t vram) : InstructionBase() { + RabbitizerInstructionR4000Allegrex_init(&this->instr, word, vram); + RabbitizerInstructionR4000Allegrex_processUniqueId(&this->instr); +} + +InstructionR4000Allegrex::~InstructionR4000Allegrex() { + RabbitizerInstructionR4000Allegrex_destroy(&this->instr); +} + +Registers::R4000Allegrex::S InstructionR4000Allegrex::GetR4000Allegrex_s_vs() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_s_vs)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 's_vs' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vs(&this->instr)); +} + +Registers::R4000Allegrex::S InstructionR4000Allegrex::GetR4000Allegrex_s_vt() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_s_vt)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 's_vt' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vt(&this->instr)); +} + +Registers::R4000Allegrex::S InstructionR4000Allegrex::GetR4000Allegrex_s_vd() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_s_vd)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 's_vd' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vd(&this->instr)); +} + +Registers::R4000Allegrex::S InstructionR4000Allegrex::GetR4000Allegrex_s_vt_imm() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_s_vt_imm)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 's_vt_imm' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vt_imm(&this->instr)); +} + +Registers::R4000Allegrex::S InstructionR4000Allegrex::GetR4000Allegrex_s_vd_imm() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_s_vd_imm)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 's_vd_imm' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vd_imm(&this->instr)); +} + +Registers::R4000Allegrex::V2D InstructionR4000Allegrex::GetR4000Allegrex_p_vs() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_p_vs)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'p_vs' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vs(&this->instr)); +} + +Registers::R4000Allegrex::V2D InstructionR4000Allegrex::GetR4000Allegrex_p_vt() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_s_vt)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 's_vt' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vt(&this->instr)); +} + +Registers::R4000Allegrex::V2D InstructionR4000Allegrex::GetR4000Allegrex_p_vd() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_p_vd)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'p_vd' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vd(&this->instr)); +} + +Registers::R4000Allegrex::V3D InstructionR4000Allegrex::GetR4000Allegrex_t_vs() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_t_vs)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 't_vs' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vs(&this->instr)); +} + +Registers::R4000Allegrex::V3D InstructionR4000Allegrex::GetR4000Allegrex_t_vt() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_t_vt)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 't_vt' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vt(&this->instr)); +} + +Registers::R4000Allegrex::V3D InstructionR4000Allegrex::GetR4000Allegrex_t_vd() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_t_vd)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 't_vd' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vd(&this->instr)); +} + +Registers::R4000Allegrex::V4D InstructionR4000Allegrex::GetR4000Allegrex_q_vs() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_q_vs)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'q_vs' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vs(&this->instr)); +} + +Registers::R4000Allegrex::V4D InstructionR4000Allegrex::GetR4000Allegrex_q_vt() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_q_vt)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'q_vt' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vt(&this->instr)); +} + +Registers::R4000Allegrex::V4D InstructionR4000Allegrex::GetR4000Allegrex_q_vd() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_q_vd)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'q_vd' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vd(&this->instr)); +} + +Registers::R4000Allegrex::V4D InstructionR4000Allegrex::GetR4000Allegrex_q_vt_imm() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_q_vt_imm)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'q_vt_imm' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vt_imm(&this->instr)); +} + +Registers::R4000Allegrex::M2x2 InstructionR4000Allegrex::GetR4000Allegrex_mp_vs() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_mp_vs)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'mp_vs' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vs(&this->instr)); +} + +Registers::R4000Allegrex::M2x2 InstructionR4000Allegrex::GetR4000Allegrex_mp_vt() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_mp_vt)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'mp_vt' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vt(&this->instr)); +} + +Registers::R4000Allegrex::M2x2 InstructionR4000Allegrex::GetR4000Allegrex_mp_vd() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_mp_vd)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'mp_vd' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vd(&this->instr)); +} + +Registers::R4000Allegrex::M2x2 InstructionR4000Allegrex::GetR4000Allegrex_mp_vs_transpose() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_mp_vs_transpose)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'mp_vs_transpose' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vs_transpose(&this->instr)); +} + +Registers::R4000Allegrex::M3x3 InstructionR4000Allegrex::GetR4000Allegrex_mt_vs() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_mt_vs)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'mt_vs' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vs(&this->instr)); +} + +Registers::R4000Allegrex::M3x3 InstructionR4000Allegrex::GetR4000Allegrex_mt_vt() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_mt_vt)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'mt_vt' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vt(&this->instr)); +} + +Registers::R4000Allegrex::M3x3 InstructionR4000Allegrex::GetR4000Allegrex_mt_vd() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_mt_vd)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'mt_vd' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vd(&this->instr)); +} + +Registers::R4000Allegrex::M3x3 InstructionR4000Allegrex::GetR4000Allegrex_mt_vs_transpose() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_mt_vs_transpose)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'mt_vs_transpose' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vs_transpose(&this->instr)); +} + +Registers::R4000Allegrex::M4x4 InstructionR4000Allegrex::GetR4000Allegrex_mq_vs() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_mq_vs)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'mq_vs' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vs(&this->instr)); +} + +Registers::R4000Allegrex::M4x4 InstructionR4000Allegrex::GetR4000Allegrex_mq_vt() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_mq_vt)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'mq_vt' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vt(&this->instr)); +} + +Registers::R4000Allegrex::M4x4 InstructionR4000Allegrex::GetR4000Allegrex_mq_vd() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_mq_vd)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'mq_vd' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vd(&this->instr)); +} + +Registers::R4000Allegrex::M4x4 InstructionR4000Allegrex::GetR4000Allegrex_mq_vs_transpose() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_mq_vs_transpose)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'mq_vs_transpose' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vs_transpose(&this->instr)); +} + +Registers::R4000Allegrex::VfpuControl InstructionR4000Allegrex::GetR4000Allegrex_cop2cs() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_cop2cs)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'cop2cs' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_cop2cs(&this->instr)); +} + +Registers::R4000Allegrex::VfpuControl InstructionR4000Allegrex::GetR4000Allegrex_cop2cd() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_cop2cd)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'cop2cd' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_cop2cd(&this->instr)); +} + +uint8_t InstructionR4000Allegrex::GetR4000Allegrex_pos() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_pos)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'pos' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_pos(&this->instr); +} +uint8_t InstructionR4000Allegrex::GetR4000Allegrex_size() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_size)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'size' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_size(&this->instr); +} +uint8_t InstructionR4000Allegrex::GetR4000Allegrex_size_plus_pos() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_size_plus_pos)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'size_plus_pos' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_size_plus_pos(&this->instr); +} + +uint8_t InstructionR4000Allegrex::GetR4000Allegrex_imm3() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_imm3)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'imm3' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_imm3(&this->instr); +} + +uint16_t InstructionR4000Allegrex::GetR4000Allegrex_offset14() const { +#if 0 +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_offset14)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'offset14' operand."); + } +#endif +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_offset14(&this->instr); +} + +uint8_t InstructionR4000Allegrex::GetR4000Allegrex_vcmp_cond() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_vcmp_cond)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'vcmp_cond' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_vcmp_cond(&this->instr); +} + +Registers::R4000Allegrex::VConstant InstructionR4000Allegrex::GetR4000Allegrex_vconstant() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_vconstant)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'vconstant' operand."); + } +#endif + + return static_cast(RAB_INSTR_R4000ALLEGREX_GET_vconstant(&this->instr)); +} + +uint8_t InstructionR4000Allegrex::GetR4000Allegrex_power_of_two() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_power_of_two)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'power_of_two' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_power_of_two(&this->instr); +} + +uint8_t InstructionR4000Allegrex::GetR4000Allegrex_vfpu_cc_bit() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_vfpu_cc_bit)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'vfpu_cc_bit' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_vfpu_cc_bit(&this->instr); +} + +uint8_t InstructionR4000Allegrex::GetR4000Allegrex_bn() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_bn)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'bn' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_bn(&this->instr); +} + +uint16_t InstructionR4000Allegrex::GetR4000Allegrex_intfloat16() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_int16) && !hasOperandAlias(OperandType::r4000allegrex_float16)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'intfloat16' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_intfloat16(&this->instr); +} + +uint8_t InstructionR4000Allegrex::GetR4000Allegrex_vrot_code() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_p_vrot_code) && + !hasOperandAlias(OperandType::r4000allegrex_t_vrot_code) && + !hasOperandAlias(OperandType::r4000allegrex_q_vrot_code)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'vrot_code' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_vrot_code(&this->instr); +} + +uint8_t InstructionR4000Allegrex::GetR4000Allegrex_rpx() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_rpx)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'rpx' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_rpx(&this->instr); +} + +uint8_t InstructionR4000Allegrex::GetR4000Allegrex_rpy() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_rpy)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'rpy' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_rpy(&this->instr); +} + +uint8_t InstructionR4000Allegrex::GetR4000Allegrex_rpz() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_rpz)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'rpz' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_rpz(&this->instr); +} + +uint8_t InstructionR4000Allegrex::GetR4000Allegrex_rpw() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_rpw)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'rpw' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_rpw(&this->instr); +} + +uint8_t InstructionR4000Allegrex::GetR4000Allegrex_wpx() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_wpx)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'wpx' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_wpx(&this->instr); +} + +uint8_t InstructionR4000Allegrex::GetR4000Allegrex_wpy() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_wpy)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'wpy' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_wpy(&this->instr); +} + +uint8_t InstructionR4000Allegrex::GetR4000Allegrex_wpz() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_wpz)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'wpz' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_wpz(&this->instr); +} + +uint8_t InstructionR4000Allegrex::GetR4000Allegrex_wpw() const { +#ifdef RAB_SANITY_CHECKS + if (!hasOperandAlias(OperandType::r4000allegrex_wpw)) { + // TODO: make a rabbitizer exception class + throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'wpw' operand."); + } +#endif + + return RAB_INSTR_R4000ALLEGREX_GET_wpw(&this->instr); +} diff --git a/cplusplus/src/instructions/InstructionR5900.cpp b/cplusplus/src/instructions/InstructionR5900.cpp index 2b018920..0ef07c18 100644 --- a/cplusplus/src/instructions/InstructionR5900.cpp +++ b/cplusplus/src/instructions/InstructionR5900.cpp @@ -20,7 +20,7 @@ InstructionR5900::~InstructionR5900() { Registers::R5900::VF InstructionR5900::GetR5900_vfs() const { #ifdef RAB_SANITY_CHECKS - if (!hasOperandAlias(OperandType::rsp_rs)) { + if (!hasOperandAlias(OperandType::r5900_vfs)) { // TODO: make a rabbitizer exception class throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'vfs' operand."); } @@ -31,7 +31,7 @@ Registers::R5900::VF InstructionR5900::GetR5900_vfs() const { Registers::R5900::VF InstructionR5900::GetR5900_vft() const { #ifdef RAB_SANITY_CHECKS - if (!hasOperandAlias(OperandType::rsp_rt)) { + if (!hasOperandAlias(OperandType::r5900_vft)) { // TODO: make a rabbitizer exception class throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'vft' operand."); } @@ -42,7 +42,7 @@ Registers::R5900::VF InstructionR5900::GetR5900_vft() const { Registers::R5900::VF InstructionR5900::GetR5900_vfd() const { #ifdef RAB_SANITY_CHECKS - if (!hasOperandAlias(OperandType::rsp_rd)) { + if (!hasOperandAlias(OperandType::r5900_vfd)) { // TODO: make a rabbitizer exception class throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'vfd' operand."); } @@ -53,7 +53,7 @@ Registers::R5900::VF InstructionR5900::GetR5900_vfd() const { Registers::R5900::VI InstructionR5900::GetR5900_vis() const { #ifdef RAB_SANITY_CHECKS - if (!hasOperandAlias(OperandType::rsp_rs)) { + if (!hasOperandAlias(OperandType::r5900_vis)) { // TODO: make a rabbitizer exception class throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'vis' operand."); } @@ -64,7 +64,7 @@ Registers::R5900::VI InstructionR5900::GetR5900_vis() const { Registers::R5900::VI InstructionR5900::GetR5900_vit() const { #ifdef RAB_SANITY_CHECKS - if (!hasOperandAlias(OperandType::rsp_rt)) { + if (!hasOperandAlias(OperandType::r5900_vit)) { // TODO: make a rabbitizer exception class throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'vit' operand."); } @@ -75,7 +75,7 @@ Registers::R5900::VI InstructionR5900::GetR5900_vit() const { Registers::R5900::VI InstructionR5900::GetR5900_vid() const { #ifdef RAB_SANITY_CHECKS - if (!hasOperandAlias(OperandType::rsp_rd)) { + if (!hasOperandAlias(OperandType::r5900_vid)) { // TODO: make a rabbitizer exception class throw std::runtime_error("Instruction '" + getOpcodeName() + "' does not have 'vid' operand."); } diff --git a/include/common/RabbitizerConfig.h b/include/common/RabbitizerConfig.h index 1be6ae7f..b74cb81f 100644 --- a/include/common/RabbitizerConfig.h +++ b/include/common/RabbitizerConfig.h @@ -23,6 +23,7 @@ typedef struct RabbitizerConfig_RegisterNames { bool userFpcCsr; // Use FpcCsr as register $31 for the FP control/status register bool vr4300Cop0NamedRegisters; // Use named registers for VR4300's coprocessor 0 registers bool vr4300RspCop0NamedRegisters; // Use named registers for VR4300's RSP's coprocessor 0 registers + bool r4000AllegrexVfpuControlNamedRegisters; // Use named registers for R4000 Allegrex's VFPU control registers } RabbitizerConfig_RegisterNames; typedef struct RabbitizerConfig_PseudoInstr { diff --git a/include/common/RabbitizerVersion.h b/include/common/RabbitizerVersion.h index 863c7127..764a7e0d 100644 --- a/include/common/RabbitizerVersion.h +++ b/include/common/RabbitizerVersion.h @@ -13,8 +13,8 @@ extern "C" { // Header version #define RAB_VERSION_MAJOR 1 -#define RAB_VERSION_MINOR 9 -#define RAB_VERSION_PATCH 5 +#define RAB_VERSION_MINOR 10 +#define RAB_VERSION_PATCH 0 #define RAB_VERSION_STR RAB_STRINGIFY(RAB_VERSION_MAJOR) "." RAB_STRINGIFY(RAB_VERSION_MINOR) "." RAB_STRINGIFY(RAB_VERSION_PATCH) diff --git a/include/common/Utils.h b/include/common/Utils.h index e884322f..b6b5ba06 100644 --- a/include/common/Utils.h +++ b/include/common/Utils.h @@ -61,7 +61,7 @@ typedef enum RabTrinaryValue { #define RAB_STRINGIFY2(x) #x #define RAB_STRINGIFY(x) RAB_STRINGIFY2(x) -#define MASK(v, w) ((v) & ((1 << (w)) - 1)) +#define MASK(v, w) ((v) & ((1U << (w)) - 1U)) /* * the SHIFT macros take a value, a shift amount, and a width. @@ -78,7 +78,7 @@ typedef enum RabTrinaryValue { #define SHIFTL(v, s, w) (MASK((v), (w)) << (s)) #define SHIFTR(v, s, w) (MASK((v) >> (s), (w))) -#define BITREPACK(fullword, v, s, w) ((SHIFTR((fullword), (s)+(w), 32-((s)+(w))) << ((s)+(w))) | SHIFTL((v), (s), (w)) | MASK((fullword), (s))) +#define BITREPACK(fullword, v, s, w) ((SHIFTR((fullword), (s)+(w), 32U-((s)+(w))) << ((s)+(w))) | SHIFTL((v), (s), (w)) | MASK((fullword), (s))) #define BITREPACK_RIGHT(fullword, v, s, w) (SHIFTL((v), (s), (w)) | MASK((fullword), (s))) #define RABUTILS_BUFFER_ADVANCE(buffer, totalSize, expression) \ @@ -125,6 +125,8 @@ NON_NULL(1) size_t RabbitizerUtils_CharFill(char *dst, int count, char fillchar); NON_NULL(1, 3) size_t RabbitizerUtils_escapeString(char *dst, size_t dstSize, const char *src, size_t srcSize); +CONST NODISCARD +uint32_t RabbitizerUtils_floatRepr_32From16(uint16_t arg); #ifdef __cplusplus diff --git a/include/generated/InstrCategory_Names_array.h b/include/generated/InstrCategory_Names_array.h index ca73f459..7c7dc5da 100644 --- a/include/generated/InstrCategory_Names_array.h +++ b/include/generated/InstrCategory_Names_array.h @@ -10,6 +10,7 @@ const char *const RabbitizerInstrCategory_Names[] = { [RABBITIZER_INSTRCAT_CPU] = "CPU", [RABBITIZER_INSTRCAT_RSP] = "RSP", [RABBITIZER_INSTRCAT_R3000GTE] = "R3000GTE", + [RABBITIZER_INSTRCAT_R4000ALLEGREX] = "R4000ALLEGREX", [RABBITIZER_INSTRCAT_R5900] = "R5900", }; diff --git a/include/generated/InstrCategory_enum.h b/include/generated/InstrCategory_enum.h index aa210a73..48039e04 100644 --- a/include/generated/InstrCategory_enum.h +++ b/include/generated/InstrCategory_enum.h @@ -10,6 +10,7 @@ typedef enum RabbitizerInstrCategory { RABBITIZER_INSTRCAT_CPU, RABBITIZER_INSTRCAT_RSP, RABBITIZER_INSTRCAT_R3000GTE, + RABBITIZER_INSTRCAT_R4000ALLEGREX, RABBITIZER_INSTRCAT_R5900, RABBITIZER_INSTRCAT_MAX, } RabbitizerInstrCategory; diff --git a/include/generated/InstrDescriptor_Descriptors_array.h b/include/generated/InstrDescriptor_Descriptors_array.h index 5430e90b..13ffc1c3 100644 --- a/include/generated/InstrDescriptor_Descriptors_array.h +++ b/include/generated/InstrDescriptor_Descriptors_array.h @@ -460,6 +460,320 @@ const RabbitizerInstrDescriptor RabbitizerInstrDescriptor_Descriptors[] = { [RABBITIZER_INSTR_ID_r3000gte_USERDEF_18] = { .operands={0} }, [RABBITIZER_INSTR_ID_r3000gte_USERDEF_19] = { .operands={0} }, [RABBITIZER_INSTR_ID_r3000gte_MAX] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_INVALID] = { .operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_immediate}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN }, + [RABBITIZER_INSTR_ID_r4000allegrex_lv_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vt_imm, RAB_OPERAND_r4000allegrex_offset14_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .readsRs=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_sv_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vt_imm, RAB_OPERAND_r4000allegrex_offset14_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRs=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_lv_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vt_imm, RAB_OPERAND_r4000allegrex_offset14_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .readsRs=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_sv_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vt_imm, RAB_OPERAND_r4000allegrex_offset14_base_maybe_wb}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRs=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_clz] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .readsRs=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_clo] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .readsRs=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_madd] = { .operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .readsRs=true, .readsRt=true, .modifiesHI=true, .modifiesLO=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_maddu] = { .operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .readsRs=true, .readsRt=true, .modifiesHI=true, .modifiesLO=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_msub] = { .operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .readsRs=true, .readsRt=true, .modifiesHI=true, .modifiesLO=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_msubu] = { .operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .readsRs=true, .readsRt=true, .modifiesHI=true, .modifiesLO=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_max] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .readsRs=true, .readsRt=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_min] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .readsRs=true, .readsRt=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_srl] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .readsRt=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_rotr] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .readsRt=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_srlv] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .readsRs=true, .readsRt=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_rotrv] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .readsRs=true, .readsRt=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_sleep] = { .operands={0}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_mfie] = { .operands={RAB_OPERAND_cpu_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRt=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_mtie] = { .operands={RAB_OPERAND_cpu_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .readsRt=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_ext] = { .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs, RAB_OPERAND_r4000allegrex_pos, RAB_OPERAND_r4000allegrex_size}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRt=true, .readsRs=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_ins] = { .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs, RAB_OPERAND_r4000allegrex_pos, RAB_OPERAND_r4000allegrex_size_plus_pos}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRt=true, .readsRs=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_wsbh] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .readsRt=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_wsbw] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .readsRt=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_seb] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .readsRt=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_seh] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .readsRt=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_bitrev] = { .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRd=true, .readsRt=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_bvf] = { .operands={RAB_OPERAND_r4000allegrex_imm3, RAB_OPERAND_cpu_branch_target_label}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, .isBranch=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_bvt] = { .operands={RAB_OPERAND_r4000allegrex_imm3, RAB_OPERAND_cpu_branch_target_label}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, .isBranch=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_bvfl] = { .operands={RAB_OPERAND_r4000allegrex_imm3, RAB_OPERAND_cpu_branch_target_label}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, .isBranch=true, .isBranchLikely=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_bvtl] = { .operands={RAB_OPERAND_r4000allegrex_imm3, RAB_OPERAND_cpu_branch_target_label}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, .isBranch=true, .isBranchLikely=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_mfv] = { .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_r4000allegrex_s_vd}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRt=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_mfvc] = { .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_r4000allegrex_cop2cd}, .instrType=RABBITIZER_INSTR_TYPE_R, .modifiesRt=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsync2] = { .operands={0}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_mtv] = { .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_r4000allegrex_s_vd}, .instrType=RABBITIZER_INSTR_TYPE_R, .readsRt=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_mtvc] = { .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_r4000allegrex_cop2cd}, .instrType=RABBITIZER_INSTR_TYPE_R, .readsRt=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_vadd_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vadd_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vadd_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vadd_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsub_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsub_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsub_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsub_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsbn_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vdiv_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vdiv_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vdiv_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vdiv_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmul_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmul_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmul_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmul_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vdot_p] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vdot_t] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vdot_q] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vscl_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_s_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vscl_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_s_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vscl_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_s_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vhdp_p] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vhdp_t] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vhdp_q] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcrs_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vdet_p] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcmp_s] = { .operands={RAB_OPERAND_r4000allegrex_vcmp_cond_s_maybe_vs_maybe_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcmp_p] = { .operands={RAB_OPERAND_r4000allegrex_vcmp_cond_p_maybe_vs_maybe_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcmp_t] = { .operands={RAB_OPERAND_r4000allegrex_vcmp_cond_t_maybe_vs_maybe_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcmp_q] = { .operands={RAB_OPERAND_r4000allegrex_vcmp_cond_q_maybe_vs_maybe_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmin_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmin_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmin_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmin_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmax_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmax_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmax_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmax_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vscmp_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vscmp_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vscmp_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vscmp_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsge_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsge_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsge_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsge_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vslt_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vslt_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vslt_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vslt_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vwbn_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_bn}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmov_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmov_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmov_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmov_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vabs_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vabs_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vabs_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vabs_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vneg_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vneg_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vneg_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vneg_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vidt_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vidt_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsat0_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsat0_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsat0_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsat0_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsat1_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsat1_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsat1_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsat1_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vzero_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vzero_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vzero_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vzero_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vone_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vone_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vone_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vone_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrcp_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrcp_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrcp_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrcp_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrsq_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrsq_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrsq_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrsq_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsin_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsin_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsin_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsin_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcos_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcos_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcos_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcos_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vexp2_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vexp2_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vexp2_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vexp2_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vlog2_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vlog2_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vlog2_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vlog2_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsqrt_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsqrt_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsqrt_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsqrt_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vasin_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vasin_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vasin_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vasin_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vnrcp_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vnrcp_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vnrcp_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vnrcp_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vnsin_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vnsin_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vnsin_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vnsin_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrexp2_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrexp2_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrexp2_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrexp2_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrnds_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrndi_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrndi_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrndi_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrndi_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrndf1_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrndf1_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrndf1_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrndf1_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrndf2_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrndf2_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrndf2_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrndf2_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2h_p] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2h_q] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vh2f_s] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vh2f_p] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsbz_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vlgb_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vuc2ifs_s] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vc2i_s] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vus2i_s] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vus2i_p] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vs2i_s] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vs2i_p] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vi2uc_q] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vi2c_q] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vi2us_p] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vi2us_q] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vi2s_p] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vi2s_q] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsrt1_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsrt2_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vbfy1_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vbfy1_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vbfy2_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vocp_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vocp_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vocp_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vocp_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsocp_s] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsocp_p] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vfad_p] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vfad_t] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vfad_q] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vavg_p] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vavg_t] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vavg_q] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsrt3_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsrt4_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsgn_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsgn_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsgn_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsgn_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmfvc] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_cop2cs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmtvc] = { .operands={RAB_OPERAND_r4000allegrex_cop2cd, RAB_OPERAND_r4000allegrex_s_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vt4444_q] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vt5551_q] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vt5650_q] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_q_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcst_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_vconstant}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcst_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_vconstant}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcst_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_vconstant}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcst_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_vconstant}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2in_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2in_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2in_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2in_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2iz_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2iz_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2iz_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2iz_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2iu_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2iu_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2iu_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2iu_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2id_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2id_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2id_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vf2id_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vi2f_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vi2f_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vi2f_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vi2f_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_power_of_two}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcmovt_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_vfpu_cc_bit}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcmovt_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_vfpu_cc_bit}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcmovt_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_vfpu_cc_bit}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcmovt_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_vfpu_cc_bit}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcmovf_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_vfpu_cc_bit}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcmovf_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_vfpu_cc_bit}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcmovf_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_vfpu_cc_bit}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcmovf_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_vfpu_cc_bit}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vpfxs] = { .operands={RAB_OPERAND_r4000allegrex_rpx, RAB_OPERAND_r4000allegrex_rpy, RAB_OPERAND_r4000allegrex_rpz, RAB_OPERAND_r4000allegrex_rpw}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN }, + [RABBITIZER_INSTR_ID_r4000allegrex_vpfxt] = { .operands={RAB_OPERAND_r4000allegrex_rpx, RAB_OPERAND_r4000allegrex_rpy, RAB_OPERAND_r4000allegrex_rpz, RAB_OPERAND_r4000allegrex_rpw}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN }, + [RABBITIZER_INSTR_ID_r4000allegrex_vpfxd] = { .operands={RAB_OPERAND_r4000allegrex_wpx, RAB_OPERAND_r4000allegrex_wpy, RAB_OPERAND_r4000allegrex_wpz, RAB_OPERAND_r4000allegrex_wpw}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN }, + [RABBITIZER_INSTR_ID_r4000allegrex_viim_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vt, RAB_OPERAND_r4000allegrex_int16}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vfim_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vt, RAB_OPERAND_r4000allegrex_float16}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmmul_p] = { .operands={RAB_OPERAND_r4000allegrex_mp_vd, RAB_OPERAND_r4000allegrex_mp_vs_transpose, RAB_OPERAND_r4000allegrex_mp_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmmul_t] = { .operands={RAB_OPERAND_r4000allegrex_mt_vd, RAB_OPERAND_r4000allegrex_mt_vs_transpose, RAB_OPERAND_r4000allegrex_mt_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmmul_q] = { .operands={RAB_OPERAND_r4000allegrex_mq_vd, RAB_OPERAND_r4000allegrex_mq_vs_transpose, RAB_OPERAND_r4000allegrex_mq_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vhtfm2_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_mp_vs, RAB_OPERAND_r4000allegrex_p_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vtfm2_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_mp_vs, RAB_OPERAND_r4000allegrex_p_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vhtfm3_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_mt_vs, RAB_OPERAND_r4000allegrex_t_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vtfm3_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_mt_vs, RAB_OPERAND_r4000allegrex_t_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vhtfm4_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_mq_vs, RAB_OPERAND_r4000allegrex_q_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vtfm4_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_mq_vs, RAB_OPERAND_r4000allegrex_q_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmscl_p] = { .operands={RAB_OPERAND_r4000allegrex_mp_vd, RAB_OPERAND_r4000allegrex_mp_vs, RAB_OPERAND_r4000allegrex_s_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmscl_t] = { .operands={RAB_OPERAND_r4000allegrex_mt_vd, RAB_OPERAND_r4000allegrex_mt_vs, RAB_OPERAND_r4000allegrex_s_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmscl_q] = { .operands={RAB_OPERAND_r4000allegrex_mq_vd, RAB_OPERAND_r4000allegrex_mq_vs, RAB_OPERAND_r4000allegrex_s_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vcrsp_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vqmul_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrot_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_p_vrot_code}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrot_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_t_vrot_code}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vrot_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_q_vrot_code}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmmov_p] = { .operands={RAB_OPERAND_r4000allegrex_mp_vd, RAB_OPERAND_r4000allegrex_mp_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmmov_t] = { .operands={RAB_OPERAND_r4000allegrex_mt_vd, RAB_OPERAND_r4000allegrex_mt_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmmov_q] = { .operands={RAB_OPERAND_r4000allegrex_mq_vd, RAB_OPERAND_r4000allegrex_mq_vs}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmidt_p] = { .operands={RAB_OPERAND_r4000allegrex_mp_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmidt_t] = { .operands={RAB_OPERAND_r4000allegrex_mt_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmidt_q] = { .operands={RAB_OPERAND_r4000allegrex_mq_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmzero_p] = { .operands={RAB_OPERAND_r4000allegrex_mp_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmzero_t] = { .operands={RAB_OPERAND_r4000allegrex_mt_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmzero_q] = { .operands={RAB_OPERAND_r4000allegrex_mq_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmone_p] = { .operands={RAB_OPERAND_r4000allegrex_mp_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmone_t] = { .operands={RAB_OPERAND_r4000allegrex_mt_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vmone_q] = { .operands={RAB_OPERAND_r4000allegrex_mq_vd}, .instrType=RABBITIZER_INSTR_TYPE_R }, + [RABBITIZER_INSTR_ID_r4000allegrex_vnop] = { .operands={0}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN }, + [RABBITIZER_INSTR_ID_r4000allegrex_vsync] = { .operands={0}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN }, + [RABBITIZER_INSTR_ID_r4000allegrex_vflush] = { .operands={0}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN }, + [RABBITIZER_INSTR_ID_r4000allegrex_svl_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vt_imm, RAB_OPERAND_r4000allegrex_offset14_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .readsRs=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_svr_q] = { .operands={RAB_OPERAND_r4000allegrex_q_vt_imm, RAB_OPERAND_r4000allegrex_offset14_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .readsRs=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_00] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_01] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_02] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_03] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_04] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_05] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_06] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_07] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_08] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_09] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_10] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_11] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_12] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_13] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_14] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_15] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_16] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_17] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_18] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_19] = { .operands={0} }, + [RABBITIZER_INSTR_ID_r4000allegrex_MAX] = { .operands={0} }, [RABBITIZER_INSTR_ID_r5900_INVALID] = { .operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_immediate}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN }, [RABBITIZER_INSTR_ID_r5900_lq] = { .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_immediate_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .modifiesRt=true, .readsRs=true, .canBeLo=true, .doesDereference=true, .doesLoad=true }, [RABBITIZER_INSTR_ID_r5900_sq] = { .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_immediate_base}, .instrType=RABBITIZER_INSTR_TYPE_I, .readsRs=true, .readsRt=true, .canBeLo=true, .doesDereference=true, .doesStore=true }, diff --git a/include/generated/InstrIdType_Names_array.h b/include/generated/InstrIdType_Names_array.h index 95d82f33..574a9b82 100644 --- a/include/generated/InstrIdType_Names_array.h +++ b/include/generated/InstrIdType_Names_array.h @@ -40,6 +40,52 @@ const char *RabInstrIdType_Names[] = { [RAB_INSTR_ID_TYPE_R3000GTE_COP1] = "R3000GTE" "_" "COP1", [RAB_INSTR_ID_TYPE_R3000GTE_COP2] = "R3000GTE" "_" "COP2", [RAB_INSTR_ID_TYPE_R3000GTE_COP2_GTE] = "R3000GTE" "_" "COP2_GTE", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_INVALID] = "R4000ALLEGREX" "_" "INVALID", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_NORMAL] = "R4000ALLEGREX" "_" "NORMAL", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL] = "R4000ALLEGREX" "_" "SPECIAL", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL_RS] = "R4000ALLEGREX" "_" "SPECIAL_RS", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL_SA] = "R4000ALLEGREX" "_" "SPECIAL_SA", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_REGIMM] = "R4000ALLEGREX" "_" "REGIMM", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL2] = "R4000ALLEGREX" "_" "SPECIAL2", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL3] = "R4000ALLEGREX" "_" "SPECIAL3", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL3_BSHFL] = "R4000ALLEGREX" "_" "SPECIAL3_BSHFL", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP0] = "R4000ALLEGREX" "_" "COP0", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP0_BC0] = "R4000ALLEGREX" "_" "COP0_BC0", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP0_TLB] = "R4000ALLEGREX" "_" "COP0_TLB", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP1] = "R4000ALLEGREX" "_" "COP1", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP1_BC1] = "R4000ALLEGREX" "_" "COP1_BC1", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP1_FPUS] = "R4000ALLEGREX" "_" "COP1_FPUS", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP1_FPUW] = "R4000ALLEGREX" "_" "COP1_FPUW", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2] = "R4000ALLEGREX" "_" "COP2", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2_BC2] = "R4000ALLEGREX" "_" "COP2_BC2", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2_MFHC2] = "R4000ALLEGREX" "_" "COP2_MFHC2", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2_MFHC2_P] = "R4000ALLEGREX" "_" "COP2_MFHC2_P", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2_MFHC2_P_S] = "R4000ALLEGREX" "_" "COP2_MFHC2_P_S", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2_MTHC2] = "R4000ALLEGREX" "_" "COP2_MTHC2", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU0] = "R4000ALLEGREX" "_" "VFPU0", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU1] = "R4000ALLEGREX" "_" "VFPU1", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU3] = "R4000ALLEGREX" "_" "VFPU3", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4] = "R4000ALLEGREX" "_" "VFPU4", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0] = "R4000ALLEGREX" "_" "VFPU4_FMT0", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_FMT0] = "R4000ALLEGREX" "_" "VFPU4_FMT0_FMT0", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_FMT2] = "R4000ALLEGREX" "_" "VFPU4_FMT0_FMT2", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_FMT3] = "R4000ALLEGREX" "_" "VFPU4_FMT0_FMT3", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_RND] = "R4000ALLEGREX" "_" "VFPU4_FMT0_RND", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_CVTFLT] = "R4000ALLEGREX" "_" "VFPU4_FMT0_CVTFLT", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_CVTINT] = "R4000ALLEGREX" "_" "VFPU4_FMT0_CVTINT", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_FMT8] = "R4000ALLEGREX" "_" "VFPU4_FMT0_FMT8", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_FMT9] = "R4000ALLEGREX" "_" "VFPU4_FMT0_FMT9", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_CONTROL] = "R4000ALLEGREX" "_" "VFPU4_FMT0_CONTROL", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_COLOR] = "R4000ALLEGREX" "_" "VFPU4_FMT0_COLOR", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_CST] = "R4000ALLEGREX" "_" "VFPU4_FMT0_CST", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT2] = "R4000ALLEGREX" "_" "VFPU4_FMT2", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT2_CNDMOVE] = "R4000ALLEGREX" "_" "VFPU4_FMT2_CNDMOVE", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU5] = "R4000ALLEGREX" "_" "VFPU5", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU6] = "R4000ALLEGREX" "_" "VFPU6", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU6_FMT7] = "R4000ALLEGREX" "_" "VFPU6_FMT7", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU6_FMT7_FMT0] = "R4000ALLEGREX" "_" "VFPU6_FMT7_FMT0", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU7] = "R4000ALLEGREX" "_" "VFPU7", + [RAB_INSTR_ID_TYPE_R4000ALLEGREX_QUADLR] = "R4000ALLEGREX" "_" "QUADLR", [RAB_INSTR_ID_TYPE_R5900_INVALID] = "R5900" "_" "INVALID", [RAB_INSTR_ID_TYPE_R5900_NORMAL] = "R5900" "_" "NORMAL", [RAB_INSTR_ID_TYPE_R5900_SPECIAL] = "R5900" "_" "SPECIAL", diff --git a/include/generated/InstrIdType_enum.h b/include/generated/InstrIdType_enum.h index 721e2d5b..04a21191 100644 --- a/include/generated/InstrIdType_enum.h +++ b/include/generated/InstrIdType_enum.h @@ -40,6 +40,52 @@ typedef enum RabInstrIdType { RAB_INSTR_ID_TYPE_R3000GTE_COP1, RAB_INSTR_ID_TYPE_R3000GTE_COP2, RAB_INSTR_ID_TYPE_R3000GTE_COP2_GTE, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_INVALID, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_NORMAL, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL_RS, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL_SA, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_REGIMM, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL2, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL3, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL3_BSHFL, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP0, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP0_BC0, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP0_TLB, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP1, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP1_BC1, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP1_FPUS, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP1_FPUW, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2_BC2, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2_MFHC2, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2_MFHC2_P, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2_MFHC2_P_S, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2_MTHC2, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU0, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU1, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU3, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_FMT0, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_FMT2, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_FMT3, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_RND, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_CVTFLT, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_CVTINT, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_FMT8, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_FMT9, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_CONTROL, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_COLOR, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_CST, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT2, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT2_CNDMOVE, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU5, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU6, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU6_FMT7, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU6_FMT7_FMT0, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU7, + RAB_INSTR_ID_TYPE_R4000ALLEGREX_QUADLR, RAB_INSTR_ID_TYPE_R5900_INVALID, RAB_INSTR_ID_TYPE_R5900_NORMAL, RAB_INSTR_ID_TYPE_R5900_SPECIAL, diff --git a/include/generated/InstrId_Names_array.h b/include/generated/InstrId_Names_array.h index a43c453e..40d39179 100644 --- a/include/generated/InstrId_Names_array.h +++ b/include/generated/InstrId_Names_array.h @@ -460,6 +460,320 @@ const char *RabbitizerInstrId_Names[] = { [RABBITIZER_INSTR_ID_r3000gte_USERDEF_18] = "USERDEF_18", [RABBITIZER_INSTR_ID_r3000gte_USERDEF_19] = "USERDEF_19", [RABBITIZER_INSTR_ID_r3000gte_MAX] = "MAX", + [RABBITIZER_INSTR_ID_r4000allegrex_INVALID] = "INVALID", + [RABBITIZER_INSTR_ID_r4000allegrex_lv_s] = "lv.s", + [RABBITIZER_INSTR_ID_r4000allegrex_sv_s] = "sv.s", + [RABBITIZER_INSTR_ID_r4000allegrex_lv_q] = "lv.q", + [RABBITIZER_INSTR_ID_r4000allegrex_sv_q] = "sv.q", + [RABBITIZER_INSTR_ID_r4000allegrex_clz] = "clz", + [RABBITIZER_INSTR_ID_r4000allegrex_clo] = "clo", + [RABBITIZER_INSTR_ID_r4000allegrex_madd] = "madd", + [RABBITIZER_INSTR_ID_r4000allegrex_maddu] = "maddu", + [RABBITIZER_INSTR_ID_r4000allegrex_msub] = "msub", + [RABBITIZER_INSTR_ID_r4000allegrex_msubu] = "msubu", + [RABBITIZER_INSTR_ID_r4000allegrex_max] = "max", + [RABBITIZER_INSTR_ID_r4000allegrex_min] = "min", + [RABBITIZER_INSTR_ID_r4000allegrex_srl] = "srl", + [RABBITIZER_INSTR_ID_r4000allegrex_rotr] = "rotr", + [RABBITIZER_INSTR_ID_r4000allegrex_srlv] = "srlv", + [RABBITIZER_INSTR_ID_r4000allegrex_rotrv] = "rotrv", + [RABBITIZER_INSTR_ID_r4000allegrex_sleep] = "sleep", + [RABBITIZER_INSTR_ID_r4000allegrex_mfie] = "mfie", + [RABBITIZER_INSTR_ID_r4000allegrex_mtie] = "mtie", + [RABBITIZER_INSTR_ID_r4000allegrex_ext] = "ext", + [RABBITIZER_INSTR_ID_r4000allegrex_ins] = "ins", + [RABBITIZER_INSTR_ID_r4000allegrex_wsbh] = "wsbh", + [RABBITIZER_INSTR_ID_r4000allegrex_wsbw] = "wsbw", + [RABBITIZER_INSTR_ID_r4000allegrex_seb] = "seb", + [RABBITIZER_INSTR_ID_r4000allegrex_seh] = "seh", + [RABBITIZER_INSTR_ID_r4000allegrex_bitrev] = "bitrev", + [RABBITIZER_INSTR_ID_r4000allegrex_bvf] = "bvf", + [RABBITIZER_INSTR_ID_r4000allegrex_bvt] = "bvt", + [RABBITIZER_INSTR_ID_r4000allegrex_bvfl] = "bvfl", + [RABBITIZER_INSTR_ID_r4000allegrex_bvtl] = "bvtl", + [RABBITIZER_INSTR_ID_r4000allegrex_mfv] = "mfv", + [RABBITIZER_INSTR_ID_r4000allegrex_mfvc] = "mfvc", + [RABBITIZER_INSTR_ID_r4000allegrex_vsync2] = "vsync2", + [RABBITIZER_INSTR_ID_r4000allegrex_mtv] = "mtv", + [RABBITIZER_INSTR_ID_r4000allegrex_mtvc] = "mtvc", + [RABBITIZER_INSTR_ID_r4000allegrex_vadd_s] = "vadd.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vadd_p] = "vadd.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vadd_t] = "vadd.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vadd_q] = "vadd.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vsub_s] = "vsub.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vsub_p] = "vsub.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vsub_t] = "vsub.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vsub_q] = "vsub.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vsbn_s] = "vsbn.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vdiv_s] = "vdiv.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vdiv_p] = "vdiv.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vdiv_t] = "vdiv.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vdiv_q] = "vdiv.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vmul_s] = "vmul.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vmul_p] = "vmul.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vmul_t] = "vmul.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vmul_q] = "vmul.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vdot_p] = "vdot.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vdot_t] = "vdot.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vdot_q] = "vdot.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vscl_p] = "vscl.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vscl_t] = "vscl.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vscl_q] = "vscl.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vhdp_p] = "vhdp.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vhdp_t] = "vhdp.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vhdp_q] = "vhdp.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vcrs_t] = "vcrs.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vdet_p] = "vdet.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vcmp_s] = "vcmp.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vcmp_p] = "vcmp.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vcmp_t] = "vcmp.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vcmp_q] = "vcmp.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vmin_s] = "vmin.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vmin_p] = "vmin.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vmin_t] = "vmin.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vmin_q] = "vmin.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vmax_s] = "vmax.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vmax_p] = "vmax.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vmax_t] = "vmax.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vmax_q] = "vmax.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vscmp_s] = "vscmp.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vscmp_p] = "vscmp.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vscmp_t] = "vscmp.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vscmp_q] = "vscmp.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vsge_s] = "vsge.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vsge_p] = "vsge.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vsge_t] = "vsge.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vsge_q] = "vsge.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vslt_s] = "vslt.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vslt_p] = "vslt.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vslt_t] = "vslt.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vslt_q] = "vslt.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vwbn_s] = "vwbn.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vmov_s] = "vmov.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vmov_p] = "vmov.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vmov_t] = "vmov.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vmov_q] = "vmov.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vabs_s] = "vabs.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vabs_p] = "vabs.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vabs_t] = "vabs.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vabs_q] = "vabs.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vneg_s] = "vneg.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vneg_p] = "vneg.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vneg_t] = "vneg.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vneg_q] = "vneg.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vidt_p] = "vidt.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vidt_q] = "vidt.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vsat0_s] = "vsat0.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vsat0_p] = "vsat0.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vsat0_t] = "vsat0.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vsat0_q] = "vsat0.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vsat1_s] = "vsat1.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vsat1_p] = "vsat1.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vsat1_t] = "vsat1.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vsat1_q] = "vsat1.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vzero_s] = "vzero.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vzero_p] = "vzero.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vzero_t] = "vzero.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vzero_q] = "vzero.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vone_s] = "vone.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vone_p] = "vone.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vone_t] = "vone.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vone_q] = "vone.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vrcp_s] = "vrcp.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vrcp_p] = "vrcp.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vrcp_t] = "vrcp.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vrcp_q] = "vrcp.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vrsq_s] = "vrsq.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vrsq_p] = "vrsq.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vrsq_t] = "vrsq.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vrsq_q] = "vrsq.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vsin_s] = "vsin.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vsin_p] = "vsin.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vsin_t] = "vsin.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vsin_q] = "vsin.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vcos_s] = "vcos.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vcos_p] = "vcos.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vcos_t] = "vcos.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vcos_q] = "vcos.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vexp2_s] = "vexp2.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vexp2_p] = "vexp2.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vexp2_t] = "vexp2.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vexp2_q] = "vexp2.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vlog2_s] = "vlog2.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vlog2_p] = "vlog2.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vlog2_t] = "vlog2.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vlog2_q] = "vlog2.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vsqrt_s] = "vsqrt.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vsqrt_p] = "vsqrt.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vsqrt_t] = "vsqrt.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vsqrt_q] = "vsqrt.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vasin_s] = "vasin.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vasin_p] = "vasin.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vasin_t] = "vasin.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vasin_q] = "vasin.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vnrcp_s] = "vnrcp.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vnrcp_p] = "vnrcp.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vnrcp_t] = "vnrcp.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vnrcp_q] = "vnrcp.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vnsin_s] = "vnsin.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vnsin_p] = "vnsin.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vnsin_t] = "vnsin.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vnsin_q] = "vnsin.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vrexp2_s] = "vrexp2.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vrexp2_p] = "vrexp2.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vrexp2_t] = "vrexp2.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vrexp2_q] = "vrexp2.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vrnds_s] = "vrnds.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vrndi_s] = "vrndi.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vrndi_p] = "vrndi.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vrndi_t] = "vrndi.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vrndi_q] = "vrndi.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vrndf1_s] = "vrndf1.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vrndf1_p] = "vrndf1.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vrndf1_t] = "vrndf1.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vrndf1_q] = "vrndf1.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vrndf2_s] = "vrndf2.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vrndf2_p] = "vrndf2.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vrndf2_t] = "vrndf2.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vrndf2_q] = "vrndf2.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2h_p] = "vf2h.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2h_q] = "vf2h.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vh2f_s] = "vh2f.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vh2f_p] = "vh2f.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vsbz_s] = "vsbz.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vlgb_s] = "vlgb.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vuc2ifs_s] = "vuc2ifs.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vc2i_s] = "vc2i.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vus2i_s] = "vus2i.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vus2i_p] = "vus2i.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vs2i_s] = "vs2i.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vs2i_p] = "vs2i.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vi2uc_q] = "vi2uc.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vi2c_q] = "vi2c.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vi2us_p] = "vi2us.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vi2us_q] = "vi2us.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vi2s_p] = "vi2s.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vi2s_q] = "vi2s.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vsrt1_q] = "vsrt1.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vsrt2_q] = "vsrt2.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vbfy1_p] = "vbfy1.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vbfy1_q] = "vbfy1.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vbfy2_q] = "vbfy2.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vocp_s] = "vocp.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vocp_p] = "vocp.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vocp_t] = "vocp.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vocp_q] = "vocp.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vsocp_s] = "vsocp.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vsocp_p] = "vsocp.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vfad_p] = "vfad.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vfad_t] = "vfad.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vfad_q] = "vfad.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vavg_p] = "vavg.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vavg_t] = "vavg.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vavg_q] = "vavg.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vsrt3_q] = "vsrt3.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vsrt4_q] = "vsrt4.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vsgn_s] = "vsgn.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vsgn_p] = "vsgn.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vsgn_t] = "vsgn.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vsgn_q] = "vsgn.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vmfvc] = "vmfvc", + [RABBITIZER_INSTR_ID_r4000allegrex_vmtvc] = "vmtvc", + [RABBITIZER_INSTR_ID_r4000allegrex_vt4444_q] = "vt4444.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vt5551_q] = "vt5551.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vt5650_q] = "vt5650.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vcst_s] = "vcst.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vcst_p] = "vcst.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vcst_t] = "vcst.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vcst_q] = "vcst.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2in_s] = "vf2in.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2in_p] = "vf2in.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2in_t] = "vf2in.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2in_q] = "vf2in.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2iz_s] = "vf2iz.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2iz_p] = "vf2iz.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2iz_t] = "vf2iz.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2iz_q] = "vf2iz.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2iu_s] = "vf2iu.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2iu_p] = "vf2iu.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2iu_t] = "vf2iu.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2iu_q] = "vf2iu.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2id_s] = "vf2id.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2id_p] = "vf2id.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2id_t] = "vf2id.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vf2id_q] = "vf2id.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vi2f_s] = "vi2f.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vi2f_p] = "vi2f.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vi2f_t] = "vi2f.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vi2f_q] = "vi2f.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vcmovt_s] = "vcmovt.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vcmovt_p] = "vcmovt.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vcmovt_t] = "vcmovt.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vcmovt_q] = "vcmovt.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vcmovf_s] = "vcmovf.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vcmovf_p] = "vcmovf.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vcmovf_t] = "vcmovf.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vcmovf_q] = "vcmovf.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vpfxs] = "vpfxs", + [RABBITIZER_INSTR_ID_r4000allegrex_vpfxt] = "vpfxt", + [RABBITIZER_INSTR_ID_r4000allegrex_vpfxd] = "vpfxd", + [RABBITIZER_INSTR_ID_r4000allegrex_viim_s] = "viim.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vfim_s] = "vfim.s", + [RABBITIZER_INSTR_ID_r4000allegrex_vmmul_p] = "vmmul.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vmmul_t] = "vmmul.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vmmul_q] = "vmmul.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vhtfm2_p] = "vhtfm2.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vtfm2_p] = "vtfm2.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vhtfm3_t] = "vhtfm3.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vtfm3_t] = "vtfm3.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vhtfm4_q] = "vhtfm4.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vtfm4_q] = "vtfm4.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vmscl_p] = "vmscl.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vmscl_t] = "vmscl.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vmscl_q] = "vmscl.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vcrsp_t] = "vcrsp.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vqmul_q] = "vqmul.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vrot_p] = "vrot.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vrot_t] = "vrot.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vrot_q] = "vrot.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vmmov_p] = "vmmov.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vmmov_t] = "vmmov.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vmmov_q] = "vmmov.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vmidt_p] = "vmidt.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vmidt_t] = "vmidt.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vmidt_q] = "vmidt.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vmzero_p] = "vmzero.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vmzero_t] = "vmzero.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vmzero_q] = "vmzero.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vmone_p] = "vmone.p", + [RABBITIZER_INSTR_ID_r4000allegrex_vmone_t] = "vmone.t", + [RABBITIZER_INSTR_ID_r4000allegrex_vmone_q] = "vmone.q", + [RABBITIZER_INSTR_ID_r4000allegrex_vnop] = "vnop", + [RABBITIZER_INSTR_ID_r4000allegrex_vsync] = "vsync", + [RABBITIZER_INSTR_ID_r4000allegrex_vflush] = "vflush", + [RABBITIZER_INSTR_ID_r4000allegrex_svl_q] = "svl.q", + [RABBITIZER_INSTR_ID_r4000allegrex_svr_q] = "svr.q", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_00] = "USERDEF_00", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_01] = "USERDEF_01", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_02] = "USERDEF_02", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_03] = "USERDEF_03", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_04] = "USERDEF_04", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_05] = "USERDEF_05", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_06] = "USERDEF_06", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_07] = "USERDEF_07", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_08] = "USERDEF_08", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_09] = "USERDEF_09", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_10] = "USERDEF_10", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_11] = "USERDEF_11", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_12] = "USERDEF_12", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_13] = "USERDEF_13", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_14] = "USERDEF_14", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_15] = "USERDEF_15", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_16] = "USERDEF_16", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_17] = "USERDEF_17", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_18] = "USERDEF_18", + [RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_19] = "USERDEF_19", + [RABBITIZER_INSTR_ID_r4000allegrex_MAX] = "MAX", [RABBITIZER_INSTR_ID_r5900_INVALID] = "INVALID", [RABBITIZER_INSTR_ID_r5900_lq] = "lq", [RABBITIZER_INSTR_ID_r5900_sq] = "sq", diff --git a/include/generated/InstrId_enum.h b/include/generated/InstrId_enum.h index 8135e7a7..c46e4d6f 100644 --- a/include/generated/InstrId_enum.h +++ b/include/generated/InstrId_enum.h @@ -460,6 +460,320 @@ typedef enum RabbitizerInstrId { RABBITIZER_INSTR_ID_r3000gte_USERDEF_18, RABBITIZER_INSTR_ID_r3000gte_USERDEF_19, RABBITIZER_INSTR_ID_r3000gte_MAX, + RABBITIZER_INSTR_ID_r4000allegrex_INVALID, + RABBITIZER_INSTR_ID_r4000allegrex_lv_s, + RABBITIZER_INSTR_ID_r4000allegrex_sv_s, + RABBITIZER_INSTR_ID_r4000allegrex_lv_q, + RABBITIZER_INSTR_ID_r4000allegrex_sv_q, + RABBITIZER_INSTR_ID_r4000allegrex_clz, + RABBITIZER_INSTR_ID_r4000allegrex_clo, + RABBITIZER_INSTR_ID_r4000allegrex_madd, + RABBITIZER_INSTR_ID_r4000allegrex_maddu, + RABBITIZER_INSTR_ID_r4000allegrex_msub, + RABBITIZER_INSTR_ID_r4000allegrex_msubu, + RABBITIZER_INSTR_ID_r4000allegrex_max, + RABBITIZER_INSTR_ID_r4000allegrex_min, + RABBITIZER_INSTR_ID_r4000allegrex_srl, + RABBITIZER_INSTR_ID_r4000allegrex_rotr, + RABBITIZER_INSTR_ID_r4000allegrex_srlv, + RABBITIZER_INSTR_ID_r4000allegrex_rotrv, + RABBITIZER_INSTR_ID_r4000allegrex_sleep, + RABBITIZER_INSTR_ID_r4000allegrex_mfie, + RABBITIZER_INSTR_ID_r4000allegrex_mtie, + RABBITIZER_INSTR_ID_r4000allegrex_ext, + RABBITIZER_INSTR_ID_r4000allegrex_ins, + RABBITIZER_INSTR_ID_r4000allegrex_wsbh, + RABBITIZER_INSTR_ID_r4000allegrex_wsbw, + RABBITIZER_INSTR_ID_r4000allegrex_seb, + RABBITIZER_INSTR_ID_r4000allegrex_seh, + RABBITIZER_INSTR_ID_r4000allegrex_bitrev, + RABBITIZER_INSTR_ID_r4000allegrex_bvf, + RABBITIZER_INSTR_ID_r4000allegrex_bvt, + RABBITIZER_INSTR_ID_r4000allegrex_bvfl, + RABBITIZER_INSTR_ID_r4000allegrex_bvtl, + RABBITIZER_INSTR_ID_r4000allegrex_mfv, + RABBITIZER_INSTR_ID_r4000allegrex_mfvc, + RABBITIZER_INSTR_ID_r4000allegrex_vsync2, + RABBITIZER_INSTR_ID_r4000allegrex_mtv, + RABBITIZER_INSTR_ID_r4000allegrex_mtvc, + RABBITIZER_INSTR_ID_r4000allegrex_vadd_s, + RABBITIZER_INSTR_ID_r4000allegrex_vadd_p, + RABBITIZER_INSTR_ID_r4000allegrex_vadd_t, + RABBITIZER_INSTR_ID_r4000allegrex_vadd_q, + RABBITIZER_INSTR_ID_r4000allegrex_vsub_s, + RABBITIZER_INSTR_ID_r4000allegrex_vsub_p, + RABBITIZER_INSTR_ID_r4000allegrex_vsub_t, + RABBITIZER_INSTR_ID_r4000allegrex_vsub_q, + RABBITIZER_INSTR_ID_r4000allegrex_vsbn_s, + RABBITIZER_INSTR_ID_r4000allegrex_vdiv_s, + RABBITIZER_INSTR_ID_r4000allegrex_vdiv_p, + RABBITIZER_INSTR_ID_r4000allegrex_vdiv_t, + RABBITIZER_INSTR_ID_r4000allegrex_vdiv_q, + RABBITIZER_INSTR_ID_r4000allegrex_vmul_s, + RABBITIZER_INSTR_ID_r4000allegrex_vmul_p, + RABBITIZER_INSTR_ID_r4000allegrex_vmul_t, + RABBITIZER_INSTR_ID_r4000allegrex_vmul_q, + RABBITIZER_INSTR_ID_r4000allegrex_vdot_p, + RABBITIZER_INSTR_ID_r4000allegrex_vdot_t, + RABBITIZER_INSTR_ID_r4000allegrex_vdot_q, + RABBITIZER_INSTR_ID_r4000allegrex_vscl_p, + RABBITIZER_INSTR_ID_r4000allegrex_vscl_t, + RABBITIZER_INSTR_ID_r4000allegrex_vscl_q, + RABBITIZER_INSTR_ID_r4000allegrex_vhdp_p, + RABBITIZER_INSTR_ID_r4000allegrex_vhdp_t, + RABBITIZER_INSTR_ID_r4000allegrex_vhdp_q, + RABBITIZER_INSTR_ID_r4000allegrex_vcrs_t, + RABBITIZER_INSTR_ID_r4000allegrex_vdet_p, + RABBITIZER_INSTR_ID_r4000allegrex_vcmp_s, + RABBITIZER_INSTR_ID_r4000allegrex_vcmp_p, + RABBITIZER_INSTR_ID_r4000allegrex_vcmp_t, + RABBITIZER_INSTR_ID_r4000allegrex_vcmp_q, + RABBITIZER_INSTR_ID_r4000allegrex_vmin_s, + RABBITIZER_INSTR_ID_r4000allegrex_vmin_p, + RABBITIZER_INSTR_ID_r4000allegrex_vmin_t, + RABBITIZER_INSTR_ID_r4000allegrex_vmin_q, + RABBITIZER_INSTR_ID_r4000allegrex_vmax_s, + RABBITIZER_INSTR_ID_r4000allegrex_vmax_p, + RABBITIZER_INSTR_ID_r4000allegrex_vmax_t, + RABBITIZER_INSTR_ID_r4000allegrex_vmax_q, + RABBITIZER_INSTR_ID_r4000allegrex_vscmp_s, + RABBITIZER_INSTR_ID_r4000allegrex_vscmp_p, + RABBITIZER_INSTR_ID_r4000allegrex_vscmp_t, + RABBITIZER_INSTR_ID_r4000allegrex_vscmp_q, + RABBITIZER_INSTR_ID_r4000allegrex_vsge_s, + RABBITIZER_INSTR_ID_r4000allegrex_vsge_p, + RABBITIZER_INSTR_ID_r4000allegrex_vsge_t, + RABBITIZER_INSTR_ID_r4000allegrex_vsge_q, + RABBITIZER_INSTR_ID_r4000allegrex_vslt_s, + RABBITIZER_INSTR_ID_r4000allegrex_vslt_p, + RABBITIZER_INSTR_ID_r4000allegrex_vslt_t, + RABBITIZER_INSTR_ID_r4000allegrex_vslt_q, + RABBITIZER_INSTR_ID_r4000allegrex_vwbn_s, + RABBITIZER_INSTR_ID_r4000allegrex_vmov_s, + RABBITIZER_INSTR_ID_r4000allegrex_vmov_p, + RABBITIZER_INSTR_ID_r4000allegrex_vmov_t, + RABBITIZER_INSTR_ID_r4000allegrex_vmov_q, + RABBITIZER_INSTR_ID_r4000allegrex_vabs_s, + RABBITIZER_INSTR_ID_r4000allegrex_vabs_p, + RABBITIZER_INSTR_ID_r4000allegrex_vabs_t, + RABBITIZER_INSTR_ID_r4000allegrex_vabs_q, + RABBITIZER_INSTR_ID_r4000allegrex_vneg_s, + RABBITIZER_INSTR_ID_r4000allegrex_vneg_p, + RABBITIZER_INSTR_ID_r4000allegrex_vneg_t, + RABBITIZER_INSTR_ID_r4000allegrex_vneg_q, + RABBITIZER_INSTR_ID_r4000allegrex_vidt_p, + RABBITIZER_INSTR_ID_r4000allegrex_vidt_q, + RABBITIZER_INSTR_ID_r4000allegrex_vsat0_s, + RABBITIZER_INSTR_ID_r4000allegrex_vsat0_p, + RABBITIZER_INSTR_ID_r4000allegrex_vsat0_t, + RABBITIZER_INSTR_ID_r4000allegrex_vsat0_q, + RABBITIZER_INSTR_ID_r4000allegrex_vsat1_s, + RABBITIZER_INSTR_ID_r4000allegrex_vsat1_p, + RABBITIZER_INSTR_ID_r4000allegrex_vsat1_t, + RABBITIZER_INSTR_ID_r4000allegrex_vsat1_q, + RABBITIZER_INSTR_ID_r4000allegrex_vzero_s, + RABBITIZER_INSTR_ID_r4000allegrex_vzero_p, + RABBITIZER_INSTR_ID_r4000allegrex_vzero_t, + RABBITIZER_INSTR_ID_r4000allegrex_vzero_q, + RABBITIZER_INSTR_ID_r4000allegrex_vone_s, + RABBITIZER_INSTR_ID_r4000allegrex_vone_p, + RABBITIZER_INSTR_ID_r4000allegrex_vone_t, + RABBITIZER_INSTR_ID_r4000allegrex_vone_q, + RABBITIZER_INSTR_ID_r4000allegrex_vrcp_s, + RABBITIZER_INSTR_ID_r4000allegrex_vrcp_p, + RABBITIZER_INSTR_ID_r4000allegrex_vrcp_t, + RABBITIZER_INSTR_ID_r4000allegrex_vrcp_q, + RABBITIZER_INSTR_ID_r4000allegrex_vrsq_s, + RABBITIZER_INSTR_ID_r4000allegrex_vrsq_p, + RABBITIZER_INSTR_ID_r4000allegrex_vrsq_t, + RABBITIZER_INSTR_ID_r4000allegrex_vrsq_q, + RABBITIZER_INSTR_ID_r4000allegrex_vsin_s, + RABBITIZER_INSTR_ID_r4000allegrex_vsin_p, + RABBITIZER_INSTR_ID_r4000allegrex_vsin_t, + RABBITIZER_INSTR_ID_r4000allegrex_vsin_q, + RABBITIZER_INSTR_ID_r4000allegrex_vcos_s, + RABBITIZER_INSTR_ID_r4000allegrex_vcos_p, + RABBITIZER_INSTR_ID_r4000allegrex_vcos_t, + RABBITIZER_INSTR_ID_r4000allegrex_vcos_q, + RABBITIZER_INSTR_ID_r4000allegrex_vexp2_s, + RABBITIZER_INSTR_ID_r4000allegrex_vexp2_p, + RABBITIZER_INSTR_ID_r4000allegrex_vexp2_t, + RABBITIZER_INSTR_ID_r4000allegrex_vexp2_q, + RABBITIZER_INSTR_ID_r4000allegrex_vlog2_s, + RABBITIZER_INSTR_ID_r4000allegrex_vlog2_p, + RABBITIZER_INSTR_ID_r4000allegrex_vlog2_t, + RABBITIZER_INSTR_ID_r4000allegrex_vlog2_q, + RABBITIZER_INSTR_ID_r4000allegrex_vsqrt_s, + RABBITIZER_INSTR_ID_r4000allegrex_vsqrt_p, + RABBITIZER_INSTR_ID_r4000allegrex_vsqrt_t, + RABBITIZER_INSTR_ID_r4000allegrex_vsqrt_q, + RABBITIZER_INSTR_ID_r4000allegrex_vasin_s, + RABBITIZER_INSTR_ID_r4000allegrex_vasin_p, + RABBITIZER_INSTR_ID_r4000allegrex_vasin_t, + RABBITIZER_INSTR_ID_r4000allegrex_vasin_q, + RABBITIZER_INSTR_ID_r4000allegrex_vnrcp_s, + RABBITIZER_INSTR_ID_r4000allegrex_vnrcp_p, + RABBITIZER_INSTR_ID_r4000allegrex_vnrcp_t, + RABBITIZER_INSTR_ID_r4000allegrex_vnrcp_q, + RABBITIZER_INSTR_ID_r4000allegrex_vnsin_s, + RABBITIZER_INSTR_ID_r4000allegrex_vnsin_p, + RABBITIZER_INSTR_ID_r4000allegrex_vnsin_t, + RABBITIZER_INSTR_ID_r4000allegrex_vnsin_q, + RABBITIZER_INSTR_ID_r4000allegrex_vrexp2_s, + RABBITIZER_INSTR_ID_r4000allegrex_vrexp2_p, + RABBITIZER_INSTR_ID_r4000allegrex_vrexp2_t, + RABBITIZER_INSTR_ID_r4000allegrex_vrexp2_q, + RABBITIZER_INSTR_ID_r4000allegrex_vrnds_s, + RABBITIZER_INSTR_ID_r4000allegrex_vrndi_s, + RABBITIZER_INSTR_ID_r4000allegrex_vrndi_p, + RABBITIZER_INSTR_ID_r4000allegrex_vrndi_t, + RABBITIZER_INSTR_ID_r4000allegrex_vrndi_q, + RABBITIZER_INSTR_ID_r4000allegrex_vrndf1_s, + RABBITIZER_INSTR_ID_r4000allegrex_vrndf1_p, + RABBITIZER_INSTR_ID_r4000allegrex_vrndf1_t, + RABBITIZER_INSTR_ID_r4000allegrex_vrndf1_q, + RABBITIZER_INSTR_ID_r4000allegrex_vrndf2_s, + RABBITIZER_INSTR_ID_r4000allegrex_vrndf2_p, + RABBITIZER_INSTR_ID_r4000allegrex_vrndf2_t, + RABBITIZER_INSTR_ID_r4000allegrex_vrndf2_q, + RABBITIZER_INSTR_ID_r4000allegrex_vf2h_p, + RABBITIZER_INSTR_ID_r4000allegrex_vf2h_q, + RABBITIZER_INSTR_ID_r4000allegrex_vh2f_s, + RABBITIZER_INSTR_ID_r4000allegrex_vh2f_p, + RABBITIZER_INSTR_ID_r4000allegrex_vsbz_s, + RABBITIZER_INSTR_ID_r4000allegrex_vlgb_s, + RABBITIZER_INSTR_ID_r4000allegrex_vuc2ifs_s, + RABBITIZER_INSTR_ID_r4000allegrex_vc2i_s, + RABBITIZER_INSTR_ID_r4000allegrex_vus2i_s, + RABBITIZER_INSTR_ID_r4000allegrex_vus2i_p, + RABBITIZER_INSTR_ID_r4000allegrex_vs2i_s, + RABBITIZER_INSTR_ID_r4000allegrex_vs2i_p, + RABBITIZER_INSTR_ID_r4000allegrex_vi2uc_q, + RABBITIZER_INSTR_ID_r4000allegrex_vi2c_q, + RABBITIZER_INSTR_ID_r4000allegrex_vi2us_p, + RABBITIZER_INSTR_ID_r4000allegrex_vi2us_q, + RABBITIZER_INSTR_ID_r4000allegrex_vi2s_p, + RABBITIZER_INSTR_ID_r4000allegrex_vi2s_q, + RABBITIZER_INSTR_ID_r4000allegrex_vsrt1_q, + RABBITIZER_INSTR_ID_r4000allegrex_vsrt2_q, + RABBITIZER_INSTR_ID_r4000allegrex_vbfy1_p, + RABBITIZER_INSTR_ID_r4000allegrex_vbfy1_q, + RABBITIZER_INSTR_ID_r4000allegrex_vbfy2_q, + RABBITIZER_INSTR_ID_r4000allegrex_vocp_s, + RABBITIZER_INSTR_ID_r4000allegrex_vocp_p, + RABBITIZER_INSTR_ID_r4000allegrex_vocp_t, + RABBITIZER_INSTR_ID_r4000allegrex_vocp_q, + RABBITIZER_INSTR_ID_r4000allegrex_vsocp_s, + RABBITIZER_INSTR_ID_r4000allegrex_vsocp_p, + RABBITIZER_INSTR_ID_r4000allegrex_vfad_p, + RABBITIZER_INSTR_ID_r4000allegrex_vfad_t, + RABBITIZER_INSTR_ID_r4000allegrex_vfad_q, + RABBITIZER_INSTR_ID_r4000allegrex_vavg_p, + RABBITIZER_INSTR_ID_r4000allegrex_vavg_t, + RABBITIZER_INSTR_ID_r4000allegrex_vavg_q, + RABBITIZER_INSTR_ID_r4000allegrex_vsrt3_q, + RABBITIZER_INSTR_ID_r4000allegrex_vsrt4_q, + RABBITIZER_INSTR_ID_r4000allegrex_vsgn_s, + RABBITIZER_INSTR_ID_r4000allegrex_vsgn_p, + RABBITIZER_INSTR_ID_r4000allegrex_vsgn_t, + RABBITIZER_INSTR_ID_r4000allegrex_vsgn_q, + RABBITIZER_INSTR_ID_r4000allegrex_vmfvc, + RABBITIZER_INSTR_ID_r4000allegrex_vmtvc, + RABBITIZER_INSTR_ID_r4000allegrex_vt4444_q, + RABBITIZER_INSTR_ID_r4000allegrex_vt5551_q, + RABBITIZER_INSTR_ID_r4000allegrex_vt5650_q, + RABBITIZER_INSTR_ID_r4000allegrex_vcst_s, + RABBITIZER_INSTR_ID_r4000allegrex_vcst_p, + RABBITIZER_INSTR_ID_r4000allegrex_vcst_t, + RABBITIZER_INSTR_ID_r4000allegrex_vcst_q, + RABBITIZER_INSTR_ID_r4000allegrex_vf2in_s, + RABBITIZER_INSTR_ID_r4000allegrex_vf2in_p, + RABBITIZER_INSTR_ID_r4000allegrex_vf2in_t, + RABBITIZER_INSTR_ID_r4000allegrex_vf2in_q, + RABBITIZER_INSTR_ID_r4000allegrex_vf2iz_s, + RABBITIZER_INSTR_ID_r4000allegrex_vf2iz_p, + RABBITIZER_INSTR_ID_r4000allegrex_vf2iz_t, + RABBITIZER_INSTR_ID_r4000allegrex_vf2iz_q, + RABBITIZER_INSTR_ID_r4000allegrex_vf2iu_s, + RABBITIZER_INSTR_ID_r4000allegrex_vf2iu_p, + RABBITIZER_INSTR_ID_r4000allegrex_vf2iu_t, + RABBITIZER_INSTR_ID_r4000allegrex_vf2iu_q, + RABBITIZER_INSTR_ID_r4000allegrex_vf2id_s, + RABBITIZER_INSTR_ID_r4000allegrex_vf2id_p, + RABBITIZER_INSTR_ID_r4000allegrex_vf2id_t, + RABBITIZER_INSTR_ID_r4000allegrex_vf2id_q, + RABBITIZER_INSTR_ID_r4000allegrex_vi2f_s, + RABBITIZER_INSTR_ID_r4000allegrex_vi2f_p, + RABBITIZER_INSTR_ID_r4000allegrex_vi2f_t, + RABBITIZER_INSTR_ID_r4000allegrex_vi2f_q, + RABBITIZER_INSTR_ID_r4000allegrex_vcmovt_s, + RABBITIZER_INSTR_ID_r4000allegrex_vcmovt_p, + RABBITIZER_INSTR_ID_r4000allegrex_vcmovt_t, + RABBITIZER_INSTR_ID_r4000allegrex_vcmovt_q, + RABBITIZER_INSTR_ID_r4000allegrex_vcmovf_s, + RABBITIZER_INSTR_ID_r4000allegrex_vcmovf_p, + RABBITIZER_INSTR_ID_r4000allegrex_vcmovf_t, + RABBITIZER_INSTR_ID_r4000allegrex_vcmovf_q, + RABBITIZER_INSTR_ID_r4000allegrex_vpfxs, + RABBITIZER_INSTR_ID_r4000allegrex_vpfxt, + RABBITIZER_INSTR_ID_r4000allegrex_vpfxd, + RABBITIZER_INSTR_ID_r4000allegrex_viim_s, + RABBITIZER_INSTR_ID_r4000allegrex_vfim_s, + RABBITIZER_INSTR_ID_r4000allegrex_vmmul_p, + RABBITIZER_INSTR_ID_r4000allegrex_vmmul_t, + RABBITIZER_INSTR_ID_r4000allegrex_vmmul_q, + RABBITIZER_INSTR_ID_r4000allegrex_vhtfm2_p, + RABBITIZER_INSTR_ID_r4000allegrex_vtfm2_p, + RABBITIZER_INSTR_ID_r4000allegrex_vhtfm3_t, + RABBITIZER_INSTR_ID_r4000allegrex_vtfm3_t, + RABBITIZER_INSTR_ID_r4000allegrex_vhtfm4_q, + RABBITIZER_INSTR_ID_r4000allegrex_vtfm4_q, + RABBITIZER_INSTR_ID_r4000allegrex_vmscl_p, + RABBITIZER_INSTR_ID_r4000allegrex_vmscl_t, + RABBITIZER_INSTR_ID_r4000allegrex_vmscl_q, + RABBITIZER_INSTR_ID_r4000allegrex_vcrsp_t, + RABBITIZER_INSTR_ID_r4000allegrex_vqmul_q, + RABBITIZER_INSTR_ID_r4000allegrex_vrot_p, + RABBITIZER_INSTR_ID_r4000allegrex_vrot_t, + RABBITIZER_INSTR_ID_r4000allegrex_vrot_q, + RABBITIZER_INSTR_ID_r4000allegrex_vmmov_p, + RABBITIZER_INSTR_ID_r4000allegrex_vmmov_t, + RABBITIZER_INSTR_ID_r4000allegrex_vmmov_q, + RABBITIZER_INSTR_ID_r4000allegrex_vmidt_p, + RABBITIZER_INSTR_ID_r4000allegrex_vmidt_t, + RABBITIZER_INSTR_ID_r4000allegrex_vmidt_q, + RABBITIZER_INSTR_ID_r4000allegrex_vmzero_p, + RABBITIZER_INSTR_ID_r4000allegrex_vmzero_t, + RABBITIZER_INSTR_ID_r4000allegrex_vmzero_q, + RABBITIZER_INSTR_ID_r4000allegrex_vmone_p, + RABBITIZER_INSTR_ID_r4000allegrex_vmone_t, + RABBITIZER_INSTR_ID_r4000allegrex_vmone_q, + RABBITIZER_INSTR_ID_r4000allegrex_vnop, + RABBITIZER_INSTR_ID_r4000allegrex_vsync, + RABBITIZER_INSTR_ID_r4000allegrex_vflush, + RABBITIZER_INSTR_ID_r4000allegrex_svl_q, + RABBITIZER_INSTR_ID_r4000allegrex_svr_q, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_00, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_01, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_02, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_03, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_04, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_05, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_06, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_07, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_08, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_09, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_10, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_11, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_12, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_13, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_14, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_15, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_16, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_17, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_18, + RABBITIZER_INSTR_ID_r4000allegrex_USERDEF_19, + RABBITIZER_INSTR_ID_r4000allegrex_MAX, RABBITIZER_INSTR_ID_r5900_INVALID, RABBITIZER_INSTR_ID_r5900_lq, RABBITIZER_INSTR_ID_r5900_sq, @@ -734,7 +1048,8 @@ typedef enum RabbitizerInstrId { RABBITIZER_INSTR_ID_r5900_USERDEF_18, RABBITIZER_INSTR_ID_r5900_USERDEF_19, RABBITIZER_INSTR_ID_r5900_MAX, - RABBITIZER_INSTR_ID_ALL_MAX = RABBITIZER_INSTR_ID_r5900_MAX, + RABBITIZER_INSTR_ID_ALL_LAST, + RABBITIZER_INSTR_ID_ALL_MAX = RABBITIZER_INSTR_ID_ALL_LAST - 1 } RabbitizerInstrId; #endif diff --git a/include/generated/OperandType_enum.h b/include/generated/OperandType_enum.h index 40859853..5f05de87 100644 --- a/include/generated/OperandType_enum.h +++ b/include/generated/OperandType_enum.h @@ -52,6 +52,63 @@ typedef enum RabbitizerOperandType { RAB_OPERAND_r3000gte_v, RAB_OPERAND_r3000gte_cv, RAB_OPERAND_r3000gte_lm, + RAB_OPERAND_r4000allegrex_s_vs, + RAB_OPERAND_r4000allegrex_s_vt, + RAB_OPERAND_r4000allegrex_s_vd, + RAB_OPERAND_r4000allegrex_s_vt_imm, + RAB_OPERAND_r4000allegrex_s_vd_imm, + RAB_OPERAND_r4000allegrex_p_vs, + RAB_OPERAND_r4000allegrex_p_vt, + RAB_OPERAND_r4000allegrex_p_vd, + RAB_OPERAND_r4000allegrex_t_vs, + RAB_OPERAND_r4000allegrex_t_vt, + RAB_OPERAND_r4000allegrex_t_vd, + RAB_OPERAND_r4000allegrex_q_vs, + RAB_OPERAND_r4000allegrex_q_vt, + RAB_OPERAND_r4000allegrex_q_vd, + RAB_OPERAND_r4000allegrex_q_vt_imm, + RAB_OPERAND_r4000allegrex_mp_vs, + RAB_OPERAND_r4000allegrex_mp_vt, + RAB_OPERAND_r4000allegrex_mp_vd, + RAB_OPERAND_r4000allegrex_mp_vs_transpose, + RAB_OPERAND_r4000allegrex_mt_vs, + RAB_OPERAND_r4000allegrex_mt_vt, + RAB_OPERAND_r4000allegrex_mt_vd, + RAB_OPERAND_r4000allegrex_mt_vs_transpose, + RAB_OPERAND_r4000allegrex_mq_vs, + RAB_OPERAND_r4000allegrex_mq_vt, + RAB_OPERAND_r4000allegrex_mq_vd, + RAB_OPERAND_r4000allegrex_mq_vs_transpose, + RAB_OPERAND_r4000allegrex_cop2cs, + RAB_OPERAND_r4000allegrex_cop2cd, + RAB_OPERAND_r4000allegrex_pos, + RAB_OPERAND_r4000allegrex_size, + RAB_OPERAND_r4000allegrex_size_plus_pos, + RAB_OPERAND_r4000allegrex_imm3, + RAB_OPERAND_r4000allegrex_offset14_base, + RAB_OPERAND_r4000allegrex_offset14_base_maybe_wb, + RAB_OPERAND_r4000allegrex_vcmp_cond, + RAB_OPERAND_r4000allegrex_vcmp_cond_s_maybe_vs_maybe_vt, + RAB_OPERAND_r4000allegrex_vcmp_cond_p_maybe_vs_maybe_vt, + RAB_OPERAND_r4000allegrex_vcmp_cond_t_maybe_vs_maybe_vt, + RAB_OPERAND_r4000allegrex_vcmp_cond_q_maybe_vs_maybe_vt, + RAB_OPERAND_r4000allegrex_vconstant, + RAB_OPERAND_r4000allegrex_power_of_two, + RAB_OPERAND_r4000allegrex_vfpu_cc_bit, + RAB_OPERAND_r4000allegrex_bn, + RAB_OPERAND_r4000allegrex_int16, + RAB_OPERAND_r4000allegrex_float16, + RAB_OPERAND_r4000allegrex_p_vrot_code, + RAB_OPERAND_r4000allegrex_t_vrot_code, + RAB_OPERAND_r4000allegrex_q_vrot_code, + RAB_OPERAND_r4000allegrex_rpx, + RAB_OPERAND_r4000allegrex_rpy, + RAB_OPERAND_r4000allegrex_rpz, + RAB_OPERAND_r4000allegrex_rpw, + RAB_OPERAND_r4000allegrex_wpx, + RAB_OPERAND_r4000allegrex_wpy, + RAB_OPERAND_r4000allegrex_wpz, + RAB_OPERAND_r4000allegrex_wpw, RAB_OPERAND_r5900_I, RAB_OPERAND_r5900_Q, RAB_OPERAND_r5900_R, diff --git a/include/generated/OperandType_function_declarations.h b/include/generated/OperandType_function_declarations.h index 4c3e549b..749e2139 100644 --- a/include/generated/OperandType_function_declarations.h +++ b/include/generated/OperandType_function_declarations.h @@ -50,6 +50,63 @@ size_t RabbitizerOperandType_process_r3000gte_v (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); size_t RabbitizerOperandType_process_r3000gte_cv (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); size_t RabbitizerOperandType_process_r3000gte_lm (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_s_vs (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_s_vt (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_s_vd (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_s_vt_imm (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_s_vd_imm (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_p_vs (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_p_vt (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_p_vd (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_t_vs (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_t_vt (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_t_vd (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_q_vs (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_q_vt (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_q_vd (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_q_vt_imm (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_mp_vs (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_mp_vt (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_mp_vd (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_mp_vs_transpose (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_mt_vs (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_mt_vt (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_mt_vd (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_mt_vs_transpose (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_mq_vs (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_mq_vt (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_mq_vd (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_mq_vs_transpose (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_cop2cs (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_cop2cd (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_pos (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_size (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_size_plus_pos (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_imm3 (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_offset14_base (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_offset14_base_maybe_wb (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_vcmp_cond (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_vcmp_cond_s_maybe_vs_maybe_vt (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_vcmp_cond_p_maybe_vs_maybe_vt (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_vcmp_cond_t_maybe_vs_maybe_vt (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_vcmp_cond_q_maybe_vs_maybe_vt (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_vconstant (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_power_of_two (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_vfpu_cc_bit (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_bn (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_int16 (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_float16 (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_p_vrot_code (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_t_vrot_code (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_q_vrot_code (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_rpx (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_rpy (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_rpz (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_rpw (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_wpx (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_wpy (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_wpz (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_wpw (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); size_t RabbitizerOperandType_process_r5900_I (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); size_t RabbitizerOperandType_process_r5900_Q (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); size_t RabbitizerOperandType_process_r5900_R (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); diff --git a/include/generated/RegisterDescriptor_Descriptors_arrays.h b/include/generated/RegisterDescriptor_Descriptors_arrays.h index 428158d4..740757c7 100644 --- a/include/generated/RegisterDescriptor_Descriptors_arrays.h +++ b/include/generated/RegisterDescriptor_Descriptors_arrays.h @@ -432,6 +432,1080 @@ const RabbitizerRegisterDescriptor RabbitizerRegister_RspVector_Descriptors[] = [RABBITIZER_REG_RSP_VECTOR_v30] = { 0 }, [RABBITIZER_REG_RSP_VECTOR_v31] = { 0 }, }; +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexS_Descriptors[] = { + [RABBITIZER_REG_R4000ALLEGREX_S_S000] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S010] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S020] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S030] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S100] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S110] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S120] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S130] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S200] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S210] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S220] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S230] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S300] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S310] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S320] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S330] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S400] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S410] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S420] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S430] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S500] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S510] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S520] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S530] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S600] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S610] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S620] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S630] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S700] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S710] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S720] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S730] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S001] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S011] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S021] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S031] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S101] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S111] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S121] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S131] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S201] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S211] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S221] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S231] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S301] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S311] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S321] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S331] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S401] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S411] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S421] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S431] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S501] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S511] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S521] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S531] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S601] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S611] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S621] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S631] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S701] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S711] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S721] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S731] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S002] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S012] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S022] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S032] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S102] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S112] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S122] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S132] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S202] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S212] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S222] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S232] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S302] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S312] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S322] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S332] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S402] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S412] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S422] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S432] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S502] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S512] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S522] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S532] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S602] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S612] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S622] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S632] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S702] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S712] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S722] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S732] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S003] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S013] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S023] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S033] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S103] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S113] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S123] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S133] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S203] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S213] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S223] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S233] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S303] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S313] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S323] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S333] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S403] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S413] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S423] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S433] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S503] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S513] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S523] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S533] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S603] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S613] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S623] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S633] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S703] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S713] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S723] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_S_S733] = { 0 }, +}; +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexV2D_Descriptors[] = { + [RABBITIZER_REG_R4000ALLEGREX_V2D_C000] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C010] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C020] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C030] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C100] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C110] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C120] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C130] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C200] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C210] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C220] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C230] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C300] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C310] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C320] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C330] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C400] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C410] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C420] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C430] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C500] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C510] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C520] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C530] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C600] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C610] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C620] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C630] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C700] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C710] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C720] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C730] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R000] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R001] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R002] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R003] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R100] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R101] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R102] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R103] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R200] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R201] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R202] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R203] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R300] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R301] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R302] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R303] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R400] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R401] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R402] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R403] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R500] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R501] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R502] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R503] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R600] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R601] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R602] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R603] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R700] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R701] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R702] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R703] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C002] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C012] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C022] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C032] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C102] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C112] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C122] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C132] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C202] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C212] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C222] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C232] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C302] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C312] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C322] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C332] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C402] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C412] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C422] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C432] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C502] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C512] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C522] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C532] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C602] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C612] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C622] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C632] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C702] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C712] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C722] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C732] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R020] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R021] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R022] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R023] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R120] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R121] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R122] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R123] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R220] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R221] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R222] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R223] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R320] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R321] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R322] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R323] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R420] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R421] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R422] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R423] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R520] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R521] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R522] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R523] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R620] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R621] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R622] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R623] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R720] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R721] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R722] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R723] = { 0 }, +}; +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexV3D_Descriptors[] = { + [RABBITIZER_REG_R4000ALLEGREX_V3D_C000] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C010] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C020] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C030] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C100] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C110] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C120] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C130] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C200] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C210] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C220] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C230] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C300] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C310] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C320] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C330] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C400] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C410] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C420] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C430] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C500] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C510] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C520] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C530] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C600] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C610] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C620] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C630] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C700] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C710] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C720] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C730] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R000] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R001] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R002] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R003] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R100] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R101] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R102] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R103] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R200] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R201] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R202] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R203] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R300] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R301] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R302] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R303] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R400] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R401] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R402] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R403] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R500] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R501] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R502] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R503] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R600] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R601] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R602] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R603] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R700] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R701] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R702] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R703] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C001] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C011] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C021] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C031] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C101] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C111] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C121] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C131] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C201] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C211] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C221] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C231] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C301] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C311] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C321] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C331] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C401] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C411] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C421] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C431] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C501] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C511] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C521] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C531] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C601] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C611] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C621] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C631] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C701] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C711] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C721] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C731] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R010] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R011] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R012] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R013] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R110] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R111] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R112] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R113] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R210] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R211] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R212] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R213] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R310] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R311] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R312] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R313] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R410] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R411] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R412] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R413] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R510] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R511] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R512] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R513] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R610] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R611] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R612] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R613] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R710] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R711] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R712] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R713] = { 0 }, +}; +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexV4D_Descriptors[] = { + [RABBITIZER_REG_R4000ALLEGREX_V4D_C000] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C010] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C020] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C030] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C100] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C110] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C120] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C130] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C200] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C210] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C220] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C230] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C300] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C310] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C320] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C330] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C400] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C410] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C420] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C430] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C500] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C510] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C520] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C530] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C600] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C610] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C620] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C630] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C700] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C710] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C720] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C730] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R000] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R001] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R002] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R003] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R100] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R101] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R102] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R103] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R200] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R201] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R202] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R203] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R300] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R301] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R302] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R303] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R400] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R401] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R402] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R403] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R500] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R501] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R502] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R503] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R600] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R601] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R602] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R603] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R700] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R701] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R702] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R703] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C002] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C012] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C022] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C032] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C102] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C112] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C122] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C132] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C202] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C212] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C222] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C232] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C302] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C312] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C322] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C332] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C402] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C412] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C422] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C432] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C502] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C512] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C522] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C532] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C602] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C612] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C622] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C632] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C702] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C712] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C722] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C732] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R020] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R021] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R022] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R023] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R120] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R121] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R122] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R123] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R220] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R221] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R222] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R223] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R320] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R321] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R322] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R323] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R420] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R421] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R422] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R423] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R520] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R521] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R522] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R523] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R620] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R621] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R622] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R623] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R720] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R721] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R722] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R723] = { 0 }, +}; +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexM2x2_Descriptors[] = { + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M000] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M010] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M020] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M030] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M100] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M110] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M120] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M130] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M200] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M210] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M220] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M230] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M300] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M310] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M320] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M330] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M400] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M410] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M420] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M430] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M500] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M510] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M520] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M530] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M600] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M610] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M620] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M630] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M700] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M710] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M720] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M730] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E000] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E001] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E002] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E003] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E100] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E101] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E102] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E103] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E200] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E201] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E202] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E203] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E300] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E301] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E302] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E303] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E400] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E401] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E402] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E403] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E500] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E501] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E502] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E503] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E600] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E601] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E602] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E603] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E700] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E701] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E702] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E703] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M002] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M012] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M022] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M032] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M102] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M112] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M122] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M132] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M202] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M212] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M222] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M232] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M302] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M312] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M322] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M332] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M402] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M412] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M422] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M432] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M502] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M512] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M522] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M532] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M602] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M612] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M622] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M632] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M702] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M712] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M722] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M732] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E020] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E021] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E022] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E023] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E120] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E121] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E122] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E123] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E220] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E221] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E222] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E223] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E320] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E321] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E322] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E323] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E420] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E421] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E422] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E423] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E520] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E521] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E522] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E523] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E620] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E621] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E622] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E623] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E720] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E721] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E722] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E723] = { 0 }, +}; +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexM3x3_Descriptors[] = { + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M000] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M010] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M020] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M030] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M100] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M110] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M120] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M130] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M200] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M210] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M220] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M230] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M300] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M310] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M320] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M330] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M400] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M410] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M420] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M430] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M500] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M510] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M520] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M530] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M600] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M610] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M620] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M630] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M700] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M710] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M720] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M730] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E000] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E001] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E002] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E003] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E100] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E101] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E102] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E103] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E200] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E201] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E202] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E203] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E300] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E301] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E302] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E303] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E400] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E401] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E402] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E403] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E500] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E501] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E502] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E503] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E600] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E601] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E602] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E603] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E700] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E701] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E702] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E703] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M001] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M011] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M021] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M031] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M101] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M111] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M121] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M131] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M201] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M211] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M221] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M231] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M301] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M311] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M321] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M331] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M401] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M411] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M421] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M431] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M501] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M511] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M521] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M531] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M601] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M611] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M621] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M631] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M701] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M711] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M721] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M731] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E010] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E011] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E012] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E013] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E110] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E111] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E112] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E113] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E210] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E211] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E212] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E213] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E310] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E311] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E312] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E313] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E410] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E411] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E412] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E413] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E510] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E511] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E512] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E513] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E610] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E611] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E612] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E613] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E710] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E711] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E712] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E713] = { 0 }, +}; +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexM4x4_Descriptors[] = { + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M000] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M010] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M020] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M030] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M100] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M110] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M120] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M130] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M200] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M210] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M220] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M230] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M300] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M310] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M320] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M330] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M400] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M410] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M420] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M430] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M500] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M510] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M520] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M530] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M600] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M610] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M620] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M630] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M700] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M710] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M720] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M730] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E000] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E001] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E002] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E003] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E100] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E101] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E102] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E103] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E200] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E201] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E202] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E203] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E300] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E301] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E302] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E303] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E400] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E401] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E402] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E403] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E500] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E501] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E502] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E503] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E600] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E601] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E602] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E603] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E700] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E701] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E702] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E703] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M002] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M012] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M022] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M032] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M102] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M112] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M122] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M132] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M202] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M212] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M222] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M232] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M302] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M312] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M322] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M332] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M402] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M412] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M422] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M432] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M502] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M512] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M522] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M532] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M602] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M612] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M622] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M632] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M702] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M712] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M722] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M732] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E020] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E021] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E022] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E023] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E120] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E121] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E122] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E123] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E220] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E221] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E222] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E223] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E320] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E321] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E322] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E323] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E420] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E421] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E422] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E423] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E520] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E521] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E522] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E523] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E620] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E621] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E622] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E623] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E720] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E721] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E722] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E723] = { 0 }, +}; +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexVfpuControl_Descriptors[] = { + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXS] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXT] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXD] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_CC] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_INF4] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RSV5] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RSV6] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_REV] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX0] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX1] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX2] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX3] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX4] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX5] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX6] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX7] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_144] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_145] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_146] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_147] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_148] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_149] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_150] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_151] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_152] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_153] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_154] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_155] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_156] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_157] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_158] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_159] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_160] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_161] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_162] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_163] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_164] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_165] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_166] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_167] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_168] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_169] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_170] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_171] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_172] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_173] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_174] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_175] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_176] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_177] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_178] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_179] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_180] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_181] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_182] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_183] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_184] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_185] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_186] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_187] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_188] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_189] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_190] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_191] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_192] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_193] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_194] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_195] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_196] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_197] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_198] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_199] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_200] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_201] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_202] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_203] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_204] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_205] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_206] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_207] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_208] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_209] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_210] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_211] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_212] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_213] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_214] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_215] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_216] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_217] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_218] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_219] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_220] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_221] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_222] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_223] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_224] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_225] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_226] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_227] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_228] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_229] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_230] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_231] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_232] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_233] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_234] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_235] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_236] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_237] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_238] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_239] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_240] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_241] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_242] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_243] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_244] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_245] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_246] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_247] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_248] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_249] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_250] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_251] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_252] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_253] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_254] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_255] = { 0 }, +}; +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexVConstant_Descriptors[] = { + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_0] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_HUGE] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_SQRT2] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_SQRT1_2] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_2_SQRTPI] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_2_PI] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_1_PI] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_PI_4] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_PI_2] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_PI] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_E] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LOG2E] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LOG10E] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LN2] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LN10] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_2PI] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_PI_6] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LOG10TWO] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LOG2TEN] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_SQRT3_2] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_20] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_21] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_22] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_23] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_24] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_25] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_26] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_27] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_28] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_29] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_30] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_31] = { 0 }, +}; const RabbitizerRegisterDescriptor RabbitizerRegister_R5900VF_Descriptors[] = { [RABBITIZER_REG_R5900_VF_vf0] = { 0 }, [RABBITIZER_REG_R5900_VF_vf1] = { 0 }, diff --git a/include/generated/Registers_Names_arrays.h b/include/generated/Registers_Names_arrays.h index 5eba8f1f..98dcc6bf 100644 --- a/include/generated/Registers_Names_arrays.h +++ b/include/generated/Registers_Names_arrays.h @@ -432,6 +432,1080 @@ const char *RabbitizerRegister_RspVector_Names[][2] = { [RABBITIZER_REG_RSP_VECTOR_v30] = { "$" "30", "$" "v30" }, [RABBITIZER_REG_RSP_VECTOR_v31] = { "$" "31", "$" "v31" }, }; +const char *RabbitizerRegister_R4000AllegrexS_Names[][2] = { + [RABBITIZER_REG_R4000ALLEGREX_S_S000] = { "$" "0", "S000" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S010] = { "$" "1", "S010" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S020] = { "$" "2", "S020" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S030] = { "$" "3", "S030" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S100] = { "$" "4", "S100" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S110] = { "$" "5", "S110" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S120] = { "$" "6", "S120" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S130] = { "$" "7", "S130" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S200] = { "$" "8", "S200" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S210] = { "$" "9", "S210" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S220] = { "$" "10", "S220" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S230] = { "$" "11", "S230" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S300] = { "$" "12", "S300" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S310] = { "$" "13", "S310" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S320] = { "$" "14", "S320" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S330] = { "$" "15", "S330" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S400] = { "$" "16", "S400" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S410] = { "$" "17", "S410" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S420] = { "$" "18", "S420" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S430] = { "$" "19", "S430" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S500] = { "$" "20", "S500" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S510] = { "$" "21", "S510" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S520] = { "$" "22", "S520" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S530] = { "$" "23", "S530" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S600] = { "$" "24", "S600" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S610] = { "$" "25", "S610" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S620] = { "$" "26", "S620" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S630] = { "$" "27", "S630" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S700] = { "$" "28", "S700" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S710] = { "$" "29", "S710" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S720] = { "$" "30", "S720" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S730] = { "$" "31", "S730" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S001] = { "$" "32", "S001" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S011] = { "$" "33", "S011" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S021] = { "$" "34", "S021" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S031] = { "$" "35", "S031" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S101] = { "$" "36", "S101" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S111] = { "$" "37", "S111" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S121] = { "$" "38", "S121" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S131] = { "$" "39", "S131" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S201] = { "$" "40", "S201" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S211] = { "$" "41", "S211" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S221] = { "$" "42", "S221" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S231] = { "$" "43", "S231" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S301] = { "$" "44", "S301" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S311] = { "$" "45", "S311" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S321] = { "$" "46", "S321" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S331] = { "$" "47", "S331" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S401] = { "$" "48", "S401" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S411] = { "$" "49", "S411" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S421] = { "$" "50", "S421" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S431] = { "$" "51", "S431" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S501] = { "$" "52", "S501" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S511] = { "$" "53", "S511" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S521] = { "$" "54", "S521" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S531] = { "$" "55", "S531" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S601] = { "$" "56", "S601" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S611] = { "$" "57", "S611" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S621] = { "$" "58", "S621" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S631] = { "$" "59", "S631" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S701] = { "$" "60", "S701" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S711] = { "$" "61", "S711" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S721] = { "$" "62", "S721" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S731] = { "$" "63", "S731" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S002] = { "$" "64", "S002" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S012] = { "$" "65", "S012" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S022] = { "$" "66", "S022" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S032] = { "$" "67", "S032" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S102] = { "$" "68", "S102" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S112] = { "$" "69", "S112" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S122] = { "$" "70", "S122" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S132] = { "$" "71", "S132" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S202] = { "$" "72", "S202" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S212] = { "$" "73", "S212" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S222] = { "$" "74", "S222" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S232] = { "$" "75", "S232" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S302] = { "$" "76", "S302" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S312] = { "$" "77", "S312" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S322] = { "$" "78", "S322" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S332] = { "$" "79", "S332" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S402] = { "$" "80", "S402" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S412] = { "$" "81", "S412" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S422] = { "$" "82", "S422" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S432] = { "$" "83", "S432" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S502] = { "$" "84", "S502" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S512] = { "$" "85", "S512" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S522] = { "$" "86", "S522" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S532] = { "$" "87", "S532" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S602] = { "$" "88", "S602" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S612] = { "$" "89", "S612" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S622] = { "$" "90", "S622" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S632] = { "$" "91", "S632" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S702] = { "$" "92", "S702" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S712] = { "$" "93", "S712" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S722] = { "$" "94", "S722" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S732] = { "$" "95", "S732" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S003] = { "$" "96", "S003" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S013] = { "$" "97", "S013" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S023] = { "$" "98", "S023" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S033] = { "$" "99", "S033" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S103] = { "$" "100", "S103" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S113] = { "$" "101", "S113" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S123] = { "$" "102", "S123" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S133] = { "$" "103", "S133" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S203] = { "$" "104", "S203" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S213] = { "$" "105", "S213" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S223] = { "$" "106", "S223" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S233] = { "$" "107", "S233" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S303] = { "$" "108", "S303" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S313] = { "$" "109", "S313" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S323] = { "$" "110", "S323" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S333] = { "$" "111", "S333" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S403] = { "$" "112", "S403" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S413] = { "$" "113", "S413" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S423] = { "$" "114", "S423" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S433] = { "$" "115", "S433" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S503] = { "$" "116", "S503" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S513] = { "$" "117", "S513" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S523] = { "$" "118", "S523" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S533] = { "$" "119", "S533" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S603] = { "$" "120", "S603" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S613] = { "$" "121", "S613" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S623] = { "$" "122", "S623" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S633] = { "$" "123", "S633" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S703] = { "$" "124", "S703" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S713] = { "$" "125", "S713" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S723] = { "$" "126", "S723" }, + [RABBITIZER_REG_R4000ALLEGREX_S_S733] = { "$" "127", "S733" }, +}; +const char *RabbitizerRegister_R4000AllegrexV2D_Names[][2] = { + [RABBITIZER_REG_R4000ALLEGREX_V2D_C000] = { "$" "0", "C000" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C010] = { "$" "1", "C010" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C020] = { "$" "2", "C020" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C030] = { "$" "3", "C030" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C100] = { "$" "4", "C100" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C110] = { "$" "5", "C110" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C120] = { "$" "6", "C120" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C130] = { "$" "7", "C130" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C200] = { "$" "8", "C200" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C210] = { "$" "9", "C210" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C220] = { "$" "10", "C220" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C230] = { "$" "11", "C230" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C300] = { "$" "12", "C300" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C310] = { "$" "13", "C310" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C320] = { "$" "14", "C320" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C330] = { "$" "15", "C330" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C400] = { "$" "16", "C400" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C410] = { "$" "17", "C410" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C420] = { "$" "18", "C420" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C430] = { "$" "19", "C430" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C500] = { "$" "20", "C500" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C510] = { "$" "21", "C510" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C520] = { "$" "22", "C520" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C530] = { "$" "23", "C530" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C600] = { "$" "24", "C600" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C610] = { "$" "25", "C610" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C620] = { "$" "26", "C620" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C630] = { "$" "27", "C630" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C700] = { "$" "28", "C700" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C710] = { "$" "29", "C710" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C720] = { "$" "30", "C720" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C730] = { "$" "31", "C730" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R000] = { "$" "32", "R000" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R001] = { "$" "33", "R001" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R002] = { "$" "34", "R002" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R003] = { "$" "35", "R003" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R100] = { "$" "36", "R100" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R101] = { "$" "37", "R101" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R102] = { "$" "38", "R102" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R103] = { "$" "39", "R103" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R200] = { "$" "40", "R200" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R201] = { "$" "41", "R201" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R202] = { "$" "42", "R202" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R203] = { "$" "43", "R203" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R300] = { "$" "44", "R300" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R301] = { "$" "45", "R301" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R302] = { "$" "46", "R302" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R303] = { "$" "47", "R303" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R400] = { "$" "48", "R400" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R401] = { "$" "49", "R401" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R402] = { "$" "50", "R402" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R403] = { "$" "51", "R403" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R500] = { "$" "52", "R500" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R501] = { "$" "53", "R501" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R502] = { "$" "54", "R502" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R503] = { "$" "55", "R503" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R600] = { "$" "56", "R600" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R601] = { "$" "57", "R601" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R602] = { "$" "58", "R602" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R603] = { "$" "59", "R603" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R700] = { "$" "60", "R700" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R701] = { "$" "61", "R701" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R702] = { "$" "62", "R702" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R703] = { "$" "63", "R703" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C002] = { "$" "64", "C002" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C012] = { "$" "65", "C012" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C022] = { "$" "66", "C022" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C032] = { "$" "67", "C032" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C102] = { "$" "68", "C102" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C112] = { "$" "69", "C112" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C122] = { "$" "70", "C122" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C132] = { "$" "71", "C132" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C202] = { "$" "72", "C202" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C212] = { "$" "73", "C212" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C222] = { "$" "74", "C222" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C232] = { "$" "75", "C232" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C302] = { "$" "76", "C302" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C312] = { "$" "77", "C312" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C322] = { "$" "78", "C322" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C332] = { "$" "79", "C332" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C402] = { "$" "80", "C402" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C412] = { "$" "81", "C412" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C422] = { "$" "82", "C422" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C432] = { "$" "83", "C432" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C502] = { "$" "84", "C502" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C512] = { "$" "85", "C512" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C522] = { "$" "86", "C522" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C532] = { "$" "87", "C532" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C602] = { "$" "88", "C602" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C612] = { "$" "89", "C612" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C622] = { "$" "90", "C622" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C632] = { "$" "91", "C632" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C702] = { "$" "92", "C702" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C712] = { "$" "93", "C712" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C722] = { "$" "94", "C722" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_C732] = { "$" "95", "C732" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R020] = { "$" "96", "R020" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R021] = { "$" "97", "R021" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R022] = { "$" "98", "R022" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R023] = { "$" "99", "R023" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R120] = { "$" "100", "R120" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R121] = { "$" "101", "R121" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R122] = { "$" "102", "R122" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R123] = { "$" "103", "R123" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R220] = { "$" "104", "R220" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R221] = { "$" "105", "R221" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R222] = { "$" "106", "R222" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R223] = { "$" "107", "R223" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R320] = { "$" "108", "R320" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R321] = { "$" "109", "R321" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R322] = { "$" "110", "R322" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R323] = { "$" "111", "R323" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R420] = { "$" "112", "R420" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R421] = { "$" "113", "R421" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R422] = { "$" "114", "R422" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R423] = { "$" "115", "R423" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R520] = { "$" "116", "R520" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R521] = { "$" "117", "R521" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R522] = { "$" "118", "R522" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R523] = { "$" "119", "R523" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R620] = { "$" "120", "R620" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R621] = { "$" "121", "R621" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R622] = { "$" "122", "R622" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R623] = { "$" "123", "R623" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R720] = { "$" "124", "R720" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R721] = { "$" "125", "R721" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R722] = { "$" "126", "R722" }, + [RABBITIZER_REG_R4000ALLEGREX_V2D_R723] = { "$" "127", "R723" }, +}; +const char *RabbitizerRegister_R4000AllegrexV3D_Names[][2] = { + [RABBITIZER_REG_R4000ALLEGREX_V3D_C000] = { "$" "0", "C000" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C010] = { "$" "1", "C010" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C020] = { "$" "2", "C020" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C030] = { "$" "3", "C030" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C100] = { "$" "4", "C100" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C110] = { "$" "5", "C110" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C120] = { "$" "6", "C120" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C130] = { "$" "7", "C130" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C200] = { "$" "8", "C200" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C210] = { "$" "9", "C210" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C220] = { "$" "10", "C220" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C230] = { "$" "11", "C230" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C300] = { "$" "12", "C300" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C310] = { "$" "13", "C310" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C320] = { "$" "14", "C320" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C330] = { "$" "15", "C330" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C400] = { "$" "16", "C400" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C410] = { "$" "17", "C410" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C420] = { "$" "18", "C420" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C430] = { "$" "19", "C430" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C500] = { "$" "20", "C500" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C510] = { "$" "21", "C510" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C520] = { "$" "22", "C520" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C530] = { "$" "23", "C530" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C600] = { "$" "24", "C600" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C610] = { "$" "25", "C610" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C620] = { "$" "26", "C620" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C630] = { "$" "27", "C630" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C700] = { "$" "28", "C700" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C710] = { "$" "29", "C710" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C720] = { "$" "30", "C720" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C730] = { "$" "31", "C730" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R000] = { "$" "32", "R000" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R001] = { "$" "33", "R001" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R002] = { "$" "34", "R002" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R003] = { "$" "35", "R003" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R100] = { "$" "36", "R100" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R101] = { "$" "37", "R101" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R102] = { "$" "38", "R102" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R103] = { "$" "39", "R103" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R200] = { "$" "40", "R200" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R201] = { "$" "41", "R201" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R202] = { "$" "42", "R202" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R203] = { "$" "43", "R203" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R300] = { "$" "44", "R300" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R301] = { "$" "45", "R301" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R302] = { "$" "46", "R302" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R303] = { "$" "47", "R303" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R400] = { "$" "48", "R400" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R401] = { "$" "49", "R401" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R402] = { "$" "50", "R402" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R403] = { "$" "51", "R403" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R500] = { "$" "52", "R500" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R501] = { "$" "53", "R501" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R502] = { "$" "54", "R502" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R503] = { "$" "55", "R503" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R600] = { "$" "56", "R600" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R601] = { "$" "57", "R601" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R602] = { "$" "58", "R602" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R603] = { "$" "59", "R603" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R700] = { "$" "60", "R700" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R701] = { "$" "61", "R701" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R702] = { "$" "62", "R702" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R703] = { "$" "63", "R703" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C001] = { "$" "64", "C001" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C011] = { "$" "65", "C011" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C021] = { "$" "66", "C021" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C031] = { "$" "67", "C031" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C101] = { "$" "68", "C101" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C111] = { "$" "69", "C111" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C121] = { "$" "70", "C121" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C131] = { "$" "71", "C131" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C201] = { "$" "72", "C201" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C211] = { "$" "73", "C211" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C221] = { "$" "74", "C221" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C231] = { "$" "75", "C231" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C301] = { "$" "76", "C301" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C311] = { "$" "77", "C311" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C321] = { "$" "78", "C321" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C331] = { "$" "79", "C331" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C401] = { "$" "80", "C401" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C411] = { "$" "81", "C411" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C421] = { "$" "82", "C421" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C431] = { "$" "83", "C431" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C501] = { "$" "84", "C501" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C511] = { "$" "85", "C511" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C521] = { "$" "86", "C521" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C531] = { "$" "87", "C531" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C601] = { "$" "88", "C601" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C611] = { "$" "89", "C611" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C621] = { "$" "90", "C621" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C631] = { "$" "91", "C631" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C701] = { "$" "92", "C701" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C711] = { "$" "93", "C711" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C721] = { "$" "94", "C721" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_C731] = { "$" "95", "C731" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R010] = { "$" "96", "R010" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R011] = { "$" "97", "R011" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R012] = { "$" "98", "R012" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R013] = { "$" "99", "R013" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R110] = { "$" "100", "R110" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R111] = { "$" "101", "R111" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R112] = { "$" "102", "R112" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R113] = { "$" "103", "R113" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R210] = { "$" "104", "R210" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R211] = { "$" "105", "R211" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R212] = { "$" "106", "R212" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R213] = { "$" "107", "R213" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R310] = { "$" "108", "R310" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R311] = { "$" "109", "R311" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R312] = { "$" "110", "R312" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R313] = { "$" "111", "R313" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R410] = { "$" "112", "R410" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R411] = { "$" "113", "R411" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R412] = { "$" "114", "R412" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R413] = { "$" "115", "R413" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R510] = { "$" "116", "R510" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R511] = { "$" "117", "R511" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R512] = { "$" "118", "R512" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R513] = { "$" "119", "R513" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R610] = { "$" "120", "R610" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R611] = { "$" "121", "R611" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R612] = { "$" "122", "R612" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R613] = { "$" "123", "R613" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R710] = { "$" "124", "R710" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R711] = { "$" "125", "R711" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R712] = { "$" "126", "R712" }, + [RABBITIZER_REG_R4000ALLEGREX_V3D_R713] = { "$" "127", "R713" }, +}; +const char *RabbitizerRegister_R4000AllegrexV4D_Names[][2] = { + [RABBITIZER_REG_R4000ALLEGREX_V4D_C000] = { "$" "0", "C000" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C010] = { "$" "1", "C010" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C020] = { "$" "2", "C020" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C030] = { "$" "3", "C030" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C100] = { "$" "4", "C100" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C110] = { "$" "5", "C110" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C120] = { "$" "6", "C120" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C130] = { "$" "7", "C130" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C200] = { "$" "8", "C200" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C210] = { "$" "9", "C210" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C220] = { "$" "10", "C220" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C230] = { "$" "11", "C230" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C300] = { "$" "12", "C300" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C310] = { "$" "13", "C310" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C320] = { "$" "14", "C320" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C330] = { "$" "15", "C330" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C400] = { "$" "16", "C400" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C410] = { "$" "17", "C410" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C420] = { "$" "18", "C420" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C430] = { "$" "19", "C430" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C500] = { "$" "20", "C500" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C510] = { "$" "21", "C510" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C520] = { "$" "22", "C520" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C530] = { "$" "23", "C530" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C600] = { "$" "24", "C600" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C610] = { "$" "25", "C610" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C620] = { "$" "26", "C620" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C630] = { "$" "27", "C630" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C700] = { "$" "28", "C700" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C710] = { "$" "29", "C710" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C720] = { "$" "30", "C720" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C730] = { "$" "31", "C730" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R000] = { "$" "32", "R000" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R001] = { "$" "33", "R001" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R002] = { "$" "34", "R002" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R003] = { "$" "35", "R003" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R100] = { "$" "36", "R100" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R101] = { "$" "37", "R101" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R102] = { "$" "38", "R102" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R103] = { "$" "39", "R103" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R200] = { "$" "40", "R200" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R201] = { "$" "41", "R201" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R202] = { "$" "42", "R202" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R203] = { "$" "43", "R203" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R300] = { "$" "44", "R300" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R301] = { "$" "45", "R301" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R302] = { "$" "46", "R302" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R303] = { "$" "47", "R303" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R400] = { "$" "48", "R400" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R401] = { "$" "49", "R401" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R402] = { "$" "50", "R402" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R403] = { "$" "51", "R403" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R500] = { "$" "52", "R500" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R501] = { "$" "53", "R501" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R502] = { "$" "54", "R502" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R503] = { "$" "55", "R503" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R600] = { "$" "56", "R600" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R601] = { "$" "57", "R601" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R602] = { "$" "58", "R602" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R603] = { "$" "59", "R603" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R700] = { "$" "60", "R700" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R701] = { "$" "61", "R701" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R702] = { "$" "62", "R702" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R703] = { "$" "63", "R703" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C002] = { "$" "64", "C002" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C012] = { "$" "65", "C012" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C022] = { "$" "66", "C022" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C032] = { "$" "67", "C032" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C102] = { "$" "68", "C102" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C112] = { "$" "69", "C112" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C122] = { "$" "70", "C122" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C132] = { "$" "71", "C132" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C202] = { "$" "72", "C202" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C212] = { "$" "73", "C212" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C222] = { "$" "74", "C222" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C232] = { "$" "75", "C232" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C302] = { "$" "76", "C302" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C312] = { "$" "77", "C312" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C322] = { "$" "78", "C322" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C332] = { "$" "79", "C332" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C402] = { "$" "80", "C402" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C412] = { "$" "81", "C412" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C422] = { "$" "82", "C422" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C432] = { "$" "83", "C432" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C502] = { "$" "84", "C502" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C512] = { "$" "85", "C512" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C522] = { "$" "86", "C522" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C532] = { "$" "87", "C532" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C602] = { "$" "88", "C602" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C612] = { "$" "89", "C612" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C622] = { "$" "90", "C622" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C632] = { "$" "91", "C632" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C702] = { "$" "92", "C702" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C712] = { "$" "93", "C712" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C722] = { "$" "94", "C722" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_C732] = { "$" "95", "C732" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R020] = { "$" "96", "R020" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R021] = { "$" "97", "R021" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R022] = { "$" "98", "R022" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R023] = { "$" "99", "R023" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R120] = { "$" "100", "R120" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R121] = { "$" "101", "R121" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R122] = { "$" "102", "R122" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R123] = { "$" "103", "R123" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R220] = { "$" "104", "R220" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R221] = { "$" "105", "R221" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R222] = { "$" "106", "R222" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R223] = { "$" "107", "R223" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R320] = { "$" "108", "R320" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R321] = { "$" "109", "R321" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R322] = { "$" "110", "R322" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R323] = { "$" "111", "R323" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R420] = { "$" "112", "R420" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R421] = { "$" "113", "R421" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R422] = { "$" "114", "R422" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R423] = { "$" "115", "R423" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R520] = { "$" "116", "R520" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R521] = { "$" "117", "R521" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R522] = { "$" "118", "R522" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R523] = { "$" "119", "R523" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R620] = { "$" "120", "R620" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R621] = { "$" "121", "R621" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R622] = { "$" "122", "R622" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R623] = { "$" "123", "R623" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R720] = { "$" "124", "R720" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R721] = { "$" "125", "R721" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R722] = { "$" "126", "R722" }, + [RABBITIZER_REG_R4000ALLEGREX_V4D_R723] = { "$" "127", "R723" }, +}; +const char *RabbitizerRegister_R4000AllegrexM2x2_Names[][2] = { + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M000] = { "$" "0", "M000" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M010] = { "$" "1", "M010" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M020] = { "$" "2", "M020" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M030] = { "$" "3", "M030" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M100] = { "$" "4", "M100" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M110] = { "$" "5", "M110" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M120] = { "$" "6", "M120" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M130] = { "$" "7", "M130" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M200] = { "$" "8", "M200" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M210] = { "$" "9", "M210" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M220] = { "$" "10", "M220" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M230] = { "$" "11", "M230" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M300] = { "$" "12", "M300" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M310] = { "$" "13", "M310" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M320] = { "$" "14", "M320" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M330] = { "$" "15", "M330" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M400] = { "$" "16", "M400" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M410] = { "$" "17", "M410" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M420] = { "$" "18", "M420" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M430] = { "$" "19", "M430" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M500] = { "$" "20", "M500" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M510] = { "$" "21", "M510" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M520] = { "$" "22", "M520" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M530] = { "$" "23", "M530" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M600] = { "$" "24", "M600" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M610] = { "$" "25", "M610" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M620] = { "$" "26", "M620" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M630] = { "$" "27", "M630" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M700] = { "$" "28", "M700" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M710] = { "$" "29", "M710" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M720] = { "$" "30", "M720" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M730] = { "$" "31", "M730" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E000] = { "$" "32", "E000" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E001] = { "$" "33", "E001" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E002] = { "$" "34", "E002" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E003] = { "$" "35", "E003" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E100] = { "$" "36", "E100" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E101] = { "$" "37", "E101" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E102] = { "$" "38", "E102" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E103] = { "$" "39", "E103" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E200] = { "$" "40", "E200" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E201] = { "$" "41", "E201" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E202] = { "$" "42", "E202" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E203] = { "$" "43", "E203" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E300] = { "$" "44", "E300" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E301] = { "$" "45", "E301" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E302] = { "$" "46", "E302" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E303] = { "$" "47", "E303" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E400] = { "$" "48", "E400" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E401] = { "$" "49", "E401" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E402] = { "$" "50", "E402" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E403] = { "$" "51", "E403" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E500] = { "$" "52", "E500" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E501] = { "$" "53", "E501" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E502] = { "$" "54", "E502" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E503] = { "$" "55", "E503" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E600] = { "$" "56", "E600" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E601] = { "$" "57", "E601" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E602] = { "$" "58", "E602" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E603] = { "$" "59", "E603" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E700] = { "$" "60", "E700" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E701] = { "$" "61", "E701" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E702] = { "$" "62", "E702" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E703] = { "$" "63", "E703" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M002] = { "$" "64", "M002" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M012] = { "$" "65", "M012" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M022] = { "$" "66", "M022" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M032] = { "$" "67", "M032" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M102] = { "$" "68", "M102" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M112] = { "$" "69", "M112" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M122] = { "$" "70", "M122" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M132] = { "$" "71", "M132" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M202] = { "$" "72", "M202" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M212] = { "$" "73", "M212" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M222] = { "$" "74", "M222" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M232] = { "$" "75", "M232" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M302] = { "$" "76", "M302" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M312] = { "$" "77", "M312" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M322] = { "$" "78", "M322" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M332] = { "$" "79", "M332" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M402] = { "$" "80", "M402" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M412] = { "$" "81", "M412" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M422] = { "$" "82", "M422" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M432] = { "$" "83", "M432" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M502] = { "$" "84", "M502" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M512] = { "$" "85", "M512" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M522] = { "$" "86", "M522" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M532] = { "$" "87", "M532" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M602] = { "$" "88", "M602" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M612] = { "$" "89", "M612" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M622] = { "$" "90", "M622" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M632] = { "$" "91", "M632" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M702] = { "$" "92", "M702" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M712] = { "$" "93", "M712" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M722] = { "$" "94", "M722" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_M732] = { "$" "95", "M732" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E020] = { "$" "96", "E020" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E021] = { "$" "97", "E021" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E022] = { "$" "98", "E022" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E023] = { "$" "99", "E023" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E120] = { "$" "100", "E120" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E121] = { "$" "101", "E121" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E122] = { "$" "102", "E122" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E123] = { "$" "103", "E123" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E220] = { "$" "104", "E220" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E221] = { "$" "105", "E221" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E222] = { "$" "106", "E222" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E223] = { "$" "107", "E223" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E320] = { "$" "108", "E320" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E321] = { "$" "109", "E321" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E322] = { "$" "110", "E322" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E323] = { "$" "111", "E323" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E420] = { "$" "112", "E420" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E421] = { "$" "113", "E421" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E422] = { "$" "114", "E422" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E423] = { "$" "115", "E423" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E520] = { "$" "116", "E520" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E521] = { "$" "117", "E521" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E522] = { "$" "118", "E522" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E523] = { "$" "119", "E523" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E620] = { "$" "120", "E620" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E621] = { "$" "121", "E621" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E622] = { "$" "122", "E622" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E623] = { "$" "123", "E623" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E720] = { "$" "124", "E720" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E721] = { "$" "125", "E721" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E722] = { "$" "126", "E722" }, + [RABBITIZER_REG_R4000ALLEGREX_M2X2_E723] = { "$" "127", "E723" }, +}; +const char *RabbitizerRegister_R4000AllegrexM3x3_Names[][2] = { + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M000] = { "$" "0", "M000" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M010] = { "$" "1", "M010" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M020] = { "$" "2", "M020" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M030] = { "$" "3", "M030" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M100] = { "$" "4", "M100" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M110] = { "$" "5", "M110" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M120] = { "$" "6", "M120" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M130] = { "$" "7", "M130" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M200] = { "$" "8", "M200" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M210] = { "$" "9", "M210" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M220] = { "$" "10", "M220" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M230] = { "$" "11", "M230" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M300] = { "$" "12", "M300" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M310] = { "$" "13", "M310" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M320] = { "$" "14", "M320" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M330] = { "$" "15", "M330" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M400] = { "$" "16", "M400" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M410] = { "$" "17", "M410" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M420] = { "$" "18", "M420" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M430] = { "$" "19", "M430" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M500] = { "$" "20", "M500" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M510] = { "$" "21", "M510" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M520] = { "$" "22", "M520" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M530] = { "$" "23", "M530" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M600] = { "$" "24", "M600" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M610] = { "$" "25", "M610" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M620] = { "$" "26", "M620" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M630] = { "$" "27", "M630" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M700] = { "$" "28", "M700" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M710] = { "$" "29", "M710" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M720] = { "$" "30", "M720" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M730] = { "$" "31", "M730" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E000] = { "$" "32", "E000" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E001] = { "$" "33", "E001" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E002] = { "$" "34", "E002" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E003] = { "$" "35", "E003" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E100] = { "$" "36", "E100" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E101] = { "$" "37", "E101" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E102] = { "$" "38", "E102" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E103] = { "$" "39", "E103" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E200] = { "$" "40", "E200" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E201] = { "$" "41", "E201" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E202] = { "$" "42", "E202" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E203] = { "$" "43", "E203" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E300] = { "$" "44", "E300" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E301] = { "$" "45", "E301" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E302] = { "$" "46", "E302" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E303] = { "$" "47", "E303" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E400] = { "$" "48", "E400" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E401] = { "$" "49", "E401" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E402] = { "$" "50", "E402" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E403] = { "$" "51", "E403" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E500] = { "$" "52", "E500" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E501] = { "$" "53", "E501" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E502] = { "$" "54", "E502" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E503] = { "$" "55", "E503" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E600] = { "$" "56", "E600" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E601] = { "$" "57", "E601" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E602] = { "$" "58", "E602" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E603] = { "$" "59", "E603" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E700] = { "$" "60", "E700" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E701] = { "$" "61", "E701" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E702] = { "$" "62", "E702" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E703] = { "$" "63", "E703" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M001] = { "$" "64", "M001" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M011] = { "$" "65", "M011" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M021] = { "$" "66", "M021" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M031] = { "$" "67", "M031" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M101] = { "$" "68", "M101" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M111] = { "$" "69", "M111" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M121] = { "$" "70", "M121" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M131] = { "$" "71", "M131" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M201] = { "$" "72", "M201" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M211] = { "$" "73", "M211" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M221] = { "$" "74", "M221" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M231] = { "$" "75", "M231" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M301] = { "$" "76", "M301" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M311] = { "$" "77", "M311" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M321] = { "$" "78", "M321" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M331] = { "$" "79", "M331" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M401] = { "$" "80", "M401" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M411] = { "$" "81", "M411" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M421] = { "$" "82", "M421" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M431] = { "$" "83", "M431" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M501] = { "$" "84", "M501" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M511] = { "$" "85", "M511" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M521] = { "$" "86", "M521" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M531] = { "$" "87", "M531" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M601] = { "$" "88", "M601" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M611] = { "$" "89", "M611" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M621] = { "$" "90", "M621" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M631] = { "$" "91", "M631" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M701] = { "$" "92", "M701" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M711] = { "$" "93", "M711" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M721] = { "$" "94", "M721" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_M731] = { "$" "95", "M731" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E010] = { "$" "96", "E010" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E011] = { "$" "97", "E011" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E012] = { "$" "98", "E012" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E013] = { "$" "99", "E013" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E110] = { "$" "100", "E110" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E111] = { "$" "101", "E111" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E112] = { "$" "102", "E112" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E113] = { "$" "103", "E113" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E210] = { "$" "104", "E210" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E211] = { "$" "105", "E211" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E212] = { "$" "106", "E212" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E213] = { "$" "107", "E213" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E310] = { "$" "108", "E310" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E311] = { "$" "109", "E311" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E312] = { "$" "110", "E312" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E313] = { "$" "111", "E313" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E410] = { "$" "112", "E410" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E411] = { "$" "113", "E411" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E412] = { "$" "114", "E412" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E413] = { "$" "115", "E413" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E510] = { "$" "116", "E510" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E511] = { "$" "117", "E511" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E512] = { "$" "118", "E512" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E513] = { "$" "119", "E513" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E610] = { "$" "120", "E610" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E611] = { "$" "121", "E611" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E612] = { "$" "122", "E612" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E613] = { "$" "123", "E613" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E710] = { "$" "124", "E710" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E711] = { "$" "125", "E711" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E712] = { "$" "126", "E712" }, + [RABBITIZER_REG_R4000ALLEGREX_M3X3_E713] = { "$" "127", "E713" }, +}; +const char *RabbitizerRegister_R4000AllegrexM4x4_Names[][2] = { + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M000] = { "$" "0", "M000" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M010] = { "$" "1", "M010" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M020] = { "$" "2", "M020" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M030] = { "$" "3", "M030" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M100] = { "$" "4", "M100" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M110] = { "$" "5", "M110" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M120] = { "$" "6", "M120" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M130] = { "$" "7", "M130" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M200] = { "$" "8", "M200" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M210] = { "$" "9", "M210" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M220] = { "$" "10", "M220" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M230] = { "$" "11", "M230" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M300] = { "$" "12", "M300" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M310] = { "$" "13", "M310" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M320] = { "$" "14", "M320" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M330] = { "$" "15", "M330" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M400] = { "$" "16", "M400" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M410] = { "$" "17", "M410" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M420] = { "$" "18", "M420" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M430] = { "$" "19", "M430" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M500] = { "$" "20", "M500" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M510] = { "$" "21", "M510" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M520] = { "$" "22", "M520" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M530] = { "$" "23", "M530" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M600] = { "$" "24", "M600" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M610] = { "$" "25", "M610" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M620] = { "$" "26", "M620" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M630] = { "$" "27", "M630" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M700] = { "$" "28", "M700" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M710] = { "$" "29", "M710" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M720] = { "$" "30", "M720" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M730] = { "$" "31", "M730" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E000] = { "$" "32", "E000" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E001] = { "$" "33", "E001" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E002] = { "$" "34", "E002" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E003] = { "$" "35", "E003" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E100] = { "$" "36", "E100" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E101] = { "$" "37", "E101" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E102] = { "$" "38", "E102" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E103] = { "$" "39", "E103" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E200] = { "$" "40", "E200" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E201] = { "$" "41", "E201" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E202] = { "$" "42", "E202" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E203] = { "$" "43", "E203" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E300] = { "$" "44", "E300" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E301] = { "$" "45", "E301" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E302] = { "$" "46", "E302" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E303] = { "$" "47", "E303" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E400] = { "$" "48", "E400" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E401] = { "$" "49", "E401" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E402] = { "$" "50", "E402" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E403] = { "$" "51", "E403" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E500] = { "$" "52", "E500" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E501] = { "$" "53", "E501" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E502] = { "$" "54", "E502" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E503] = { "$" "55", "E503" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E600] = { "$" "56", "E600" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E601] = { "$" "57", "E601" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E602] = { "$" "58", "E602" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E603] = { "$" "59", "E603" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E700] = { "$" "60", "E700" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E701] = { "$" "61", "E701" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E702] = { "$" "62", "E702" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E703] = { "$" "63", "E703" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M002] = { "$" "64", "M002" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M012] = { "$" "65", "M012" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M022] = { "$" "66", "M022" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M032] = { "$" "67", "M032" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M102] = { "$" "68", "M102" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M112] = { "$" "69", "M112" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M122] = { "$" "70", "M122" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M132] = { "$" "71", "M132" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M202] = { "$" "72", "M202" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M212] = { "$" "73", "M212" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M222] = { "$" "74", "M222" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M232] = { "$" "75", "M232" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M302] = { "$" "76", "M302" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M312] = { "$" "77", "M312" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M322] = { "$" "78", "M322" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M332] = { "$" "79", "M332" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M402] = { "$" "80", "M402" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M412] = { "$" "81", "M412" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M422] = { "$" "82", "M422" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M432] = { "$" "83", "M432" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M502] = { "$" "84", "M502" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M512] = { "$" "85", "M512" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M522] = { "$" "86", "M522" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M532] = { "$" "87", "M532" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M602] = { "$" "88", "M602" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M612] = { "$" "89", "M612" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M622] = { "$" "90", "M622" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M632] = { "$" "91", "M632" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M702] = { "$" "92", "M702" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M712] = { "$" "93", "M712" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M722] = { "$" "94", "M722" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_M732] = { "$" "95", "M732" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E020] = { "$" "96", "E020" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E021] = { "$" "97", "E021" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E022] = { "$" "98", "E022" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E023] = { "$" "99", "E023" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E120] = { "$" "100", "E120" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E121] = { "$" "101", "E121" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E122] = { "$" "102", "E122" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E123] = { "$" "103", "E123" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E220] = { "$" "104", "E220" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E221] = { "$" "105", "E221" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E222] = { "$" "106", "E222" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E223] = { "$" "107", "E223" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E320] = { "$" "108", "E320" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E321] = { "$" "109", "E321" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E322] = { "$" "110", "E322" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E323] = { "$" "111", "E323" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E420] = { "$" "112", "E420" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E421] = { "$" "113", "E421" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E422] = { "$" "114", "E422" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E423] = { "$" "115", "E423" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E520] = { "$" "116", "E520" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E521] = { "$" "117", "E521" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E522] = { "$" "118", "E522" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E523] = { "$" "119", "E523" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E620] = { "$" "120", "E620" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E621] = { "$" "121", "E621" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E622] = { "$" "122", "E622" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E623] = { "$" "123", "E623" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E720] = { "$" "124", "E720" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E721] = { "$" "125", "E721" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E722] = { "$" "126", "E722" }, + [RABBITIZER_REG_R4000ALLEGREX_M4X4_E723] = { "$" "127", "E723" }, +}; +const char *RabbitizerRegister_R4000AllegrexVfpuControl_Names[][2] = { + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXS] = { "$" "128", "VFPU_PFXS" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXT] = { "$" "129", "VFPU_PFXT" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXD] = { "$" "130", "VFPU_PFXD" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_CC] = { "$" "131", "VFPU_CC" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_INF4] = { "$" "132", "VFPU_INF4" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RSV5] = { "$" "133", "VFPU_RSV5" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RSV6] = { "$" "134", "VFPU_RSV6" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_REV] = { "$" "135", "VFPU_REV" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX0] = { "$" "136", "VFPU_RCX0" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX1] = { "$" "137", "VFPU_RCX1" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX2] = { "$" "138", "VFPU_RCX2" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX3] = { "$" "139", "VFPU_RCX3" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX4] = { "$" "140", "VFPU_RCX4" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX5] = { "$" "141", "VFPU_RCX5" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX6] = { "$" "142", "VFPU_RCX6" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX7] = { "$" "143", "VFPU_RCX7" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_144] = { "$" "144", "$" "144" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_145] = { "$" "145", "$" "145" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_146] = { "$" "146", "$" "146" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_147] = { "$" "147", "$" "147" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_148] = { "$" "148", "$" "148" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_149] = { "$" "149", "$" "149" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_150] = { "$" "150", "$" "150" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_151] = { "$" "151", "$" "151" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_152] = { "$" "152", "$" "152" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_153] = { "$" "153", "$" "153" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_154] = { "$" "154", "$" "154" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_155] = { "$" "155", "$" "155" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_156] = { "$" "156", "$" "156" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_157] = { "$" "157", "$" "157" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_158] = { "$" "158", "$" "158" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_159] = { "$" "159", "$" "159" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_160] = { "$" "160", "$" "160" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_161] = { "$" "161", "$" "161" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_162] = { "$" "162", "$" "162" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_163] = { "$" "163", "$" "163" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_164] = { "$" "164", "$" "164" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_165] = { "$" "165", "$" "165" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_166] = { "$" "166", "$" "166" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_167] = { "$" "167", "$" "167" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_168] = { "$" "168", "$" "168" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_169] = { "$" "169", "$" "169" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_170] = { "$" "170", "$" "170" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_171] = { "$" "171", "$" "171" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_172] = { "$" "172", "$" "172" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_173] = { "$" "173", "$" "173" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_174] = { "$" "174", "$" "174" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_175] = { "$" "175", "$" "175" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_176] = { "$" "176", "$" "176" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_177] = { "$" "177", "$" "177" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_178] = { "$" "178", "$" "178" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_179] = { "$" "179", "$" "179" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_180] = { "$" "180", "$" "180" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_181] = { "$" "181", "$" "181" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_182] = { "$" "182", "$" "182" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_183] = { "$" "183", "$" "183" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_184] = { "$" "184", "$" "184" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_185] = { "$" "185", "$" "185" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_186] = { "$" "186", "$" "186" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_187] = { "$" "187", "$" "187" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_188] = { "$" "188", "$" "188" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_189] = { "$" "189", "$" "189" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_190] = { "$" "190", "$" "190" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_191] = { "$" "191", "$" "191" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_192] = { "$" "192", "$" "192" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_193] = { "$" "193", "$" "193" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_194] = { "$" "194", "$" "194" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_195] = { "$" "195", "$" "195" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_196] = { "$" "196", "$" "196" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_197] = { "$" "197", "$" "197" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_198] = { "$" "198", "$" "198" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_199] = { "$" "199", "$" "199" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_200] = { "$" "200", "$" "200" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_201] = { "$" "201", "$" "201" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_202] = { "$" "202", "$" "202" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_203] = { "$" "203", "$" "203" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_204] = { "$" "204", "$" "204" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_205] = { "$" "205", "$" "205" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_206] = { "$" "206", "$" "206" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_207] = { "$" "207", "$" "207" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_208] = { "$" "208", "$" "208" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_209] = { "$" "209", "$" "209" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_210] = { "$" "210", "$" "210" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_211] = { "$" "211", "$" "211" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_212] = { "$" "212", "$" "212" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_213] = { "$" "213", "$" "213" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_214] = { "$" "214", "$" "214" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_215] = { "$" "215", "$" "215" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_216] = { "$" "216", "$" "216" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_217] = { "$" "217", "$" "217" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_218] = { "$" "218", "$" "218" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_219] = { "$" "219", "$" "219" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_220] = { "$" "220", "$" "220" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_221] = { "$" "221", "$" "221" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_222] = { "$" "222", "$" "222" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_223] = { "$" "223", "$" "223" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_224] = { "$" "224", "$" "224" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_225] = { "$" "225", "$" "225" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_226] = { "$" "226", "$" "226" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_227] = { "$" "227", "$" "227" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_228] = { "$" "228", "$" "228" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_229] = { "$" "229", "$" "229" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_230] = { "$" "230", "$" "230" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_231] = { "$" "231", "$" "231" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_232] = { "$" "232", "$" "232" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_233] = { "$" "233", "$" "233" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_234] = { "$" "234", "$" "234" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_235] = { "$" "235", "$" "235" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_236] = { "$" "236", "$" "236" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_237] = { "$" "237", "$" "237" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_238] = { "$" "238", "$" "238" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_239] = { "$" "239", "$" "239" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_240] = { "$" "240", "$" "240" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_241] = { "$" "241", "$" "241" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_242] = { "$" "242", "$" "242" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_243] = { "$" "243", "$" "243" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_244] = { "$" "244", "$" "244" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_245] = { "$" "245", "$" "245" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_246] = { "$" "246", "$" "246" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_247] = { "$" "247", "$" "247" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_248] = { "$" "248", "$" "248" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_249] = { "$" "249", "$" "249" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_250] = { "$" "250", "$" "250" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_251] = { "$" "251", "$" "251" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_252] = { "$" "252", "$" "252" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_253] = { "$" "253", "$" "253" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_254] = { "$" "254", "$" "254" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_255] = { "$" "255", "$" "255" }, +}; +const char *RabbitizerRegister_R4000AllegrexVConstant_Names[][2] = { + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_0] = { "$" "0", "INVALID_0" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_HUGE] = { "$" "1", "VFPU_HUGE" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_SQRT2] = { "$" "2", "VFPU_SQRT2" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_SQRT1_2] = { "$" "3", "VFPU_SQRT1_2" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_2_SQRTPI] = { "$" "4", "VFPU_2_SQRTPI" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_2_PI] = { "$" "5", "VFPU_2_PI" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_1_PI] = { "$" "6", "VFPU_1_PI" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_PI_4] = { "$" "7", "VFPU_PI_4" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_PI_2] = { "$" "8", "VFPU_PI_2" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_PI] = { "$" "9", "VFPU_PI" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_E] = { "$" "10", "VFPU_E" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LOG2E] = { "$" "11", "VFPU_LOG2E" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LOG10E] = { "$" "12", "VFPU_LOG10E" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LN2] = { "$" "13", "VFPU_LN2" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LN10] = { "$" "14", "VFPU_LN10" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_2PI] = { "$" "15", "VFPU_2PI" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_PI_6] = { "$" "16", "VFPU_PI_6" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LOG10TWO] = { "$" "17", "VFPU_LOG10TWO" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LOG2TEN] = { "$" "18", "VFPU_LOG2TEN" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_SQRT3_2] = { "$" "19", "VFPU_SQRT3_2" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_20] = { "$" "20", "INVALID_20" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_21] = { "$" "21", "INVALID_21" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_22] = { "$" "22", "INVALID_22" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_23] = { "$" "23", "INVALID_23" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_24] = { "$" "24", "INVALID_24" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_25] = { "$" "25", "INVALID_25" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_26] = { "$" "26", "INVALID_26" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_27] = { "$" "27", "INVALID_27" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_28] = { "$" "28", "INVALID_28" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_29] = { "$" "29", "INVALID_29" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_30] = { "$" "30", "INVALID_30" }, + [RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_31] = { "$" "31", "INVALID_31" }, +}; const char *RabbitizerRegister_R5900VF_Names[][2] = { [RABBITIZER_REG_R5900_VF_vf0] = { "$" "vf0", "$" "vf0" }, [RABBITIZER_REG_R5900_VF_vf1] = { "$" "vf1", "$" "vf1" }, diff --git a/include/generated/Registers_enums.h b/include/generated/Registers_enums.h index 8052c690..44661e51 100644 --- a/include/generated/Registers_enums.h +++ b/include/generated/Registers_enums.h @@ -432,6 +432,1080 @@ typedef enum RabbitizerRegister_RspVector { RABBITIZER_REG_RSP_VECTOR_v30, RABBITIZER_REG_RSP_VECTOR_v31, } RabbitizerRegister_RspVector; +typedef enum RabbitizerRegister_R4000AllegrexS { + RABBITIZER_REG_R4000ALLEGREX_S_S000, + RABBITIZER_REG_R4000ALLEGREX_S_S010, + RABBITIZER_REG_R4000ALLEGREX_S_S020, + RABBITIZER_REG_R4000ALLEGREX_S_S030, + RABBITIZER_REG_R4000ALLEGREX_S_S100, + RABBITIZER_REG_R4000ALLEGREX_S_S110, + RABBITIZER_REG_R4000ALLEGREX_S_S120, + RABBITIZER_REG_R4000ALLEGREX_S_S130, + RABBITIZER_REG_R4000ALLEGREX_S_S200, + RABBITIZER_REG_R4000ALLEGREX_S_S210, + RABBITIZER_REG_R4000ALLEGREX_S_S220, + RABBITIZER_REG_R4000ALLEGREX_S_S230, + RABBITIZER_REG_R4000ALLEGREX_S_S300, + RABBITIZER_REG_R4000ALLEGREX_S_S310, + RABBITIZER_REG_R4000ALLEGREX_S_S320, + RABBITIZER_REG_R4000ALLEGREX_S_S330, + RABBITIZER_REG_R4000ALLEGREX_S_S400, + RABBITIZER_REG_R4000ALLEGREX_S_S410, + RABBITIZER_REG_R4000ALLEGREX_S_S420, + RABBITIZER_REG_R4000ALLEGREX_S_S430, + RABBITIZER_REG_R4000ALLEGREX_S_S500, + RABBITIZER_REG_R4000ALLEGREX_S_S510, + RABBITIZER_REG_R4000ALLEGREX_S_S520, + RABBITIZER_REG_R4000ALLEGREX_S_S530, + RABBITIZER_REG_R4000ALLEGREX_S_S600, + RABBITIZER_REG_R4000ALLEGREX_S_S610, + RABBITIZER_REG_R4000ALLEGREX_S_S620, + RABBITIZER_REG_R4000ALLEGREX_S_S630, + RABBITIZER_REG_R4000ALLEGREX_S_S700, + RABBITIZER_REG_R4000ALLEGREX_S_S710, + RABBITIZER_REG_R4000ALLEGREX_S_S720, + RABBITIZER_REG_R4000ALLEGREX_S_S730, + RABBITIZER_REG_R4000ALLEGREX_S_S001, + RABBITIZER_REG_R4000ALLEGREX_S_S011, + RABBITIZER_REG_R4000ALLEGREX_S_S021, + RABBITIZER_REG_R4000ALLEGREX_S_S031, + RABBITIZER_REG_R4000ALLEGREX_S_S101, + RABBITIZER_REG_R4000ALLEGREX_S_S111, + RABBITIZER_REG_R4000ALLEGREX_S_S121, + RABBITIZER_REG_R4000ALLEGREX_S_S131, + RABBITIZER_REG_R4000ALLEGREX_S_S201, + RABBITIZER_REG_R4000ALLEGREX_S_S211, + RABBITIZER_REG_R4000ALLEGREX_S_S221, + RABBITIZER_REG_R4000ALLEGREX_S_S231, + RABBITIZER_REG_R4000ALLEGREX_S_S301, + RABBITIZER_REG_R4000ALLEGREX_S_S311, + RABBITIZER_REG_R4000ALLEGREX_S_S321, + RABBITIZER_REG_R4000ALLEGREX_S_S331, + RABBITIZER_REG_R4000ALLEGREX_S_S401, + RABBITIZER_REG_R4000ALLEGREX_S_S411, + RABBITIZER_REG_R4000ALLEGREX_S_S421, + RABBITIZER_REG_R4000ALLEGREX_S_S431, + RABBITIZER_REG_R4000ALLEGREX_S_S501, + RABBITIZER_REG_R4000ALLEGREX_S_S511, + RABBITIZER_REG_R4000ALLEGREX_S_S521, + RABBITIZER_REG_R4000ALLEGREX_S_S531, + RABBITIZER_REG_R4000ALLEGREX_S_S601, + RABBITIZER_REG_R4000ALLEGREX_S_S611, + RABBITIZER_REG_R4000ALLEGREX_S_S621, + RABBITIZER_REG_R4000ALLEGREX_S_S631, + RABBITIZER_REG_R4000ALLEGREX_S_S701, + RABBITIZER_REG_R4000ALLEGREX_S_S711, + RABBITIZER_REG_R4000ALLEGREX_S_S721, + RABBITIZER_REG_R4000ALLEGREX_S_S731, + RABBITIZER_REG_R4000ALLEGREX_S_S002, + RABBITIZER_REG_R4000ALLEGREX_S_S012, + RABBITIZER_REG_R4000ALLEGREX_S_S022, + RABBITIZER_REG_R4000ALLEGREX_S_S032, + RABBITIZER_REG_R4000ALLEGREX_S_S102, + RABBITIZER_REG_R4000ALLEGREX_S_S112, + RABBITIZER_REG_R4000ALLEGREX_S_S122, + RABBITIZER_REG_R4000ALLEGREX_S_S132, + RABBITIZER_REG_R4000ALLEGREX_S_S202, + RABBITIZER_REG_R4000ALLEGREX_S_S212, + RABBITIZER_REG_R4000ALLEGREX_S_S222, + RABBITIZER_REG_R4000ALLEGREX_S_S232, + RABBITIZER_REG_R4000ALLEGREX_S_S302, + RABBITIZER_REG_R4000ALLEGREX_S_S312, + RABBITIZER_REG_R4000ALLEGREX_S_S322, + RABBITIZER_REG_R4000ALLEGREX_S_S332, + RABBITIZER_REG_R4000ALLEGREX_S_S402, + RABBITIZER_REG_R4000ALLEGREX_S_S412, + RABBITIZER_REG_R4000ALLEGREX_S_S422, + RABBITIZER_REG_R4000ALLEGREX_S_S432, + RABBITIZER_REG_R4000ALLEGREX_S_S502, + RABBITIZER_REG_R4000ALLEGREX_S_S512, + RABBITIZER_REG_R4000ALLEGREX_S_S522, + RABBITIZER_REG_R4000ALLEGREX_S_S532, + RABBITIZER_REG_R4000ALLEGREX_S_S602, + RABBITIZER_REG_R4000ALLEGREX_S_S612, + RABBITIZER_REG_R4000ALLEGREX_S_S622, + RABBITIZER_REG_R4000ALLEGREX_S_S632, + RABBITIZER_REG_R4000ALLEGREX_S_S702, + RABBITIZER_REG_R4000ALLEGREX_S_S712, + RABBITIZER_REG_R4000ALLEGREX_S_S722, + RABBITIZER_REG_R4000ALLEGREX_S_S732, + RABBITIZER_REG_R4000ALLEGREX_S_S003, + RABBITIZER_REG_R4000ALLEGREX_S_S013, + RABBITIZER_REG_R4000ALLEGREX_S_S023, + RABBITIZER_REG_R4000ALLEGREX_S_S033, + RABBITIZER_REG_R4000ALLEGREX_S_S103, + RABBITIZER_REG_R4000ALLEGREX_S_S113, + RABBITIZER_REG_R4000ALLEGREX_S_S123, + RABBITIZER_REG_R4000ALLEGREX_S_S133, + RABBITIZER_REG_R4000ALLEGREX_S_S203, + RABBITIZER_REG_R4000ALLEGREX_S_S213, + RABBITIZER_REG_R4000ALLEGREX_S_S223, + RABBITIZER_REG_R4000ALLEGREX_S_S233, + RABBITIZER_REG_R4000ALLEGREX_S_S303, + RABBITIZER_REG_R4000ALLEGREX_S_S313, + RABBITIZER_REG_R4000ALLEGREX_S_S323, + RABBITIZER_REG_R4000ALLEGREX_S_S333, + RABBITIZER_REG_R4000ALLEGREX_S_S403, + RABBITIZER_REG_R4000ALLEGREX_S_S413, + RABBITIZER_REG_R4000ALLEGREX_S_S423, + RABBITIZER_REG_R4000ALLEGREX_S_S433, + RABBITIZER_REG_R4000ALLEGREX_S_S503, + RABBITIZER_REG_R4000ALLEGREX_S_S513, + RABBITIZER_REG_R4000ALLEGREX_S_S523, + RABBITIZER_REG_R4000ALLEGREX_S_S533, + RABBITIZER_REG_R4000ALLEGREX_S_S603, + RABBITIZER_REG_R4000ALLEGREX_S_S613, + RABBITIZER_REG_R4000ALLEGREX_S_S623, + RABBITIZER_REG_R4000ALLEGREX_S_S633, + RABBITIZER_REG_R4000ALLEGREX_S_S703, + RABBITIZER_REG_R4000ALLEGREX_S_S713, + RABBITIZER_REG_R4000ALLEGREX_S_S723, + RABBITIZER_REG_R4000ALLEGREX_S_S733, +} RabbitizerRegister_R4000AllegrexS; +typedef enum RabbitizerRegister_R4000AllegrexV2D { + RABBITIZER_REG_R4000ALLEGREX_V2D_C000, + RABBITIZER_REG_R4000ALLEGREX_V2D_C010, + RABBITIZER_REG_R4000ALLEGREX_V2D_C020, + RABBITIZER_REG_R4000ALLEGREX_V2D_C030, + RABBITIZER_REG_R4000ALLEGREX_V2D_C100, + RABBITIZER_REG_R4000ALLEGREX_V2D_C110, + RABBITIZER_REG_R4000ALLEGREX_V2D_C120, + RABBITIZER_REG_R4000ALLEGREX_V2D_C130, + RABBITIZER_REG_R4000ALLEGREX_V2D_C200, + RABBITIZER_REG_R4000ALLEGREX_V2D_C210, + RABBITIZER_REG_R4000ALLEGREX_V2D_C220, + RABBITIZER_REG_R4000ALLEGREX_V2D_C230, + RABBITIZER_REG_R4000ALLEGREX_V2D_C300, + RABBITIZER_REG_R4000ALLEGREX_V2D_C310, + RABBITIZER_REG_R4000ALLEGREX_V2D_C320, + RABBITIZER_REG_R4000ALLEGREX_V2D_C330, + RABBITIZER_REG_R4000ALLEGREX_V2D_C400, + RABBITIZER_REG_R4000ALLEGREX_V2D_C410, + RABBITIZER_REG_R4000ALLEGREX_V2D_C420, + RABBITIZER_REG_R4000ALLEGREX_V2D_C430, + RABBITIZER_REG_R4000ALLEGREX_V2D_C500, + RABBITIZER_REG_R4000ALLEGREX_V2D_C510, + RABBITIZER_REG_R4000ALLEGREX_V2D_C520, + RABBITIZER_REG_R4000ALLEGREX_V2D_C530, + RABBITIZER_REG_R4000ALLEGREX_V2D_C600, + RABBITIZER_REG_R4000ALLEGREX_V2D_C610, + RABBITIZER_REG_R4000ALLEGREX_V2D_C620, + RABBITIZER_REG_R4000ALLEGREX_V2D_C630, + RABBITIZER_REG_R4000ALLEGREX_V2D_C700, + RABBITIZER_REG_R4000ALLEGREX_V2D_C710, + RABBITIZER_REG_R4000ALLEGREX_V2D_C720, + RABBITIZER_REG_R4000ALLEGREX_V2D_C730, + RABBITIZER_REG_R4000ALLEGREX_V2D_R000, + RABBITIZER_REG_R4000ALLEGREX_V2D_R001, + RABBITIZER_REG_R4000ALLEGREX_V2D_R002, + RABBITIZER_REG_R4000ALLEGREX_V2D_R003, + RABBITIZER_REG_R4000ALLEGREX_V2D_R100, + RABBITIZER_REG_R4000ALLEGREX_V2D_R101, + RABBITIZER_REG_R4000ALLEGREX_V2D_R102, + RABBITIZER_REG_R4000ALLEGREX_V2D_R103, + RABBITIZER_REG_R4000ALLEGREX_V2D_R200, + RABBITIZER_REG_R4000ALLEGREX_V2D_R201, + RABBITIZER_REG_R4000ALLEGREX_V2D_R202, + RABBITIZER_REG_R4000ALLEGREX_V2D_R203, + RABBITIZER_REG_R4000ALLEGREX_V2D_R300, + RABBITIZER_REG_R4000ALLEGREX_V2D_R301, + RABBITIZER_REG_R4000ALLEGREX_V2D_R302, + RABBITIZER_REG_R4000ALLEGREX_V2D_R303, + RABBITIZER_REG_R4000ALLEGREX_V2D_R400, + RABBITIZER_REG_R4000ALLEGREX_V2D_R401, + RABBITIZER_REG_R4000ALLEGREX_V2D_R402, + RABBITIZER_REG_R4000ALLEGREX_V2D_R403, + RABBITIZER_REG_R4000ALLEGREX_V2D_R500, + RABBITIZER_REG_R4000ALLEGREX_V2D_R501, + RABBITIZER_REG_R4000ALLEGREX_V2D_R502, + RABBITIZER_REG_R4000ALLEGREX_V2D_R503, + RABBITIZER_REG_R4000ALLEGREX_V2D_R600, + RABBITIZER_REG_R4000ALLEGREX_V2D_R601, + RABBITIZER_REG_R4000ALLEGREX_V2D_R602, + RABBITIZER_REG_R4000ALLEGREX_V2D_R603, + RABBITIZER_REG_R4000ALLEGREX_V2D_R700, + RABBITIZER_REG_R4000ALLEGREX_V2D_R701, + RABBITIZER_REG_R4000ALLEGREX_V2D_R702, + RABBITIZER_REG_R4000ALLEGREX_V2D_R703, + RABBITIZER_REG_R4000ALLEGREX_V2D_C002, + RABBITIZER_REG_R4000ALLEGREX_V2D_C012, + RABBITIZER_REG_R4000ALLEGREX_V2D_C022, + RABBITIZER_REG_R4000ALLEGREX_V2D_C032, + RABBITIZER_REG_R4000ALLEGREX_V2D_C102, + RABBITIZER_REG_R4000ALLEGREX_V2D_C112, + RABBITIZER_REG_R4000ALLEGREX_V2D_C122, + RABBITIZER_REG_R4000ALLEGREX_V2D_C132, + RABBITIZER_REG_R4000ALLEGREX_V2D_C202, + RABBITIZER_REG_R4000ALLEGREX_V2D_C212, + RABBITIZER_REG_R4000ALLEGREX_V2D_C222, + RABBITIZER_REG_R4000ALLEGREX_V2D_C232, + RABBITIZER_REG_R4000ALLEGREX_V2D_C302, + RABBITIZER_REG_R4000ALLEGREX_V2D_C312, + RABBITIZER_REG_R4000ALLEGREX_V2D_C322, + RABBITIZER_REG_R4000ALLEGREX_V2D_C332, + RABBITIZER_REG_R4000ALLEGREX_V2D_C402, + RABBITIZER_REG_R4000ALLEGREX_V2D_C412, + RABBITIZER_REG_R4000ALLEGREX_V2D_C422, + RABBITIZER_REG_R4000ALLEGREX_V2D_C432, + RABBITIZER_REG_R4000ALLEGREX_V2D_C502, + RABBITIZER_REG_R4000ALLEGREX_V2D_C512, + RABBITIZER_REG_R4000ALLEGREX_V2D_C522, + RABBITIZER_REG_R4000ALLEGREX_V2D_C532, + RABBITIZER_REG_R4000ALLEGREX_V2D_C602, + RABBITIZER_REG_R4000ALLEGREX_V2D_C612, + RABBITIZER_REG_R4000ALLEGREX_V2D_C622, + RABBITIZER_REG_R4000ALLEGREX_V2D_C632, + RABBITIZER_REG_R4000ALLEGREX_V2D_C702, + RABBITIZER_REG_R4000ALLEGREX_V2D_C712, + RABBITIZER_REG_R4000ALLEGREX_V2D_C722, + RABBITIZER_REG_R4000ALLEGREX_V2D_C732, + RABBITIZER_REG_R4000ALLEGREX_V2D_R020, + RABBITIZER_REG_R4000ALLEGREX_V2D_R021, + RABBITIZER_REG_R4000ALLEGREX_V2D_R022, + RABBITIZER_REG_R4000ALLEGREX_V2D_R023, + RABBITIZER_REG_R4000ALLEGREX_V2D_R120, + RABBITIZER_REG_R4000ALLEGREX_V2D_R121, + RABBITIZER_REG_R4000ALLEGREX_V2D_R122, + RABBITIZER_REG_R4000ALLEGREX_V2D_R123, + RABBITIZER_REG_R4000ALLEGREX_V2D_R220, + RABBITIZER_REG_R4000ALLEGREX_V2D_R221, + RABBITIZER_REG_R4000ALLEGREX_V2D_R222, + RABBITIZER_REG_R4000ALLEGREX_V2D_R223, + RABBITIZER_REG_R4000ALLEGREX_V2D_R320, + RABBITIZER_REG_R4000ALLEGREX_V2D_R321, + RABBITIZER_REG_R4000ALLEGREX_V2D_R322, + RABBITIZER_REG_R4000ALLEGREX_V2D_R323, + RABBITIZER_REG_R4000ALLEGREX_V2D_R420, + RABBITIZER_REG_R4000ALLEGREX_V2D_R421, + RABBITIZER_REG_R4000ALLEGREX_V2D_R422, + RABBITIZER_REG_R4000ALLEGREX_V2D_R423, + RABBITIZER_REG_R4000ALLEGREX_V2D_R520, + RABBITIZER_REG_R4000ALLEGREX_V2D_R521, + RABBITIZER_REG_R4000ALLEGREX_V2D_R522, + RABBITIZER_REG_R4000ALLEGREX_V2D_R523, + RABBITIZER_REG_R4000ALLEGREX_V2D_R620, + RABBITIZER_REG_R4000ALLEGREX_V2D_R621, + RABBITIZER_REG_R4000ALLEGREX_V2D_R622, + RABBITIZER_REG_R4000ALLEGREX_V2D_R623, + RABBITIZER_REG_R4000ALLEGREX_V2D_R720, + RABBITIZER_REG_R4000ALLEGREX_V2D_R721, + RABBITIZER_REG_R4000ALLEGREX_V2D_R722, + RABBITIZER_REG_R4000ALLEGREX_V2D_R723, +} RabbitizerRegister_R4000AllegrexV2D; +typedef enum RabbitizerRegister_R4000AllegrexV3D { + RABBITIZER_REG_R4000ALLEGREX_V3D_C000, + RABBITIZER_REG_R4000ALLEGREX_V3D_C010, + RABBITIZER_REG_R4000ALLEGREX_V3D_C020, + RABBITIZER_REG_R4000ALLEGREX_V3D_C030, + RABBITIZER_REG_R4000ALLEGREX_V3D_C100, + RABBITIZER_REG_R4000ALLEGREX_V3D_C110, + RABBITIZER_REG_R4000ALLEGREX_V3D_C120, + RABBITIZER_REG_R4000ALLEGREX_V3D_C130, + RABBITIZER_REG_R4000ALLEGREX_V3D_C200, + RABBITIZER_REG_R4000ALLEGREX_V3D_C210, + RABBITIZER_REG_R4000ALLEGREX_V3D_C220, + RABBITIZER_REG_R4000ALLEGREX_V3D_C230, + RABBITIZER_REG_R4000ALLEGREX_V3D_C300, + RABBITIZER_REG_R4000ALLEGREX_V3D_C310, + RABBITIZER_REG_R4000ALLEGREX_V3D_C320, + RABBITIZER_REG_R4000ALLEGREX_V3D_C330, + RABBITIZER_REG_R4000ALLEGREX_V3D_C400, + RABBITIZER_REG_R4000ALLEGREX_V3D_C410, + RABBITIZER_REG_R4000ALLEGREX_V3D_C420, + RABBITIZER_REG_R4000ALLEGREX_V3D_C430, + RABBITIZER_REG_R4000ALLEGREX_V3D_C500, + RABBITIZER_REG_R4000ALLEGREX_V3D_C510, + RABBITIZER_REG_R4000ALLEGREX_V3D_C520, + RABBITIZER_REG_R4000ALLEGREX_V3D_C530, + RABBITIZER_REG_R4000ALLEGREX_V3D_C600, + RABBITIZER_REG_R4000ALLEGREX_V3D_C610, + RABBITIZER_REG_R4000ALLEGREX_V3D_C620, + RABBITIZER_REG_R4000ALLEGREX_V3D_C630, + RABBITIZER_REG_R4000ALLEGREX_V3D_C700, + RABBITIZER_REG_R4000ALLEGREX_V3D_C710, + RABBITIZER_REG_R4000ALLEGREX_V3D_C720, + RABBITIZER_REG_R4000ALLEGREX_V3D_C730, + RABBITIZER_REG_R4000ALLEGREX_V3D_R000, + RABBITIZER_REG_R4000ALLEGREX_V3D_R001, + RABBITIZER_REG_R4000ALLEGREX_V3D_R002, + RABBITIZER_REG_R4000ALLEGREX_V3D_R003, + RABBITIZER_REG_R4000ALLEGREX_V3D_R100, + RABBITIZER_REG_R4000ALLEGREX_V3D_R101, + RABBITIZER_REG_R4000ALLEGREX_V3D_R102, + RABBITIZER_REG_R4000ALLEGREX_V3D_R103, + RABBITIZER_REG_R4000ALLEGREX_V3D_R200, + RABBITIZER_REG_R4000ALLEGREX_V3D_R201, + RABBITIZER_REG_R4000ALLEGREX_V3D_R202, + RABBITIZER_REG_R4000ALLEGREX_V3D_R203, + RABBITIZER_REG_R4000ALLEGREX_V3D_R300, + RABBITIZER_REG_R4000ALLEGREX_V3D_R301, + RABBITIZER_REG_R4000ALLEGREX_V3D_R302, + RABBITIZER_REG_R4000ALLEGREX_V3D_R303, + RABBITIZER_REG_R4000ALLEGREX_V3D_R400, + RABBITIZER_REG_R4000ALLEGREX_V3D_R401, + RABBITIZER_REG_R4000ALLEGREX_V3D_R402, + RABBITIZER_REG_R4000ALLEGREX_V3D_R403, + RABBITIZER_REG_R4000ALLEGREX_V3D_R500, + RABBITIZER_REG_R4000ALLEGREX_V3D_R501, + RABBITIZER_REG_R4000ALLEGREX_V3D_R502, + RABBITIZER_REG_R4000ALLEGREX_V3D_R503, + RABBITIZER_REG_R4000ALLEGREX_V3D_R600, + RABBITIZER_REG_R4000ALLEGREX_V3D_R601, + RABBITIZER_REG_R4000ALLEGREX_V3D_R602, + RABBITIZER_REG_R4000ALLEGREX_V3D_R603, + RABBITIZER_REG_R4000ALLEGREX_V3D_R700, + RABBITIZER_REG_R4000ALLEGREX_V3D_R701, + RABBITIZER_REG_R4000ALLEGREX_V3D_R702, + RABBITIZER_REG_R4000ALLEGREX_V3D_R703, + RABBITIZER_REG_R4000ALLEGREX_V3D_C001, + RABBITIZER_REG_R4000ALLEGREX_V3D_C011, + RABBITIZER_REG_R4000ALLEGREX_V3D_C021, + RABBITIZER_REG_R4000ALLEGREX_V3D_C031, + RABBITIZER_REG_R4000ALLEGREX_V3D_C101, + RABBITIZER_REG_R4000ALLEGREX_V3D_C111, + RABBITIZER_REG_R4000ALLEGREX_V3D_C121, + RABBITIZER_REG_R4000ALLEGREX_V3D_C131, + RABBITIZER_REG_R4000ALLEGREX_V3D_C201, + RABBITIZER_REG_R4000ALLEGREX_V3D_C211, + RABBITIZER_REG_R4000ALLEGREX_V3D_C221, + RABBITIZER_REG_R4000ALLEGREX_V3D_C231, + RABBITIZER_REG_R4000ALLEGREX_V3D_C301, + RABBITIZER_REG_R4000ALLEGREX_V3D_C311, + RABBITIZER_REG_R4000ALLEGREX_V3D_C321, + RABBITIZER_REG_R4000ALLEGREX_V3D_C331, + RABBITIZER_REG_R4000ALLEGREX_V3D_C401, + RABBITIZER_REG_R4000ALLEGREX_V3D_C411, + RABBITIZER_REG_R4000ALLEGREX_V3D_C421, + RABBITIZER_REG_R4000ALLEGREX_V3D_C431, + RABBITIZER_REG_R4000ALLEGREX_V3D_C501, + RABBITIZER_REG_R4000ALLEGREX_V3D_C511, + RABBITIZER_REG_R4000ALLEGREX_V3D_C521, + RABBITIZER_REG_R4000ALLEGREX_V3D_C531, + RABBITIZER_REG_R4000ALLEGREX_V3D_C601, + RABBITIZER_REG_R4000ALLEGREX_V3D_C611, + RABBITIZER_REG_R4000ALLEGREX_V3D_C621, + RABBITIZER_REG_R4000ALLEGREX_V3D_C631, + RABBITIZER_REG_R4000ALLEGREX_V3D_C701, + RABBITIZER_REG_R4000ALLEGREX_V3D_C711, + RABBITIZER_REG_R4000ALLEGREX_V3D_C721, + RABBITIZER_REG_R4000ALLEGREX_V3D_C731, + RABBITIZER_REG_R4000ALLEGREX_V3D_R010, + RABBITIZER_REG_R4000ALLEGREX_V3D_R011, + RABBITIZER_REG_R4000ALLEGREX_V3D_R012, + RABBITIZER_REG_R4000ALLEGREX_V3D_R013, + RABBITIZER_REG_R4000ALLEGREX_V3D_R110, + RABBITIZER_REG_R4000ALLEGREX_V3D_R111, + RABBITIZER_REG_R4000ALLEGREX_V3D_R112, + RABBITIZER_REG_R4000ALLEGREX_V3D_R113, + RABBITIZER_REG_R4000ALLEGREX_V3D_R210, + RABBITIZER_REG_R4000ALLEGREX_V3D_R211, + RABBITIZER_REG_R4000ALLEGREX_V3D_R212, + RABBITIZER_REG_R4000ALLEGREX_V3D_R213, + RABBITIZER_REG_R4000ALLEGREX_V3D_R310, + RABBITIZER_REG_R4000ALLEGREX_V3D_R311, + RABBITIZER_REG_R4000ALLEGREX_V3D_R312, + RABBITIZER_REG_R4000ALLEGREX_V3D_R313, + RABBITIZER_REG_R4000ALLEGREX_V3D_R410, + RABBITIZER_REG_R4000ALLEGREX_V3D_R411, + RABBITIZER_REG_R4000ALLEGREX_V3D_R412, + RABBITIZER_REG_R4000ALLEGREX_V3D_R413, + RABBITIZER_REG_R4000ALLEGREX_V3D_R510, + RABBITIZER_REG_R4000ALLEGREX_V3D_R511, + RABBITIZER_REG_R4000ALLEGREX_V3D_R512, + RABBITIZER_REG_R4000ALLEGREX_V3D_R513, + RABBITIZER_REG_R4000ALLEGREX_V3D_R610, + RABBITIZER_REG_R4000ALLEGREX_V3D_R611, + RABBITIZER_REG_R4000ALLEGREX_V3D_R612, + RABBITIZER_REG_R4000ALLEGREX_V3D_R613, + RABBITIZER_REG_R4000ALLEGREX_V3D_R710, + RABBITIZER_REG_R4000ALLEGREX_V3D_R711, + RABBITIZER_REG_R4000ALLEGREX_V3D_R712, + RABBITIZER_REG_R4000ALLEGREX_V3D_R713, +} RabbitizerRegister_R4000AllegrexV3D; +typedef enum RabbitizerRegister_R4000AllegrexV4D { + RABBITIZER_REG_R4000ALLEGREX_V4D_C000, + RABBITIZER_REG_R4000ALLEGREX_V4D_C010, + RABBITIZER_REG_R4000ALLEGREX_V4D_C020, + RABBITIZER_REG_R4000ALLEGREX_V4D_C030, + RABBITIZER_REG_R4000ALLEGREX_V4D_C100, + RABBITIZER_REG_R4000ALLEGREX_V4D_C110, + RABBITIZER_REG_R4000ALLEGREX_V4D_C120, + RABBITIZER_REG_R4000ALLEGREX_V4D_C130, + RABBITIZER_REG_R4000ALLEGREX_V4D_C200, + RABBITIZER_REG_R4000ALLEGREX_V4D_C210, + RABBITIZER_REG_R4000ALLEGREX_V4D_C220, + RABBITIZER_REG_R4000ALLEGREX_V4D_C230, + RABBITIZER_REG_R4000ALLEGREX_V4D_C300, + RABBITIZER_REG_R4000ALLEGREX_V4D_C310, + RABBITIZER_REG_R4000ALLEGREX_V4D_C320, + RABBITIZER_REG_R4000ALLEGREX_V4D_C330, + RABBITIZER_REG_R4000ALLEGREX_V4D_C400, + RABBITIZER_REG_R4000ALLEGREX_V4D_C410, + RABBITIZER_REG_R4000ALLEGREX_V4D_C420, + RABBITIZER_REG_R4000ALLEGREX_V4D_C430, + RABBITIZER_REG_R4000ALLEGREX_V4D_C500, + RABBITIZER_REG_R4000ALLEGREX_V4D_C510, + RABBITIZER_REG_R4000ALLEGREX_V4D_C520, + RABBITIZER_REG_R4000ALLEGREX_V4D_C530, + RABBITIZER_REG_R4000ALLEGREX_V4D_C600, + RABBITIZER_REG_R4000ALLEGREX_V4D_C610, + RABBITIZER_REG_R4000ALLEGREX_V4D_C620, + RABBITIZER_REG_R4000ALLEGREX_V4D_C630, + RABBITIZER_REG_R4000ALLEGREX_V4D_C700, + RABBITIZER_REG_R4000ALLEGREX_V4D_C710, + RABBITIZER_REG_R4000ALLEGREX_V4D_C720, + RABBITIZER_REG_R4000ALLEGREX_V4D_C730, + RABBITIZER_REG_R4000ALLEGREX_V4D_R000, + RABBITIZER_REG_R4000ALLEGREX_V4D_R001, + RABBITIZER_REG_R4000ALLEGREX_V4D_R002, + RABBITIZER_REG_R4000ALLEGREX_V4D_R003, + RABBITIZER_REG_R4000ALLEGREX_V4D_R100, + RABBITIZER_REG_R4000ALLEGREX_V4D_R101, + RABBITIZER_REG_R4000ALLEGREX_V4D_R102, + RABBITIZER_REG_R4000ALLEGREX_V4D_R103, + RABBITIZER_REG_R4000ALLEGREX_V4D_R200, + RABBITIZER_REG_R4000ALLEGREX_V4D_R201, + RABBITIZER_REG_R4000ALLEGREX_V4D_R202, + RABBITIZER_REG_R4000ALLEGREX_V4D_R203, + RABBITIZER_REG_R4000ALLEGREX_V4D_R300, + RABBITIZER_REG_R4000ALLEGREX_V4D_R301, + RABBITIZER_REG_R4000ALLEGREX_V4D_R302, + RABBITIZER_REG_R4000ALLEGREX_V4D_R303, + RABBITIZER_REG_R4000ALLEGREX_V4D_R400, + RABBITIZER_REG_R4000ALLEGREX_V4D_R401, + RABBITIZER_REG_R4000ALLEGREX_V4D_R402, + RABBITIZER_REG_R4000ALLEGREX_V4D_R403, + RABBITIZER_REG_R4000ALLEGREX_V4D_R500, + RABBITIZER_REG_R4000ALLEGREX_V4D_R501, + RABBITIZER_REG_R4000ALLEGREX_V4D_R502, + RABBITIZER_REG_R4000ALLEGREX_V4D_R503, + RABBITIZER_REG_R4000ALLEGREX_V4D_R600, + RABBITIZER_REG_R4000ALLEGREX_V4D_R601, + RABBITIZER_REG_R4000ALLEGREX_V4D_R602, + RABBITIZER_REG_R4000ALLEGREX_V4D_R603, + RABBITIZER_REG_R4000ALLEGREX_V4D_R700, + RABBITIZER_REG_R4000ALLEGREX_V4D_R701, + RABBITIZER_REG_R4000ALLEGREX_V4D_R702, + RABBITIZER_REG_R4000ALLEGREX_V4D_R703, + RABBITIZER_REG_R4000ALLEGREX_V4D_C002, + RABBITIZER_REG_R4000ALLEGREX_V4D_C012, + RABBITIZER_REG_R4000ALLEGREX_V4D_C022, + RABBITIZER_REG_R4000ALLEGREX_V4D_C032, + RABBITIZER_REG_R4000ALLEGREX_V4D_C102, + RABBITIZER_REG_R4000ALLEGREX_V4D_C112, + RABBITIZER_REG_R4000ALLEGREX_V4D_C122, + RABBITIZER_REG_R4000ALLEGREX_V4D_C132, + RABBITIZER_REG_R4000ALLEGREX_V4D_C202, + RABBITIZER_REG_R4000ALLEGREX_V4D_C212, + RABBITIZER_REG_R4000ALLEGREX_V4D_C222, + RABBITIZER_REG_R4000ALLEGREX_V4D_C232, + RABBITIZER_REG_R4000ALLEGREX_V4D_C302, + RABBITIZER_REG_R4000ALLEGREX_V4D_C312, + RABBITIZER_REG_R4000ALLEGREX_V4D_C322, + RABBITIZER_REG_R4000ALLEGREX_V4D_C332, + RABBITIZER_REG_R4000ALLEGREX_V4D_C402, + RABBITIZER_REG_R4000ALLEGREX_V4D_C412, + RABBITIZER_REG_R4000ALLEGREX_V4D_C422, + RABBITIZER_REG_R4000ALLEGREX_V4D_C432, + RABBITIZER_REG_R4000ALLEGREX_V4D_C502, + RABBITIZER_REG_R4000ALLEGREX_V4D_C512, + RABBITIZER_REG_R4000ALLEGREX_V4D_C522, + RABBITIZER_REG_R4000ALLEGREX_V4D_C532, + RABBITIZER_REG_R4000ALLEGREX_V4D_C602, + RABBITIZER_REG_R4000ALLEGREX_V4D_C612, + RABBITIZER_REG_R4000ALLEGREX_V4D_C622, + RABBITIZER_REG_R4000ALLEGREX_V4D_C632, + RABBITIZER_REG_R4000ALLEGREX_V4D_C702, + RABBITIZER_REG_R4000ALLEGREX_V4D_C712, + RABBITIZER_REG_R4000ALLEGREX_V4D_C722, + RABBITIZER_REG_R4000ALLEGREX_V4D_C732, + RABBITIZER_REG_R4000ALLEGREX_V4D_R020, + RABBITIZER_REG_R4000ALLEGREX_V4D_R021, + RABBITIZER_REG_R4000ALLEGREX_V4D_R022, + RABBITIZER_REG_R4000ALLEGREX_V4D_R023, + RABBITIZER_REG_R4000ALLEGREX_V4D_R120, + RABBITIZER_REG_R4000ALLEGREX_V4D_R121, + RABBITIZER_REG_R4000ALLEGREX_V4D_R122, + RABBITIZER_REG_R4000ALLEGREX_V4D_R123, + RABBITIZER_REG_R4000ALLEGREX_V4D_R220, + RABBITIZER_REG_R4000ALLEGREX_V4D_R221, + RABBITIZER_REG_R4000ALLEGREX_V4D_R222, + RABBITIZER_REG_R4000ALLEGREX_V4D_R223, + RABBITIZER_REG_R4000ALLEGREX_V4D_R320, + RABBITIZER_REG_R4000ALLEGREX_V4D_R321, + RABBITIZER_REG_R4000ALLEGREX_V4D_R322, + RABBITIZER_REG_R4000ALLEGREX_V4D_R323, + RABBITIZER_REG_R4000ALLEGREX_V4D_R420, + RABBITIZER_REG_R4000ALLEGREX_V4D_R421, + RABBITIZER_REG_R4000ALLEGREX_V4D_R422, + RABBITIZER_REG_R4000ALLEGREX_V4D_R423, + RABBITIZER_REG_R4000ALLEGREX_V4D_R520, + RABBITIZER_REG_R4000ALLEGREX_V4D_R521, + RABBITIZER_REG_R4000ALLEGREX_V4D_R522, + RABBITIZER_REG_R4000ALLEGREX_V4D_R523, + RABBITIZER_REG_R4000ALLEGREX_V4D_R620, + RABBITIZER_REG_R4000ALLEGREX_V4D_R621, + RABBITIZER_REG_R4000ALLEGREX_V4D_R622, + RABBITIZER_REG_R4000ALLEGREX_V4D_R623, + RABBITIZER_REG_R4000ALLEGREX_V4D_R720, + RABBITIZER_REG_R4000ALLEGREX_V4D_R721, + RABBITIZER_REG_R4000ALLEGREX_V4D_R722, + RABBITIZER_REG_R4000ALLEGREX_V4D_R723, +} RabbitizerRegister_R4000AllegrexV4D; +typedef enum RabbitizerRegister_R4000AllegrexM2x2 { + RABBITIZER_REG_R4000ALLEGREX_M2X2_M000, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M010, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M020, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M030, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M100, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M110, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M120, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M130, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M200, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M210, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M220, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M230, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M300, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M310, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M320, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M330, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M400, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M410, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M420, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M430, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M500, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M510, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M520, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M530, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M600, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M610, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M620, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M630, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M700, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M710, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M720, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M730, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E000, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E001, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E002, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E003, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E100, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E101, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E102, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E103, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E200, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E201, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E202, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E203, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E300, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E301, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E302, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E303, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E400, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E401, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E402, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E403, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E500, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E501, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E502, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E503, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E600, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E601, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E602, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E603, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E700, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E701, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E702, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E703, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M002, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M012, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M022, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M032, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M102, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M112, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M122, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M132, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M202, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M212, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M222, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M232, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M302, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M312, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M322, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M332, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M402, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M412, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M422, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M432, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M502, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M512, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M522, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M532, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M602, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M612, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M622, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M632, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M702, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M712, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M722, + RABBITIZER_REG_R4000ALLEGREX_M2X2_M732, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E020, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E021, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E022, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E023, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E120, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E121, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E122, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E123, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E220, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E221, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E222, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E223, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E320, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E321, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E322, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E323, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E420, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E421, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E422, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E423, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E520, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E521, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E522, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E523, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E620, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E621, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E622, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E623, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E720, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E721, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E722, + RABBITIZER_REG_R4000ALLEGREX_M2X2_E723, +} RabbitizerRegister_R4000AllegrexM2x2; +typedef enum RabbitizerRegister_R4000AllegrexM3x3 { + RABBITIZER_REG_R4000ALLEGREX_M3X3_M000, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M010, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M020, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M030, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M100, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M110, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M120, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M130, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M200, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M210, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M220, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M230, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M300, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M310, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M320, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M330, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M400, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M410, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M420, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M430, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M500, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M510, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M520, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M530, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M600, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M610, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M620, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M630, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M700, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M710, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M720, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M730, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E000, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E001, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E002, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E003, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E100, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E101, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E102, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E103, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E200, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E201, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E202, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E203, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E300, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E301, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E302, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E303, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E400, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E401, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E402, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E403, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E500, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E501, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E502, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E503, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E600, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E601, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E602, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E603, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E700, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E701, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E702, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E703, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M001, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M011, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M021, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M031, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M101, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M111, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M121, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M131, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M201, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M211, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M221, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M231, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M301, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M311, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M321, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M331, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M401, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M411, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M421, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M431, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M501, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M511, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M521, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M531, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M601, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M611, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M621, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M631, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M701, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M711, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M721, + RABBITIZER_REG_R4000ALLEGREX_M3X3_M731, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E010, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E011, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E012, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E013, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E110, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E111, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E112, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E113, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E210, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E211, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E212, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E213, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E310, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E311, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E312, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E313, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E410, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E411, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E412, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E413, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E510, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E511, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E512, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E513, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E610, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E611, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E612, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E613, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E710, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E711, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E712, + RABBITIZER_REG_R4000ALLEGREX_M3X3_E713, +} RabbitizerRegister_R4000AllegrexM3x3; +typedef enum RabbitizerRegister_R4000AllegrexM4x4 { + RABBITIZER_REG_R4000ALLEGREX_M4X4_M000, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M010, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M020, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M030, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M100, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M110, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M120, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M130, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M200, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M210, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M220, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M230, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M300, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M310, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M320, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M330, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M400, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M410, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M420, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M430, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M500, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M510, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M520, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M530, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M600, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M610, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M620, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M630, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M700, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M710, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M720, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M730, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E000, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E001, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E002, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E003, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E100, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E101, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E102, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E103, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E200, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E201, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E202, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E203, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E300, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E301, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E302, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E303, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E400, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E401, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E402, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E403, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E500, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E501, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E502, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E503, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E600, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E601, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E602, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E603, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E700, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E701, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E702, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E703, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M002, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M012, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M022, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M032, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M102, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M112, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M122, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M132, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M202, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M212, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M222, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M232, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M302, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M312, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M322, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M332, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M402, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M412, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M422, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M432, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M502, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M512, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M522, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M532, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M602, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M612, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M622, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M632, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M702, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M712, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M722, + RABBITIZER_REG_R4000ALLEGREX_M4X4_M732, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E020, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E021, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E022, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E023, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E120, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E121, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E122, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E123, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E220, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E221, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E222, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E223, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E320, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E321, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E322, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E323, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E420, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E421, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E422, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E423, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E520, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E521, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E522, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E523, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E620, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E621, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E622, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E623, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E720, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E721, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E722, + RABBITIZER_REG_R4000ALLEGREX_M4X4_E723, +} RabbitizerRegister_R4000AllegrexM4x4; +typedef enum RabbitizerRegister_R4000AllegrexVfpuControl { + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXS, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXT, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXD, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_CC, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_INF4, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RSV5, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RSV6, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_REV, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX0, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX1, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX2, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX3, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX4, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX5, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX6, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX7, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_144, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_145, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_146, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_147, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_148, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_149, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_150, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_151, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_152, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_153, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_154, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_155, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_156, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_157, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_158, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_159, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_160, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_161, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_162, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_163, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_164, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_165, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_166, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_167, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_168, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_169, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_170, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_171, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_172, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_173, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_174, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_175, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_176, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_177, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_178, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_179, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_180, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_181, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_182, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_183, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_184, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_185, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_186, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_187, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_188, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_189, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_190, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_191, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_192, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_193, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_194, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_195, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_196, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_197, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_198, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_199, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_200, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_201, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_202, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_203, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_204, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_205, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_206, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_207, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_208, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_209, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_210, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_211, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_212, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_213, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_214, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_215, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_216, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_217, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_218, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_219, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_220, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_221, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_222, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_223, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_224, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_225, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_226, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_227, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_228, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_229, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_230, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_231, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_232, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_233, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_234, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_235, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_236, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_237, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_238, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_239, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_240, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_241, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_242, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_243, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_244, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_245, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_246, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_247, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_248, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_249, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_250, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_251, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_252, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_253, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_254, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_255, +} RabbitizerRegister_R4000AllegrexVfpuControl; +typedef enum RabbitizerRegister_R4000AllegrexVConstant { + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_0, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_HUGE, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_SQRT2, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_SQRT1_2, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_2_SQRTPI, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_2_PI, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_1_PI, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_PI_4, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_PI_2, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_PI, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_E, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LOG2E, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LOG10E, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LN2, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LN10, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_2PI, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_PI_6, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LOG10TWO, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_LOG2TEN, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_VFPU_SQRT3_2, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_20, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_21, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_22, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_23, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_24, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_25, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_26, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_27, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_28, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_29, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_30, + RABBITIZER_REG_R4000ALLEGREX_VCONSTANT_INVALID_31, +} RabbitizerRegister_R4000AllegrexVConstant; typedef enum RabbitizerRegister_R5900VF { RABBITIZER_REG_R5900_VF_vf0, RABBITIZER_REG_R5900_VF_vf1, diff --git a/include/generated/instrOpercandCallbacks_array.h b/include/generated/instrOpercandCallbacks_array.h index 2285172c..f5855aeb 100644 --- a/include/generated/instrOpercandCallbacks_array.h +++ b/include/generated/instrOpercandCallbacks_array.h @@ -51,6 +51,63 @@ const OperandCallback instrOpercandCallbacks[] = { [RAB_OPERAND_r3000gte_v] = RabbitizerOperandType_process_r3000gte_v, [RAB_OPERAND_r3000gte_cv] = RabbitizerOperandType_process_r3000gte_cv, [RAB_OPERAND_r3000gte_lm] = RabbitizerOperandType_process_r3000gte_lm, + [RAB_OPERAND_r4000allegrex_s_vs] = RabbitizerOperandType_process_r4000allegrex_s_vs, + [RAB_OPERAND_r4000allegrex_s_vt] = RabbitizerOperandType_process_r4000allegrex_s_vt, + [RAB_OPERAND_r4000allegrex_s_vd] = RabbitizerOperandType_process_r4000allegrex_s_vd, + [RAB_OPERAND_r4000allegrex_s_vt_imm] = RabbitizerOperandType_process_r4000allegrex_s_vt_imm, + [RAB_OPERAND_r4000allegrex_s_vd_imm] = RabbitizerOperandType_process_r4000allegrex_s_vd_imm, + [RAB_OPERAND_r4000allegrex_p_vs] = RabbitizerOperandType_process_r4000allegrex_p_vs, + [RAB_OPERAND_r4000allegrex_p_vt] = RabbitizerOperandType_process_r4000allegrex_p_vt, + [RAB_OPERAND_r4000allegrex_p_vd] = RabbitizerOperandType_process_r4000allegrex_p_vd, + [RAB_OPERAND_r4000allegrex_t_vs] = RabbitizerOperandType_process_r4000allegrex_t_vs, + [RAB_OPERAND_r4000allegrex_t_vt] = RabbitizerOperandType_process_r4000allegrex_t_vt, + [RAB_OPERAND_r4000allegrex_t_vd] = RabbitizerOperandType_process_r4000allegrex_t_vd, + [RAB_OPERAND_r4000allegrex_q_vs] = RabbitizerOperandType_process_r4000allegrex_q_vs, + [RAB_OPERAND_r4000allegrex_q_vt] = RabbitizerOperandType_process_r4000allegrex_q_vt, + [RAB_OPERAND_r4000allegrex_q_vd] = RabbitizerOperandType_process_r4000allegrex_q_vd, + [RAB_OPERAND_r4000allegrex_q_vt_imm] = RabbitizerOperandType_process_r4000allegrex_q_vt_imm, + [RAB_OPERAND_r4000allegrex_mp_vs] = RabbitizerOperandType_process_r4000allegrex_mp_vs, + [RAB_OPERAND_r4000allegrex_mp_vt] = RabbitizerOperandType_process_r4000allegrex_mp_vt, + [RAB_OPERAND_r4000allegrex_mp_vd] = RabbitizerOperandType_process_r4000allegrex_mp_vd, + [RAB_OPERAND_r4000allegrex_mp_vs_transpose] = RabbitizerOperandType_process_r4000allegrex_mp_vs_transpose, + [RAB_OPERAND_r4000allegrex_mt_vs] = RabbitizerOperandType_process_r4000allegrex_mt_vs, + [RAB_OPERAND_r4000allegrex_mt_vt] = RabbitizerOperandType_process_r4000allegrex_mt_vt, + [RAB_OPERAND_r4000allegrex_mt_vd] = RabbitizerOperandType_process_r4000allegrex_mt_vd, + [RAB_OPERAND_r4000allegrex_mt_vs_transpose] = RabbitizerOperandType_process_r4000allegrex_mt_vs_transpose, + [RAB_OPERAND_r4000allegrex_mq_vs] = RabbitizerOperandType_process_r4000allegrex_mq_vs, + [RAB_OPERAND_r4000allegrex_mq_vt] = RabbitizerOperandType_process_r4000allegrex_mq_vt, + [RAB_OPERAND_r4000allegrex_mq_vd] = RabbitizerOperandType_process_r4000allegrex_mq_vd, + [RAB_OPERAND_r4000allegrex_mq_vs_transpose] = RabbitizerOperandType_process_r4000allegrex_mq_vs_transpose, + [RAB_OPERAND_r4000allegrex_cop2cs] = RabbitizerOperandType_process_r4000allegrex_cop2cs, + [RAB_OPERAND_r4000allegrex_cop2cd] = RabbitizerOperandType_process_r4000allegrex_cop2cd, + [RAB_OPERAND_r4000allegrex_pos] = RabbitizerOperandType_process_r4000allegrex_pos, + [RAB_OPERAND_r4000allegrex_size] = RabbitizerOperandType_process_r4000allegrex_size, + [RAB_OPERAND_r4000allegrex_size_plus_pos] = RabbitizerOperandType_process_r4000allegrex_size_plus_pos, + [RAB_OPERAND_r4000allegrex_imm3] = RabbitizerOperandType_process_r4000allegrex_imm3, + [RAB_OPERAND_r4000allegrex_offset14_base] = RabbitizerOperandType_process_r4000allegrex_offset14_base, + [RAB_OPERAND_r4000allegrex_offset14_base_maybe_wb] = RabbitizerOperandType_process_r4000allegrex_offset14_base_maybe_wb, + [RAB_OPERAND_r4000allegrex_vcmp_cond] = RabbitizerOperandType_process_r4000allegrex_vcmp_cond, + [RAB_OPERAND_r4000allegrex_vcmp_cond_s_maybe_vs_maybe_vt] = RabbitizerOperandType_process_r4000allegrex_vcmp_cond_s_maybe_vs_maybe_vt, + [RAB_OPERAND_r4000allegrex_vcmp_cond_p_maybe_vs_maybe_vt] = RabbitizerOperandType_process_r4000allegrex_vcmp_cond_p_maybe_vs_maybe_vt, + [RAB_OPERAND_r4000allegrex_vcmp_cond_t_maybe_vs_maybe_vt] = RabbitizerOperandType_process_r4000allegrex_vcmp_cond_t_maybe_vs_maybe_vt, + [RAB_OPERAND_r4000allegrex_vcmp_cond_q_maybe_vs_maybe_vt] = RabbitizerOperandType_process_r4000allegrex_vcmp_cond_q_maybe_vs_maybe_vt, + [RAB_OPERAND_r4000allegrex_vconstant] = RabbitizerOperandType_process_r4000allegrex_vconstant, + [RAB_OPERAND_r4000allegrex_power_of_two] = RabbitizerOperandType_process_r4000allegrex_power_of_two, + [RAB_OPERAND_r4000allegrex_vfpu_cc_bit] = RabbitizerOperandType_process_r4000allegrex_vfpu_cc_bit, + [RAB_OPERAND_r4000allegrex_bn] = RabbitizerOperandType_process_r4000allegrex_bn, + [RAB_OPERAND_r4000allegrex_int16] = RabbitizerOperandType_process_r4000allegrex_int16, + [RAB_OPERAND_r4000allegrex_float16] = RabbitizerOperandType_process_r4000allegrex_float16, + [RAB_OPERAND_r4000allegrex_p_vrot_code] = RabbitizerOperandType_process_r4000allegrex_p_vrot_code, + [RAB_OPERAND_r4000allegrex_t_vrot_code] = RabbitizerOperandType_process_r4000allegrex_t_vrot_code, + [RAB_OPERAND_r4000allegrex_q_vrot_code] = RabbitizerOperandType_process_r4000allegrex_q_vrot_code, + [RAB_OPERAND_r4000allegrex_rpx] = RabbitizerOperandType_process_r4000allegrex_rpx, + [RAB_OPERAND_r4000allegrex_rpy] = RabbitizerOperandType_process_r4000allegrex_rpy, + [RAB_OPERAND_r4000allegrex_rpz] = RabbitizerOperandType_process_r4000allegrex_rpz, + [RAB_OPERAND_r4000allegrex_rpw] = RabbitizerOperandType_process_r4000allegrex_rpw, + [RAB_OPERAND_r4000allegrex_wpx] = RabbitizerOperandType_process_r4000allegrex_wpx, + [RAB_OPERAND_r4000allegrex_wpy] = RabbitizerOperandType_process_r4000allegrex_wpy, + [RAB_OPERAND_r4000allegrex_wpz] = RabbitizerOperandType_process_r4000allegrex_wpz, + [RAB_OPERAND_r4000allegrex_wpw] = RabbitizerOperandType_process_r4000allegrex_wpw, [RAB_OPERAND_r5900_I] = RabbitizerOperandType_process_r5900_I, [RAB_OPERAND_r5900_Q] = RabbitizerOperandType_process_r5900_Q, [RAB_OPERAND_r5900_R] = RabbitizerOperandType_process_r5900_R, diff --git a/include/instructions/RabbitizerInstructionR4000Allegrex.h b/include/instructions/RabbitizerInstructionR4000Allegrex.h new file mode 100644 index 00000000..4369f403 --- /dev/null +++ b/include/instructions/RabbitizerInstructionR4000Allegrex.h @@ -0,0 +1,248 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +#ifndef RABBITIZER_INSTRUCTION_R4000ALLEGREX_H +#define RABBITIZER_INSTRUCTION_R4000ALLEGREX_H +#pragma once + +#include "RabbitizerInstruction.h" + +#ifdef __cplusplus +extern "C" { +#endif + + +#define RAB_INSTR_R4000ALLEGREX_GET_vt(self) (SHIFTR((self)->word, 16, 7)) +#define RAB_INSTR_R4000ALLEGREX_GET_vs(self) (SHIFTR((self)->word, 8, 7)) +#define RAB_INSTR_R4000ALLEGREX_GET_vd(self) (SHIFTR((self)->word, 0, 7)) +// For whatever reason the transpose just toggles bit 5, no clue why. +#define RAB_INSTR_R4000ALLEGREX_GET_vs_transpose(self) (SHIFTR((self)->word, 8, 7) ^ 0x20) + +#define RAB_INSTR_R4000ALLEGREX_GET_vt_imm(self) ((SHIFTR((self)->word, 0, 2) << 5) | (SHIFTR((self)->word, 16, 5))) +#define RAB_INSTR_R4000ALLEGREX_GET_vd_imm(self) (SHIFTR((self)->word, 16, 7)) + +#define RAB_INSTR_R4000ALLEGREX_GET_vt_6_imm(self) ((SHIFTR((self)->word, 0, 1) << 5) | (SHIFTR((self)->word, 16, 5))) + +#define RAB_INSTR_R4000ALLEGREX_GET_cop2cs(self) (SHIFTR((self)->word, 8, 7)) +#define RAB_INSTR_R4000ALLEGREX_GET_cop2cd(self) (SHIFTR((self)->word, 0, 7)) + +#define RAB_INSTR_R4000ALLEGREX_GET_pos(self) (SHIFTR((self)->word, 6, 5)) +#define RAB_INSTR_R4000ALLEGREX_GET_size(self) (SHIFTR((self)->word, 11, 5)) +#define RAB_INSTR_R4000ALLEGREX_GET_size_plus_pos(self) (SHIFTR((self)->word, 11, 5)) + +#define RAB_INSTR_R4000ALLEGREX_GET_bc2_fmt(self) (SHIFTR((self)->word, 16, 2)) +#define RAB_INSTR_R4000ALLEGREX_GET_mxhc2(self) (SHIFTR((self)->word, 7, 1)) +#define RAB_INSTR_R4000ALLEGREX_GET_mfhc2_p_fmt(self) (SHIFTR((self)->word, 4, 3)) +#define RAB_INSTR_R4000ALLEGREX_GET_mfhc2_p_s_fmt(self) (SHIFTR((self)->word, 0, 4)) + +#define RAB_INSTR_R4000ALLEGREX_GET_imm3(self) (SHIFTR((self)->word, 18, 3)) +#define RAB_INSTR_R4000ALLEGREX_GET_offset14(self) (SHIFTR((self)->word, 2, 14)) +#define RAB_INSTR_R4000ALLEGREX_GET_wb(self) (SHIFTR((self)->word, 1, 1)) + +#define RAB_INSTR_R4000ALLEGREX_GET_tp(self) ((SHIFTR((self)->word, 15, 1) << 1) | (SHIFTR((self)->word, 7, 1))) +#define RAB_INSTR_R4000ALLEGREX_GET_vfpu0_fmt(self) ((SHIFTR((self)->word, 23, 3) << 2) | RAB_INSTR_R4000ALLEGREX_GET_tp(self)) +#define RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt(self) ((SHIFTR((self)->word, 24, 2) << 2) | RAB_INSTR_R4000ALLEGREX_GET_tp(self)) +#define RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt0_fmt(self) (SHIFTR((self)->word, 19, 5)) +#define RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt0_fmt0_fmt(self) ((SHIFTR((self)->word, 16, 3) << 2) | RAB_INSTR_R4000ALLEGREX_GET_tp(self)) +#define RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt2_fmt(self) ((SHIFTR((self)->word, 21, 3) << 2) | RAB_INSTR_R4000ALLEGREX_GET_tp(self)) +#define RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt2_cndmove_fmt(self) ((SHIFTR((self)->word, 19, 2) << 2) | RAB_INSTR_R4000ALLEGREX_GET_tp(self)) +#define RAB_INSTR_R4000ALLEGREX_GET_vfpu5_fmt(self) (SHIFTR((self)->word, 23, 3)) +#define RAB_INSTR_R4000ALLEGREX_GET_vfpu6_fmt(self) ((SHIFTR((self)->word, 23, 3) << 2) | RAB_INSTR_R4000ALLEGREX_GET_tp(self)) +#define RAB_INSTR_R4000ALLEGREX_GET_vfpu6_fmt7_fmt(self) ((SHIFTR((self)->word, 21, 2) << 2) | RAB_INSTR_R4000ALLEGREX_GET_tp(self)) +#define RAB_INSTR_R4000ALLEGREX_GET_vfpu6_fmt7_fmt0_fmt(self) ((SHIFTR((self)->word, 16, 3) << 2) | RAB_INSTR_R4000ALLEGREX_GET_tp(self)) +#define RAB_INSTR_R4000ALLEGREX_GET_vfpu7_fmt(self) (SHIFTR((self)->word, 0, 26)) + +#define RAB_INSTR_R4000ALLEGREX_GET_vcmp_cond(self) (SHIFTR((self)->word, 0, 4)) +#define RAB_INSTR_R4000ALLEGREX_GET_vconstant(self) (SHIFTR((self)->word, 16, 5)) +#define RAB_INSTR_R4000ALLEGREX_GET_power_of_two(self) (SHIFTR((self)->word, 16, 5)) +#define RAB_INSTR_R4000ALLEGREX_GET_vfpu_cc_bit(self) (SHIFTR((self)->word, 16, 3)) +#define RAB_INSTR_R4000ALLEGREX_GET_bn(self) (SHIFTR((self)->word, 16, 8)) + +#define RAB_INSTR_R4000ALLEGREX_GET_intfloat16(self) (SHIFTR((self)->word, 0, 16)) +#define RAB_INSTR_R4000ALLEGREX_GET_vrot_code(self) (SHIFTR((self)->word, 16, 5)) +#define RAB_INSTR_R4000ALLEGREX_GET_rpx(self) ((SHIFTR((self)->word, 16, 1) << 4) | (SHIFTR((self)->word, 12, 1) << 3) | (SHIFTR((self)->word, 8, 1) << 2) | (SHIFTR((self)->word, 0, 2) << 0)) +#define RAB_INSTR_R4000ALLEGREX_GET_rpy(self) ((SHIFTR((self)->word, 17, 1) << 4) | (SHIFTR((self)->word, 13, 1) << 3) | (SHIFTR((self)->word, 9, 1) << 2) | (SHIFTR((self)->word, 2, 2) << 0)) +#define RAB_INSTR_R4000ALLEGREX_GET_rpz(self) ((SHIFTR((self)->word, 18, 1) << 4) | (SHIFTR((self)->word, 14, 1) << 3) | (SHIFTR((self)->word, 10, 1) << 2) | (SHIFTR((self)->word, 4, 2) << 0)) +#define RAB_INSTR_R4000ALLEGREX_GET_rpw(self) ((SHIFTR((self)->word, 19, 1) << 4) | (SHIFTR((self)->word, 15, 1) << 3) | (SHIFTR((self)->word, 11, 1) << 2) | (SHIFTR((self)->word, 6, 2) << 0)) +#define RAB_INSTR_R4000ALLEGREX_GET_wpx(self) ((SHIFTR((self)->word, 8, 1) << 2) | (SHIFTR((self)->word, 0, 2) << 0)) +#define RAB_INSTR_R4000ALLEGREX_GET_wpy(self) ((SHIFTR((self)->word, 9, 1) << 2) | (SHIFTR((self)->word, 2, 2) << 0)) +#define RAB_INSTR_R4000ALLEGREX_GET_wpz(self) ((SHIFTR((self)->word, 10, 1) << 2) | (SHIFTR((self)->word, 4, 2) << 0)) +#define RAB_INSTR_R4000ALLEGREX_GET_wpw(self) ((SHIFTR((self)->word, 11, 1) << 2) | (SHIFTR((self)->word, 6, 2) << 0)) + + +#define RAB_INSTR_R4000ALLEGREX_PACK_vt(word, value) (BITREPACK((word), (value), 16, 7)) +#define RAB_INSTR_R4000ALLEGREX_PACK_vs(word, value) (BITREPACK((word), (value), 8, 7)) +#define RAB_INSTR_R4000ALLEGREX_PACK_vd(word, value) (BITREPACK((word), (value), 0, 7)) + +#define RAB_INSTR_R4000ALLEGREX_PACK_vt_imm(word, value) (BITREPACK(BITREPACK((word), (value) >> 5, 0, 2), (value), 16, 5)) +#define RAB_INSTR_R4000ALLEGREX_PACK_vd_imm(word, value) (BITREPACK((word), (value), 16, 7)) + +#define RAB_INSTR_R4000ALLEGREX_PACK_vt_6_imm(word, value) (BITREPACK(BITREPACK((word), (value) >> 5, 0, 1), (value), 16, 5)) + +#define RAB_INSTR_R4000ALLEGREX_PACK_cop2cs(word, value) (BITREPACK((word), (value), 8, 7)) +#define RAB_INSTR_R4000ALLEGREX_PACK_cop2cd(word, value) (BITREPACK((word), (value), 0, 7)) + +#define RAB_INSTR_R4000ALLEGREX_PACK_pos(word, value) (BITREPACK((word), (value), 6, 5)) +#define RAB_INSTR_R4000ALLEGREX_PACK_size(word, value) (BITREPACK((word), (value), 11, 5)) +#define RAB_INSTR_R4000ALLEGREX_PACK_size_plus_pos(word, value) (BITREPACK((word), (value), 11, 5)) + +#define RAB_INSTR_R4000ALLEGREX_PACK_bc2_fmt(word, value) (BITREPACK((word), (value), 16, 2)) +#define RAB_INSTR_R4000ALLEGREX_PACK_mxhc2(word, value) (BITREPACK((word), (value), 7, 1)) +#define RAB_INSTR_R4000ALLEGREX_PACK_mfhc2_p_fmt(word, value) (BITREPACK((word), (value), 4, 3)) +#define RAB_INSTR_R4000ALLEGREX_PACK_mfhc2_p_s_fmt(word, value) (BITREPACK((word), (value), 0, 4)) + +#define RAB_INSTR_R4000ALLEGREX_PACK_imm3(word, value) (BITREPACK((word), (value), 18, 3)) +#define RAB_INSTR_R4000ALLEGREX_PACK_offset14(word, value) (BITREPACK((word), (value), 2, 14)) +#define RAB_INSTR_R4000ALLEGREX_PACK_wb(word, value) (BITREPACK((word), (value), 1, 1)) + +#define RAB_INSTR_R4000ALLEGREX_PACK_tp(word, value) (BITREPACK(BITREPACK((word), (value) >> 1, 15, 1), (value), 7, 1)) +#define RAB_INSTR_R4000ALLEGREX_PACK_vfpu0_fmt(word, value) (RAB_INSTR_R4000ALLEGREX_PACK_tp(BITREPACK((word), (value) >> 2, 23, 3), (value))) +#define RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt(word, value) (RAB_INSTR_R4000ALLEGREX_PACK_tp(BITREPACK((word), (value) >> 2, 24, 2), (value))) +#define RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt0_fmt(word, value) (BITREPACK((word), (value), 19, 5)) +#define RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt0_fmt0_fmt(word, value) (RAB_INSTR_R4000ALLEGREX_PACK_tp(BITREPACK((word), (value) >> 2, 16, 3), (value))) +#define RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt2_fmt(word, value) (RAB_INSTR_R4000ALLEGREX_PACK_tp(BITREPACK((word), (value) >> 2, 21, 3), (value))) +#define RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt2_cndmove_fmt(word, value) (RAB_INSTR_R4000ALLEGREX_PACK_tp(BITREPACK((word), (value) >> 2, 19, 2), (value))) +#define RAB_INSTR_R4000ALLEGREX_PACK_vfpu5_fmt(word, value) (BITREPACK((word), (value), 23, 3)) +#define RAB_INSTR_R4000ALLEGREX_PACK_vfpu6_fmt(word, value) (RAB_INSTR_R4000ALLEGREX_PACK_tp(BITREPACK((word), (value) >> 2, 23, 3), (value))) +#define RAB_INSTR_R4000ALLEGREX_PACK_vfpu6_fmt7_fmt(word, value) (RAB_INSTR_R4000ALLEGREX_PACK_tp(BITREPACK((word), (value) >> 2, 21, 2), (value))) +#define RAB_INSTR_R4000ALLEGREX_PACK_vfpu6_fmt7_fmt0_fmt(word, value) (RAB_INSTR_R4000ALLEGREX_PACK_tp(BITREPACK((word), (value) >> 2, 16, 3), (value))) +#define RAB_INSTR_R4000ALLEGREX_PACK_vfpu7_fmt(word, value) (BITREPACK((word), (value), 0, 26)) + +#define RAB_INSTR_R4000ALLEGREX_PACK_vcmp_cond(word, value) (BITREPACK((word), (value), 0, 4)) +#define RAB_INSTR_R4000ALLEGREX_PACK_vconstant(word, value) (BITREPACK((word), (value), 16, 5)) +#define RAB_INSTR_R4000ALLEGREX_PACK_power_of_two(word, value) (BITREPACK((word), (value), 16, 5)) +#define RAB_INSTR_R4000ALLEGREX_PACK_vfpu_cc_bit(word, value) (BITREPACK((word), (value), 16, 3)) +#define RAB_INSTR_R4000ALLEGREX_PACK_bn(word, value) (BITREPACK((word), (value), 16, 8)) + +#define RAB_INSTR_R4000ALLEGREX_PACK_intfloat16(word, value) (BITREPACK((word), (value), 0, 16)) +#define RAB_INSTR_R4000ALLEGREX_PACK_vrot_code(word, value) (BITREPACK((word), (value), 16, 5)) +#define RAB_INSTR_R4000ALLEGREX_PACK_rpx(word, value) (BITREPACK(BITREPACK(BITREPACK(BITREPACK((word), (value) >> 4, 16, 1), (value) >> 3, 12, 1), (value) >> 2, 8, 1), (value), 0, 2)) +#define RAB_INSTR_R4000ALLEGREX_PACK_rpy(word, value) (BITREPACK(BITREPACK(BITREPACK(BITREPACK((word), (value) >> 4, 17, 1), (value) >> 3, 13, 1), (value) >> 2, 9, 1), (value), 2, 2)) +#define RAB_INSTR_R4000ALLEGREX_PACK_rpz(word, value) (BITREPACK(BITREPACK(BITREPACK(BITREPACK((word), (value) >> 4, 18, 1), (value) >> 3, 14, 1), (value) >> 2, 10, 1), (value), 4, 2)) +#define RAB_INSTR_R4000ALLEGREX_PACK_rpw(word, value) (BITREPACK(BITREPACK(BITREPACK(BITREPACK((word), (value) >> 4, 19, 1), (value) >> 3, 15, 1), (value) >> 2, 11, 1), (value), 6, 2)) +#define RAB_INSTR_R4000ALLEGREX_PACK_wpx(word, value) (BITREPACK(BITREPACK((word), (value) >> 2, 8, 1), (value), 0, 2)) +#define RAB_INSTR_R4000ALLEGREX_PACK_wpy(word, value) (BITREPACK(BITREPACK((word), (value) >> 2, 9, 1), (value), 2, 2)) +#define RAB_INSTR_R4000ALLEGREX_PACK_wpz(word, value) (BITREPACK(BITREPACK((word), (value) >> 2, 10, 1), (value), 4, 2)) +#define RAB_INSTR_R4000ALLEGREX_PACK_wpw(word, value) (BITREPACK(BITREPACK((word), (value) >> 2, 11, 1), (value), 6, 2)) + + +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_init(RabbitizerInstruction *self, uint32_t word, uint32_t vram); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_destroy(RabbitizerInstruction *self); + + +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Normal(RabbitizerInstruction *self); + +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Special(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Special_Rs(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Special_Sa(RabbitizerInstruction *self); + +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Regimm(RabbitizerInstruction *self); + +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Special2(RabbitizerInstruction *self); + +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Special3(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Special3_Bshfl(RabbitizerInstruction *self); + +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor0(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor0_BC0(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor0_Tlb(RabbitizerInstruction *self); + +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor1(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor1_BC1(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor1_FpuS(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor1_FpuW(RabbitizerInstruction *self); + +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2_BC2(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2_MFHC2(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2_MFHC2_p(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2_MFHC2_p_s(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2_MTHC2(RabbitizerInstruction *self); + +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu0(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu1(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu3(RabbitizerInstruction *self); + +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Fmt0(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Fmt2(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Fmt3(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Rnd(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_CvtFlt(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_CvtInt(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Fmt8(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Fmt9(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Control(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Color(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Cst(RabbitizerInstruction *self); + +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt2(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt2_CndMove(RabbitizerInstruction *self); + +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu5(RabbitizerInstruction *self); + +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu6(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu6_Fmt7(RabbitizerInstruction *self); +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu6_Fmt7_Fmt0(RabbitizerInstruction *self); + +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu7(RabbitizerInstruction *self); + +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId_Quadlr(RabbitizerInstruction *self); + +NON_NULL(1) +void RabbitizerInstructionR4000Allegrex_processUniqueId(RabbitizerInstruction *self); + + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/include/instructions/RabbitizerRegister.h b/include/instructions/RabbitizerRegister.h index 2387d19e..5b99f713 100644 --- a/include/instructions/RabbitizerRegister.h +++ b/include/instructions/RabbitizerRegister.h @@ -31,6 +31,7 @@ extern const char *RabbitizerRegister_RspCop0_Names[][2]; extern const char *RabbitizerRegister_RspCop2_Names[][2]; extern const char *RabbitizerRegister_RspCop2Control_Names[][2]; extern const char *RabbitizerRegister_RspVector_Names[][2]; +extern const char *RabbitizerRegister_R4000AllegrexS_Names[][2]; extern const char *RabbitizerRegister_R5900VF_Names[][2]; extern const char *RabbitizerRegister_R5900VI_Names[][2]; @@ -57,6 +58,25 @@ const char *RabbitizerRegister_getNameRspCop2Control(uint8_t regValue); NODISCARD PURE RETURNS_NON_NULL const char *RabbitizerRegister_getNameRspVector(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const char *RabbitizerRegister_getNameR4000AllegrexS(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const char *RabbitizerRegister_getNameR4000AllegrexV2D(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const char *RabbitizerRegister_getNameR4000AllegrexV3D(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const char *RabbitizerRegister_getNameR4000AllegrexV4D(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const char *RabbitizerRegister_getNameR4000AllegrexM2x2(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const char *RabbitizerRegister_getNameR4000AllegrexM3x3(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const char *RabbitizerRegister_getNameR4000AllegrexM4x4(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const char *RabbitizerRegister_getNameR4000AllegrexVfpuControl(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const char *RabbitizerRegister_getNameR4000AllegrexVConstant(uint8_t regValue); + NODISCARD PURE RETURNS_NON_NULL const char *RabbitizerRegister_getNameR5900VF(uint8_t regValue); NODISCARD PURE RETURNS_NON_NULL @@ -86,6 +106,25 @@ const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_RspCop2Cont NODISCARD PURE RETURNS_NON_NULL const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_RspVector(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexS(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexV2D(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexV3D(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexV4D(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexM2x2(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexM3x3(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexM4x4(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexVfpuControl(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexVConstant(uint8_t regValue); + NODISCARD PURE RETURNS_NON_NULL const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R5900VF(uint8_t regValue); NODISCARD PURE RETURNS_NON_NULL diff --git a/include/instructions/RabbitizerRegisterDescriptor.h b/include/instructions/RabbitizerRegisterDescriptor.h index e5740c61..1a431cfc 100644 --- a/include/instructions/RabbitizerRegisterDescriptor.h +++ b/include/instructions/RabbitizerRegisterDescriptor.h @@ -51,6 +51,20 @@ extern const RabbitizerRegisterDescriptor RabbitizerRegister_RspVector_Descripto /* RSP */ +/* R4000ALLEGREX */ + +extern const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexS_Descriptors[]; +extern const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexV2D_Descriptors[]; +extern const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexV3D_Descriptors[]; +extern const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexV4D_Descriptors[]; +extern const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexM2x2_Descriptors[]; +extern const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexM3x3_Descriptors[]; +extern const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexM4x4_Descriptors[]; +extern const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexVfpuControl_Descriptors[]; +extern const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexVConstant_Descriptors[]; + +/* R4000ALLEGREX */ + /* R5900 */ extern const RabbitizerRegisterDescriptor RabbitizerRegister_R5900VF_Descriptors[]; diff --git a/include/rabbitizer.h b/include/rabbitizer.h index a4dbe538..b3a8cb16 100644 --- a/include/rabbitizer.h +++ b/include/rabbitizer.h @@ -18,6 +18,7 @@ #include "instructions/RabbitizerInstruction.h" #include "instructions/RabbitizerInstructionRsp.h" #include "instructions/RabbitizerInstructionR3000GTE.h" +#include "instructions/RabbitizerInstructionR4000Allegrex.h" #include "instructions/RabbitizerInstructionR5900.h" #include "analysis/RabbitizerTrackedRegisterState.h" diff --git a/pyproject.toml b/pyproject.toml index 55dbfb4b..e739aed6 100644 --- a/pyproject.toml +++ b/pyproject.toml @@ -4,7 +4,7 @@ [project] name = "rabbitizer" # Version should be synced with include/common/RabbitizerVersion.h -version = "1.9.5" +version = "1.10.0" description = "MIPS instruction decoder" # license = "MIT" readme = "README.md" diff --git a/rabbitizer/Config.pyi b/rabbitizer/Config.pyi index 662b9c39..94da2013 100644 --- a/rabbitizer/Config.pyi +++ b/rabbitizer/Config.pyi @@ -15,6 +15,7 @@ class _RabbitizerConfig: regNames_userFpcCsr: bool = True regNames_vr4300Cop0NamedRegisters: bool = True regNames_vr4300RspCop0NamedRegisters: bool = True + regNames_r4000AllegrexVfpuControlNamedRegisters: bool = False pseudos_enablePseudos: bool = True pseudos_pseudoBeqz: bool = True diff --git a/rabbitizer/InstrCategory.pyi b/rabbitizer/InstrCategory.pyi index 03fdafe7..cd32cfff 100644 --- a/rabbitizer/InstrCategory.pyi +++ b/rabbitizer/InstrCategory.pyi @@ -11,6 +11,7 @@ class InstrCategory: CPU: Enum RSP: Enum R3000GTE: Enum + R4000ALLEGREX: Enum R5900: Enum MAX: Enum @staticmethod diff --git a/rabbitizer/InstrId.pyi b/rabbitizer/InstrId.pyi index 0fa2b0ba..a2ca86b4 100644 --- a/rabbitizer/InstrId.pyi +++ b/rabbitizer/InstrId.pyi @@ -401,6 +401,300 @@ class InstrId: r3000gte_GPF: Enum r3000gte_GPL: Enum r3000gte_MAX: Enum + r4000allegrex_INVALID: Enum + r4000allegrex_lv_s: Enum + r4000allegrex_sv_s: Enum + r4000allegrex_lv_q: Enum + r4000allegrex_sv_q: Enum + r4000allegrex_clz: Enum + r4000allegrex_clo: Enum + r4000allegrex_madd: Enum + r4000allegrex_maddu: Enum + r4000allegrex_msub: Enum + r4000allegrex_msubu: Enum + r4000allegrex_max: Enum + r4000allegrex_min: Enum + r4000allegrex_srl: Enum + r4000allegrex_rotr: Enum + r4000allegrex_srlv: Enum + r4000allegrex_rotrv: Enum + r4000allegrex_sleep: Enum + r4000allegrex_mfie: Enum + r4000allegrex_mtie: Enum + r4000allegrex_ext: Enum + r4000allegrex_ins: Enum + r4000allegrex_wsbh: Enum + r4000allegrex_wsbw: Enum + r4000allegrex_seb: Enum + r4000allegrex_seh: Enum + r4000allegrex_bitrev: Enum + r4000allegrex_bvf: Enum + r4000allegrex_bvt: Enum + r4000allegrex_bvfl: Enum + r4000allegrex_bvtl: Enum + r4000allegrex_mfv: Enum + r4000allegrex_mfvc: Enum + r4000allegrex_vsync2: Enum + r4000allegrex_mtv: Enum + r4000allegrex_mtvc: Enum + r4000allegrex_vadd_s: Enum + r4000allegrex_vadd_p: Enum + r4000allegrex_vadd_t: Enum + r4000allegrex_vadd_q: Enum + r4000allegrex_vsub_s: Enum + r4000allegrex_vsub_p: Enum + r4000allegrex_vsub_t: Enum + r4000allegrex_vsub_q: Enum + r4000allegrex_vsbn_s: Enum + r4000allegrex_vdiv_s: Enum + r4000allegrex_vdiv_p: Enum + r4000allegrex_vdiv_t: Enum + r4000allegrex_vdiv_q: Enum + r4000allegrex_vmul_s: Enum + r4000allegrex_vmul_p: Enum + r4000allegrex_vmul_t: Enum + r4000allegrex_vmul_q: Enum + r4000allegrex_vdot_p: Enum + r4000allegrex_vdot_t: Enum + r4000allegrex_vdot_q: Enum + r4000allegrex_vscl_p: Enum + r4000allegrex_vscl_t: Enum + r4000allegrex_vscl_q: Enum + r4000allegrex_vhdp_p: Enum + r4000allegrex_vhdp_t: Enum + r4000allegrex_vhdp_q: Enum + r4000allegrex_vcrs_t: Enum + r4000allegrex_vdet_p: Enum + r4000allegrex_vcmp_s: Enum + r4000allegrex_vcmp_p: Enum + r4000allegrex_vcmp_t: Enum + r4000allegrex_vcmp_q: Enum + r4000allegrex_vmin_s: Enum + r4000allegrex_vmin_p: Enum + r4000allegrex_vmin_t: Enum + r4000allegrex_vmin_q: Enum + r4000allegrex_vmax_s: Enum + r4000allegrex_vmax_p: Enum + r4000allegrex_vmax_t: Enum + r4000allegrex_vmax_q: Enum + r4000allegrex_vscmp_s: Enum + r4000allegrex_vscmp_p: Enum + r4000allegrex_vscmp_t: Enum + r4000allegrex_vscmp_q: Enum + r4000allegrex_vsge_s: Enum + r4000allegrex_vsge_p: Enum + r4000allegrex_vsge_t: Enum + r4000allegrex_vsge_q: Enum + r4000allegrex_vslt_s: Enum + r4000allegrex_vslt_p: Enum + r4000allegrex_vslt_t: Enum + r4000allegrex_vslt_q: Enum + r4000allegrex_vwbn_s: Enum + r4000allegrex_vmov_s: Enum + r4000allegrex_vmov_p: Enum + r4000allegrex_vmov_t: Enum + r4000allegrex_vmov_q: Enum + r4000allegrex_vabs_s: Enum + r4000allegrex_vabs_p: Enum + r4000allegrex_vabs_t: Enum + r4000allegrex_vabs_q: Enum + r4000allegrex_vneg_s: Enum + r4000allegrex_vneg_p: Enum + r4000allegrex_vneg_t: Enum + r4000allegrex_vneg_q: Enum + r4000allegrex_vidt_p: Enum + r4000allegrex_vidt_q: Enum + r4000allegrex_vsat0_s: Enum + r4000allegrex_vsat0_p: Enum + r4000allegrex_vsat0_t: Enum + r4000allegrex_vsat0_q: Enum + r4000allegrex_vsat1_s: Enum + r4000allegrex_vsat1_p: Enum + r4000allegrex_vsat1_t: Enum + r4000allegrex_vsat1_q: Enum + r4000allegrex_vzero_s: Enum + r4000allegrex_vzero_p: Enum + r4000allegrex_vzero_t: Enum + r4000allegrex_vzero_q: Enum + r4000allegrex_vone_s: Enum + r4000allegrex_vone_p: Enum + r4000allegrex_vone_t: Enum + r4000allegrex_vone_q: Enum + r4000allegrex_vrcp_s: Enum + r4000allegrex_vrcp_p: Enum + r4000allegrex_vrcp_t: Enum + r4000allegrex_vrcp_q: Enum + r4000allegrex_vrsq_s: Enum + r4000allegrex_vrsq_p: Enum + r4000allegrex_vrsq_t: Enum + r4000allegrex_vrsq_q: Enum + r4000allegrex_vsin_s: Enum + r4000allegrex_vsin_p: Enum + r4000allegrex_vsin_t: Enum + r4000allegrex_vsin_q: Enum + r4000allegrex_vcos_s: Enum + r4000allegrex_vcos_p: Enum + r4000allegrex_vcos_t: Enum + r4000allegrex_vcos_q: Enum + r4000allegrex_vexp2_s: Enum + r4000allegrex_vexp2_p: Enum + r4000allegrex_vexp2_t: Enum + r4000allegrex_vexp2_q: Enum + r4000allegrex_vlog2_s: Enum + r4000allegrex_vlog2_p: Enum + r4000allegrex_vlog2_t: Enum + r4000allegrex_vlog2_q: Enum + r4000allegrex_vsqrt_s: Enum + r4000allegrex_vsqrt_p: Enum + r4000allegrex_vsqrt_t: Enum + r4000allegrex_vsqrt_q: Enum + r4000allegrex_vasin_s: Enum + r4000allegrex_vasin_p: Enum + r4000allegrex_vasin_t: Enum + r4000allegrex_vasin_q: Enum + r4000allegrex_vnrcp_s: Enum + r4000allegrex_vnrcp_p: Enum + r4000allegrex_vnrcp_t: Enum + r4000allegrex_vnrcp_q: Enum + r4000allegrex_vnsin_s: Enum + r4000allegrex_vnsin_p: Enum + r4000allegrex_vnsin_t: Enum + r4000allegrex_vnsin_q: Enum + r4000allegrex_vrexp2_s: Enum + r4000allegrex_vrexp2_p: Enum + r4000allegrex_vrexp2_t: Enum + r4000allegrex_vrexp2_q: Enum + r4000allegrex_vrnds_s: Enum + r4000allegrex_vrndi_s: Enum + r4000allegrex_vrndi_p: Enum + r4000allegrex_vrndi_t: Enum + r4000allegrex_vrndi_q: Enum + r4000allegrex_vrndf1_s: Enum + r4000allegrex_vrndf1_p: Enum + r4000allegrex_vrndf1_t: Enum + r4000allegrex_vrndf1_q: Enum + r4000allegrex_vrndf2_s: Enum + r4000allegrex_vrndf2_p: Enum + r4000allegrex_vrndf2_t: Enum + r4000allegrex_vrndf2_q: Enum + r4000allegrex_vf2h_p: Enum + r4000allegrex_vf2h_q: Enum + r4000allegrex_vh2f_s: Enum + r4000allegrex_vh2f_p: Enum + r4000allegrex_vsbz_s: Enum + r4000allegrex_vlgb_s: Enum + r4000allegrex_vuc2ifs_s: Enum + r4000allegrex_vc2i_s: Enum + r4000allegrex_vus2i_s: Enum + r4000allegrex_vus2i_p: Enum + r4000allegrex_vs2i_s: Enum + r4000allegrex_vs2i_p: Enum + r4000allegrex_vi2uc_q: Enum + r4000allegrex_vi2c_q: Enum + r4000allegrex_vi2us_p: Enum + r4000allegrex_vi2us_q: Enum + r4000allegrex_vi2s_p: Enum + r4000allegrex_vi2s_q: Enum + r4000allegrex_vsrt1_q: Enum + r4000allegrex_vsrt2_q: Enum + r4000allegrex_vbfy1_p: Enum + r4000allegrex_vbfy1_q: Enum + r4000allegrex_vbfy2_q: Enum + r4000allegrex_vocp_s: Enum + r4000allegrex_vocp_p: Enum + r4000allegrex_vocp_t: Enum + r4000allegrex_vocp_q: Enum + r4000allegrex_vsocp_s: Enum + r4000allegrex_vsocp_p: Enum + r4000allegrex_vfad_p: Enum + r4000allegrex_vfad_t: Enum + r4000allegrex_vfad_q: Enum + r4000allegrex_vavg_p: Enum + r4000allegrex_vavg_t: Enum + r4000allegrex_vavg_q: Enum + r4000allegrex_vsrt3_q: Enum + r4000allegrex_vsrt4_q: Enum + r4000allegrex_vsgn_s: Enum + r4000allegrex_vsgn_p: Enum + r4000allegrex_vsgn_t: Enum + r4000allegrex_vsgn_q: Enum + r4000allegrex_vmfvc: Enum + r4000allegrex_vmtvc: Enum + r4000allegrex_vt4444_q: Enum + r4000allegrex_vt5551_q: Enum + r4000allegrex_vt5650_q: Enum + r4000allegrex_vcst_s: Enum + r4000allegrex_vcst_p: Enum + r4000allegrex_vcst_t: Enum + r4000allegrex_vcst_q: Enum + r4000allegrex_vf2in_s: Enum + r4000allegrex_vf2in_p: Enum + r4000allegrex_vf2in_t: Enum + r4000allegrex_vf2in_q: Enum + r4000allegrex_vf2iz_s: Enum + r4000allegrex_vf2iz_p: Enum + r4000allegrex_vf2iz_t: Enum + r4000allegrex_vf2iz_q: Enum + r4000allegrex_vf2iu_s: Enum + r4000allegrex_vf2iu_p: Enum + r4000allegrex_vf2iu_t: Enum + r4000allegrex_vf2iu_q: Enum + r4000allegrex_vf2id_s: Enum + r4000allegrex_vf2id_p: Enum + r4000allegrex_vf2id_t: Enum + r4000allegrex_vf2id_q: Enum + r4000allegrex_vi2f_s: Enum + r4000allegrex_vi2f_p: Enum + r4000allegrex_vi2f_t: Enum + r4000allegrex_vi2f_q: Enum + r4000allegrex_vcmovt_s: Enum + r4000allegrex_vcmovt_p: Enum + r4000allegrex_vcmovt_t: Enum + r4000allegrex_vcmovt_q: Enum + r4000allegrex_vcmovf_s: Enum + r4000allegrex_vcmovf_p: Enum + r4000allegrex_vcmovf_t: Enum + r4000allegrex_vcmovf_q: Enum + r4000allegrex_vpfxs: Enum + r4000allegrex_vpfxt: Enum + r4000allegrex_vpfxd: Enum + r4000allegrex_viim_s: Enum + r4000allegrex_vfim_s: Enum + r4000allegrex_vmmul_p: Enum + r4000allegrex_vmmul_t: Enum + r4000allegrex_vmmul_q: Enum + r4000allegrex_vhtfm2_p: Enum + r4000allegrex_vtfm2_p: Enum + r4000allegrex_vhtfm3_t: Enum + r4000allegrex_vtfm3_t: Enum + r4000allegrex_vhtfm4_q: Enum + r4000allegrex_vtfm4_q: Enum + r4000allegrex_vmscl_p: Enum + r4000allegrex_vmscl_t: Enum + r4000allegrex_vmscl_q: Enum + r4000allegrex_vcrsp_t: Enum + r4000allegrex_vqmul_q: Enum + r4000allegrex_vrot_p: Enum + r4000allegrex_vrot_t: Enum + r4000allegrex_vrot_q: Enum + r4000allegrex_vmmov_p: Enum + r4000allegrex_vmmov_t: Enum + r4000allegrex_vmmov_q: Enum + r4000allegrex_vmidt_p: Enum + r4000allegrex_vmidt_t: Enum + r4000allegrex_vmidt_q: Enum + r4000allegrex_vmzero_p: Enum + r4000allegrex_vmzero_t: Enum + r4000allegrex_vmzero_q: Enum + r4000allegrex_vmone_p: Enum + r4000allegrex_vmone_t: Enum + r4000allegrex_vmone_q: Enum + r4000allegrex_vnop: Enum + r4000allegrex_vsync: Enum + r4000allegrex_vflush: Enum + r4000allegrex_svl_q: Enum + r4000allegrex_svr_q: Enum + r4000allegrex_MAX: Enum r5900_INVALID: Enum r5900_lq: Enum r5900_sq: Enum diff --git a/rabbitizer/InstrIdType.pyi b/rabbitizer/InstrIdType.pyi index a391f289..f818c97d 100644 --- a/rabbitizer/InstrIdType.pyi +++ b/rabbitizer/InstrIdType.pyi @@ -41,6 +41,52 @@ class InstrIdType: R3000GTE_COP1: Enum R3000GTE_COP2: Enum R3000GTE_COP2_GTE: Enum + R4000ALLEGREX_INVALID: Enum + R4000ALLEGREX_NORMAL: Enum + R4000ALLEGREX_SPECIAL: Enum + R4000ALLEGREX_SPECIAL_RS: Enum + R4000ALLEGREX_SPECIAL_SA: Enum + R4000ALLEGREX_REGIMM: Enum + R4000ALLEGREX_SPECIAL2: Enum + R4000ALLEGREX_SPECIAL3: Enum + R4000ALLEGREX_SPECIAL3_BSHFL: Enum + R4000ALLEGREX_COP0: Enum + R4000ALLEGREX_COP0_BC0: Enum + R4000ALLEGREX_COP0_TLB: Enum + R4000ALLEGREX_COP1: Enum + R4000ALLEGREX_COP1_BC1: Enum + R4000ALLEGREX_COP1_FPUS: Enum + R4000ALLEGREX_COP1_FPUW: Enum + R4000ALLEGREX_COP2: Enum + R4000ALLEGREX_COP2_BC2: Enum + R4000ALLEGREX_COP2_MFHC2: Enum + R4000ALLEGREX_COP2_MFHC2_P: Enum + R4000ALLEGREX_COP2_MFHC2_P_S: Enum + R4000ALLEGREX_COP2_MTHC2: Enum + R4000ALLEGREX_VFPU0: Enum + R4000ALLEGREX_VFPU1: Enum + R4000ALLEGREX_VFPU3: Enum + R4000ALLEGREX_VFPU4: Enum + R4000ALLEGREX_VFPU4_FMT0: Enum + R4000ALLEGREX_VFPU4_FMT0_FMT0: Enum + R4000ALLEGREX_VFPU4_FMT0_FMT2: Enum + R4000ALLEGREX_VFPU4_FMT0_FMT3: Enum + R4000ALLEGREX_VFPU4_FMT0_RND: Enum + R4000ALLEGREX_VFPU4_FMT0_CVTFLT: Enum + R4000ALLEGREX_VFPU4_FMT0_CVTINT: Enum + R4000ALLEGREX_VFPU4_FMT0_FMT8: Enum + R4000ALLEGREX_VFPU4_FMT0_FMT9: Enum + R4000ALLEGREX_VFPU4_FMT0_CONTROL: Enum + R4000ALLEGREX_VFPU4_FMT0_COLOR: Enum + R4000ALLEGREX_VFPU4_FMT0_CST: Enum + R4000ALLEGREX_VFPU4_FMT2: Enum + R4000ALLEGREX_VFPU4_FMT2_CNDMOVE: Enum + R4000ALLEGREX_VFPU5: Enum + R4000ALLEGREX_VFPU6: Enum + R4000ALLEGREX_VFPU6_FMT7: Enum + R4000ALLEGREX_VFPU6_FMT7_FMT0: Enum + R4000ALLEGREX_VFPU7: Enum + R4000ALLEGREX_QUADLR: Enum R5900_INVALID: Enum R5900_NORMAL: Enum R5900_SPECIAL: Enum diff --git a/rabbitizer/OperandType.pyi b/rabbitizer/OperandType.pyi index 0b234e28..e03efef0 100644 --- a/rabbitizer/OperandType.pyi +++ b/rabbitizer/OperandType.pyi @@ -53,6 +53,63 @@ class OperandType: r3000gte_v: Enum r3000gte_cv: Enum r3000gte_lm: Enum + r4000allegrex_s_vs: Enum + r4000allegrex_s_vt: Enum + r4000allegrex_s_vd: Enum + r4000allegrex_s_vt_imm: Enum + r4000allegrex_s_vd_imm: Enum + r4000allegrex_p_vs: Enum + r4000allegrex_p_vt: Enum + r4000allegrex_p_vd: Enum + r4000allegrex_t_vs: Enum + r4000allegrex_t_vt: Enum + r4000allegrex_t_vd: Enum + r4000allegrex_q_vs: Enum + r4000allegrex_q_vt: Enum + r4000allegrex_q_vd: Enum + r4000allegrex_q_vt_imm: Enum + r4000allegrex_mp_vs: Enum + r4000allegrex_mp_vt: Enum + r4000allegrex_mp_vd: Enum + r4000allegrex_mp_vs_transpose: Enum + r4000allegrex_mt_vs: Enum + r4000allegrex_mt_vt: Enum + r4000allegrex_mt_vd: Enum + r4000allegrex_mt_vs_transpose: Enum + r4000allegrex_mq_vs: Enum + r4000allegrex_mq_vt: Enum + r4000allegrex_mq_vd: Enum + r4000allegrex_mq_vs_transpose: Enum + r4000allegrex_cop2cs: Enum + r4000allegrex_cop2cd: Enum + r4000allegrex_pos: Enum + r4000allegrex_size: Enum + r4000allegrex_size_plus_pos: Enum + r4000allegrex_imm3: Enum + r4000allegrex_offset14_base: Enum + r4000allegrex_offset14_base_maybe_wb: Enum + r4000allegrex_vcmp_cond: Enum + r4000allegrex_vcmp_cond_s_maybe_vs_maybe_vt: Enum + r4000allegrex_vcmp_cond_p_maybe_vs_maybe_vt: Enum + r4000allegrex_vcmp_cond_t_maybe_vs_maybe_vt: Enum + r4000allegrex_vcmp_cond_q_maybe_vs_maybe_vt: Enum + r4000allegrex_vconstant: Enum + r4000allegrex_power_of_two: Enum + r4000allegrex_vfpu_cc_bit: Enum + r4000allegrex_bn: Enum + r4000allegrex_int16: Enum + r4000allegrex_float16: Enum + r4000allegrex_p_vrot_code: Enum + r4000allegrex_t_vrot_code: Enum + r4000allegrex_q_vrot_code: Enum + r4000allegrex_rpx: Enum + r4000allegrex_rpy: Enum + r4000allegrex_rpz: Enum + r4000allegrex_rpw: Enum + r4000allegrex_wpx: Enum + r4000allegrex_wpy: Enum + r4000allegrex_wpz: Enum + r4000allegrex_wpw: Enum r5900_I: Enum r5900_Q: Enum r5900_R: Enum diff --git a/rabbitizer/Utils.pyi b/rabbitizer/Utils.pyi index e21ce38f..359d526e 100644 --- a/rabbitizer/Utils.pyi +++ b/rabbitizer/Utils.pyi @@ -12,3 +12,11 @@ class Utils: @staticmethod def escapeString(src: str) -> str: ... + + @staticmethod + def floatRepr_32From16(hex_repr: int) -> int: + """ + Converts an unsigned 16 bits value representing a half precision + float to a unsigned 32 bits value representing a single precision + float. + """ diff --git a/rabbitizer/enums/registers/rabbitizer_enum_Cop1N32.c b/rabbitizer/enums/registers/rabbitizer_enum_Cop1N32.c index 2403a0bf..676ace5c 100644 --- a/rabbitizer/enums/registers/rabbitizer_enum_Cop1N32.c +++ b/rabbitizer/enums/registers/rabbitizer_enum_Cop1N32.c @@ -9,7 +9,7 @@ { "RegCop1N32", #name, RABBITIZER_REG_##prefix##_##name, false, NULL }, #define RABBITIZER_DEF_REG_NODOLLAR(prefix, name, numeric, ...) \ - { "RegCop1N32", #name, RABBITIZER_REG_##prefix##_##name, false, NULL }, + RABBITIZER_DEF_REG(prefix, name, numeric, __VARGS__) RabbitizerEnumMetadata rabbitizer_enum_RegCop1N32_enumvalues[] = { #include "tables/registers/RabbitizerRegister_Cop1N32.inc" diff --git a/rabbitizer/enums/registers/rabbitizer_enum_Cop1N64.c b/rabbitizer/enums/registers/rabbitizer_enum_Cop1N64.c index d01ba4b9..52a315f3 100644 --- a/rabbitizer/enums/registers/rabbitizer_enum_Cop1N64.c +++ b/rabbitizer/enums/registers/rabbitizer_enum_Cop1N64.c @@ -9,7 +9,7 @@ { "RegCop1N64", #name, RABBITIZER_REG_##prefix##_##name, false, NULL }, #define RABBITIZER_DEF_REG_NODOLLAR(prefix, name, numeric, ...) \ - { "RegCop1N64", #name, RABBITIZER_REG_##prefix##_##name, false, NULL }, + RABBITIZER_DEF_REG(prefix, name, numeric, __VARGS__) RabbitizerEnumMetadata rabbitizer_enum_RegCop1N64_enumvalues[] = { #include "tables/registers/RabbitizerRegister_Cop1N64.inc" diff --git a/rabbitizer/enums/registers/rabbitizer_enum_Cop1O32.c b/rabbitizer/enums/registers/rabbitizer_enum_Cop1O32.c index eb97e1c8..f61a5976 100644 --- a/rabbitizer/enums/registers/rabbitizer_enum_Cop1O32.c +++ b/rabbitizer/enums/registers/rabbitizer_enum_Cop1O32.c @@ -9,7 +9,7 @@ { "RegCop1O32", #name, RABBITIZER_REG_##prefix##_##name, false, NULL }, #define RABBITIZER_DEF_REG_NODOLLAR(prefix, name, numeric, ...) \ - { "RegCop1O32", #name, RABBITIZER_REG_##prefix##_##name, false, NULL }, + RABBITIZER_DEF_REG(prefix, name, numeric, __VARGS__) RabbitizerEnumMetadata rabbitizer_enum_RegCop1O32_enumvalues[] = { #include "tables/registers/RabbitizerRegister_Cop1O32.inc" diff --git a/rabbitizer/enums/registers/rabbitizer_enum_GprN32.c b/rabbitizer/enums/registers/rabbitizer_enum_GprN32.c index 4e67f97e..df553451 100644 --- a/rabbitizer/enums/registers/rabbitizer_enum_GprN32.c +++ b/rabbitizer/enums/registers/rabbitizer_enum_GprN32.c @@ -9,7 +9,7 @@ { "RegGprN32", #name, RABBITIZER_REG_##prefix##_##name, false, NULL }, #define RABBITIZER_DEF_REG_NODOLLAR(prefix, name, numeric, ...) \ - { "RegGprN32", #name, RABBITIZER_REG_##prefix##_##name, false, NULL }, + RABBITIZER_DEF_REG(prefix, name, numeric, __VARGS__) RabbitizerEnumMetadata rabbitizer_enum_RegGprN32_enumvalues[] = { #include "tables/registers/RabbitizerRegister_GprN32.inc" diff --git a/rabbitizer/enums/registers/rabbitizer_enum_GprO32.c b/rabbitizer/enums/registers/rabbitizer_enum_GprO32.c index 558ac730..b3926926 100644 --- a/rabbitizer/enums/registers/rabbitizer_enum_GprO32.c +++ b/rabbitizer/enums/registers/rabbitizer_enum_GprO32.c @@ -9,7 +9,7 @@ { "RegGprO32", #name, RABBITIZER_REG_##prefix##_##name, false, NULL }, #define RABBITIZER_DEF_REG_NODOLLAR(prefix, name, numeric, ...) \ - { "RegGprO32", #name, RABBITIZER_REG_##prefix##_##name, false, NULL }, + RABBITIZER_DEF_REG(prefix, name, numeric, __VARGS__) RabbitizerEnumMetadata rabbitizer_enum_RegGprO32_enumvalues[] = { #include "tables/registers/RabbitizerRegister_GprO32.inc" diff --git a/rabbitizer/rabbitizer_global_config.c b/rabbitizer/rabbitizer_global_config.c index 55151eac..b210a568 100644 --- a/rabbitizer/rabbitizer_global_config.c +++ b/rabbitizer/rabbitizer_global_config.c @@ -106,6 +106,7 @@ DEF_MEMBER_GET_SET_ABI(regNames, fprAbiNames) DEF_MEMBER_GET_SET_BOOL(regNames, userFpcCsr) DEF_MEMBER_GET_SET_BOOL(regNames, vr4300Cop0NamedRegisters) DEF_MEMBER_GET_SET_BOOL(regNames, vr4300RspCop0NamedRegisters) +DEF_MEMBER_GET_SET_BOOL(regNames, r4000AllegrexVfpuControlNamedRegisters) DEF_MEMBER_GET_SET_BOOL(pseudos, enablePseudos) DEF_MEMBER_GET_SET_BOOL(pseudos, pseudoBeqz) @@ -134,6 +135,7 @@ static PyGetSetDef rabbitizer_global_config_GetSets[] = { MEMBER_GET_SET(regNames, userFpcCsr, "", NULL), MEMBER_GET_SET(regNames, vr4300Cop0NamedRegisters, "", NULL), MEMBER_GET_SET(regNames, vr4300RspCop0NamedRegisters, "", NULL), + MEMBER_GET_SET(regNames, r4000AllegrexVfpuControlNamedRegisters, "", NULL), MEMBER_GET_SET(pseudos, enablePseudos, "", NULL), MEMBER_GET_SET(pseudos, pseudoBeqz, "", NULL), diff --git a/rabbitizer/rabbitizer_submodule_Utils.c b/rabbitizer/rabbitizer_submodule_Utils.c index b49fe011..c339eb95 100644 --- a/rabbitizer/rabbitizer_submodule_Utils.c +++ b/rabbitizer/rabbitizer_submodule_Utils.c @@ -49,6 +49,17 @@ static PyObject *rabbitizer_submodule_Utils_escapeString(UNUSED PyObject *self, return ret; } +static PyObject *rabbitizer_submodule_Utils_floatRepr_32From16(UNUSED PyObject *self, PyObject *args, PyObject *kwds) { + static char *kwlist[] = { "hex_repr", NULL }; + uint16_t hex_repr = 0; + + if (!PyArg_ParseTupleAndKeywords(args, kwds, "H", kwlist, &hex_repr)) { + return NULL; + } + + return PyLong_FromLong(RabbitizerUtils_floatRepr_32From16(hex_repr)); +} + #define METHOD_NO_ARGS(name, docs) { #name, (PyCFunction) (void *) rabbitizer_submodule_Utils_##name, METH_NOARGS, PyDoc_STR(docs) } #define METHOD_ARGS(name, docs) { #name, (PyCFunction) (void *) rabbitizer_submodule_Utils_##name, METH_VARARGS | METH_KEYWORDS, PyDoc_STR(docs) } @@ -56,6 +67,7 @@ static PyObject *rabbitizer_submodule_Utils_escapeString(UNUSED PyObject *self, static PyMethodDef rabbitizer_submodule_Utils_methods[] = { METHOD_ARGS(from2Complement, ""), METHOD_ARGS(escapeString, ""), + METHOD_ARGS(floatRepr_32From16, ""), { 0 }, }; diff --git a/rabbitizer/rabbitizer_type_Instruction.c b/rabbitizer/rabbitizer_type_Instruction.c index 51035fed..a06b3041 100644 --- a/rabbitizer/rabbitizer_type_Instruction.c +++ b/rabbitizer/rabbitizer_type_Instruction.c @@ -5,6 +5,7 @@ #include "instructions/RabbitizerInstructionRsp.h" #include "instructions/RabbitizerInstructionR3000GTE.h" +#include "instructions/RabbitizerInstructionR4000Allegrex.h" #include "instructions/RabbitizerInstructionR5900.h" #include "common/RabbitizerConfig.h" @@ -55,6 +56,11 @@ static int rabbitizer_type_Instruction_init(PyRabbitizerInstruction *self, PyObj RabbitizerInstructionR5900_processUniqueId(&self->instr); break; + case RABBITIZER_INSTRCAT_R4000ALLEGREX: + RabbitizerInstructionR4000Allegrex_init(&self->instr, word, vram); + RabbitizerInstructionR4000Allegrex_processUniqueId(&self->instr); + break; + case RABBITIZER_INSTRCAT_CPU: case RABBITIZER_INSTRCAT_MAX: RabbitizerInstruction_init(&self->instr, word, vram); diff --git a/rust/src/instr_category_enum.rs b/rust/src/instr_category_enum.rs index cb541c82..1c0b3c6a 100644 --- a/rust/src/instr_category_enum.rs +++ b/rust/src/instr_category_enum.rs @@ -10,6 +10,7 @@ pub enum InstrCategory { CPU, RSP, R3000GTE, + R4000ALLEGREX, R5900, MAX, } diff --git a/rust/src/instr_id_enum.rs b/rust/src/instr_id_enum.rs index 55faa3e6..47577247 100644 --- a/rust/src/instr_id_enum.rs +++ b/rust/src/instr_id_enum.rs @@ -460,6 +460,320 @@ pub enum InstrId { r3000gte_USERDEF_18, r3000gte_USERDEF_19, r3000gte_MAX, + r4000allegrex_INVALID, + r4000allegrex_lv_s, + r4000allegrex_sv_s, + r4000allegrex_lv_q, + r4000allegrex_sv_q, + r4000allegrex_clz, + r4000allegrex_clo, + r4000allegrex_madd, + r4000allegrex_maddu, + r4000allegrex_msub, + r4000allegrex_msubu, + r4000allegrex_max, + r4000allegrex_min, + r4000allegrex_srl, + r4000allegrex_rotr, + r4000allegrex_srlv, + r4000allegrex_rotrv, + r4000allegrex_sleep, + r4000allegrex_mfie, + r4000allegrex_mtie, + r4000allegrex_ext, + r4000allegrex_ins, + r4000allegrex_wsbh, + r4000allegrex_wsbw, + r4000allegrex_seb, + r4000allegrex_seh, + r4000allegrex_bitrev, + r4000allegrex_bvf, + r4000allegrex_bvt, + r4000allegrex_bvfl, + r4000allegrex_bvtl, + r4000allegrex_mfv, + r4000allegrex_mfvc, + r4000allegrex_vsync2, + r4000allegrex_mtv, + r4000allegrex_mtvc, + r4000allegrex_vadd_s, + r4000allegrex_vadd_p, + r4000allegrex_vadd_t, + r4000allegrex_vadd_q, + r4000allegrex_vsub_s, + r4000allegrex_vsub_p, + r4000allegrex_vsub_t, + r4000allegrex_vsub_q, + r4000allegrex_vsbn_s, + r4000allegrex_vdiv_s, + r4000allegrex_vdiv_p, + r4000allegrex_vdiv_t, + r4000allegrex_vdiv_q, + r4000allegrex_vmul_s, + r4000allegrex_vmul_p, + r4000allegrex_vmul_t, + r4000allegrex_vmul_q, + r4000allegrex_vdot_p, + r4000allegrex_vdot_t, + r4000allegrex_vdot_q, + r4000allegrex_vscl_p, + r4000allegrex_vscl_t, + r4000allegrex_vscl_q, + r4000allegrex_vhdp_p, + r4000allegrex_vhdp_t, + r4000allegrex_vhdp_q, + r4000allegrex_vcrs_t, + r4000allegrex_vdet_p, + r4000allegrex_vcmp_s, + r4000allegrex_vcmp_p, + r4000allegrex_vcmp_t, + r4000allegrex_vcmp_q, + r4000allegrex_vmin_s, + r4000allegrex_vmin_p, + r4000allegrex_vmin_t, + r4000allegrex_vmin_q, + r4000allegrex_vmax_s, + r4000allegrex_vmax_p, + r4000allegrex_vmax_t, + r4000allegrex_vmax_q, + r4000allegrex_vscmp_s, + r4000allegrex_vscmp_p, + r4000allegrex_vscmp_t, + r4000allegrex_vscmp_q, + r4000allegrex_vsge_s, + r4000allegrex_vsge_p, + r4000allegrex_vsge_t, + r4000allegrex_vsge_q, + r4000allegrex_vslt_s, + r4000allegrex_vslt_p, + r4000allegrex_vslt_t, + r4000allegrex_vslt_q, + r4000allegrex_vwbn_s, + r4000allegrex_vmov_s, + r4000allegrex_vmov_p, + r4000allegrex_vmov_t, + r4000allegrex_vmov_q, + r4000allegrex_vabs_s, + r4000allegrex_vabs_p, + r4000allegrex_vabs_t, + r4000allegrex_vabs_q, + r4000allegrex_vneg_s, + r4000allegrex_vneg_p, + r4000allegrex_vneg_t, + r4000allegrex_vneg_q, + r4000allegrex_vidt_p, + r4000allegrex_vidt_q, + r4000allegrex_vsat0_s, + r4000allegrex_vsat0_p, + r4000allegrex_vsat0_t, + r4000allegrex_vsat0_q, + r4000allegrex_vsat1_s, + r4000allegrex_vsat1_p, + r4000allegrex_vsat1_t, + r4000allegrex_vsat1_q, + r4000allegrex_vzero_s, + r4000allegrex_vzero_p, + r4000allegrex_vzero_t, + r4000allegrex_vzero_q, + r4000allegrex_vone_s, + r4000allegrex_vone_p, + r4000allegrex_vone_t, + r4000allegrex_vone_q, + r4000allegrex_vrcp_s, + r4000allegrex_vrcp_p, + r4000allegrex_vrcp_t, + r4000allegrex_vrcp_q, + r4000allegrex_vrsq_s, + r4000allegrex_vrsq_p, + r4000allegrex_vrsq_t, + r4000allegrex_vrsq_q, + r4000allegrex_vsin_s, + r4000allegrex_vsin_p, + r4000allegrex_vsin_t, + r4000allegrex_vsin_q, + r4000allegrex_vcos_s, + r4000allegrex_vcos_p, + r4000allegrex_vcos_t, + r4000allegrex_vcos_q, + r4000allegrex_vexp2_s, + r4000allegrex_vexp2_p, + r4000allegrex_vexp2_t, + r4000allegrex_vexp2_q, + r4000allegrex_vlog2_s, + r4000allegrex_vlog2_p, + r4000allegrex_vlog2_t, + r4000allegrex_vlog2_q, + r4000allegrex_vsqrt_s, + r4000allegrex_vsqrt_p, + r4000allegrex_vsqrt_t, + r4000allegrex_vsqrt_q, + r4000allegrex_vasin_s, + r4000allegrex_vasin_p, + r4000allegrex_vasin_t, + r4000allegrex_vasin_q, + r4000allegrex_vnrcp_s, + r4000allegrex_vnrcp_p, + r4000allegrex_vnrcp_t, + r4000allegrex_vnrcp_q, + r4000allegrex_vnsin_s, + r4000allegrex_vnsin_p, + r4000allegrex_vnsin_t, + r4000allegrex_vnsin_q, + r4000allegrex_vrexp2_s, + r4000allegrex_vrexp2_p, + r4000allegrex_vrexp2_t, + r4000allegrex_vrexp2_q, + r4000allegrex_vrnds_s, + r4000allegrex_vrndi_s, + r4000allegrex_vrndi_p, + r4000allegrex_vrndi_t, + r4000allegrex_vrndi_q, + r4000allegrex_vrndf1_s, + r4000allegrex_vrndf1_p, + r4000allegrex_vrndf1_t, + r4000allegrex_vrndf1_q, + r4000allegrex_vrndf2_s, + r4000allegrex_vrndf2_p, + r4000allegrex_vrndf2_t, + r4000allegrex_vrndf2_q, + r4000allegrex_vf2h_p, + r4000allegrex_vf2h_q, + r4000allegrex_vh2f_s, + r4000allegrex_vh2f_p, + r4000allegrex_vsbz_s, + r4000allegrex_vlgb_s, + r4000allegrex_vuc2ifs_s, + r4000allegrex_vc2i_s, + r4000allegrex_vus2i_s, + r4000allegrex_vus2i_p, + r4000allegrex_vs2i_s, + r4000allegrex_vs2i_p, + r4000allegrex_vi2uc_q, + r4000allegrex_vi2c_q, + r4000allegrex_vi2us_p, + r4000allegrex_vi2us_q, + r4000allegrex_vi2s_p, + r4000allegrex_vi2s_q, + r4000allegrex_vsrt1_q, + r4000allegrex_vsrt2_q, + r4000allegrex_vbfy1_p, + r4000allegrex_vbfy1_q, + r4000allegrex_vbfy2_q, + r4000allegrex_vocp_s, + r4000allegrex_vocp_p, + r4000allegrex_vocp_t, + r4000allegrex_vocp_q, + r4000allegrex_vsocp_s, + r4000allegrex_vsocp_p, + r4000allegrex_vfad_p, + r4000allegrex_vfad_t, + r4000allegrex_vfad_q, + r4000allegrex_vavg_p, + r4000allegrex_vavg_t, + r4000allegrex_vavg_q, + r4000allegrex_vsrt3_q, + r4000allegrex_vsrt4_q, + r4000allegrex_vsgn_s, + r4000allegrex_vsgn_p, + r4000allegrex_vsgn_t, + r4000allegrex_vsgn_q, + r4000allegrex_vmfvc, + r4000allegrex_vmtvc, + r4000allegrex_vt4444_q, + r4000allegrex_vt5551_q, + r4000allegrex_vt5650_q, + r4000allegrex_vcst_s, + r4000allegrex_vcst_p, + r4000allegrex_vcst_t, + r4000allegrex_vcst_q, + r4000allegrex_vf2in_s, + r4000allegrex_vf2in_p, + r4000allegrex_vf2in_t, + r4000allegrex_vf2in_q, + r4000allegrex_vf2iz_s, + r4000allegrex_vf2iz_p, + r4000allegrex_vf2iz_t, + r4000allegrex_vf2iz_q, + r4000allegrex_vf2iu_s, + r4000allegrex_vf2iu_p, + r4000allegrex_vf2iu_t, + r4000allegrex_vf2iu_q, + r4000allegrex_vf2id_s, + r4000allegrex_vf2id_p, + r4000allegrex_vf2id_t, + r4000allegrex_vf2id_q, + r4000allegrex_vi2f_s, + r4000allegrex_vi2f_p, + r4000allegrex_vi2f_t, + r4000allegrex_vi2f_q, + r4000allegrex_vcmovt_s, + r4000allegrex_vcmovt_p, + r4000allegrex_vcmovt_t, + r4000allegrex_vcmovt_q, + r4000allegrex_vcmovf_s, + r4000allegrex_vcmovf_p, + r4000allegrex_vcmovf_t, + r4000allegrex_vcmovf_q, + r4000allegrex_vpfxs, + r4000allegrex_vpfxt, + r4000allegrex_vpfxd, + r4000allegrex_viim_s, + r4000allegrex_vfim_s, + r4000allegrex_vmmul_p, + r4000allegrex_vmmul_t, + r4000allegrex_vmmul_q, + r4000allegrex_vhtfm2_p, + r4000allegrex_vtfm2_p, + r4000allegrex_vhtfm3_t, + r4000allegrex_vtfm3_t, + r4000allegrex_vhtfm4_q, + r4000allegrex_vtfm4_q, + r4000allegrex_vmscl_p, + r4000allegrex_vmscl_t, + r4000allegrex_vmscl_q, + r4000allegrex_vcrsp_t, + r4000allegrex_vqmul_q, + r4000allegrex_vrot_p, + r4000allegrex_vrot_t, + r4000allegrex_vrot_q, + r4000allegrex_vmmov_p, + r4000allegrex_vmmov_t, + r4000allegrex_vmmov_q, + r4000allegrex_vmidt_p, + r4000allegrex_vmidt_t, + r4000allegrex_vmidt_q, + r4000allegrex_vmzero_p, + r4000allegrex_vmzero_t, + r4000allegrex_vmzero_q, + r4000allegrex_vmone_p, + r4000allegrex_vmone_t, + r4000allegrex_vmone_q, + r4000allegrex_vnop, + r4000allegrex_vsync, + r4000allegrex_vflush, + r4000allegrex_svl_q, + r4000allegrex_svr_q, + r4000allegrex_USERDEF_00, + r4000allegrex_USERDEF_01, + r4000allegrex_USERDEF_02, + r4000allegrex_USERDEF_03, + r4000allegrex_USERDEF_04, + r4000allegrex_USERDEF_05, + r4000allegrex_USERDEF_06, + r4000allegrex_USERDEF_07, + r4000allegrex_USERDEF_08, + r4000allegrex_USERDEF_09, + r4000allegrex_USERDEF_10, + r4000allegrex_USERDEF_11, + r4000allegrex_USERDEF_12, + r4000allegrex_USERDEF_13, + r4000allegrex_USERDEF_14, + r4000allegrex_USERDEF_15, + r4000allegrex_USERDEF_16, + r4000allegrex_USERDEF_17, + r4000allegrex_USERDEF_18, + r4000allegrex_USERDEF_19, + r4000allegrex_MAX, r5900_INVALID, r5900_lq, r5900_sq, diff --git a/rust/src/instr_id_type_enum.rs b/rust/src/instr_id_type_enum.rs index efee2ff9..baa8b6bf 100644 --- a/rust/src/instr_id_type_enum.rs +++ b/rust/src/instr_id_type_enum.rs @@ -40,6 +40,52 @@ pub enum InstrIdType { R3000GTE_COP1, R3000GTE_COP2, R3000GTE_COP2_GTE, + R4000ALLEGREX_INVALID, + R4000ALLEGREX_NORMAL, + R4000ALLEGREX_SPECIAL, + R4000ALLEGREX_SPECIAL_RS, + R4000ALLEGREX_SPECIAL_SA, + R4000ALLEGREX_REGIMM, + R4000ALLEGREX_SPECIAL2, + R4000ALLEGREX_SPECIAL3, + R4000ALLEGREX_SPECIAL3_BSHFL, + R4000ALLEGREX_COP0, + R4000ALLEGREX_COP0_BC0, + R4000ALLEGREX_COP0_TLB, + R4000ALLEGREX_COP1, + R4000ALLEGREX_COP1_BC1, + R4000ALLEGREX_COP1_FPUS, + R4000ALLEGREX_COP1_FPUW, + R4000ALLEGREX_COP2, + R4000ALLEGREX_COP2_BC2, + R4000ALLEGREX_COP2_MFHC2, + R4000ALLEGREX_COP2_MFHC2_P, + R4000ALLEGREX_COP2_MFHC2_P_S, + R4000ALLEGREX_COP2_MTHC2, + R4000ALLEGREX_VFPU0, + R4000ALLEGREX_VFPU1, + R4000ALLEGREX_VFPU3, + R4000ALLEGREX_VFPU4, + R4000ALLEGREX_VFPU4_FMT0, + R4000ALLEGREX_VFPU4_FMT0_FMT0, + R4000ALLEGREX_VFPU4_FMT0_FMT2, + R4000ALLEGREX_VFPU4_FMT0_FMT3, + R4000ALLEGREX_VFPU4_FMT0_RND, + R4000ALLEGREX_VFPU4_FMT0_CVTFLT, + R4000ALLEGREX_VFPU4_FMT0_CVTINT, + R4000ALLEGREX_VFPU4_FMT0_FMT8, + R4000ALLEGREX_VFPU4_FMT0_FMT9, + R4000ALLEGREX_VFPU4_FMT0_CONTROL, + R4000ALLEGREX_VFPU4_FMT0_COLOR, + R4000ALLEGREX_VFPU4_FMT0_CST, + R4000ALLEGREX_VFPU4_FMT2, + R4000ALLEGREX_VFPU4_FMT2_CNDMOVE, + R4000ALLEGREX_VFPU5, + R4000ALLEGREX_VFPU6, + R4000ALLEGREX_VFPU6_FMT7, + R4000ALLEGREX_VFPU6_FMT7_FMT0, + R4000ALLEGREX_VFPU7, + R4000ALLEGREX_QUADLR, R5900_INVALID, R5900_NORMAL, R5900_SPECIAL, diff --git a/rust/src/instruction.rs b/rust/src/instruction.rs index de279b1e..d8a81bdf 100644 --- a/rust/src/instruction.rs +++ b/rust/src/instruction.rs @@ -62,6 +62,13 @@ extern "C" { fn RabbitizerInstructionR5900_processUniqueId(self_: *mut Instruction); } +extern "C" { + fn RabbitizerInstructionR4000Allegrex_init(self_: *mut Instruction, word: u32, vram: u32); + fn RabbitizerInstructionR4000Allegrex_destroy(self_: *mut Instruction); + + fn RabbitizerInstructionR4000Allegrex_processUniqueId(self_: *mut Instruction); +} + extern "C" { fn RabbitizerInstruction_getRaw(self_: *const Instruction) -> u32; fn RabbitizerInstruction_getProcessedImmediate(self_: *const Instruction) -> i32; @@ -209,6 +216,9 @@ impl Drop for Instruction { instr_category_enum::InstrCategory::R5900 => { RabbitizerInstructionR5900_destroy(self); } + instr_category_enum::InstrCategory::R4000ALLEGREX => { + RabbitizerInstructionR4000Allegrex_destroy(self); + } instr_category_enum::InstrCategory::MAX => { core::panic!(); } @@ -238,6 +248,10 @@ impl Instruction { RabbitizerInstructionR5900_init(instr.as_mut_ptr(), word, vram); RabbitizerInstructionR5900_processUniqueId(instr.as_mut_ptr()); } + instr_category_enum::InstrCategory::R4000ALLEGREX => { + RabbitizerInstructionR4000Allegrex_init(instr.as_mut_ptr(), word, vram); + RabbitizerInstructionR4000Allegrex_processUniqueId(instr.as_mut_ptr()); + } instr_category_enum::InstrCategory::MAX => { core::panic!(); } // _ => not used in purpose diff --git a/rust/src/operand_type_enum.rs b/rust/src/operand_type_enum.rs index f18b05aa..790577c7 100644 --- a/rust/src/operand_type_enum.rs +++ b/rust/src/operand_type_enum.rs @@ -52,6 +52,63 @@ pub enum OperandType { r3000gte_v, r3000gte_cv, r3000gte_lm, + r4000allegrex_s_vs, + r4000allegrex_s_vt, + r4000allegrex_s_vd, + r4000allegrex_s_vt_imm, + r4000allegrex_s_vd_imm, + r4000allegrex_p_vs, + r4000allegrex_p_vt, + r4000allegrex_p_vd, + r4000allegrex_t_vs, + r4000allegrex_t_vt, + r4000allegrex_t_vd, + r4000allegrex_q_vs, + r4000allegrex_q_vt, + r4000allegrex_q_vd, + r4000allegrex_q_vt_imm, + r4000allegrex_mp_vs, + r4000allegrex_mp_vt, + r4000allegrex_mp_vd, + r4000allegrex_mp_vs_transpose, + r4000allegrex_mt_vs, + r4000allegrex_mt_vt, + r4000allegrex_mt_vd, + r4000allegrex_mt_vs_transpose, + r4000allegrex_mq_vs, + r4000allegrex_mq_vt, + r4000allegrex_mq_vd, + r4000allegrex_mq_vs_transpose, + r4000allegrex_cop2cs, + r4000allegrex_cop2cd, + r4000allegrex_pos, + r4000allegrex_size, + r4000allegrex_size_plus_pos, + r4000allegrex_imm3, + r4000allegrex_offset14_base, + r4000allegrex_offset14_base_maybe_wb, + r4000allegrex_vcmp_cond, + r4000allegrex_vcmp_cond_s_maybe_vs_maybe_vt, + r4000allegrex_vcmp_cond_p_maybe_vs_maybe_vt, + r4000allegrex_vcmp_cond_t_maybe_vs_maybe_vt, + r4000allegrex_vcmp_cond_q_maybe_vs_maybe_vt, + r4000allegrex_vconstant, + r4000allegrex_power_of_two, + r4000allegrex_vfpu_cc_bit, + r4000allegrex_bn, + r4000allegrex_int16, + r4000allegrex_float16, + r4000allegrex_p_vrot_code, + r4000allegrex_t_vrot_code, + r4000allegrex_q_vrot_code, + r4000allegrex_rpx, + r4000allegrex_rpy, + r4000allegrex_rpz, + r4000allegrex_rpw, + r4000allegrex_wpx, + r4000allegrex_wpy, + r4000allegrex_wpz, + r4000allegrex_wpw, r5900_I, r5900_Q, r5900_R, diff --git a/rust/src/registers_enum.rs b/rust/src/registers_enum.rs index d01d3f8b..148b1669 100644 --- a/rust/src/registers_enum.rs +++ b/rust/src/registers_enum.rs @@ -486,6 +486,1116 @@ pub mod registers { #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] #[allow(non_camel_case_types)] #[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)] + pub enum R4000AllegrexS { + S000, + S010, + S020, + S030, + S100, + S110, + S120, + S130, + S200, + S210, + S220, + S230, + S300, + S310, + S320, + S330, + S400, + S410, + S420, + S430, + S500, + S510, + S520, + S530, + S600, + S610, + S620, + S630, + S700, + S710, + S720, + S730, + S001, + S011, + S021, + S031, + S101, + S111, + S121, + S131, + S201, + S211, + S221, + S231, + S301, + S311, + S321, + S331, + S401, + S411, + S421, + S431, + S501, + S511, + S521, + S531, + S601, + S611, + S621, + S631, + S701, + S711, + S721, + S731, + S002, + S012, + S022, + S032, + S102, + S112, + S122, + S132, + S202, + S212, + S222, + S232, + S302, + S312, + S322, + S332, + S402, + S412, + S422, + S432, + S502, + S512, + S522, + S532, + S602, + S612, + S622, + S632, + S702, + S712, + S722, + S732, + S003, + S013, + S023, + S033, + S103, + S113, + S123, + S133, + S203, + S213, + S223, + S233, + S303, + S313, + S323, + S333, + S403, + S413, + S423, + S433, + S503, + S513, + S523, + S533, + S603, + S613, + S623, + S633, + S703, + S713, + S723, + S733, + } + #[repr(u32)] + #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] + #[allow(non_camel_case_types)] + #[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)] + pub enum R4000AllegrexV2D { + C000, + C010, + C020, + C030, + C100, + C110, + C120, + C130, + C200, + C210, + C220, + C230, + C300, + C310, + C320, + C330, + C400, + C410, + C420, + C430, + C500, + C510, + C520, + C530, + C600, + C610, + C620, + C630, + C700, + C710, + C720, + C730, + R000, + R001, + R002, + R003, + R100, + R101, + R102, + R103, + R200, + R201, + R202, + R203, + R300, + R301, + R302, + R303, + R400, + R401, + R402, + R403, + R500, + R501, + R502, + R503, + R600, + R601, + R602, + R603, + R700, + R701, + R702, + R703, + C002, + C012, + C022, + C032, + C102, + C112, + C122, + C132, + C202, + C212, + C222, + C232, + C302, + C312, + C322, + C332, + C402, + C412, + C422, + C432, + C502, + C512, + C522, + C532, + C602, + C612, + C622, + C632, + C702, + C712, + C722, + C732, + R020, + R021, + R022, + R023, + R120, + R121, + R122, + R123, + R220, + R221, + R222, + R223, + R320, + R321, + R322, + R323, + R420, + R421, + R422, + R423, + R520, + R521, + R522, + R523, + R620, + R621, + R622, + R623, + R720, + R721, + R722, + R723, + } + #[repr(u32)] + #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] + #[allow(non_camel_case_types)] + #[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)] + pub enum R4000AllegrexV3D { + C000, + C010, + C020, + C030, + C100, + C110, + C120, + C130, + C200, + C210, + C220, + C230, + C300, + C310, + C320, + C330, + C400, + C410, + C420, + C430, + C500, + C510, + C520, + C530, + C600, + C610, + C620, + C630, + C700, + C710, + C720, + C730, + R000, + R001, + R002, + R003, + R100, + R101, + R102, + R103, + R200, + R201, + R202, + R203, + R300, + R301, + R302, + R303, + R400, + R401, + R402, + R403, + R500, + R501, + R502, + R503, + R600, + R601, + R602, + R603, + R700, + R701, + R702, + R703, + C001, + C011, + C021, + C031, + C101, + C111, + C121, + C131, + C201, + C211, + C221, + C231, + C301, + C311, + C321, + C331, + C401, + C411, + C421, + C431, + C501, + C511, + C521, + C531, + C601, + C611, + C621, + C631, + C701, + C711, + C721, + C731, + R010, + R011, + R012, + R013, + R110, + R111, + R112, + R113, + R210, + R211, + R212, + R213, + R310, + R311, + R312, + R313, + R410, + R411, + R412, + R413, + R510, + R511, + R512, + R513, + R610, + R611, + R612, + R613, + R710, + R711, + R712, + R713, + } + #[repr(u32)] + #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] + #[allow(non_camel_case_types)] + #[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)] + pub enum R4000AllegrexV4D { + C000, + C010, + C020, + C030, + C100, + C110, + C120, + C130, + C200, + C210, + C220, + C230, + C300, + C310, + C320, + C330, + C400, + C410, + C420, + C430, + C500, + C510, + C520, + C530, + C600, + C610, + C620, + C630, + C700, + C710, + C720, + C730, + R000, + R001, + R002, + R003, + R100, + R101, + R102, + R103, + R200, + R201, + R202, + R203, + R300, + R301, + R302, + R303, + R400, + R401, + R402, + R403, + R500, + R501, + R502, + R503, + R600, + R601, + R602, + R603, + R700, + R701, + R702, + R703, + C002, + C012, + C022, + C032, + C102, + C112, + C122, + C132, + C202, + C212, + C222, + C232, + C302, + C312, + C322, + C332, + C402, + C412, + C422, + C432, + C502, + C512, + C522, + C532, + C602, + C612, + C622, + C632, + C702, + C712, + C722, + C732, + R020, + R021, + R022, + R023, + R120, + R121, + R122, + R123, + R220, + R221, + R222, + R223, + R320, + R321, + R322, + R323, + R420, + R421, + R422, + R423, + R520, + R521, + R522, + R523, + R620, + R621, + R622, + R623, + R720, + R721, + R722, + R723, + } + #[repr(u32)] + #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] + #[allow(non_camel_case_types)] + #[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)] + pub enum R4000AllegrexM2x2 { + M000, + M010, + M020, + M030, + M100, + M110, + M120, + M130, + M200, + M210, + M220, + M230, + M300, + M310, + M320, + M330, + M400, + M410, + M420, + M430, + M500, + M510, + M520, + M530, + M600, + M610, + M620, + M630, + M700, + M710, + M720, + M730, + E000, + E001, + E002, + E003, + E100, + E101, + E102, + E103, + E200, + E201, + E202, + E203, + E300, + E301, + E302, + E303, + E400, + E401, + E402, + E403, + E500, + E501, + E502, + E503, + E600, + E601, + E602, + E603, + E700, + E701, + E702, + E703, + M002, + M012, + M022, + M032, + M102, + M112, + M122, + M132, + M202, + M212, + M222, + M232, + M302, + M312, + M322, + M332, + M402, + M412, + M422, + M432, + M502, + M512, + M522, + M532, + M602, + M612, + M622, + M632, + M702, + M712, + M722, + M732, + E020, + E021, + E022, + E023, + E120, + E121, + E122, + E123, + E220, + E221, + E222, + E223, + E320, + E321, + E322, + E323, + E420, + E421, + E422, + E423, + E520, + E521, + E522, + E523, + E620, + E621, + E622, + E623, + E720, + E721, + E722, + E723, + } + #[repr(u32)] + #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] + #[allow(non_camel_case_types)] + #[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)] + pub enum R4000AllegrexM3x3 { + M000, + M010, + M020, + M030, + M100, + M110, + M120, + M130, + M200, + M210, + M220, + M230, + M300, + M310, + M320, + M330, + M400, + M410, + M420, + M430, + M500, + M510, + M520, + M530, + M600, + M610, + M620, + M630, + M700, + M710, + M720, + M730, + E000, + E001, + E002, + E003, + E100, + E101, + E102, + E103, + E200, + E201, + E202, + E203, + E300, + E301, + E302, + E303, + E400, + E401, + E402, + E403, + E500, + E501, + E502, + E503, + E600, + E601, + E602, + E603, + E700, + E701, + E702, + E703, + M001, + M011, + M021, + M031, + M101, + M111, + M121, + M131, + M201, + M211, + M221, + M231, + M301, + M311, + M321, + M331, + M401, + M411, + M421, + M431, + M501, + M511, + M521, + M531, + M601, + M611, + M621, + M631, + M701, + M711, + M721, + M731, + E010, + E011, + E012, + E013, + E110, + E111, + E112, + E113, + E210, + E211, + E212, + E213, + E310, + E311, + E312, + E313, + E410, + E411, + E412, + E413, + E510, + E511, + E512, + E513, + E610, + E611, + E612, + E613, + E710, + E711, + E712, + E713, + } + #[repr(u32)] + #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] + #[allow(non_camel_case_types)] + #[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)] + pub enum R4000AllegrexM4x4 { + M000, + M010, + M020, + M030, + M100, + M110, + M120, + M130, + M200, + M210, + M220, + M230, + M300, + M310, + M320, + M330, + M400, + M410, + M420, + M430, + M500, + M510, + M520, + M530, + M600, + M610, + M620, + M630, + M700, + M710, + M720, + M730, + E000, + E001, + E002, + E003, + E100, + E101, + E102, + E103, + E200, + E201, + E202, + E203, + E300, + E301, + E302, + E303, + E400, + E401, + E402, + E403, + E500, + E501, + E502, + E503, + E600, + E601, + E602, + E603, + E700, + E701, + E702, + E703, + M002, + M012, + M022, + M032, + M102, + M112, + M122, + M132, + M202, + M212, + M222, + M232, + M302, + M312, + M322, + M332, + M402, + M412, + M422, + M432, + M502, + M512, + M522, + M532, + M602, + M612, + M622, + M632, + M702, + M712, + M722, + M732, + E020, + E021, + E022, + E023, + E120, + E121, + E122, + E123, + E220, + E221, + E222, + E223, + E320, + E321, + E322, + E323, + E420, + E421, + E422, + E423, + E520, + E521, + E522, + E523, + E620, + E621, + E622, + E623, + E720, + E721, + E722, + E723, + } + #[repr(u32)] + #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] + #[allow(non_camel_case_types)] + #[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)] + pub enum R4000AllegrexVfpuControl { + R4000ALLEGREX_VFPUCONTROL_VFPU_PFXS, + R4000ALLEGREX_VFPUCONTROL_VFPU_PFXT, + R4000ALLEGREX_VFPUCONTROL_VFPU_PFXD, + R4000ALLEGREX_VFPUCONTROL_VFPU_CC, + R4000ALLEGREX_VFPUCONTROL_VFPU_INF4, + R4000ALLEGREX_VFPUCONTROL_VFPU_RSV5, + R4000ALLEGREX_VFPUCONTROL_VFPU_RSV6, + R4000ALLEGREX_VFPUCONTROL_VFPU_REV, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX0, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX1, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX2, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX3, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX4, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX5, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX6, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX7, + R4000ALLEGREX_VFPUCONTROL_144, + R4000ALLEGREX_VFPUCONTROL_145, + R4000ALLEGREX_VFPUCONTROL_146, + R4000ALLEGREX_VFPUCONTROL_147, + R4000ALLEGREX_VFPUCONTROL_148, + R4000ALLEGREX_VFPUCONTROL_149, + R4000ALLEGREX_VFPUCONTROL_150, + R4000ALLEGREX_VFPUCONTROL_151, + R4000ALLEGREX_VFPUCONTROL_152, + R4000ALLEGREX_VFPUCONTROL_153, + R4000ALLEGREX_VFPUCONTROL_154, + R4000ALLEGREX_VFPUCONTROL_155, + R4000ALLEGREX_VFPUCONTROL_156, + R4000ALLEGREX_VFPUCONTROL_157, + R4000ALLEGREX_VFPUCONTROL_158, + R4000ALLEGREX_VFPUCONTROL_159, + R4000ALLEGREX_VFPUCONTROL_160, + R4000ALLEGREX_VFPUCONTROL_161, + R4000ALLEGREX_VFPUCONTROL_162, + R4000ALLEGREX_VFPUCONTROL_163, + R4000ALLEGREX_VFPUCONTROL_164, + R4000ALLEGREX_VFPUCONTROL_165, + R4000ALLEGREX_VFPUCONTROL_166, + R4000ALLEGREX_VFPUCONTROL_167, + R4000ALLEGREX_VFPUCONTROL_168, + R4000ALLEGREX_VFPUCONTROL_169, + R4000ALLEGREX_VFPUCONTROL_170, + R4000ALLEGREX_VFPUCONTROL_171, + R4000ALLEGREX_VFPUCONTROL_172, + R4000ALLEGREX_VFPUCONTROL_173, + R4000ALLEGREX_VFPUCONTROL_174, + R4000ALLEGREX_VFPUCONTROL_175, + R4000ALLEGREX_VFPUCONTROL_176, + R4000ALLEGREX_VFPUCONTROL_177, + R4000ALLEGREX_VFPUCONTROL_178, + R4000ALLEGREX_VFPUCONTROL_179, + R4000ALLEGREX_VFPUCONTROL_180, + R4000ALLEGREX_VFPUCONTROL_181, + R4000ALLEGREX_VFPUCONTROL_182, + R4000ALLEGREX_VFPUCONTROL_183, + R4000ALLEGREX_VFPUCONTROL_184, + R4000ALLEGREX_VFPUCONTROL_185, + R4000ALLEGREX_VFPUCONTROL_186, + R4000ALLEGREX_VFPUCONTROL_187, + R4000ALLEGREX_VFPUCONTROL_188, + R4000ALLEGREX_VFPUCONTROL_189, + R4000ALLEGREX_VFPUCONTROL_190, + R4000ALLEGREX_VFPUCONTROL_191, + R4000ALLEGREX_VFPUCONTROL_192, + R4000ALLEGREX_VFPUCONTROL_193, + R4000ALLEGREX_VFPUCONTROL_194, + R4000ALLEGREX_VFPUCONTROL_195, + R4000ALLEGREX_VFPUCONTROL_196, + R4000ALLEGREX_VFPUCONTROL_197, + R4000ALLEGREX_VFPUCONTROL_198, + R4000ALLEGREX_VFPUCONTROL_199, + R4000ALLEGREX_VFPUCONTROL_200, + R4000ALLEGREX_VFPUCONTROL_201, + R4000ALLEGREX_VFPUCONTROL_202, + R4000ALLEGREX_VFPUCONTROL_203, + R4000ALLEGREX_VFPUCONTROL_204, + R4000ALLEGREX_VFPUCONTROL_205, + R4000ALLEGREX_VFPUCONTROL_206, + R4000ALLEGREX_VFPUCONTROL_207, + R4000ALLEGREX_VFPUCONTROL_208, + R4000ALLEGREX_VFPUCONTROL_209, + R4000ALLEGREX_VFPUCONTROL_210, + R4000ALLEGREX_VFPUCONTROL_211, + R4000ALLEGREX_VFPUCONTROL_212, + R4000ALLEGREX_VFPUCONTROL_213, + R4000ALLEGREX_VFPUCONTROL_214, + R4000ALLEGREX_VFPUCONTROL_215, + R4000ALLEGREX_VFPUCONTROL_216, + R4000ALLEGREX_VFPUCONTROL_217, + R4000ALLEGREX_VFPUCONTROL_218, + R4000ALLEGREX_VFPUCONTROL_219, + R4000ALLEGREX_VFPUCONTROL_220, + R4000ALLEGREX_VFPUCONTROL_221, + R4000ALLEGREX_VFPUCONTROL_222, + R4000ALLEGREX_VFPUCONTROL_223, + R4000ALLEGREX_VFPUCONTROL_224, + R4000ALLEGREX_VFPUCONTROL_225, + R4000ALLEGREX_VFPUCONTROL_226, + R4000ALLEGREX_VFPUCONTROL_227, + R4000ALLEGREX_VFPUCONTROL_228, + R4000ALLEGREX_VFPUCONTROL_229, + R4000ALLEGREX_VFPUCONTROL_230, + R4000ALLEGREX_VFPUCONTROL_231, + R4000ALLEGREX_VFPUCONTROL_232, + R4000ALLEGREX_VFPUCONTROL_233, + R4000ALLEGREX_VFPUCONTROL_234, + R4000ALLEGREX_VFPUCONTROL_235, + R4000ALLEGREX_VFPUCONTROL_236, + R4000ALLEGREX_VFPUCONTROL_237, + R4000ALLEGREX_VFPUCONTROL_238, + R4000ALLEGREX_VFPUCONTROL_239, + R4000ALLEGREX_VFPUCONTROL_240, + R4000ALLEGREX_VFPUCONTROL_241, + R4000ALLEGREX_VFPUCONTROL_242, + R4000ALLEGREX_VFPUCONTROL_243, + R4000ALLEGREX_VFPUCONTROL_244, + R4000ALLEGREX_VFPUCONTROL_245, + R4000ALLEGREX_VFPUCONTROL_246, + R4000ALLEGREX_VFPUCONTROL_247, + R4000ALLEGREX_VFPUCONTROL_248, + R4000ALLEGREX_VFPUCONTROL_249, + R4000ALLEGREX_VFPUCONTROL_250, + R4000ALLEGREX_VFPUCONTROL_251, + R4000ALLEGREX_VFPUCONTROL_252, + R4000ALLEGREX_VFPUCONTROL_253, + R4000ALLEGREX_VFPUCONTROL_254, + R4000ALLEGREX_VFPUCONTROL_255, + } + #[repr(u32)] + #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] + #[allow(non_camel_case_types)] + #[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)] + pub enum R4000AllegrexVConstant { + INVALID_0, + VFPU_HUGE, + VFPU_SQRT2, + VFPU_SQRT1_2, + VFPU_2_SQRTPI, + VFPU_2_PI, + VFPU_1_PI, + VFPU_PI_4, + VFPU_PI_2, + VFPU_PI, + VFPU_E, + VFPU_LOG2E, + VFPU_LOG10E, + VFPU_LN2, + VFPU_LN10, + VFPU_2PI, + VFPU_PI_6, + VFPU_LOG10TWO, + VFPU_LOG2TEN, + VFPU_SQRT3_2, + INVALID_20, + INVALID_21, + INVALID_22, + INVALID_23, + INVALID_24, + INVALID_25, + INVALID_26, + INVALID_27, + INVALID_28, + INVALID_29, + INVALID_30, + INVALID_31, + } + #[repr(u32)] + #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] + #[allow(non_camel_case_types)] + #[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)] pub enum R5900VF { vf0, vf1, diff --git a/rust/src/registers_methods.rs b/rust/src/registers_methods.rs index e6664d9d..8617e00a 100644 --- a/rust/src/registers_methods.rs +++ b/rust/src/registers_methods.rs @@ -19,6 +19,24 @@ extern "C" { pub static mut RabbitizerRegister_RspCop2Control_Names: [[*const core::ffi::c_char; 2usize]; 0usize]; pub static mut RabbitizerRegister_RspVector_Names: [[*const core::ffi::c_char; 2usize]; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexS_Names: + [[*const core::ffi::c_char; 2usize]; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexV2D_Names: + [[*const core::ffi::c_char; 2usize]; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexV3D_Names: + [[*const core::ffi::c_char; 2usize]; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexV4D_Names: + [[*const core::ffi::c_char; 2usize]; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexM2x2_Names: + [[*const core::ffi::c_char; 2usize]; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexM3x3_Names: + [[*const core::ffi::c_char; 2usize]; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexM4x4_Names: + [[*const core::ffi::c_char; 2usize]; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexVfpuControl_Names: + [[*const core::ffi::c_char; 2usize]; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexVConstant_Names: + [[*const core::ffi::c_char; 2usize]; 0usize]; pub static mut RabbitizerRegister_R5900VF_Names: [[*const core::ffi::c_char; 2usize]; 0usize]; pub static mut RabbitizerRegister_R5900VI_Names: [[*const core::ffi::c_char; 2usize]; 0usize]; @@ -58,6 +76,18 @@ extern "C" { /* RSP */ + pub static mut RabbitizerRegister_R4000AllegrexS_Descriptors: [RegisterDescriptor; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexV2D_Descriptors: [RegisterDescriptor; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexV3D_Descriptors: [RegisterDescriptor; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexV4D_Descriptors: [RegisterDescriptor; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexM2x2_Descriptors: [RegisterDescriptor; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexM3x3_Descriptors: [RegisterDescriptor; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexM4x4_Descriptors: [RegisterDescriptor; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexVfpuControl_Descriptors: + [RegisterDescriptor; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexVConstant_Descriptors: + [RegisterDescriptor; 0usize]; + /* R5900 */ pub static mut RabbitizerRegister_R5900VF_Descriptors: [RegisterDescriptor; 0usize]; @@ -300,6 +330,195 @@ impl registers_enum::registers::RspVector { } } +impl registers_enum::registers::R4000AllegrexS { + pub fn name(self) -> &'static str { + let reg_value: u32 = self.into(); + + unsafe { + std::ffi::CStr::from_ptr(RabbitizerRegister_R4000AllegrexS_Names[reg_value as usize][1]) + .to_str() + .unwrap() + } + } + + pub fn descriptor(&self) -> &RegisterDescriptor { + let reg_value: u32 = (*self).into(); + + unsafe { RabbitizerRegister_R4000AllegrexS_Descriptors.get_unchecked(reg_value as usize) } + } +} + +impl registers_enum::registers::R4000AllegrexV2D { + pub fn name(self) -> &'static str { + let reg_value: u32 = self.into(); + + unsafe { + std::ffi::CStr::from_ptr( + RabbitizerRegister_R4000AllegrexV2D_Names[reg_value as usize][1], + ) + .to_str() + .unwrap() + } + } + + pub fn descriptor(&self) -> &RegisterDescriptor { + let reg_value: u32 = (*self).into(); + + unsafe { RabbitizerRegister_R4000AllegrexV2D_Descriptors.get_unchecked(reg_value as usize) } + } +} + +impl registers_enum::registers::R4000AllegrexV3D { + pub fn name(self) -> &'static str { + let reg_value: u32 = self.into(); + + unsafe { + std::ffi::CStr::from_ptr( + RabbitizerRegister_R4000AllegrexV3D_Names[reg_value as usize][1], + ) + .to_str() + .unwrap() + } + } + + pub fn descriptor(&self) -> &RegisterDescriptor { + let reg_value: u32 = (*self).into(); + + unsafe { RabbitizerRegister_R4000AllegrexV3D_Descriptors.get_unchecked(reg_value as usize) } + } +} + +impl registers_enum::registers::R4000AllegrexV4D { + pub fn name(self) -> &'static str { + let reg_value: u32 = self.into(); + + unsafe { + std::ffi::CStr::from_ptr( + RabbitizerRegister_R4000AllegrexV4D_Names[reg_value as usize][1], + ) + .to_str() + .unwrap() + } + } + + pub fn descriptor(&self) -> &RegisterDescriptor { + let reg_value: u32 = (*self).into(); + + unsafe { RabbitizerRegister_R4000AllegrexV4D_Descriptors.get_unchecked(reg_value as usize) } + } +} + +impl registers_enum::registers::R4000AllegrexM2x2 { + pub fn name(self) -> &'static str { + let reg_value: u32 = self.into(); + + unsafe { + std::ffi::CStr::from_ptr( + RabbitizerRegister_R4000AllegrexM2x2_Names[reg_value as usize][1], + ) + .to_str() + .unwrap() + } + } + + pub fn descriptor(&self) -> &RegisterDescriptor { + let reg_value: u32 = (*self).into(); + + unsafe { + RabbitizerRegister_R4000AllegrexM2x2_Descriptors.get_unchecked(reg_value as usize) + } + } +} + +impl registers_enum::registers::R4000AllegrexM3x3 { + pub fn name(self) -> &'static str { + let reg_value: u32 = self.into(); + + unsafe { + std::ffi::CStr::from_ptr( + RabbitizerRegister_R4000AllegrexM3x3_Names[reg_value as usize][1], + ) + .to_str() + .unwrap() + } + } + + pub fn descriptor(&self) -> &RegisterDescriptor { + let reg_value: u32 = (*self).into(); + + unsafe { + RabbitizerRegister_R4000AllegrexM3x3_Descriptors.get_unchecked(reg_value as usize) + } + } +} + +impl registers_enum::registers::R4000AllegrexM4x4 { + pub fn name(self) -> &'static str { + let reg_value: u32 = self.into(); + + unsafe { + std::ffi::CStr::from_ptr( + RabbitizerRegister_R4000AllegrexM4x4_Names[reg_value as usize][1], + ) + .to_str() + .unwrap() + } + } + + pub fn descriptor(&self) -> &RegisterDescriptor { + let reg_value: u32 = (*self).into(); + + unsafe { + RabbitizerRegister_R4000AllegrexM4x4_Descriptors.get_unchecked(reg_value as usize) + } + } +} + +impl registers_enum::registers::R4000AllegrexVfpuControl { + pub fn name(self) -> &'static str { + let reg_value: u32 = self.into(); + + unsafe { + std::ffi::CStr::from_ptr( + RabbitizerRegister_R4000AllegrexVfpuControl_Names[reg_value as usize][1], + ) + .to_str() + .unwrap() + } + } + + pub fn descriptor(&self) -> &RegisterDescriptor { + let reg_value: u32 = (*self).into(); + + unsafe { + RabbitizerRegister_R4000AllegrexVfpuControl_Descriptors + .get_unchecked(reg_value as usize) + } + } +} + +impl registers_enum::registers::R4000AllegrexVConstant { + pub fn name(self) -> &'static str { + let reg_value: u32 = self.into(); + + unsafe { + std::ffi::CStr::from_ptr( + RabbitizerRegister_R4000AllegrexVConstant_Names[reg_value as usize][1], + ) + .to_str() + .unwrap() + } + } + + pub fn descriptor(&self) -> &RegisterDescriptor { + let reg_value: u32 = (*self).into(); + + unsafe { + RabbitizerRegister_R4000AllegrexVConstant_Descriptors.get_unchecked(reg_value as usize) + } + } +} + impl registers_enum::registers::R5900VF { pub fn name(self) -> &'static str { let reg_value: u32 = self.into(); diff --git a/src/common/RabbitizerConfig.c b/src/common/RabbitizerConfig.c index 351be722..2d0e83a2 100644 --- a/src/common/RabbitizerConfig.c +++ b/src/common/RabbitizerConfig.c @@ -26,6 +26,7 @@ RabbitizerConfig RabbitizerConfig_Cfg = { .userFpcCsr = true, .vr4300Cop0NamedRegisters = true, .vr4300RspCop0NamedRegisters = true, + .r4000AllegrexVfpuControlNamedRegisters = false, }, .pseudos = { .enablePseudos = true, diff --git a/src/common/Utils.c b/src/common/Utils.c index 2ad27442..f1765138 100644 --- a/src/common/Utils.c +++ b/src/common/Utils.c @@ -76,3 +76,79 @@ size_t RabbitizerUtils_escapeString(char *dst, size_t dstSize, const char *src, return dstpos; } + +uint32_t RabbitizerUtils_floatRepr_32From16(uint16_t arg) { + // IEEE754 16-bit floats are encoded in 16 bits as follows: + // Sign bit: 1 bit (bit 15) + // Encoded exponent: 5 bits (bits 10 ~ 15) + // Fraction/Mantissa: 10 bits (bits 0 ~ 9) + + uint32_t ret; + int32_t sign; + int32_t encodedExponent; + int32_t realExponent; + bool mantissaIsZero; + + // arg.d = a; + + ret = 0; + + sign = arg >> 15; + + // If parameter is zero, then return zero + if ((arg & ~(1ULL << 15)) == 0) { + // Preserve the sign + ret |= (sign << 31); + return ret; + } + + // Clear up the sign + arg &= ~(1ULL << 15); + + encodedExponent = arg >> 10; + // Clear up the encoded exponent + arg &= ~0x7C00ULL; + + // Exponent bias: 0xF + realExponent = encodedExponent - 0xF; + + mantissaIsZero = (arg == 0); + + if (encodedExponent == 0) { + // subnormals + + ret |= ((uint32_t)sign) << 31; + // no need to set the exponent part since it was already zero'd + + // Set the mantissa + ret |= arg >> (23 - 10); + + return ret; + } + + if (encodedExponent == 0x1F) { + // Infinity and NaN + + ret |= ((uint32_t)sign) << 31; + ret |= 0x7F800000ULL; + + if (!mantissaIsZero) { + // NaN + + // Set the mantissa to any non-zero value + ret |= arg << (23 - 10); + } + + return ret; + } + + ret |= ((uint32_t)sign) << 31; + + // re-encode the exponent + ret |= ((uint32_t)(realExponent + 0x7F)) << 23; + + // Set the mantissa + ret |= arg << (23 - 10); + + return ret; +} diff --git a/src/instructions/RabbitizerInstrDescriptor.c b/src/instructions/RabbitizerInstrDescriptor.c index e466108f..544d61c3 100644 --- a/src/instructions/RabbitizerInstrDescriptor.c +++ b/src/instructions/RabbitizerInstrDescriptor.c @@ -43,6 +43,12 @@ bool RabbitizerInstrDescriptor_hasOperandAlias(const RabbitizerInstrDescriptor * if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_rsp_maybe_rd_rs)) { return true; } + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r4000allegrex_offset14_base)) { + return true; + } + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r4000allegrex_offset14_base_maybe_wb)) { + return true; + } break; case RAB_OPERAND_cpu_immediate: @@ -264,6 +270,149 @@ bool RabbitizerInstrDescriptor_hasOperandAlias(const RabbitizerInstrDescriptor * break; /* r3000gte */ + /* r4000allegrex */ + case RAB_OPERAND_r4000allegrex_s_vs: + case RAB_OPERAND_r4000allegrex_s_vt: + case RAB_OPERAND_r4000allegrex_s_vd: + case RAB_OPERAND_r4000allegrex_s_vt_imm: + case RAB_OPERAND_r4000allegrex_s_vd_imm: + case RAB_OPERAND_r4000allegrex_p_vs: + case RAB_OPERAND_r4000allegrex_p_vt: + case RAB_OPERAND_r4000allegrex_p_vd: + case RAB_OPERAND_r4000allegrex_t_vs: + case RAB_OPERAND_r4000allegrex_t_vt: + case RAB_OPERAND_r4000allegrex_t_vd: + case RAB_OPERAND_r4000allegrex_q_vs: + case RAB_OPERAND_r4000allegrex_q_vt: + case RAB_OPERAND_r4000allegrex_q_vd: + case RAB_OPERAND_r4000allegrex_q_vt_imm: + case RAB_OPERAND_r4000allegrex_mp_vs: + case RAB_OPERAND_r4000allegrex_mp_vt: + case RAB_OPERAND_r4000allegrex_mp_vd: + case RAB_OPERAND_r4000allegrex_mp_vs_transpose: + case RAB_OPERAND_r4000allegrex_mt_vs: + case RAB_OPERAND_r4000allegrex_mt_vt: + case RAB_OPERAND_r4000allegrex_mt_vd: + case RAB_OPERAND_r4000allegrex_mt_vs_transpose: + case RAB_OPERAND_r4000allegrex_mq_vs: + case RAB_OPERAND_r4000allegrex_mq_vt: + case RAB_OPERAND_r4000allegrex_mq_vd: + case RAB_OPERAND_r4000allegrex_mq_vs_transpose: + case RAB_OPERAND_r4000allegrex_cop2cs: + case RAB_OPERAND_r4000allegrex_cop2cd: + break; + + case RAB_OPERAND_r4000allegrex_pos: + case RAB_OPERAND_r4000allegrex_size: + case RAB_OPERAND_r4000allegrex_size_plus_pos: + case RAB_OPERAND_r4000allegrex_imm3: + break; + + case RAB_OPERAND_r4000allegrex_offset14_base: + if (RabbitizerInstrDescriptor_hasOperandAlias(self, RAB_OPERAND_cpu_rs)) { + return true; + } + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r4000allegrex_offset14_base_maybe_wb)) { + return true; + } + break; + + case RAB_OPERAND_r4000allegrex_offset14_base_maybe_wb: + if (RabbitizerInstrDescriptor_hasOperandAlias(self, RAB_OPERAND_cpu_rs)) { + return true; + } + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r4000allegrex_offset14_base)) { + return true; + } + break; + + case RAB_OPERAND_r4000allegrex_vcmp_cond: + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, + RAB_OPERAND_r4000allegrex_vcmp_cond_s_maybe_vs_maybe_vt)) { + return true; + } + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, + RAB_OPERAND_r4000allegrex_vcmp_cond_p_maybe_vs_maybe_vt)) { + return true; + } + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, + RAB_OPERAND_r4000allegrex_vcmp_cond_t_maybe_vs_maybe_vt)) { + return true; + } + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, + RAB_OPERAND_r4000allegrex_vcmp_cond_q_maybe_vs_maybe_vt)) { + return true; + } + break; + + case RAB_OPERAND_r4000allegrex_vcmp_cond_s_maybe_vs_maybe_vt: + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r4000allegrex_vcmp_cond)) { + return true; + } + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r4000allegrex_s_vs)) { + return true; + } + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r4000allegrex_s_vt)) { + return true; + } + break; + + case RAB_OPERAND_r4000allegrex_vcmp_cond_p_maybe_vs_maybe_vt: + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r4000allegrex_vcmp_cond)) { + return true; + } + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r4000allegrex_p_vs)) { + return true; + } + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r4000allegrex_p_vt)) { + return true; + } + break; + + case RAB_OPERAND_r4000allegrex_vcmp_cond_t_maybe_vs_maybe_vt: + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r4000allegrex_vcmp_cond)) { + return true; + } + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r4000allegrex_t_vs)) { + return true; + } + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r4000allegrex_t_vt)) { + return true; + } + break; + + case RAB_OPERAND_r4000allegrex_vcmp_cond_q_maybe_vs_maybe_vt: + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r4000allegrex_vcmp_cond)) { + return true; + } + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r4000allegrex_q_vs)) { + return true; + } + if (RabbitizerInstrDescriptor_hasSpecificOperand(self, RAB_OPERAND_r4000allegrex_q_vt)) { + return true; + } + break; + + case RAB_OPERAND_r4000allegrex_vconstant: + case RAB_OPERAND_r4000allegrex_power_of_two: + case RAB_OPERAND_r4000allegrex_vfpu_cc_bit: + case RAB_OPERAND_r4000allegrex_bn: + case RAB_OPERAND_r4000allegrex_int16: + case RAB_OPERAND_r4000allegrex_float16: + case RAB_OPERAND_r4000allegrex_p_vrot_code: + case RAB_OPERAND_r4000allegrex_t_vrot_code: + case RAB_OPERAND_r4000allegrex_q_vrot_code: + case RAB_OPERAND_r4000allegrex_rpx: + case RAB_OPERAND_r4000allegrex_rpy: + case RAB_OPERAND_r4000allegrex_rpz: + case RAB_OPERAND_r4000allegrex_rpw: + case RAB_OPERAND_r4000allegrex_wpx: + case RAB_OPERAND_r4000allegrex_wpy: + case RAB_OPERAND_r4000allegrex_wpz: + case RAB_OPERAND_r4000allegrex_wpw: + break; + /* r4000allegrex */ + /* r5900 */ case RAB_OPERAND_r5900_I: case RAB_OPERAND_r5900_Q: diff --git a/src/instructions/RabbitizerInstrId.c b/src/instructions/RabbitizerInstrId.c index 4ea6f420..e7b30b38 100644 --- a/src/instructions/RabbitizerInstrId.c +++ b/src/instructions/RabbitizerInstrId.c @@ -16,10 +16,12 @@ bool RabbitizerInstrId_isValid(RabbitizerInstrId uniqueId) { case RABBITIZER_INSTR_ID_rsp_INVALID: case RABBITIZER_INSTR_ID_r3000gte_INVALID: case RABBITIZER_INSTR_ID_r5900_INVALID: + case RABBITIZER_INSTR_ID_r4000allegrex_INVALID: case RABBITIZER_INSTR_ID_cpu_MAX: case RABBITIZER_INSTR_ID_rsp_MAX: case RABBITIZER_INSTR_ID_r3000gte_MAX: case RABBITIZER_INSTR_ID_r5900_MAX: + case RABBITIZER_INSTR_ID_r4000allegrex_MAX: // case RABBITIZER_INSTR_ID_ALL_MAX: Same as last MAX return false; diff --git a/src/instructions/RabbitizerInstruction/RabbitizerInstruction.c b/src/instructions/RabbitizerInstruction/RabbitizerInstruction.c index 36de8723..4e774737 100644 --- a/src/instructions/RabbitizerInstruction/RabbitizerInstruction.c +++ b/src/instructions/RabbitizerInstruction/RabbitizerInstruction.c @@ -9,6 +9,7 @@ #include "instructions/RabbitizerRegister.h" #include "instructions/RabbitizerInstructionRsp.h" #include "instructions/RabbitizerInstructionR3000GTE.h" +#include "instructions/RabbitizerInstructionR4000Allegrex.h" #include "instructions/RabbitizerInstructionR5900.h" void RabbitizerInstruction_init(RabbitizerInstruction *self, uint32_t word, uint32_t vram) { @@ -355,6 +356,155 @@ void RabbitizerInstruction_blankOut(RabbitizerInstruction *self) { break; /* r3000gte */ + /* r4000allegrex */ + case RAB_OPERAND_r4000allegrex_s_vs: + case RAB_OPERAND_r4000allegrex_p_vs: + case RAB_OPERAND_r4000allegrex_t_vs: + case RAB_OPERAND_r4000allegrex_q_vs: + case RAB_OPERAND_r4000allegrex_mp_vs: + case RAB_OPERAND_r4000allegrex_mt_vs: + case RAB_OPERAND_r4000allegrex_mq_vs: + case RAB_OPERAND_r4000allegrex_mp_vs_transpose: + case RAB_OPERAND_r4000allegrex_mt_vs_transpose: + case RAB_OPERAND_r4000allegrex_mq_vs_transpose: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_vs(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_s_vt: + case RAB_OPERAND_r4000allegrex_p_vt: + case RAB_OPERAND_r4000allegrex_t_vt: + case RAB_OPERAND_r4000allegrex_q_vt: + case RAB_OPERAND_r4000allegrex_mp_vt: + case RAB_OPERAND_r4000allegrex_mt_vt: + case RAB_OPERAND_r4000allegrex_mq_vt: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_vt(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_s_vd: + case RAB_OPERAND_r4000allegrex_p_vd: + case RAB_OPERAND_r4000allegrex_t_vd: + case RAB_OPERAND_r4000allegrex_q_vd: + case RAB_OPERAND_r4000allegrex_mp_vd: + case RAB_OPERAND_r4000allegrex_mt_vd: + case RAB_OPERAND_r4000allegrex_mq_vd: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_vd(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_s_vt_imm: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_vt_imm(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_s_vd_imm: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_vd_imm(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_q_vt_imm: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_vt_6_imm(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_cop2cd: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_cop2cd(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_cop2cs: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_cop2cs(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_pos: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_pos(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_size: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_size(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_size_plus_pos: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_size_plus_pos(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_imm3: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_imm3(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_offset14_base_maybe_wb: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_wb(self->word, 0); + FALLTHROUGH; + case RAB_OPERAND_r4000allegrex_offset14_base: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_offset14(self->word, 0); + self->word = RAB_INSTR_PACK_rs(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_vcmp_cond_s_maybe_vs_maybe_vt: + case RAB_OPERAND_r4000allegrex_vcmp_cond_p_maybe_vs_maybe_vt: + case RAB_OPERAND_r4000allegrex_vcmp_cond_t_maybe_vs_maybe_vt: + case RAB_OPERAND_r4000allegrex_vcmp_cond_q_maybe_vs_maybe_vt: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_vs(self->word, 0); + self->word = RAB_INSTR_R4000ALLEGREX_PACK_vt(self->word, 0); + FALLTHROUGH; + case RAB_OPERAND_r4000allegrex_vcmp_cond: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_vcmp_cond(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_vconstant: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_vconstant(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_power_of_two: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_power_of_two(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_vfpu_cc_bit: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_vfpu_cc_bit(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_bn: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_bn(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_int16: + case RAB_OPERAND_r4000allegrex_float16: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_intfloat16(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_p_vrot_code: + case RAB_OPERAND_r4000allegrex_t_vrot_code: + case RAB_OPERAND_r4000allegrex_q_vrot_code: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_vrot_code(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_rpx: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_rpx(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_rpy: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_rpy(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_rpz: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_rpz(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_rpw: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_rpw(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_wpx: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_wpx(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_wpy: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_wpy(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_wpz: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_wpz(self->word, 0); + break; + + case RAB_OPERAND_r4000allegrex_wpw: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_wpw(self->word, 0); + break; + /* r4000allegrex */ + /* r5900 */ case RAB_OPERAND_r5900_I: case RAB_OPERAND_r5900_Q: diff --git a/src/instructions/RabbitizerInstruction/RabbitizerInstruction_Examination.c b/src/instructions/RabbitizerInstruction/RabbitizerInstruction_Examination.c index 40c4391e..32fca444 100644 --- a/src/instructions/RabbitizerInstruction/RabbitizerInstruction_Examination.c +++ b/src/instructions/RabbitizerInstruction/RabbitizerInstruction_Examination.c @@ -8,6 +8,7 @@ #include "common/RabbitizerConfig.h" #include "instructions/RabbitizerInstructionRsp.h" #include "instructions/RabbitizerInstructionR3000GTE.h" +#include "instructions/RabbitizerInstructionR4000Allegrex.h" #include "instructions/RabbitizerInstructionR5900.h" #include "instructions/RabbitizerRegister.h" @@ -401,6 +402,155 @@ uint32_t RabbitizerInstruction_getValidBits(const RabbitizerInstruction *self) { break; /* r3000gte */ + /* r4000allegrex */ + case RAB_OPERAND_r4000allegrex_s_vs: + case RAB_OPERAND_r4000allegrex_p_vs: + case RAB_OPERAND_r4000allegrex_t_vs: + case RAB_OPERAND_r4000allegrex_q_vs: + case RAB_OPERAND_r4000allegrex_mp_vs: + case RAB_OPERAND_r4000allegrex_mt_vs: + case RAB_OPERAND_r4000allegrex_mq_vs: + case RAB_OPERAND_r4000allegrex_mp_vs_transpose: + case RAB_OPERAND_r4000allegrex_mt_vs_transpose: + case RAB_OPERAND_r4000allegrex_mq_vs_transpose: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_vs(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_s_vt: + case RAB_OPERAND_r4000allegrex_p_vt: + case RAB_OPERAND_r4000allegrex_t_vt: + case RAB_OPERAND_r4000allegrex_q_vt: + case RAB_OPERAND_r4000allegrex_mp_vt: + case RAB_OPERAND_r4000allegrex_mt_vt: + case RAB_OPERAND_r4000allegrex_mq_vt: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_vt(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_s_vd: + case RAB_OPERAND_r4000allegrex_p_vd: + case RAB_OPERAND_r4000allegrex_t_vd: + case RAB_OPERAND_r4000allegrex_q_vd: + case RAB_OPERAND_r4000allegrex_mp_vd: + case RAB_OPERAND_r4000allegrex_mt_vd: + case RAB_OPERAND_r4000allegrex_mq_vd: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_vd(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_s_vt_imm: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_vt_imm(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_s_vd_imm: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_vd_imm(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_q_vt_imm: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_vt_6_imm(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_cop2cs: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_cop2cs(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_cop2cd: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_cop2cd(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_pos: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_pos(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_size: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_size(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_size_plus_pos: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_size_plus_pos(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_imm3: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_imm3(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_offset14_base_maybe_wb: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_wb(validbits, ~0); + FALLTHROUGH; + case RAB_OPERAND_r4000allegrex_offset14_base: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_offset14(validbits, ~0); + validbits = RAB_INSTR_PACK_rs(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_vcmp_cond_s_maybe_vs_maybe_vt: + case RAB_OPERAND_r4000allegrex_vcmp_cond_p_maybe_vs_maybe_vt: + case RAB_OPERAND_r4000allegrex_vcmp_cond_t_maybe_vs_maybe_vt: + case RAB_OPERAND_r4000allegrex_vcmp_cond_q_maybe_vs_maybe_vt: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_vs(validbits, ~0); + validbits = RAB_INSTR_R4000ALLEGREX_PACK_vt(validbits, ~0); + FALLTHROUGH; + case RAB_OPERAND_r4000allegrex_vcmp_cond: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_vcmp_cond(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_vconstant: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_vconstant(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_power_of_two: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_power_of_two(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_vfpu_cc_bit: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu_cc_bit(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_bn: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_bn(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_int16: + case RAB_OPERAND_r4000allegrex_float16: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_intfloat16(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_p_vrot_code: + case RAB_OPERAND_r4000allegrex_t_vrot_code: + case RAB_OPERAND_r4000allegrex_q_vrot_code: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_vrot_code(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_rpx: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_rpx(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_rpy: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_rpy(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_rpz: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_rpz(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_rpw: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_rpw(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_wpx: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_wpx(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_wpy: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_wpy(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_wpz: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_wpz(validbits, ~0); + break; + + case RAB_OPERAND_r4000allegrex_wpw: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_wpw(validbits, ~0); + break; + /* r4000allegrex */ + /* r5900 */ case RAB_OPERAND_r5900_I: case RAB_OPERAND_r5900_Q: diff --git a/src/instructions/RabbitizerInstruction/RabbitizerInstruction_ProcessUniqueId.c b/src/instructions/RabbitizerInstruction/RabbitizerInstruction_ProcessUniqueId.c index 3b1266a2..404ab694 100644 --- a/src/instructions/RabbitizerInstruction/RabbitizerInstruction_ProcessUniqueId.c +++ b/src/instructions/RabbitizerInstruction/RabbitizerInstruction_ProcessUniqueId.c @@ -166,6 +166,8 @@ void RabbitizerInstruction_processUniqueId_Coprocessor0_BC0(RabbitizerInstructio switch (fmt) { #include "tables/instr_id/cpu/cpu_cop0_bc0.inc" } + + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; } void RabbitizerInstruction_processUniqueId_Coprocessor0_Tlb(RabbitizerInstruction *self) { @@ -177,6 +179,8 @@ void RabbitizerInstruction_processUniqueId_Coprocessor0_Tlb(RabbitizerInstructio switch (function) { #include "tables/instr_id/cpu/cpu_cop0_tlb.inc" } + + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; } void RabbitizerInstruction_processUniqueId_Coprocessor0(RabbitizerInstruction *self) { @@ -210,6 +214,8 @@ void RabbitizerInstruction_processUniqueId_Coprocessor1_BC1(RabbitizerInstructio switch (fmt) { #include "tables/instr_id/cpu/cpu_cop1_bc1.inc" } + + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; } void RabbitizerInstruction_processUniqueId_Coprocessor1_FpuS(RabbitizerInstruction *self) { @@ -221,6 +227,8 @@ void RabbitizerInstruction_processUniqueId_Coprocessor1_FpuS(RabbitizerInstructi switch (function) { #include "tables/instr_id/cpu/cpu_cop1_fpu_s.inc" } + + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; } void RabbitizerInstruction_processUniqueId_Coprocessor1_FpuD(RabbitizerInstruction *self) { @@ -232,6 +240,8 @@ void RabbitizerInstruction_processUniqueId_Coprocessor1_FpuD(RabbitizerInstructi switch (function) { #include "tables/instr_id/cpu/cpu_cop1_fpu_d.inc" } + + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; } void RabbitizerInstruction_processUniqueId_Coprocessor1_FpuW(RabbitizerInstruction *self) { @@ -243,6 +253,8 @@ void RabbitizerInstruction_processUniqueId_Coprocessor1_FpuW(RabbitizerInstructi switch (function) { #include "tables/instr_id/cpu/cpu_cop1_fpu_w.inc" } + + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; } void RabbitizerInstruction_processUniqueId_Coprocessor1_FpuL(RabbitizerInstruction *self) { @@ -254,6 +266,8 @@ void RabbitizerInstruction_processUniqueId_Coprocessor1_FpuL(RabbitizerInstructi switch (function) { #include "tables/instr_id/cpu/cpu_cop1_fpu_l.inc" } + + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; } void RabbitizerInstruction_processUniqueId_Coprocessor1(RabbitizerInstruction *self) { diff --git a/src/instructions/RabbitizerInstructionR4000Allegrex/RabbitizerInstructionR4000Allegrex.c b/src/instructions/RabbitizerInstructionR4000Allegrex/RabbitizerInstructionR4000Allegrex.c new file mode 100644 index 00000000..320a5930 --- /dev/null +++ b/src/instructions/RabbitizerInstructionR4000Allegrex/RabbitizerInstructionR4000Allegrex.c @@ -0,0 +1,17 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +#include "instructions/RabbitizerInstructionR4000Allegrex.h" + +void RabbitizerInstructionR4000Allegrex_init(RabbitizerInstruction *self, uint32_t word, uint32_t vram) { + RabbitizerInstruction_init(self, word, vram); + + self->uniqueId = RABBITIZER_INSTR_ID_r4000allegrex_INVALID; + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + + self->category = RABBITIZER_INSTRCAT_R4000ALLEGREX; +} + +void RabbitizerInstructionR4000Allegrex_destroy(RabbitizerInstruction *self) { + RabbitizerInstruction_destroy(self); +} diff --git a/src/instructions/RabbitizerInstructionR4000Allegrex/RabbitizerInstructionR4000Allegrex_OperandType.c b/src/instructions/RabbitizerInstructionR4000Allegrex/RabbitizerInstructionR4000Allegrex_OperandType.c new file mode 100644 index 00000000..4067e4d6 --- /dev/null +++ b/src/instructions/RabbitizerInstructionR4000Allegrex/RabbitizerInstructionR4000Allegrex_OperandType.c @@ -0,0 +1,1139 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +#include "instructions/RabbitizerInstructionR4000Allegrex.h" + +#include +#include +#include + +#include "common/Utils.h" +#include "common/RabbitizerConfig.h" +#include "instructions/RabbitizerRegister.h" + +size_t RabbitizerOperandType_process_r4000allegrex_s_vs(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexS(RAB_INSTR_R4000ALLEGREX_GET_vs(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_s_vt(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexS(RAB_INSTR_R4000ALLEGREX_GET_vt(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_s_vd(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexS(RAB_INSTR_R4000ALLEGREX_GET_vd(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_s_vt_imm(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexS(RAB_INSTR_R4000ALLEGREX_GET_vt_imm(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_s_vd_imm(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexS(RAB_INSTR_R4000ALLEGREX_GET_vd_imm(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_p_vs(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexV2D(RAB_INSTR_R4000ALLEGREX_GET_vs(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_p_vt(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexV2D(RAB_INSTR_R4000ALLEGREX_GET_vt(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_p_vd(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexV2D(RAB_INSTR_R4000ALLEGREX_GET_vd(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_t_vs(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexV3D(RAB_INSTR_R4000ALLEGREX_GET_vs(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_t_vt(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexV3D(RAB_INSTR_R4000ALLEGREX_GET_vt(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_t_vd(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexV3D(RAB_INSTR_R4000ALLEGREX_GET_vd(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_q_vs(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexV4D(RAB_INSTR_R4000ALLEGREX_GET_vs(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_q_vt(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexV4D(RAB_INSTR_R4000ALLEGREX_GET_vt(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_q_vd(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexV4D(RAB_INSTR_R4000ALLEGREX_GET_vd(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_q_vt_imm(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexV4D(RAB_INSTR_R4000ALLEGREX_GET_vt_6_imm(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_mp_vs(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexM2x2(RAB_INSTR_R4000ALLEGREX_GET_vs(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_mp_vt(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexM2x2(RAB_INSTR_R4000ALLEGREX_GET_vt(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_mp_vd(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexM2x2(RAB_INSTR_R4000ALLEGREX_GET_vd(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_mp_vs_transpose(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexM2x2(RAB_INSTR_R4000ALLEGREX_GET_vs_transpose(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_mt_vs(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexM3x3(RAB_INSTR_R4000ALLEGREX_GET_vs(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_mt_vt(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexM3x3(RAB_INSTR_R4000ALLEGREX_GET_vt(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_mt_vd(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexM3x3(RAB_INSTR_R4000ALLEGREX_GET_vd(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_mt_vs_transpose(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexM3x3(RAB_INSTR_R4000ALLEGREX_GET_vs_transpose(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_mq_vs(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexM4x4(RAB_INSTR_R4000ALLEGREX_GET_vs(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_mq_vt(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexM4x4(RAB_INSTR_R4000ALLEGREX_GET_vt(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_mq_vd(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexM4x4(RAB_INSTR_R4000ALLEGREX_GET_vd(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_mq_vs_transpose(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexM4x4(RAB_INSTR_R4000ALLEGREX_GET_vs_transpose(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_cop2cs(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexVfpuControl(RAB_INSTR_R4000ALLEGREX_GET_cop2cs(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_cop2cd(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexVfpuControl(RAB_INSTR_R4000ALLEGREX_GET_cop2cd(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_pos(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_pos(self); + +// TODO: consider making this a proper configuration +#if 0 + if (temp < 10) { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%i", temp); + } else { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "0x%x", temp); + } +#endif + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%i", temp); + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_size(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_size(self) + 1; + +// TODO: consider making this a proper configuration +#if 0 + if (temp < 10) { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%i", temp); + } else { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "0x%x", temp); + } +#endif + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%i", temp); + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_size_plus_pos(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_size_plus_pos(self) + 1 - RAB_INSTR_R4000ALLEGREX_GET_pos(self); + +// TODO: consider making this a proper configuration +#if 0 + if (temp < 10) { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%i", temp); + } else { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "0x%x", temp); + } +#endif + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%i", temp); + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_imm3(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_imm3(self); + +// TODO: consider making this a proper configuration +#if 0 + if (temp < 10) { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%i", temp); + } else { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "0x%x", temp); + } +#endif + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%i", temp); + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_offset14(const RabbitizerInstruction *self, char *dst, + const char *immOverride, size_t immOverrideLength) { + size_t totalSize = 0; + int32_t number; + + if ((dst == NULL) && (immOverrideLength > 0)) { + return immOverrideLength; + } + + if ((immOverride != NULL) && (immOverrideLength > 0)) { + memcpy(dst, immOverride, immOverrideLength); + return immOverrideLength; + } + + number = RabbitizerUtils_From2Complement(RAB_INSTR_R4000ALLEGREX_GET_offset14(self) << 2, 16); + if (RabbitizerConfig_Cfg.misc.omit0XOnSmallImm) { + if (number > -10 && number < 10) { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%i", number); + return totalSize; + } + } + if (number < 0) { + if (RabbitizerConfig_Cfg.misc.upperCaseImm) { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "-0x%X", -number); + } else { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "-0x%x", -number); + } + } else { + if (RabbitizerConfig_Cfg.misc.upperCaseImm) { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "0x%X", number); + } else { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "0x%x", number); + } + } + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_offset14_base(const RabbitizerInstruction *self, char *dst, + const char *immOverride, size_t immOverrideLength) { + size_t totalSize = 0; + +// TODO: consider making this a proper configuration +#if 0 + if ((immOverride != NULL) && (immOverrideLength > 0) || RAB_INSTR_GET_immediate(self) != 0) { + RABUTILS_BUFFER_ADVANCE(dst, totalSize, RabbitizerOperandType_process_r4000allegrex_offset14(self, dst, immOverride, immOverrideLength)); + } +#endif + RABUTILS_BUFFER_ADVANCE( + dst, totalSize, + RabbitizerOperandType_process_r4000allegrex_offset14(self, dst, immOverride, immOverrideLength)); + + RABUTILS_BUFFER_WRITE_CHAR(dst, totalSize, '('); + RABUTILS_BUFFER_ADVANCE(dst, totalSize, + RabbitizerOperandType_process_cpu_rs(self, dst, immOverride, immOverrideLength)); + RABUTILS_BUFFER_WRITE_CHAR(dst, totalSize, ')'); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_offset14_base_maybe_wb(const RabbitizerInstruction *self, char *dst, + const char *immOverride, + size_t immOverrideLength) { + size_t totalSize = 0; + + RABUTILS_BUFFER_ADVANCE( + dst, totalSize, + RabbitizerOperandType_process_r4000allegrex_offset14_base(self, dst, immOverride, immOverrideLength)); + + if (RAB_INSTR_R4000ALLEGREX_GET_wb(self)) { + RABUTILS_BUFFER_CPY(dst, totalSize, ", wb"); + } + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_vcmp_cond(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + static const char *const condition_mnemonics[16] = { + [0] = "fl", // Always false + [1] = "eq", // Equal + [2] = "lt", // Less than + [3] = "le", // Less than or equal + [4] = "tr", // Always true + [5] = "ne", // Not equal + [6] = "ge", // Greater than or equal + [7] = "gt", // Greater than + [8] = "ez", // Equal to zero + [9] = "en", // Equal to NaN + [10] = "ei", // Absolute value equal to infinity + [11] = "es", // Equal to infinity or NaN + [12] = "nz", // Not equal to zero + [13] = "nn", // Not equal to NaN + [14] = "ni", // Absolute value not equal to infinity + [15] = "ns", // Not equal to infinity and not equal to NaN + }; + size_t totalSize = 0; + uint8_t cond = RAB_INSTR_R4000ALLEGREX_GET_vcmp_cond(self); + + RABUTILS_BUFFER_CPY(dst, totalSize, condition_mnemonics[cond]); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_vcmp_cond_s_maybe_vs_maybe_vt(const RabbitizerInstruction *self, + char *dst, const char *immOverride, + size_t immOverrideLength) { + size_t totalSize = 0; + uint8_t cond = RAB_INSTR_R4000ALLEGREX_GET_vcmp_cond(self); + uint8_t vs = RAB_INSTR_R4000ALLEGREX_GET_vs(self); + uint8_t vt = RAB_INSTR_R4000ALLEGREX_GET_vt(self); + + RABUTILS_BUFFER_ADVANCE( + dst, totalSize, + RabbitizerOperandType_process_r4000allegrex_vcmp_cond(self, dst, immOverride, immOverrideLength)); + + switch (cond) { + case 0: // fl + case 4: // tr + // If the other operands are 0 then we can omit them + + if ((vs == 0) && (vt == 0)) { + return totalSize; + } + break; + } + + RABUTILS_BUFFER_CPY(dst, totalSize, ", "); + RABUTILS_BUFFER_ADVANCE( + dst, totalSize, RabbitizerOperandType_process_r4000allegrex_s_vs(self, dst, immOverride, immOverrideLength)); + + switch (cond) { + case 0: // fl + case 4: // tr + break; + + case 1: // eq + case 2: // lt + case 3: // le + case 5: // ne + case 6: // ge + case 7: // gt + break; + + case 8: // ez + case 9: // en + case 10: // ei + case 11: // es + case 12: // nz + case 13: // nn + case 14: // ni + case 15: // ns + // If the vt operands is 0 then we can omit it + + if (vt == 0) { + return totalSize; + } + break; + } + + RABUTILS_BUFFER_CPY(dst, totalSize, ", "); + RABUTILS_BUFFER_ADVANCE( + dst, totalSize, RabbitizerOperandType_process_r4000allegrex_s_vt(self, dst, immOverride, immOverrideLength)); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_vcmp_cond_p_maybe_vs_maybe_vt(const RabbitizerInstruction *self, + char *dst, const char *immOverride, + size_t immOverrideLength) { + size_t totalSize = 0; + uint8_t cond = RAB_INSTR_R4000ALLEGREX_GET_vcmp_cond(self); + uint8_t vs = RAB_INSTR_R4000ALLEGREX_GET_vs(self); + uint8_t vt = RAB_INSTR_R4000ALLEGREX_GET_vt(self); + + RABUTILS_BUFFER_ADVANCE( + dst, totalSize, + RabbitizerOperandType_process_r4000allegrex_vcmp_cond(self, dst, immOverride, immOverrideLength)); + + switch (cond) { + case 0: // fl + case 4: // tr + // If the other operands are 0 then we can omit them + + if ((vs == 0) && (vt == 0)) { + return totalSize; + } + break; + } + + RABUTILS_BUFFER_CPY(dst, totalSize, ", "); + RABUTILS_BUFFER_ADVANCE( + dst, totalSize, RabbitizerOperandType_process_r4000allegrex_p_vs(self, dst, immOverride, immOverrideLength)); + + switch (cond) { + case 0: // fl + case 4: // tr + break; + + case 1: // eq + case 2: // lt + case 3: // le + case 5: // ne + case 6: // ge + case 7: // gt + break; + + case 8: // ez + case 9: // en + case 10: // ei + case 11: // es + case 12: // nz + case 13: // nn + case 14: // ni + case 15: // ns + // If the vt operands is 0 then we can omit it + + if (vt == 0) { + return totalSize; + } + break; + } + + RABUTILS_BUFFER_CPY(dst, totalSize, ", "); + RABUTILS_BUFFER_ADVANCE( + dst, totalSize, RabbitizerOperandType_process_r4000allegrex_p_vt(self, dst, immOverride, immOverrideLength)); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_vcmp_cond_t_maybe_vs_maybe_vt(const RabbitizerInstruction *self, + char *dst, const char *immOverride, + size_t immOverrideLength) { + size_t totalSize = 0; + uint8_t cond = RAB_INSTR_R4000ALLEGREX_GET_vcmp_cond(self); + uint8_t vs = RAB_INSTR_R4000ALLEGREX_GET_vs(self); + uint8_t vt = RAB_INSTR_R4000ALLEGREX_GET_vt(self); + + RABUTILS_BUFFER_ADVANCE( + dst, totalSize, + RabbitizerOperandType_process_r4000allegrex_vcmp_cond(self, dst, immOverride, immOverrideLength)); + + switch (cond) { + case 0: // fl + case 4: // tr + // If the other operands are 0 then we can omit them + + if ((vs == 0) && (vt == 0)) { + return totalSize; + } + break; + } + + RABUTILS_BUFFER_CPY(dst, totalSize, ", "); + RABUTILS_BUFFER_ADVANCE( + dst, totalSize, RabbitizerOperandType_process_r4000allegrex_t_vs(self, dst, immOverride, immOverrideLength)); + + switch (cond) { + case 0: // fl + case 4: // tr + break; + + case 1: // eq + case 2: // lt + case 3: // le + case 5: // ne + case 6: // ge + case 7: // gt + break; + + case 8: // ez + case 9: // en + case 10: // ei + case 11: // es + case 12: // nz + case 13: // nn + case 14: // ni + case 15: // ns + // If the vt operands is 0 then we can omit it + + if (vt == 0) { + return totalSize; + } + break; + } + + RABUTILS_BUFFER_CPY(dst, totalSize, ", "); + RABUTILS_BUFFER_ADVANCE( + dst, totalSize, RabbitizerOperandType_process_r4000allegrex_t_vt(self, dst, immOverride, immOverrideLength)); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_vcmp_cond_q_maybe_vs_maybe_vt(const RabbitizerInstruction *self, + char *dst, const char *immOverride, + size_t immOverrideLength) { + size_t totalSize = 0; + uint8_t cond = RAB_INSTR_R4000ALLEGREX_GET_vcmp_cond(self); + uint8_t vs = RAB_INSTR_R4000ALLEGREX_GET_vs(self); + uint8_t vt = RAB_INSTR_R4000ALLEGREX_GET_vt(self); + + RABUTILS_BUFFER_ADVANCE( + dst, totalSize, + RabbitizerOperandType_process_r4000allegrex_vcmp_cond(self, dst, immOverride, immOverrideLength)); + + switch (cond) { + case 0: // fl + case 4: // tr + // If the other operands are 0 then we can omit them + + if ((vs == 0) && (vt == 0)) { + return totalSize; + } + break; + } + + RABUTILS_BUFFER_CPY(dst, totalSize, ", "); + RABUTILS_BUFFER_ADVANCE( + dst, totalSize, RabbitizerOperandType_process_r4000allegrex_q_vs(self, dst, immOverride, immOverrideLength)); + + switch (cond) { + case 0: // fl + case 4: // tr + break; + + case 1: // eq + case 2: // lt + case 3: // le + case 5: // ne + case 6: // ge + case 7: // gt + break; + + case 8: // ez + case 9: // en + case 10: // ei + case 11: // es + case 12: // nz + case 13: // nn + case 14: // ni + case 15: // ns + // If the vt operands is 0 then we can omit it + + if (vt == 0) { + return totalSize; + } + break; + } + + RABUTILS_BUFFER_CPY(dst, totalSize, ", "); + RABUTILS_BUFFER_ADVANCE( + dst, totalSize, RabbitizerOperandType_process_r4000allegrex_q_vt(self, dst, immOverride, immOverrideLength)); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_vconstant(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexVConstant(RAB_INSTR_R4000ALLEGREX_GET_vconstant(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_power_of_two(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_power_of_two(self); + +// TODO: consider making this a proper configuration +#if 0 + if (temp < 10) { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%i", temp); + } else { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "0x%x", temp); + } +#endif + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%i", temp); + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_vfpu_cc_bit(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_vfpu_cc_bit(self); + +// TODO: consider making this a proper configuration +#if 0 + if (temp < 10) { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%i", temp); + } else { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "0x%x", temp); + } +#endif + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%i", temp); + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_bn(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_bn(self); + +// TODO: consider making this a proper configuration +#if 0 + if (temp < 10) { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%i", temp); + } else { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "0x%x", temp); + } +#endif + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%i", temp); + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_int16(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + int32_t number = RabbitizerUtils_From2Complement(RAB_INSTR_R4000ALLEGREX_GET_intfloat16(self), 16); + +#if 0 + if (RabbitizerConfig_Cfg.misc.omit0XOnSmallImm) { + if (number > -10 && number < 10) { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%i", number); + return totalSize; + } + } + if (number < 0) { + if (RabbitizerConfig_Cfg.misc.upperCaseImm) { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "-0x%X", -number); + } else { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "-0x%x", -number); + } + } else { + if (RabbitizerConfig_Cfg.misc.upperCaseImm) { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "0x%X", number); + } else { + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "0x%x", number); + } + } +#endif + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%i", number); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_float16(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + union { + float f; + uint32_t ui; + } floatNumber; + floatNumber.ui = RabbitizerUtils_floatRepr_32From16(RAB_INSTR_R4000ALLEGREX_GET_intfloat16(self)); + + RABUTILS_BUFFER_SPRINTF(dst, totalSize, "%.10g", (double)floatNumber.f); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_p_vrot_code(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + static const char *const mnemonics[32] = { + [0] = "[C,S]", // + [1] = "[S,C]", // + [2] = "[S,0]", // + [3] = "[S,0]", // + [4] = "[C,S]", // + [5] = "[S,C]", // + [6] = "[0,S]", // + [7] = "[0,S]", // + [8] = "[C,0]", // + [9] = "[0,C]", // + [10] = "[S,S]", // + [11] = "[0,0]", // + [12] = "[C,0]", // + [13] = "[0,C]", // + [14] = "[0,0]", // + [15] = "[S,S]", // + [16] = "[C,-S]", // + [17] = "[-S,C]", // + [18] = "[-S,0]", // + [19] = "[-S,0]", // + [20] = "[C,-S]", // + [21] = "[-S,C]", // + [22] = "[0,-S]", // + [23] = "[0,-S]", // + [24] = "[C,0]", // + [25] = "[0,C]", // + [26] = "[-S,-S]", // + [27] = "[0,0]", // + [28] = "[C,0]", // + [29] = "[0,C]", // + [30] = "[0,0]", // + [31] = "[-S,-S]", // + }; + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_vrot_code(self); + + RABUTILS_BUFFER_CPY(dst, totalSize, mnemonics[temp]); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_t_vrot_code(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + static const char *const mnemonics[32] = { + [0] = "[C,S,S]", // + [1] = "[S,C,0]", // + [2] = "[S,0,C]", // + [3] = "[S,0,0]", // + [4] = "[C,S,0]", // + [5] = "[S,C,S]", // + [6] = "[0,S,C]", // + [7] = "[0,S,0]", // + [8] = "[C,0,S]", // + [9] = "[0,C,S]", // + [10] = "[S,S,C]", // + [11] = "[0,0,S]", // + [12] = "[C,0,0]", // + [13] = "[0,C,0]", // + [14] = "[0,0,C]", // + [15] = "[S,S,S]", // + [16] = "[C,-S,-S]", // + [17] = "[-S,C,0]", // + [18] = "[-S,0,C]", // + [19] = "[-S,0,0]", // + [20] = "[C,-S,0]", // + [21] = "[-S,C,-S]", // + [22] = "[0,-S,C]", // + [23] = "[0,-S,0]", // + [24] = "[C,0,-S]", // + [25] = "[0,C,-S]", // + [26] = "[-S,-S,C]", // + [27] = "[0,0,-S]", // + [28] = "[C,0,0]", // + [29] = "[0,C,0]", // + [30] = "[0,0,C]", // + [31] = "[-S,-S,-S]", // + }; + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_vrot_code(self); + + RABUTILS_BUFFER_CPY(dst, totalSize, mnemonics[temp]); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_q_vrot_code(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + static const char *const mnemonics[32] = { + [0] = "[C,S,S,S]", // + [1] = "[S,C,0,0]", // + [2] = "[S,0,C,0]", // + [3] = "[S,0,0,C]", // + [4] = "[C,S,0,0]", // + [5] = "[S,C,S,S]", // + [6] = "[0,S,C,0]", // + [7] = "[0,S,0,C]", // + [8] = "[C,0,S,0]", // + [9] = "[0,C,S,0]", // + [10] = "[S,S,C,S]", // + [11] = "[0,0,S,C]", // + [12] = "[C,0,0,S]", // + [13] = "[0,C,0,S]", // + [14] = "[0,0,C,S]", // + [15] = "[S,S,S,C]", // + [16] = "[C,-S,-S,-S]", // + [17] = "[-S,C,0,0]", // + [18] = "[-S,0,C,0]", // + [19] = "[-S,0,0,C]", // + [20] = "[C,-S,0,0]", // + [21] = "[-S,C,-S,-S]", // + [22] = "[0,-S,C,0]", // + [23] = "[0,-S,0,C]", // + [24] = "[C,0,-S,0]", // + [25] = "[0,C,-S,0]", // + [26] = "[-S,-S,C,-S]", // + [27] = "[0,0,-S,C]", // + [28] = "[C,0,0,-S]", // + [29] = "[0,C,0,-S]", // + [30] = "[0,0,C,-S]", // + [31] = "[-S,-S,-S,C]", // + }; + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_vrot_code(self); + + RABUTILS_BUFFER_CPY(dst, totalSize, mnemonics[temp]); + + return totalSize; +} + +static const char *const source_target_prefix_instruction_formats[32] = { + [0] = "X", // + [1] = "Y", // + [2] = "Z", // + [3] = "W", // + [4] = "|X|", // + [5] = "|Y|", // + [6] = "|Z|", // + [7] = "|W|", // + [8] = "0", // + [9] = "1", // + [10] = "2", // + [11] = "1/2", // + [12] = "3", // + [13] = "1/3", // + [14] = "1/4", // + [15] = "1/6", // + [16] = "-X", // + [17] = "-Y", // + [18] = "-Z", // + [19] = "-W", // + [20] = "-|X|", // + [21] = "-|Y|", // + [22] = "-|Z|", // + [23] = "-|W|", // + [24] = "-0", // + [25] = "-1", // + [26] = "-2", // + [27] = "-1/2", // + [28] = "-3", // + [29] = "-1/3", // + [30] = "-1/4", // + [31] = "-1/6", // +}; + +size_t RabbitizerOperandType_process_r4000allegrex_rpx(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_rpx(self); + + RABUTILS_BUFFER_CPY(dst, totalSize, source_target_prefix_instruction_formats[temp]); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_rpy(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_rpy(self); + + RABUTILS_BUFFER_CPY(dst, totalSize, source_target_prefix_instruction_formats[temp]); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_rpz(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_rpz(self); + + RABUTILS_BUFFER_CPY(dst, totalSize, source_target_prefix_instruction_formats[temp]); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_rpw(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_rpw(self); + + RABUTILS_BUFFER_CPY(dst, totalSize, source_target_prefix_instruction_formats[temp]); + + return totalSize; +} + +static const char *const destination_prefix_instruction_formats[8] = { + [0] = "", // + [1] = "0", // + [2] = "INVALID_2", // + [3] = "1", // + [4] = "M", // + [5] = "INVALID_5", // + [6] = "INVALID_6", // + [7] = "INVALID_7", // +}; + +size_t RabbitizerOperandType_process_r4000allegrex_wpx(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_wpx(self); + + RABUTILS_BUFFER_CPY(dst, totalSize, destination_prefix_instruction_formats[temp]); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_wpy(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_wpy(self); + + RABUTILS_BUFFER_CPY(dst, totalSize, destination_prefix_instruction_formats[temp]); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_wpz(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_wpz(self); + + RABUTILS_BUFFER_CPY(dst, totalSize, destination_prefix_instruction_formats[temp]); + + return totalSize; +} + +size_t RabbitizerOperandType_process_r4000allegrex_wpw(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_wpw(self); + + RABUTILS_BUFFER_CPY(dst, totalSize, destination_prefix_instruction_formats[temp]); + + return totalSize; +} diff --git a/src/instructions/RabbitizerInstructionR4000Allegrex/RabbitizerInstructionR4000Allegrex_ProcessUniqueId.c b/src/instructions/RabbitizerInstructionR4000Allegrex/RabbitizerInstructionR4000Allegrex_ProcessUniqueId.c new file mode 100644 index 00000000..8ea31902 --- /dev/null +++ b/src/instructions/RabbitizerInstructionR4000Allegrex/RabbitizerInstructionR4000Allegrex_ProcessUniqueId.c @@ -0,0 +1,1043 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +#include "instructions/RabbitizerInstructionR4000Allegrex.h" +#include "common/RabbitizerConfig.h" + +#define RABBITIZER_DEF_INSTR_ID(prefix, caseBits, name, ...) \ + case (caseBits): \ + self->uniqueId = RABBITIZER_INSTR_ID_##prefix##_##name; \ + break; +#define RABBITIZER_DEF_INSTR_ID_ALTNAME(prefix, caseBits, name, altname, ...) \ + RABBITIZER_DEF_INSTR_ID(prefix, caseBits, name, __VA_ARGS__) + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Normal(RabbitizerInstruction *self) { + uint32_t opcode = RAB_INSTR_GET_opcode(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_PACK_opcode(self->_mandatorybits, opcode); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_NORMAL; + + switch (opcode) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_normal.inc" + + default: + RabbitizerInstruction_processUniqueId_Normal(self); + fetchDescriptor = false; + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Special(RabbitizerInstruction *self) { + uint32_t function = RAB_INSTR_GET_function(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_PACK_function(self->_mandatorybits, function); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL; + + switch (function) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_special.inc" + + case 0x02: + RabbitizerInstructionR4000Allegrex_processUniqueId_Special_Rs(self); + fetchDescriptor = false; + break; + + case 0x06: + RabbitizerInstructionR4000Allegrex_processUniqueId_Special_Sa(self); + fetchDescriptor = false; + break; + + default: + RabbitizerInstruction_processUniqueId_Special(self); + fetchDescriptor = false; + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Special_Rs(RabbitizerInstruction *self) { + uint32_t rs = RAB_INSTR_GET_rs(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_PACK_rs(self->_mandatorybits, rs); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL_RS; + + switch (rs) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_special_rs.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Special_Sa(RabbitizerInstruction *self) { + uint32_t sa = RAB_INSTR_GET_sa(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_PACK_sa(self->_mandatorybits, sa); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL_SA; + + switch (sa) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_special_sa.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Regimm(RabbitizerInstruction *self) { + uint32_t rt = RAB_INSTR_GET_rt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_PACK_rt(self->_mandatorybits, rt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_REGIMM; + + switch (rt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_regimm.inc" + + default: + RabbitizerInstruction_processUniqueId_Regimm(self); + fetchDescriptor = false; + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Special2(RabbitizerInstruction *self) { + uint32_t function = RAB_INSTR_GET_function(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_PACK_function(self->_mandatorybits, function); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL2; + + switch (function) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_special2.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Special3(RabbitizerInstruction *self) { + uint32_t function = RAB_INSTR_GET_function(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_PACK_function(self->_mandatorybits, function); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL3; + + switch (function) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_special3.inc" + + case 0x20: + RabbitizerInstructionR4000Allegrex_processUniqueId_Special3_Bshfl(self); + fetchDescriptor = false; + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Special3_Bshfl(RabbitizerInstruction *self) { + uint32_t sa = RAB_INSTR_GET_sa(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_PACK_sa(self->_mandatorybits, sa); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_SPECIAL3_BSHFL; + + switch (sa) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_special3_bshfl.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor0(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_GET_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_PACK_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP0; + self->_handwrittenCategory = true; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_cop0.inc" + + case 0x08: + RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor0_BC0(self); + fetchDescriptor = false; + break; + + case 0x10: + RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor0_Tlb(self); + fetchDescriptor = false; + break; + + default: + RabbitizerInstruction_processUniqueId_Coprocessor0(self); + fetchDescriptor = false; + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor0_BC0(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_GET_bc_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_PACK_bc_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP0_BC0; + self->_handwrittenCategory = true; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_cop0_bc0.inc" + + default: + RabbitizerInstruction_processUniqueId_Coprocessor0_BC0(self); + fetchDescriptor = false; + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor0_Tlb(RabbitizerInstruction *self) { + uint32_t function = RAB_INSTR_GET_function(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_PACK_function(self->_mandatorybits, function); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP0_BC0; + self->_handwrittenCategory = true; + + switch (function) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_cop0_tlb.inc" + + default: + RabbitizerInstruction_processUniqueId_Coprocessor0_Tlb(self); + fetchDescriptor = false; + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor1(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_GET_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_PACK_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP1; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_cop1.inc" + + case 0x08: + RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor1_BC1(self); + fetchDescriptor = false; + break; + + case 0x10: + RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor1_FpuS(self); + fetchDescriptor = false; + break; + + case 0x14: + RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor1_FpuW(self); + fetchDescriptor = false; + break; + + case 0x11: + case 0x15: + // Allegrex doesn't have D and L? + break; + + default: + RabbitizerInstruction_processUniqueId_Coprocessor1(self); + fetchDescriptor = false; + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor1_BC1(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_GET_bc_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_PACK_bc_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP1_BC1; + self->_handwrittenCategory = true; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_cop1_bc1.inc" + + default: + RabbitizerInstruction_processUniqueId_Coprocessor1_BC1(self); + fetchDescriptor = false; + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor1_FpuS(RabbitizerInstruction *self) { + uint32_t function = RAB_INSTR_GET_function(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_PACK_function(self->_mandatorybits, function); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP1_FPUS; + + switch (function) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_cop1_fpu_s.inc" + + case 0x08: + case 0x09: + case 0x0A: + case 0x0B: + case 0x21: + case 0x25: + break; + + default: + RabbitizerInstruction_processUniqueId_Coprocessor1_FpuS(self); + fetchDescriptor = false; + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor1_FpuW(RabbitizerInstruction *self) { + uint32_t function = RAB_INSTR_GET_function(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_PACK_function(self->_mandatorybits, function); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP1_FPUW; + + switch (function) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_cop1_fpu_w.inc" + + case 0x21: + break; + + default: + RabbitizerInstruction_processUniqueId_Coprocessor1_FpuW(self); + fetchDescriptor = false; + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_GET_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_PACK_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2; + // self->_handwrittenCategory = true; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_cop2.inc" + + case 0x08: + RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2_BC2(self); + fetchDescriptor = false; + break; + + case 0x3: + RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2_MFHC2(self); + fetchDescriptor = false; + break; + + case 0x7: + RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2_MTHC2(self); + fetchDescriptor = false; + break; + + default: + RabbitizerInstruction_processUniqueId_Coprocessor2(self); + fetchDescriptor = false; + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2_BC2(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_bc2_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_bc2_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2_BC2; + // self->_handwrittenCategory = true; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_cop2_bc2.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2_MFHC2(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_mxhc2(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_mxhc2(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2_MFHC2; + // self->_handwrittenCategory = true; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2.inc" + + case 0x1: + fetchDescriptor = false; + RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2_MFHC2_p(self); + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2_MFHC2_p(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_mfhc2_p_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_mfhc2_p_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2_MFHC2_P; + // self->_handwrittenCategory = true; + + switch (fmt) { + case 0x7: + RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2_MFHC2_p_s(self); + fetchDescriptor = false; + break; + +#include "tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2_p.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2_MFHC2_p_s(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_mfhc2_p_s_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_mfhc2_p_s_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2_MFHC2_P_S; + // self->_handwrittenCategory = true; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2_p_s.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2_MTHC2(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_mxhc2(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_mxhc2(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_COP2_MTHC2; + // self->_handwrittenCategory = true; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_cop2_mthc2.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu0(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu0_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu0_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU0; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu0.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu1(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu0_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu0_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU1; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu1.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu3(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu0_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu0_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU3; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu3.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu4.inc" + + case 0x0: + case 0x1: + case 0x2: + case 0x3: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0(self); + fetchDescriptor = false; + break; + + case 0x8: + case 0x9: + case 0xA: + case 0xB: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt2(self); + fetchDescriptor = false; + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt0_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt0_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0.inc" + + case 0x0: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Fmt0(self); + fetchDescriptor = false; + break; + + case 0x2: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Fmt2(self); + fetchDescriptor = false; + break; + + case 0x3: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Fmt3(self); + fetchDescriptor = false; + break; + + case 0x4: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Rnd(self); + fetchDescriptor = false; + break; + + case 0x6: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_CvtFlt(self); + fetchDescriptor = false; + break; + + case 0x7: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_CvtInt(self); + fetchDescriptor = false; + break; + + case 0x8: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Fmt8(self); + fetchDescriptor = false; + break; + + case 0x9: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Fmt9(self); + fetchDescriptor = false; + break; + + case 0xA: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Control(self); + fetchDescriptor = false; + break; + + case 0xB: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Color(self); + fetchDescriptor = false; + break; + + case 0xC: + case 0xD: + case 0xE: + case 0xF: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Cst(self); + fetchDescriptor = false; + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Fmt0(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt0_fmt0_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt0_fmt0_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_FMT0; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt0.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Fmt2(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt0_fmt0_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt0_fmt0_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_FMT2; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt2.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Fmt3(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt0_fmt0_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt0_fmt0_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_FMT3; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt3.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Rnd(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt0_fmt0_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt0_fmt0_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_RND; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_rnd.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_CvtFlt(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt0_fmt0_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt0_fmt0_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_CVTFLT; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_cvtflt.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_CvtInt(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt0_fmt0_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt0_fmt0_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_CVTINT; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_cvtint.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Fmt8(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt0_fmt0_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt0_fmt0_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_FMT8; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt8.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Fmt9(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt0_fmt0_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt0_fmt0_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_FMT9; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt9.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Control(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt0_fmt0_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt0_fmt0_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_CONTROL; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_control.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Color(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt0_fmt0_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt0_fmt0_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_COLOR; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_color.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt0_Cst(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_tp(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_tp(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT0_CST; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_cst.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt2(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt2_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt2_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT2; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt2.inc" + + case 0x14: + case 0x15: + case 0x16: + case 0x17: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt2_CndMove(self); + fetchDescriptor = false; + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4_Fmt2_CndMove(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu4_fmt2_cndmove_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu4_fmt2_cndmove_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU4_FMT2_CNDMOVE; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt2_cndmove.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu5(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu5_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu5_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU5; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu5.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu6(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu6_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu6_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU6; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu6.inc" + + case 0x1C: + case 0x1D: + case 0x1E: + case 0x1F: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu6_Fmt7(self); + fetchDescriptor = false; + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu6_Fmt7(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu6_fmt7_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu6_fmt7_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU6_FMT7; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu6_fmt7.inc" + + case 0x0: + case 0x1: + case 0x2: + case 0x3: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu6_Fmt7_Fmt0(self); + fetchDescriptor = false; + break; + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu6_Fmt7_Fmt0(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu6_fmt7_fmt0_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu6_fmt7_fmt0_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU6_FMT7_FMT0; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu6_fmt7_fmt0.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu7(RabbitizerInstruction *self) { + uint32_t fmt = RAB_INSTR_R4000ALLEGREX_GET_vfpu7_fmt(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_vfpu7_fmt(self->_mandatorybits, fmt); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_VFPU7; + + switch (fmt) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_vfpu7.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +void RabbitizerInstructionR4000Allegrex_processUniqueId_Quadlr(RabbitizerInstruction *self) { + uint32_t temp = RAB_INSTR_R4000ALLEGREX_GET_wb(self); + bool fetchDescriptor = true; + + self->_mandatorybits = RAB_INSTR_R4000ALLEGREX_PACK_wb(self->_mandatorybits, temp); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_QUADLR; + self->_handwrittenCategory = true; + + switch (temp) { +#include "tables/instr_id/r4000allegrex/r4000allegrex_quadlr.inc" + } + + if (fetchDescriptor) { + self->descriptor = &RabbitizerInstrDescriptor_Descriptors[self->uniqueId]; + } +} + +#undef RABBITIZER_DEF_INSTR_ID +#undef RABBITIZER_DEF_INSTR_ID_ALTNAME + +void RabbitizerInstructionR4000Allegrex_processUniqueId(RabbitizerInstruction *self) { + uint32_t opcode = RAB_INSTR_GET_opcode(self); + + self->_mandatorybits = RAB_INSTR_PACK_opcode(self->_mandatorybits, opcode); + self->instrIdType = RAB_INSTR_ID_TYPE_R4000ALLEGREX_INVALID; + + switch (opcode) { + default: + RabbitizerInstructionR4000Allegrex_processUniqueId_Normal(self); + break; + case 0x00: + RabbitizerInstructionR4000Allegrex_processUniqueId_Special(self); + break; + case 0x01: + RabbitizerInstructionR4000Allegrex_processUniqueId_Regimm(self); + break; + + case 0x1C: + RabbitizerInstructionR4000Allegrex_processUniqueId_Special2(self); + break; + case 0x1F: + RabbitizerInstructionR4000Allegrex_processUniqueId_Special3(self); + break; + + case 0x10: + RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor0(self); + break; + case 0x11: + RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor1(self); + break; + case 0x12: + RabbitizerInstructionR4000Allegrex_processUniqueId_Coprocessor2(self); + break; + + case 0x18: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu0(self); + break; + case 0x19: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu1(self); + break; + case 0x1B: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu3(self); + break; + case 0x34: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu4(self); + break; + case 0x37: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu5(self); + break; + case 0x3C: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu6(self); + break; + + case 0x3D: + RabbitizerInstructionR4000Allegrex_processUniqueId_Quadlr(self); + break; + + case 0x3F: + RabbitizerInstructionR4000Allegrex_processUniqueId_Vfpu7(self); + break; + } +} diff --git a/src/instructions/RabbitizerRegister.c b/src/instructions/RabbitizerRegister.c index a2bdd3fe..afb915fa 100644 --- a/src/instructions/RabbitizerRegister.c +++ b/src/instructions/RabbitizerRegister.c @@ -101,6 +101,65 @@ const char *RabbitizerRegister_getNameRspVector(uint8_t regValue) { return RabbitizerRegister_RspVector_Names[regValue][RabbitizerConfig_Cfg.regNames.namedRegisters ? 1 : 0]; } +const char *RabbitizerRegister_getNameR4000AllegrexS(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexS_Names)); + + return RabbitizerRegister_R4000AllegrexS_Names[regValue][RabbitizerConfig_Cfg.regNames.namedRegisters ? 1 : 0]; +} + +const char *RabbitizerRegister_getNameR4000AllegrexV2D(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexV2D_Names)); + + return RabbitizerRegister_R4000AllegrexV2D_Names[regValue][RabbitizerConfig_Cfg.regNames.namedRegisters ? 1 : 0]; +} + +const char *RabbitizerRegister_getNameR4000AllegrexV3D(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexV3D_Names)); + + return RabbitizerRegister_R4000AllegrexV3D_Names[regValue][RabbitizerConfig_Cfg.regNames.namedRegisters ? 1 : 0]; +} + +const char *RabbitizerRegister_getNameR4000AllegrexV4D(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexV4D_Names)); + + return RabbitizerRegister_R4000AllegrexV4D_Names[regValue][RabbitizerConfig_Cfg.regNames.namedRegisters ? 1 : 0]; +} + +const char *RabbitizerRegister_getNameR4000AllegrexM2x2(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexM2x2_Names)); + + return RabbitizerRegister_R4000AllegrexM2x2_Names[regValue][RabbitizerConfig_Cfg.regNames.namedRegisters ? 1 : 0]; +} + +const char *RabbitizerRegister_getNameR4000AllegrexM3x3(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexM3x3_Names)); + + return RabbitizerRegister_R4000AllegrexM3x3_Names[regValue][RabbitizerConfig_Cfg.regNames.namedRegisters ? 1 : 0]; +} + +const char *RabbitizerRegister_getNameR4000AllegrexM4x4(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexM4x4_Names)); + + return RabbitizerRegister_R4000AllegrexM4x4_Names[regValue][RabbitizerConfig_Cfg.regNames.namedRegisters ? 1 : 0]; +} + +const char *RabbitizerRegister_getNameR4000AllegrexVfpuControl(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexVfpuControl_Names)); + + return RabbitizerRegister_R4000AllegrexVfpuControl_Names + [regValue][RabbitizerConfig_Cfg.regNames.namedRegisters && + RabbitizerConfig_Cfg.regNames.r4000AllegrexVfpuControlNamedRegisters + ? 1 + : 0]; +} + +const char *RabbitizerRegister_getNameR4000AllegrexVConstant(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexVConstant_Names)); + + return RabbitizerRegister_R4000AllegrexVConstant_Names[regValue] + [RabbitizerConfig_Cfg.regNames.namedRegisters ? 1 : 0]; +} + const char *RabbitizerRegister_getNameR5900VF(uint8_t regValue) { assert(regValue < ARRAY_COUNT(RabbitizerRegister_R5900VF_Names)); @@ -186,6 +245,60 @@ const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_RspVector(u return &RabbitizerRegister_RspVector_Descriptors[regValue]; } +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexS(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexS_Names)); + + return &RabbitizerRegister_R4000AllegrexS_Descriptors[regValue]; +} + +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexV2D(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexV2D_Names)); + + return &RabbitizerRegister_R4000AllegrexV2D_Descriptors[regValue]; +} + +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexV3D(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexV3D_Names)); + + return &RabbitizerRegister_R4000AllegrexV3D_Descriptors[regValue]; +} + +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexV4D(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexV4D_Names)); + + return &RabbitizerRegister_R4000AllegrexV4D_Descriptors[regValue]; +} + +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexM2x2(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexM2x2_Names)); + + return &RabbitizerRegister_R4000AllegrexM2x2_Descriptors[regValue]; +} + +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexM3x3(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexM3x3_Names)); + + return &RabbitizerRegister_R4000AllegrexM3x3_Descriptors[regValue]; +} + +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexM4x4(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexM4x4_Names)); + + return &RabbitizerRegister_R4000AllegrexM4x4_Descriptors[regValue]; +} + +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexVfpuControl(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexVfpuControl_Names)); + + return &RabbitizerRegister_R4000AllegrexVfpuControl_Descriptors[regValue]; +} + +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexVConstant(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexVConstant_Names)); + + return &RabbitizerRegister_R4000AllegrexVConstant_Descriptors[regValue]; +} + const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R5900VF(uint8_t regValue) { assert(regValue < ARRAY_COUNT(RabbitizerRegister_R5900VF_Names)); diff --git a/tables/tables/InstrCategory.inc b/tables/tables/InstrCategory.inc index 91a60dda..d4884413 100644 --- a/tables/tables/InstrCategory.inc +++ b/tables/tables/InstrCategory.inc @@ -4,4 +4,5 @@ RABBITIZER_DEF_INSTR_CATEGORY(CPU) RABBITIZER_DEF_INSTR_CATEGORY(RSP) // N64 RABBITIZER_DEF_INSTR_CATEGORY(R3000GTE) // R3000 CPU with PS1's Geometry Transformation Engine extension + RABBITIZER_DEF_INSTR_CATEGORY(R4000ALLEGREX) // PSP's CPU RABBITIZER_DEF_INSTR_CATEGORY(R5900) // PS2's Emotion Engine diff --git a/tables/tables/InstrIdType.inc b/tables/tables/InstrIdType.inc index 56d0621a..bad3e509 100644 --- a/tables/tables/InstrIdType.inc +++ b/tables/tables/InstrIdType.inc @@ -6,6 +6,7 @@ #include "instr_id_types/InstrIdType_cpu.inc" #include "instr_id_types/InstrIdType_rsp.inc" #include "instr_id_types/InstrIdType_r3000gte.inc" + #include "instr_id_types/InstrIdType_r4000allegrex.inc" #include "instr_id_types/InstrIdType_r5900.inc" RABBITIZER_DEF_INSTR_ID_TYPE(ALL, MAX) diff --git a/tables/tables/InstrIds.inc b/tables/tables/InstrIds.inc index e3c86688..d1e29cd4 100644 --- a/tables/tables/InstrIds.inc +++ b/tables/tables/InstrIds.inc @@ -4,4 +4,5 @@ #include "instr_id/RabbitizerInstrId_cpu.inc" #include "instr_id/RabbitizerInstrId_rsp.inc" #include "instr_id/RabbitizerInstrId_r3000gte.inc" + #include "instr_id/RabbitizerInstrId_r4000allegrex.inc" #include "instr_id/RabbitizerInstrId_r5900.inc" diff --git a/tables/tables/OperandTypes.inc b/tables/tables/OperandTypes.inc index ec2478c1..95e5776e 100644 --- a/tables/tables/OperandTypes.inc +++ b/tables/tables/OperandTypes.inc @@ -4,4 +4,5 @@ #include "operands/RabbitizerOperandType_cpu.inc" #include "operands/RabbitizerOperandType_rsp.inc" #include "operands/RabbitizerOperandType_r3000gte.inc" + #include "operands/RabbitizerOperandType_r4000allegrex.inc" #include "operands/RabbitizerOperandType_r5900.inc" diff --git a/tables/tables/instr_id/RabbitizerInstrId_cpu.inc b/tables/tables/instr_id/RabbitizerInstrId_cpu.inc index 617c696c..15d9ed6a 100644 --- a/tables/tables/instr_id/RabbitizerInstrId_cpu.inc +++ b/tables/tables/instr_id/RabbitizerInstrId_cpu.inc @@ -9,15 +9,18 @@ #include "cpu/cpu_normal.inc" #include "cpu/cpu_special.inc" #include "cpu/cpu_regimm.inc" + #include "cpu/cpu_cop0.inc" #include "cpu/cpu_cop0_bc0.inc" #include "cpu/cpu_cop0_tlb.inc" + #include "cpu/cpu_cop1.inc" #include "cpu/cpu_cop1_bc1.inc" #include "cpu/cpu_cop1_fpu_s.inc" #include "cpu/cpu_cop1_fpu_d.inc" #include "cpu/cpu_cop1_fpu_w.inc" #include "cpu/cpu_cop1_fpu_l.inc" + #include "cpu/cpu_cop2.inc" #ifndef INSTRID_AVOID_USERDEF diff --git a/tables/tables/instr_id/RabbitizerInstrId_r4000allegrex.inc b/tables/tables/instr_id/RabbitizerInstrId_r4000allegrex.inc new file mode 100644 index 00000000..c673f031 --- /dev/null +++ b/tables/tables/instr_id/RabbitizerInstrId_r4000allegrex.inc @@ -0,0 +1,155 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , INVALID, + .operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_immediate}, + .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN + ) + + #include "r4000allegrex/r4000allegrex_normal.inc" + + #include "r4000allegrex/r4000allegrex_special.inc" + #include "r4000allegrex/r4000allegrex_special_rs.inc" + #include "r4000allegrex/r4000allegrex_special_sa.inc" + + #include "r4000allegrex/r4000allegrex_regimm.inc" + + #include "r4000allegrex/r4000allegrex_special2.inc" + + #include "r4000allegrex/r4000allegrex_special3.inc" + #include "r4000allegrex/r4000allegrex_special3_bshfl.inc" + + #include "r4000allegrex/r4000allegrex_cop0.inc" + #include "r4000allegrex/r4000allegrex_cop0_bc0.inc" + #include "r4000allegrex/r4000allegrex_cop0_tlb.inc" + + #include "r4000allegrex/r4000allegrex_cop1.inc" + #include "r4000allegrex/r4000allegrex_cop1_bc1.inc" + #include "r4000allegrex/r4000allegrex_cop1_fpu_s.inc" + #include "r4000allegrex/r4000allegrex_cop1_fpu_w.inc" + + #include "r4000allegrex/r4000allegrex_cop2.inc" + #include "r4000allegrex/r4000allegrex_cop2_bc2.inc" + #include "r4000allegrex/r4000allegrex_cop2_mfhc2.inc" + #include "r4000allegrex/r4000allegrex_cop2_mfhc2_p.inc" + #include "r4000allegrex/r4000allegrex_cop2_mfhc2_p_s.inc" + #include "r4000allegrex/r4000allegrex_cop2_mthc2.inc" + + #include "r4000allegrex/r4000allegrex_vfpu0.inc" + #include "r4000allegrex/r4000allegrex_vfpu1.inc" + #include "r4000allegrex/r4000allegrex_vfpu3.inc" + + #include "r4000allegrex/r4000allegrex_vfpu4.inc" + #include "r4000allegrex/r4000allegrex_vfpu4_fmt0.inc" + #include "r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt0.inc" + #include "r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt2.inc" + #include "r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt3.inc" + #include "r4000allegrex/r4000allegrex_vfpu4_fmt0_rnd.inc" + #include "r4000allegrex/r4000allegrex_vfpu4_fmt0_cvtflt.inc" + #include "r4000allegrex/r4000allegrex_vfpu4_fmt0_cvtint.inc" + #include "r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt8.inc" + #include "r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt9.inc" + #include "r4000allegrex/r4000allegrex_vfpu4_fmt0_control.inc" + #include "r4000allegrex/r4000allegrex_vfpu4_fmt0_color.inc" + #include "r4000allegrex/r4000allegrex_vfpu4_fmt0_cst.inc" + #include "r4000allegrex/r4000allegrex_vfpu4_fmt2.inc" + #include "r4000allegrex/r4000allegrex_vfpu4_fmt2_cndmove.inc" + + #include "r4000allegrex/r4000allegrex_vfpu5.inc" + + #include "r4000allegrex/r4000allegrex_vfpu6.inc" + #include "r4000allegrex/r4000allegrex_vfpu6_fmt7.inc" + #include "r4000allegrex/r4000allegrex_vfpu6_fmt7_fmt0.inc" + + #include "r4000allegrex/r4000allegrex_vfpu7.inc" + + #include "r4000allegrex/r4000allegrex_quadlr.inc" + +#ifndef INSTRID_AVOID_USERDEF + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_00, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_01, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_02, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_03, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_04, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_05, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_06, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_07, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_08, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_09, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_10, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_11, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_12, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_13, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_14, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_15, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_16, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_17, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_18, + .operands={0} + ) + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , USERDEF_19, + .operands={0} + ) +#endif + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, , MAX, + .operands={0} + ) diff --git a/tables/tables/instr_id/cpu/cpu_cop0.inc b/tables/tables/instr_id/cpu/cpu_cop0.inc index 78415b1e..9f14569c 100644 --- a/tables/tables/instr_id/cpu/cpu_cop0.inc +++ b/tables/tables/instr_id/cpu/cpu_cop0.inc @@ -1,6 +1,19 @@ /* SPDX-FileCopyrightText: © 2022-2024 Decompollaborate */ /* SPDX-License-Identifier: MIT */ +/* + 31--------26-25------21 ----------------------------------------0 + | = COP0 | fmt | | + ------6----------5----------------------------------------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 00 | MFC0 | DMFC0 | CFC0 | --- | MTC0 | DMTC0 | CTC0 | --- | + 01 | *1 | --- | --- | --- | --- | --- | --- | --- | + 10 | *2 | --- | --- | --- | --- | --- | --- | --- | + 11 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| + *1=BC See BC0 list *2 = TLB instr, see TLB list +*/ + // OP rt, cop0d RABBITIZER_DEF_INSTR_ID( cpu, 0x00, mfc0, diff --git a/tables/tables/instr_id/cpu/cpu_cop0_bc0.inc b/tables/tables/instr_id/cpu/cpu_cop0_bc0.inc index 4cd4142f..0dac3a29 100644 --- a/tables/tables/instr_id/cpu/cpu_cop0_bc0.inc +++ b/tables/tables/instr_id/cpu/cpu_cop0_bc0.inc @@ -1,6 +1,18 @@ /* SPDX-FileCopyrightText: © 2022-2024 Decompollaborate */ /* SPDX-License-Identifier: MIT */ +/* + 31--------26-25------21-20------16------------------------------0 + | = COP0 | BC0 | fmt | | + ------6----------5----------5------------------------------------ + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 00 | BC0F | BC0T | BC0FL | BC0TL | --- | --- | --- | --- | + 01 | --- | --- | --- | --- | --- | --- | --- | --- | + 10 | --- | --- | --- | --- | --- | --- | --- | --- | + 11 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + // OP IMM RABBITIZER_DEF_INSTR_ID( cpu, 0x00, bc0f, diff --git a/tables/tables/instr_id/cpu/cpu_cop0_tlb.inc b/tables/tables/instr_id/cpu/cpu_cop0_tlb.inc index 1f2ecdc3..a20818b0 100644 --- a/tables/tables/instr_id/cpu/cpu_cop0_tlb.inc +++ b/tables/tables/instr_id/cpu/cpu_cop0_tlb.inc @@ -1,6 +1,22 @@ /* SPDX-FileCopyrightText: © 2022-2024 Decompollaborate */ /* SPDX-License-Identifier: MIT */ +/* + 31--------26-25------21--------------------------------5--------0 + | = COP0 | TLB | | fmt | + ------6----------5----------------------------------------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo +000 | --- | TLBR | TLBWI | --- | --- | --- | TLBWR | --- | +001 | TLBP | --- | --- | --- | --- | --- | --- | --- | +010 | --- | --- | --- | --- | --- | --- | --- | --- | +011 | ERET | --- | --- | --- | --- | --- | --- | --- | +100 | --- | --- | --- | --- | --- | --- | --- | --- | +101 | --- | --- | --- | --- | --- | --- | --- | --- | +110 | --- | --- | --- | --- | --- | --- | --- | --- | +111 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + // OP RABBITIZER_DEF_INSTR_ID( cpu, 0x01, tlbr, diff --git a/tables/tables/instr_id/cpu/cpu_cop1.inc b/tables/tables/instr_id/cpu/cpu_cop1.inc index 4f94fe8a..5d729bda 100644 --- a/tables/tables/instr_id/cpu/cpu_cop1.inc +++ b/tables/tables/instr_id/cpu/cpu_cop1.inc @@ -1,6 +1,23 @@ /* SPDX-FileCopyrightText: © 2022-2024 Decompollaborate */ /* SPDX-License-Identifier: MIT */ +/* + 31--------26-25------21 ----------------------------------------0 + | = COP1 | fmt | | + ------6----------5----------------------------------------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 00 | MFC1 | DMFC1 | CFC1 | --- | MTC1 | DMTC1 | CTC1 | --- | + 01 | *1 | --- | --- | --- | --- | --- | --- | --- | + 10 | *2 | *3 | --- | --- | *4 | *5 | --- | --- | + 11 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| + *1 = BC instructions, see BC1 list + *2 = S instr, see FPU S list + *3 = D instr, see FPU D list + *4 = W instr, see FPU W list + *5 = L instr, see FPU L list +*/ + // OP rt, fs RABBITIZER_DEF_INSTR_ID( cpu, 0x00, mfc1, diff --git a/tables/tables/instr_id/cpu/cpu_cop1_bc1.inc b/tables/tables/instr_id/cpu/cpu_cop1_bc1.inc index 6db93376..c3b427aa 100644 --- a/tables/tables/instr_id/cpu/cpu_cop1_bc1.inc +++ b/tables/tables/instr_id/cpu/cpu_cop1_bc1.inc @@ -1,6 +1,18 @@ /* SPDX-FileCopyrightText: © 2022-2024 Decompollaborate */ /* SPDX-License-Identifier: MIT */ +/* + 31--------26-25------21-20------16------------------------------0 + | = COP1 | BC1 | fmt | | + ------6----------5----------5------------------------------------ + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 00 | BC1F | BC1T | BC1FL | BC1TL | --- | --- | --- | --- | + 01 | --- | --- | --- | --- | --- | --- | --- | --- | + 10 | --- | --- | --- | --- | --- | --- | --- | --- | + 11 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + // OP IMM RABBITIZER_DEF_INSTR_ID( cpu, 0x00, bc1f, diff --git a/tables/tables/instr_id/cpu/cpu_cop1_fpu_d.inc b/tables/tables/instr_id/cpu/cpu_cop1_fpu_d.inc index 4d8a9954..9fdd1f8f 100644 --- a/tables/tables/instr_id/cpu/cpu_cop1_fpu_d.inc +++ b/tables/tables/instr_id/cpu/cpu_cop1_fpu_d.inc @@ -1,6 +1,22 @@ /* SPDX-FileCopyrightText: © 2022-2024 Decompollaborate */ /* SPDX-License-Identifier: MIT */ +/* + 31----------26-25--------21 -----------------------------------------5----------0 + | = COP1 | = D | | function | + -------6------------5-----------------------------------------------------6------ + |---000---|---001---|---010---|---011---|---100---|---101---|---110---|---111---| lo +000 | ADD.D | SUB.D | MUL.D | DIV.D | SQRT.D | ABS.D | MOV.D | NEG.D | +001 |ROUND.L.D|TRUNC.L.D| CEIL.L.D|FLOOR.L.D|ROUND.W.D|TRUNC.W.D| CEIL.W.D|FLOOR.W.D| +010 | --- | --- | --- | --- | --- | --- | --- | --- | +011 | --- | --- | --- | --- | --- | --- | --- | --- | +100 | CVT.S.D | --- | --- | --- | CVT.W.D | CVT.L.D | --- | --- | +101 | --- | --- | --- | --- | --- | --- | --- | --- | +110 | C.F.D | C.UN.D | C.EQ.D | C.UEQ.D | C.OLT.D | C.ULT.D | C.OLE.D | C.ULE.D | +111 | C.DF.D | C.NGLE.D| C.SEQ.D | C.NGL.D | C.LT.D | C.NGE.D | C.LE.D | C.NGT.D | + hi |---------|---------|---------|---------|---------|---------|---------|---------| +*/ + // OP fd, fs, ft RABBITIZER_DEF_INSTR_ID_ALTNAME( cpu, 0x00, add_d, add.d, diff --git a/tables/tables/instr_id/cpu/cpu_cop1_fpu_l.inc b/tables/tables/instr_id/cpu/cpu_cop1_fpu_l.inc index a80971d3..cfb804c5 100644 --- a/tables/tables/instr_id/cpu/cpu_cop1_fpu_l.inc +++ b/tables/tables/instr_id/cpu/cpu_cop1_fpu_l.inc @@ -1,6 +1,22 @@ /* SPDX-FileCopyrightText: © 2022-2024 Decompollaborate */ /* SPDX-License-Identifier: MIT */ +/* + 31----------26-25--------21 -----------------------------------------5----------0 + | = COP1 | = L | | function | + -------6------------5-----------------------------------------------------6------ + |---000---|---001---|---010---|---011---|---100---|---101---|---110---|---111---| lo +000 | --- | --- | --- | --- | --- | --- | --- | --- | +001 | --- | --- | --- | --- | --- | --- | --- | --- | +010 | --- | --- | --- | --- | --- | --- | --- | --- | +011 | --- | --- | --- | --- | --- | --- | --- | --- | +100 | CVT.S.L | CVT.D.L | --- | --- | --- | --- | --- | --- | +101 | --- | --- | --- | --- | --- | --- | --- | --- | +110 | --- | --- | --- | --- | --- | --- | --- | --- | +111 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |---------|---------|---------|---------|---------|---------|---------|---------| +*/ + // OP fd, fs RABBITIZER_DEF_INSTR_ID_ALTNAME( cpu, 0x20, cvt_s_l, cvt.s.l, diff --git a/tables/tables/instr_id/cpu/cpu_cop1_fpu_s.inc b/tables/tables/instr_id/cpu/cpu_cop1_fpu_s.inc index 4eb8372e..d598c340 100644 --- a/tables/tables/instr_id/cpu/cpu_cop1_fpu_s.inc +++ b/tables/tables/instr_id/cpu/cpu_cop1_fpu_s.inc @@ -1,6 +1,22 @@ /* SPDX-FileCopyrightText: © 2022-2024 Decompollaborate */ /* SPDX-License-Identifier: MIT */ +/* + 31----------26-25--------21 -----------------------------------------5----------0 + | = COP1 | = S | | function | + -------6------------5-----------------------------------------------------6------ + |---000---|---001---|---010---|---011---|---100---|---101---|---110---|---111---| lo +000 | ADD.S | SUB.S | MUL.S | DIV.S | SQRT.S | ABS.S | MOV.S | NEG.S | +001 |ROUND.L.S|TRUNC.L.S| CEIL.L.S|FLOOR.L.S|ROUND.W.S|TRUNC.W.S| CEIL.W.S|FLOOR.W.S| +010 | --- | --- | --- | --- | --- | --- | --- | --- | +011 | --- | --- | --- | --- | --- | --- | --- | --- | +100 | --- | CVT.D.S | --- | --- | CVT.W.S | CVT.L.S | --- | --- | +101 | --- | --- | --- | --- | --- | --- | --- | --- | +110 | C.F.S | C.UN.S | C.EQ.S | C.UEQ.S | C.OLT.S | C.ULT.S | C.OLE.S | C.ULE.S | +111 | C.SF.S | C.NGLE.S| C.SEQ.S | C.NGL.S | C.LT.S | C.NGE.S | C.LE.S | C.NGT.S | + hi |---------|---------|---------|---------|---------|---------|---------|---------| +*/ + // OP fd, fs, ft RABBITIZER_DEF_INSTR_ID_ALTNAME( cpu, 0x00, add_s, add.s, diff --git a/tables/tables/instr_id/cpu/cpu_cop1_fpu_w.inc b/tables/tables/instr_id/cpu/cpu_cop1_fpu_w.inc index f87c49cc..d9106010 100644 --- a/tables/tables/instr_id/cpu/cpu_cop1_fpu_w.inc +++ b/tables/tables/instr_id/cpu/cpu_cop1_fpu_w.inc @@ -1,6 +1,22 @@ /* SPDX-FileCopyrightText: © 2022-2024 Decompollaborate */ /* SPDX-License-Identifier: MIT */ +/* + 31----------26-25--------21 -----------------------------------------5----------0 + | = COP1 | = W | | function | + -------6------------5-----------------------------------------------------6------ + |---000---|---001---|---010---|---011---|---100---|---101---|---110---|---111---| lo +000 | --- | --- | --- | --- | --- | --- | --- | --- | +001 | --- | --- | --- | --- | --- | --- | --- | --- | +010 | --- | --- | --- | --- | --- | --- | --- | --- | +011 | --- | --- | --- | --- | --- | --- | --- | --- | +100 | CVT.S.W | CVT.D.W | --- | --- | --- | --- | --- | --- | +101 | --- | --- | --- | --- | --- | --- | --- | --- | +110 | --- | --- | --- | --- | --- | --- | --- | --- | +111 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |---------|---------|---------|---------|---------|---------|---------|---------| +*/ + // OP fd, fs RABBITIZER_DEF_INSTR_ID_ALTNAME( cpu, 0x20, cvt_s_w, cvt.s.w, diff --git a/tables/tables/instr_id/cpu/cpu_cop2.inc b/tables/tables/instr_id/cpu/cpu_cop2.inc index 02a27eca..346483d2 100644 --- a/tables/tables/instr_id/cpu/cpu_cop2.inc +++ b/tables/tables/instr_id/cpu/cpu_cop2.inc @@ -1,6 +1,18 @@ /* SPDX-FileCopyrightText: © 2022-2024 Decompollaborate */ /* SPDX-License-Identifier: MIT */ +/* + 31--------26-25------21 ----------------------------------------0 + | = COP0 | fmt | | + ------6----------5----------------------------------------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 00 | MFC2 | --- | CFC2 | --- | MTC2 | --- | CTC2 | --- | + 01 | --- | --- | --- | --- | --- | --- | --- | --- | + 10 | --- | --- | --- | --- | --- | --- | --- | --- | + 11 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + // OP rt, cop2cd RABBITIZER_DEF_INSTR_ID( cpu, 0x00, mfc2, diff --git a/tables/tables/instr_id/cpu/cpu_normal.inc b/tables/tables/instr_id/cpu/cpu_normal.inc index 0879ab75..65eb3927 100644 --- a/tables/tables/instr_id/cpu/cpu_normal.inc +++ b/tables/tables/instr_id/cpu/cpu_normal.inc @@ -1,6 +1,25 @@ /* SPDX-FileCopyrightText: © 2022-2024 Decompollaborate */ /* SPDX-License-Identifier: MIT */ +/* + 31---------26---------------------------------------------------0 + | opcode | | + ------6---------------------------------------------------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo +000 | *1 | *2 | J | JAL | BEQ | BNE | BLEZ | BGTZ | +001 | ADDI | ADDIU | SLTI | SLTIU | ANDI | ORI | XORI | LUI | +010 | *3 | *4 | *5 | --- | BEQL | BNEL | BLEZL | BGTZL | +011 | DADDI | DADDIU| LDL | LDR | --- | --- | --- | --- | +100 | LB | LH | LWL | LW | LBU | LHU | LWR | LWU | +101 | SB | SH | SWL | SW | SDL | SDR | SWR | CACHE | +110 | LL | LWC1 | LWC2 | PREF | LLD | LDC1 | LDC2 | LD | +111 | SC | SWC1 | SWC2 | --- | SCD | SDC1 | SDC2 | SD | + hi |-------|-------|-------|-------|-------|-------|-------|-------| + *1 = SPECIAL, see SPECIAL list *2 = REGIMM, see REGIMM list + *3 = COP0 *4 = COP1 + *5 = COP2 +*/ + // OP LABEL RABBITIZER_DEF_INSTR_ID( cpu, 0x02, j, diff --git a/tables/tables/instr_id/cpu/cpu_regimm.inc b/tables/tables/instr_id/cpu/cpu_regimm.inc index 22bd58d2..78245b76 100644 --- a/tables/tables/instr_id/cpu/cpu_regimm.inc +++ b/tables/tables/instr_id/cpu/cpu_regimm.inc @@ -1,6 +1,18 @@ /* SPDX-FileCopyrightText: © 2022-2024 Decompollaborate */ /* SPDX-License-Identifier: MIT */ +/* + 31---------26----------20-------16------------------------------0 + | = REGIMM | | rt | | + ------6---------------------5------------------------------------ + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 00 | BLTZ | BGEZ | BLTZL | BGEZL | --- | --- | --- | --- | + 01 | TGEI | TGEIU | TLTI | TLTIU | TEQI | --- | TNEI | --- | + 10 | BLTZAL| BGEZAL|BLTZALL|BGEZALL| --- | --- | --- | --- | + 11 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + // OP rs, IMM RABBITIZER_DEF_INSTR_ID( cpu, 0x00, bltz, diff --git a/tables/tables/instr_id/cpu/cpu_special.inc b/tables/tables/instr_id/cpu/cpu_special.inc index e414f334..479f1452 100644 --- a/tables/tables/instr_id/cpu/cpu_special.inc +++ b/tables/tables/instr_id/cpu/cpu_special.inc @@ -1,6 +1,22 @@ /* SPDX-FileCopyrightText: © 2022-2024 Decompollaborate */ /* SPDX-License-Identifier: MIT */ +/* + 31---------26------------------------------------------5--------0 + | = SPECIAL | | function| + ------6----------------------------------------------------6----- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo +000 | SLL | --- | SRL | SRA | SLLV | --- | SRLV | SRAV | +001 | JR | JALR | MOVZ | MOVN |SYSCALL| BREAK | --- | SYNC | +010 | MFHI | MTHI | MFLO | MTLO | DSLLV | --- | DSRLV | DSRAV | +011 | MULT | MULTU | DIV | DIVU | DMULT | DMULTU| DDIV | DDIVU | +100 | ADD | ADDU | SUB | SUBU | AND | OR | XOR | NOR | +101 | --- | --- | SLT | SLTU | DADD | DADDU | DSUB | DSUBU | +110 | TGE | TGEU | TLT | TLTU | TEQ | --- | TNE | --- | +111 | DSLL | --- | DSRL | DSRA | DSLL32| --- | DSRL32| DSRA32| + hi |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + // OP rd, rt, sa RABBITIZER_DEF_INSTR_ID( cpu, 0x00, sll, diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop0.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop0.inc new file mode 100644 index 00000000..5d0ad69e --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop0.inc @@ -0,0 +1,17 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25------21 ----------------------------------------0 + | = COP0 | fmt | | + ------6----------5----------------------------------------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 00 | MFC0 | --- | --- | --- | MTC0 | --- | --- | --- | + 01 | *1 | --- | --- | --- | --- | --- | --- | --- | + 10 | --- | --- | --- | --- | --- | --- | --- | --- | + 11 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| + *1=BC See BC0 list +*/ + + // The other instructions are implemented using the main CPU table diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop0_bc0.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop0_bc0.inc new file mode 100644 index 00000000..9a7fa401 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop0_bc0.inc @@ -0,0 +1,16 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25------21-20------16------------------------------0 + | = COP0 | BC0 | fmt | | + ------6----------5----------5------------------------------------ + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 00 | BC0F | BC0T | BC0FL | BC0TL | --- | --- | --- | --- | + 01 | --- | --- | --- | --- | --- | --- | --- | --- | + 10 | --- | --- | --- | --- | --- | --- | --- | --- | + 11 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + + // The other instructions are implemented using the main CPU table diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop0_tlb.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop0_tlb.inc new file mode 100644 index 00000000..5647ce7c --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop0_tlb.inc @@ -0,0 +1,20 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25------21--------------------------------5--------0 + | = COP0 | TLB | | fmt | + ------6----------5----------------------------------------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo +000 | --- | --- | --- | --- | --- | --- | --- | --- | +001 | --- | --- | --- | --- | --- | --- | --- | --- | +010 | --- | --- | --- | --- | --- | --- | --- | --- | +011 | ERET | --- | --- | --- | --- | --- | --- | --- | +100 | --- | --- | --- | --- | --- | --- | --- | --- | +101 | --- | --- | --- | --- | --- | --- | --- | --- | +110 | --- | --- | --- | --- | --- | --- | --- | --- | +111 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + + // The other instructions are implemented using the main CPU table diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop1.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop1.inc new file mode 100644 index 00000000..624d6105 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop1.inc @@ -0,0 +1,25 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25------21 ----------------------------------------0 + | = COP1 | fmt | | + ------6----------5----------------------------------------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 00 | MFC1 | --- | CFC1 | MFHC1 | MTC1 | --- | CTC1 | MTHC1 | + 01 | *1 | --- | --- | --- | --- | --- | --- | --- | + 10 | *2 | --- | --- | --- | *3 | --- | --- | --- | + 11 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| + *1 = BC See BC1 list + *2 = S instr, see FPU S list + *3 = W instr, see FPU W list +*/ + +/* +TODO: +- MFHC1 +- MTHC1 +*/ + + // The other instructions are implemented using the main CPU table diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop1_bc1.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop1_bc1.inc new file mode 100644 index 00000000..447982cb --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop1_bc1.inc @@ -0,0 +1,16 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25------21-20------16------------------------------0 + | = COP1 | BC1 | fmt | | + ------6----------5----------5------------------------------------ + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 00 | BC1F | BC1T | BC1FL | BC1TL | --- | --- | --- | --- | + 01 | --- | --- | --- | --- | --- | --- | --- | --- | + 10 | --- | --- | --- | --- | --- | --- | --- | --- | + 11 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + + // The other instructions are implemented using the main CPU table diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop1_fpu_s.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop1_fpu_s.inc new file mode 100644 index 00000000..2c664128 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop1_fpu_s.inc @@ -0,0 +1,20 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31----------26-25--------21 -----------------------------------------5----------0 + | = COP1 | = S | | function | + -------6------------5-----------------------------------------------------6------ + |---000---|---001---|---010---|---011---|---100---|---101---|---110---|---111---| lo +000 | ADD.S | SUB.S | MUL.S | DIV.S | SQRT.S | ABS.S | MOV.S | NEG.S | +001 | --- | --- | --- | --- |ROUND.W.S|TRUNC.W.S| CEIL.W.S|FLOOR.W.S| +010 | --- | --- | --- | --- | --- | --- | --- | --- | +011 | --- | --- | --- | --- | --- | --- | --- | --- | +100 | --- | --- | --- | --- | CVT.W.S | --- | --- | --- | +101 | --- | --- | --- | --- | --- | --- | --- | --- | +110 | C.F.S | C.UN.S | C.EQ.S | C.UEQ.S | C.OLT.S | C.ULT.S | C.OLE.S | C.ULE.S | +111 | C.SF.S | C.NGLE.S| C.SEQ.S | C.NGL.S | C.LT.S | C.NGE.S | C.LE.S | C.NGT.S | + hi |---------|---------|---------|---------|---------|---------|---------|---------| +*/ + + // The other instructions are implemented using the main CPU table diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop1_fpu_w.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop1_fpu_w.inc new file mode 100644 index 00000000..55a9b264 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop1_fpu_w.inc @@ -0,0 +1,20 @@ +/* SPDX-FileCopyrightText: © 2022-2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31----------26-25--------21 -----------------------------------------5----------0 + | = COP1 | = W | | function | + -------6------------5-----------------------------------------------------6------ + |---000---|---001---|---010---|---011---|---100---|---101---|---110---|---111---| lo +000 | --- | --- | --- | --- | --- | --- | --- | --- | +001 | --- | --- | --- | --- | --- | --- | --- | --- | +010 | --- | --- | --- | --- | --- | --- | --- | --- | +011 | --- | --- | --- | --- | --- | --- | --- | --- | +100 | CVT.S.W | --- | --- | --- | --- | --- | --- | --- | +101 | --- | --- | --- | --- | --- | --- | --- | --- | +110 | --- | --- | --- | --- | --- | --- | --- | --- | +111 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |---------|---------|---------|---------|---------|---------|---------|---------| +*/ + + // The other instructions are implemented using the main CPU table diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2.inc new file mode 100644 index 00000000..988e487b --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2.inc @@ -0,0 +1,19 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25------21 ----------------------------------------0 + | = COP2 | fmt | | + ------6----------5----------------------------------------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 00 | MFC2 | --- | CFC2 | *2 | MTC2 | --- | CTC2 | *3 | + 01 | *1 | --- | --- | --- | --- | --- | --- | --- | + 10 | --- | --- | --- | --- | --- | --- | --- | --- | + 11 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| + *1 = See BC2 table + *2 = See MFHC2 table + *3 = See MTHC2 table +*/ + + // The other instructions are implemented using the main CPU table diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_bc2.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_bc2.inc new file mode 100644 index 00000000..cb2c6812 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_bc2.inc @@ -0,0 +1,40 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25-----21------17-16-------------------------------0 + | = COP2 | BC2 | |fmt| | + ------6----------5------------2---------------------------------- + |---------------0---------------|---------------1---------------| lo + 0 | BVF | BVT | + 1 | BVFL | BVTL | + hi |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + + // OP IMM + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x00, bvf, + .operands={RAB_OPERAND_r4000allegrex_imm3, RAB_OPERAND_cpu_branch_target_label}, + .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, + .isBranch=true + ) // Branch on Vfpu False + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x01, bvt, + .operands={RAB_OPERAND_r4000allegrex_imm3, RAB_OPERAND_cpu_branch_target_label}, + .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, + .isBranch=true + ) // Branch on Vfpu True + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x02, bvfl, + .operands={RAB_OPERAND_r4000allegrex_imm3, RAB_OPERAND_cpu_branch_target_label}, + .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, + .isBranch=true, + .isBranchLikely=true + ) // Branch on Vfpu False Likely + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x03, bvtl, + .operands={RAB_OPERAND_r4000allegrex_imm3, RAB_OPERAND_cpu_branch_target_label}, + .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, + .isBranch=true, + .isBranchLikely=true + ) // Branch on Vfpu True Likely diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2.inc new file mode 100644 index 00000000..0a6dc5dc --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2.inc @@ -0,0 +1,26 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25------21 -------------------------7--------------0 + | = COP2 | MFHC2 | |p| | + ------6----------5-------------------------------1--------------- + |---------------0---------------|---------------1---------------| p + | mfv | *1 | + |-------------------------------|-------------------------------| + *1 = See P table +*/ + +/* +mfv + 31--------26-25-----21-20-----16-----------------7-6------------0 + | COP2 |0 0 0 1 1| rt |0 0 0 0 0 0 0 0|0| vd | + ------6----------5---------5---------------------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0, mfv, + .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_r4000allegrex_s_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRt=true + ) // Move word From Vfpu diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2_p.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2_p.inc new file mode 100644 index 00000000..815a68d1 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2_p.inc @@ -0,0 +1,26 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25------21 -------------------------7-6---4--------0 + | = COP2 | MFHC2 | |1| fmt | | + ------6----------5-------------------------------1---3----------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| fmt + | mfvc | --- | --- | --- | --- | --- | --- | *1 | + |-------|-------|-------|-------|-------|-------|-------|-------| + *1 See S list +*/ + +/* +mfvc + 31--------26-25-----21-20-----16-----------------7-6------------0 + | COP2 |0 0 0 1 1| rt |0 0 0 0 0 0 0 0|1| cop2cd | + ------6----------5---------5---------------------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x0, mfvc, + .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_r4000allegrex_cop2cd}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRt=true + ) // Move word From Vfpu Control diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2_p_s.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2_p_s.inc new file mode 100644 index 00000000..9eef97cf --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2_p_s.inc @@ -0,0 +1,25 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25------21 -------------------------7-6---4--------0 + | = COP2 | MFHC2 | |1|1 1 1| fmt | + ------6----------5-------------------------------1---3------4---- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 0 | --- | --- | --- | --- | --- | --- | --- | --- | + 1 | --- | --- | --- | --- | --- | --- | --- | vsync2| + hi |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + +/* +vsync2 + 31--------26-25-----21---------------------------7-6---4-3------0 + | COP2 |0 0 0 1 1| |1|1 1 1|1 1 1 1| + ------6----------5---------5---------------------1---3------4---- +*/ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0xF, vsync2, + .operands={0}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SYNChronize2 diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mthc2.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mthc2.inc new file mode 100644 index 00000000..4aee7020 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mthc2.inc @@ -0,0 +1,39 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25------21 -------------------------7--------------0 + | = COP2 | MFHC2 | |p| | + ------6----------5-------------------------------1--------------- + |---------------0---------------|---------------1---------------| p + | mtv | mtvc | + |-------------------------------|-------------------------------| +*/ + +/* +mtv + 31--------26-25-----21-20-----16-----------------7-6------------0 + | COP2 |0 0 1 1 1| rt |0 0 0 0 0 0 0 0|0| vd | + ------6----------5---------5---------------------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x0, mtv, + .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_r4000allegrex_s_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .readsRt=true + ) // Move word To Vfpu + +/* +mtvc + 31--------26-25-----21-20-----16-----------------7-6------------0 + | COP2 |0 0 1 1 1| rt |0 0 0 0 0 0 0 0|1| cop2cd | + ------6----------5---------5---------------------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x1, mtvc, + .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_r4000allegrex_cop2cd}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .readsRt=true + ) // Move word To Vfpu Control diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_normal.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_normal.inc new file mode 100644 index 00000000..e37b56ab --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_normal.inc @@ -0,0 +1,67 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31---------26---------------------------------------------------0 + | opcode | | + ------6---------------------------------------------------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo +000 | *1 | *2 | J | JAL | BEQ | BNE | BLEZ | BGTZ | +001 | ADDI | ADDIU | SLTI | SLTIU | ANDI | ORI | XORI | LUI | +010 | *3 | *4 | *5 | --- | BEQL | BNEL | BLEZL | BGTZL | +011 | *6 | *7 | --- | *8 | *9 | --- | --- | *10 | +100 | LB | LH | LWL | LW | LBU | LHU | LWR | --- | +101 | SB | SH | SWL | SW | --- | --- | SWR | CACHE | +110 | LL | LWC1 | LV.S | --- | *11 | --- | LV.Q | *12 | +111 | SC | SWC1 | SV.S | --- | *13 | *14 | SV.Q | *15 | + hi |-------|-------|-------|-------|-------|-------|-------|-------| + *1 = SPECIAL, see SPECIAL list + *2 = REGIMM, see REGIMM list + *3 = COP0 + *4 = COP1 + *5 = COP2 + *6 = VFPU0 + *7 = VFPU1 + *8 = VFPU3 + *9 = SPECIAL2 + *10 = SPECIAL3 + *11 = VFPU4 + *12 = VFPU5 + *13 = VFPU6 (Matrix operations) + *14 = QUADLR + *15 = VFPU7 +*/ + + // The other instructions are implemented using the main CPU table + + // OP vt, offset_14(base) + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x32, lv_s, lv.s, + .operands={RAB_OPERAND_r4000allegrex_s_vt_imm, RAB_OPERAND_r4000allegrex_offset14_base}, + .instrType=RABBITIZER_INSTR_TYPE_I, + .readsRs=true + ) // Load Single word to Vfpu + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x3A, sv_s, sv.s, + .operands={RAB_OPERAND_r4000allegrex_s_vt_imm, RAB_OPERAND_r4000allegrex_offset14_base}, + .instrType=RABBITIZER_INSTR_TYPE_I, + .modifiesRs=true + ) // Store Single word to Vfpu + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x36, lv_q, lv.q, + .operands={RAB_OPERAND_r4000allegrex_q_vt_imm, RAB_OPERAND_r4000allegrex_offset14_base}, + .instrType=RABBITIZER_INSTR_TYPE_I, + .readsRs=true + ) // Load Single word to Vfpu + + // OP vt, offset_14(base), maybe_wb + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x3E, sv_q, sv.q, + .operands={RAB_OPERAND_r4000allegrex_q_vt_imm, RAB_OPERAND_r4000allegrex_offset14_base_maybe_wb}, + .instrType=RABBITIZER_INSTR_TYPE_I, + .modifiesRs=true + ) // Store Single word to Vfpu diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_quadlr.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_quadlr.inc new file mode 100644 index 00000000..db50f798 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_quadlr.inc @@ -0,0 +1,25 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31---------26-----------------------------------------------2-1-0 + | = QUADLR | |Z| | + ------6------------------------------------------------------1--- + |---------------0---------------|---------------1---------------| lo + | SVL.Q | SVR.Q | + |-------------------------------|-------------------------------| +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0, svl_q, svl.q, + .operands={RAB_OPERAND_r4000allegrex_q_vt_imm, RAB_OPERAND_r4000allegrex_offset14_base}, + .instrType=RABBITIZER_INSTR_TYPE_I, + .readsRs=true + ) // Store Quad word Left from Vfpu + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 1, svr_q, svr.q, + .operands={RAB_OPERAND_r4000allegrex_q_vt_imm, RAB_OPERAND_r4000allegrex_offset14_base}, + .instrType=RABBITIZER_INSTR_TYPE_I, + .readsRs=true + ) // Store Quad word Right from Vfpu diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_regimm.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_regimm.inc new file mode 100644 index 00000000..1955627d --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_regimm.inc @@ -0,0 +1,16 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31---------26----------20-------16------------------------------0 + | = REGIMM | | rt | | + ------6---------------------5------------------------------------ + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 00 | BLTZ | BGEZ | BLTZL | BGEZL | --- | --- | --- | --- | + 01 | --- | --- | --- | --- | --- | --- | --- | --- | + 10 | BLTZAL| BGEZAL|BLTZALL|BGEZALL| --- | --- | --- | --- | + 11 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + + // The other instructions are implemented using the main CPU table diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_special.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_special.inc new file mode 100644 index 00000000..d1c298f7 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_special.inc @@ -0,0 +1,102 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31---------26------------------------------------------5--------0 + | = SPECIAL | | function| + ------6----------------------------------------------------6----- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo +000 | SLL | --- | *1 | SRA | SLLV | --- | *2 | SRAV | +001 | JR | JALR | MOVZ | MOVN |SYSCALL| BREAK | --- | SYNC | +010 | MFHI | MTHI | MFLO | MTLO | --- | --- | CLZ | CLO | +011 | MULT | MULTU | DIV | DIVU | MADD | MADDU | --- | --- | +100 | ADD | ADDU | SUB | SUBU | AND | OR | XOR | NOR | +101 | --- | --- | SLT | SLTU | MAX | MIN | MSUB | MSUBU | +110 | --- | --- | --- | --- | --- | --- | --- | --- | +111 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| + *1 = SPECIAL rs, see SPECIAL rs list + *2 = SPECIAL sa, see SPECIAL sa list +*/ + + // The other instructions are implemented using the main CPU table + + // OP rd, rs + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x16, clz, + .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRd=true, + .readsRs=true + ) // Count Leading Zero + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x17, clo, + .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRd=true, + .readsRs=true + ) // Count Leading One + + // OP rs, rt + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x1C, madd, + .operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .readsRs=true, + .readsRt=true, + .modifiesHI=true, + .modifiesLO=true + ) // Multiply ADD + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x1D, maddu, + .operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .readsRs=true, + .readsRt=true, + .modifiesHI=true, + .modifiesLO=true + ) // Multiply ADD Unsigned + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x2E, msub, + .operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .readsRs=true, + .readsRt=true, + .modifiesHI=true, + .modifiesLO=true + ) // Multiply SUBtract + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x2F, msubu, + .operands={RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .readsRs=true, + .readsRt=true, + .modifiesHI=true, + .modifiesLO=true + ) // Multiply SUBtract Unsigned + + // OP rd, rs, rt + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x2C, max, + .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRd=true, + .readsRs=true, + .readsRt=true + ) // select MAX + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x2D, min, + .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rs, RAB_OPERAND_cpu_rt}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRd=true, + .readsRs=true, + .readsRt=true + ) // select MIN diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_special2.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_special2.inc new file mode 100644 index 00000000..15a47bc4 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_special2.inc @@ -0,0 +1,40 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31---------26------------------------------------------5--------0 + | =SPECIAL2 | | function| + ------6----------------------------------------------------6----- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo +000 | SLEEP | --- | --- | --- | --- | --- | --- | --- | +001 | --- | --- | --- | --- | --- | --- | --- | --- | +010 | --- | --- | --- | --- | --- | --- | --- | --- | +011 | --- | --- | --- | --- | --- | --- | --- | --- | +100 | --- | --- | --- | --- | MFIE | --- | MTIE | --- | +101 | --- | --- | --- | --- | --- | --- | --- | --- | +110 | --- | --- | --- | --- | --- | --- | --- | --- | +111 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + + // OP + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x00, sleep, + .operands={0}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x24, mfie, + .operands={RAB_OPERAND_cpu_rt}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRt=true + ) + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x26, mtie, + .operands={RAB_OPERAND_cpu_rt}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .readsRt=true + ) diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_special3.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_special3.inc new file mode 100644 index 00000000..375142bb --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_special3.inc @@ -0,0 +1,35 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31---------26------------------------------------------5--------0 + | =SPECIAL3 | | function| + ------6----------------------------------------------------6----- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo +000 | EXT | --- | --- | --- | INS | --- | --- | --- | +001 | --- | --- | --- | --- | --- | --- | --- | --- | +010 | --- | --- | --- | --- | --- | --- | --- | --- | +011 | --- | --- | --- | --- | --- | --- | --- | --- | +100 | *1 | --- | --- | --- | --- | --- | --- | --- | +101 | --- | --- | --- | --- | --- | --- | --- | --- | +110 | --- | --- | --- | --- | --- | --- | --- | --- | +111 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| + *1 = SPECIAL3 BSHFL +*/ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x00, ext, + .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs, RAB_OPERAND_r4000allegrex_pos, RAB_OPERAND_r4000allegrex_size}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRt=true, + .readsRs=true + ) // EXTract bit field + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x04, ins, + .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs, RAB_OPERAND_r4000allegrex_pos, RAB_OPERAND_r4000allegrex_size_plus_pos}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRt=true, + .readsRs=true + ) // INSert bit field diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_special3_bshfl.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_special3_bshfl.inc new file mode 100644 index 00000000..00544d76 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_special3_bshfl.inc @@ -0,0 +1,56 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31---------26--------------------------------10------6-5--------0 + | =SPECIAL3 | | sa | = BSHFL | + ------6------------------------------------------5---------6----- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 00 | --- | --- | WSBH | WSBW | --- | --- | --- | --- | + 01 | --- | --- | --- | --- | --- | --- | --- | --- | + 10 | SEB | --- | --- | --- | BITREV| --- | --- | --- | + 11 | SEH | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + + // OP rd, rt + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x02, wsbh, + .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRd=true, + .readsRt=true + ) // Word Swap Bytes within Halfword + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x03, wsbw, + .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRd=true, + .readsRt=true + ) // Word Swap Bytes within Word + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x10, seb, + .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRd=true, + .readsRt=true + ) // Sign-Extend Byte + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x18, seh, + .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRd=true, + .readsRt=true + ) // Sign-Extend Halfword + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x14, bitrev, + .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRd=true, + .readsRt=true + ) // BIT REVerse diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_special_rs.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_special_rs.inc new file mode 100644 index 00000000..8ac7137a --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_special_rs.inc @@ -0,0 +1,30 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25-----21---------------------------------5--------0 + | = SPECIAL | rs | | 0x02 | + ------6----------5-----------------------------------------6----- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 00 | srl | rotr | --- | --- | --- | --- | --- | --- | + 01 | --- | --- | --- | --- | --- | --- | --- | --- | + 10 | --- | --- | --- | --- | --- | --- | --- | --- | + 11 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x00, srl, + .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRd=true, + .readsRt=true + ) // Shift word Right Logical + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x01, rotr, + .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_sa}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRd=true, + .readsRt=true + ) // ROTate word Right diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_special_sa.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_special_sa.inc new file mode 100644 index 00000000..2de7c41e --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_special_sa.inc @@ -0,0 +1,32 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31---------26--------------------------------10------6-5--------0 + | = SPECIAL | | sa | 0x06 | + ------6------------------------------------------5---------6----- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 00 | srlv | rotrv | --- | --- | --- | --- | --- | --- | + 01 | --- | --- | --- | --- | --- | --- | --- | --- | + 10 | --- | --- | --- | --- | --- | --- | --- | --- | + 11 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x00, srlv, + .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRd=true, + .readsRs=true, + .readsRt=true + ) // Shift word Right Logical Variable + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x01, rotrv, + .operands={RAB_OPERAND_cpu_rd, RAB_OPERAND_cpu_rt, RAB_OPERAND_cpu_rs}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .modifiesRd=true, + .readsRs=true, + .readsRt=true + ) // ROTate word Right Variable diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu0.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu0.inc new file mode 100644 index 00000000..033b26a8 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu0.inc @@ -0,0 +1,185 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25-23---------------15--------------7--------------0 + | VFPU0 | fmt | |t| |p| | + ------6--------3-----------------1---------------1--------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| fmt + 00 | vadd.s| vsub.s| vsbn.s| --- | --- | --- | --- | vdiv.s| + 01 | vadd.p| vsub.p| --- | --- | --- | --- | --- | --- | + 10 | vadd.t| vsub.t| --- | --- | --- | --- | --- | --- | + 11 | vadd.q| vsub.q| --- | --- | --- | --- | --- | --- | + tp |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + + // OP vd, vs, vt + +/* +vadd.s + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU0 |0 0 0| vt |0| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x0, vadd_s, vadd.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ADD Single word + +/* +vadd.p + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU0 |0 0 0| vt |0| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x1, vadd_p, vadd.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ADD Pair word + +/* +vadd.t + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU0 |0 0 0| vt |1| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x2, vadd_t, vadd.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ADD Triple word + +/* +vadd.q + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU0 |0 0 0| vt |1| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x3, vadd_q, vadd.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ADD Quad word + +/* +vsub.s + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU0 |0 0 1| vt |0| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x0, vsub_s, vsub.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SUBtract Single word + +/* +vsub.p + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU0 |0 0 1| vt |0| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x1, vsub_p, vsub.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ADD Pair word + +/* +vsub.t + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU0 |0 0 1| vt |1| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x2, vsub_t, vsub.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ADD Triple word + +/* +vsub.q + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU0 |0 0 1| vt |1| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x3, vsub_q, vsub.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ADD Quad word + +/* +vsbn.s + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU0 |0 1 0| vt |0| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x0, vsbn_s, vsbn.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ScaleBN Single word + +/* +vdiv.s + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU0 |1 1 1| vt |0| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x0, vdiv_s, vdiv.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // DIVide Single word + +/* +vdiv.p + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU0 |1 1 1| vt |0| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x1, vdiv_p, vdiv.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // DIVide Single word + +/* +vdiv.t + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU0 |1 1 1| vt |1| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x2, vdiv_t, vdiv.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // DIVide Single word + +/* +vdiv.q + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU0 |1 1 1| vt |1| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x3, vdiv_q, vdiv.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // DIVide Single word diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu1.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu1.inc new file mode 100644 index 00000000..574a394a --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu1.inc @@ -0,0 +1,211 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25-23---------------15--------------7--------------0 + | VFPU0 | fmt | |t| |p| | + ------6--------3-----------------1---------------1--------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| fmt + 00 | vmul.s| --- | --- | --- | --- | --- | --- | --- | + 01 | vmul.p| vdot.p| vscl.p| --- | vhdp.p| --- | vdet.p| --- | + 10 | vmul.t| vdot.t| vscl.t| --- | vhdp.t| vcrs.t| --- | --- | + 11 | vmul.q| vdot.q| vscl.q| --- | vhdp.q| --- | --- | --- | + tp |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + + // OP vd, vs, vt + +/* +vmul.s + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU1 |0 0 0| vt |0| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x0 << 2 | 0x0, vmul_s, vmul.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // MULtiply Single word + +/* +vmul.p + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU1 |0 0 0| vt |0| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x0 << 2 | 0x1, vmul_p, vmul.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // MULtiply Pair word + +/* +vmul.t + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU1 |0 0 0| vt |1| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x0 << 2 | 0x2, vmul_t, vmul.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // MULtiply Triple word + +/* +vmul.q + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU1 |0 0 0| vt |1| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x0 << 2 | 0x3, vmul_q, vmul.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // MULtiply Quad word + +/* +vdot.p + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU1 |0 0 1| vt |0| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x1 << 2 | 0x1, vdot_p, vdot.p, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // DOT Product Pair word + +/* +vdot.t + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU1 |0 0 1| vt |1| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x1 << 2 | 0x2, vdot_t, vdot.t, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // DOT Product Triple word + +/* +vdot.q + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU1 |0 0 1| vt |1| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x1 << 2 | 0x3, vdot_q, vdot.q, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // DOT Product Quad word + +/* +vscl.p + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU1 |0 1 0| vt |0| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x2 << 2 | 0x1, vscl_p, vscl.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_s_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // DOT Product Pair word + +/* +vscl.t + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU1 |0 1 0| vt |1| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x2 << 2 | 0x2, vscl_t, vscl.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_s_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // DOT Product Triple word + +/* +vscl.q + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU1 |0 1 0| vt |1| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x2 << 2 | 0x3, vscl_q, vscl.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_s_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SCaLe Quad word + +/* +vhdp.p + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU1 |1 0 0| vt |0| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x4 << 2 | 0x1, vhdp_p, vhdp.p, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Homogeneous Dot Product Pair word + +/* +vhdp.t + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU1 |1 0 0| vt |1| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x4 << 2 | 0x2, vhdp_t, vhdp.t, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Homogeneous Dot Product Pair word + +/* +vhdp.q + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU1 |1 0 0| vt |1| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x4 << 2 | 0x3, vhdp_q, vhdp.q, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Homogeneous Dot Product Pair word + +/* +vcrs.t + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU1 |1 0 1| vt |1| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x5 << 2 | 0x2, vcrs_t, vcrs.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Cross Triple Word + +/* +vdet.p + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU1 |1 1 0| vt |0| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x6 << 2 | 0x1, vdet_p, vdet.p, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // 2x2 matrix DETerminant diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu3.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu3.inc new file mode 100644 index 00000000..4418e68f --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu3.inc @@ -0,0 +1,327 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25-23---------------15--------------7--------------0 + | VFPU3 | fmt | |t| |p| | + ------6--------3-----------------1---------------1--------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| fmt + 00 | vcmp.s| --- | vmin.s| vmax.s| --- |vscmp.s| vsge.s| vslt.s| + 01 | vcmp.p| --- | vmin.p| vmax.p| --- |vscmp.p| vsge.p| vslt.p| + 10 | vcmp.t| --- | vmin.t| vmax.t| --- |vscmp.t| vsge.t| vslt.t| + 11 | vcmp.q| --- | vmin.q| vmax.q| --- |vscmp.q| vsge.q| vslt.q| + tp |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + +/* +vcmp.s + 31--------26-25-23-22---------16---14----------8-7-------3------0 + | VFPU3 |0 0 0| vt |0| vs |0|0 0 0| cond | + ------6--------3---------7-------1-------7-------1----------4---- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x0 << 2 | 0x0, vcmp_s, vcmp.s, + .operands={RAB_OPERAND_r4000allegrex_vcmp_cond_s_maybe_vs_maybe_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // CoMPare Single word + +/* +vcmp.p + 31--------26-25-23-22---------16---14----------8-7-------3------0 + | VFPU3 |0 0 0| vt |0| vs |1|0 0 0| cond | + ------6--------3---------7-------1-------7-------1----------4---- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x0 << 2 | 0x1, vcmp_p, vcmp.p, + .operands={RAB_OPERAND_r4000allegrex_vcmp_cond_p_maybe_vs_maybe_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // CoMPare Pair word + +/* +vcmp.t + 31--------26-25-23-22---------16---14----------8-7-------3------0 + | VFPU3 |0 0 0| vt |1| vs |0|0 0 0| cond | + ------6--------3---------7-------1-------7-------1----------4---- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x0 << 2 | 0x2, vcmp_t, vcmp.t, + .operands={RAB_OPERAND_r4000allegrex_vcmp_cond_t_maybe_vs_maybe_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // CoMPare Triple word + +/* +vcmp.q + 31--------26-25-23-22---------16---14----------8-7-------3------0 + | VFPU3 |0 0 0| vt |1| vs |1|0 0 0| cond | + ------6--------3---------7-------1-------7-------1----------4---- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x0 << 2 | 0x3, vcmp_q, vcmp.q, + .operands={RAB_OPERAND_r4000allegrex_vcmp_cond_q_maybe_vs_maybe_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // CoMPare Quad word + +/* +vmin.s + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |0 1 0| vt |0| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x2 << 2 | 0x0, vmin_s, vmin.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // MINimum Single word + +/* +vmin.p + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |0 1 0| vt |0| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x2 << 2 | 0x1, vmin_p, vmin.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // MINimum Pair word + +/* +vmin.t + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |0 1 0| vt |1| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x2 << 2 | 0x2, vmin_t, vmin.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // MINimum Triple word + +/* +vmin.q + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |0 1 0| vt |1| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x2 << 2 | 0x3, vmin_q, vmin.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // MINimum Quad word + +/* +vmax.s + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |0 1 1| vt |0| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x3 << 2 | 0x0, vmax_s, vmax.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // MAXimum Single word + +/* +vmax.p + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |0 1 1| vt |0| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x3 << 2 | 0x1, vmax_p, vmax.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // MAXimum Pair word + +/* +vmax.t + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |0 1 1| vt |1| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x3 << 2 | 0x2, vmax_t, vmax.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // MAXimum Triple word + +/* +vmax.q + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |0 1 1| vt |1| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x3 << 2 | 0x3, vmax_q, vmax.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // MAXimum Quad word + +/* +vscmp.s + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |1 0 1| vt |0| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x5 << 2 | 0x0, vscmp_s, vscmp.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Set ComPare Single word + +/* +vscmp.p + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |1 0 1| vt |0| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x5 << 2 | 0x1, vscmp_p, vscmp.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Set ComPare Pair word + +/* +vscmp.t + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |1 0 1| vt |1| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x5 << 2 | 0x2, vscmp_t, vscmp.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Set ComPare Triple word + +/* +vscmp.q + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |1 0 1| vt |1| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x5 << 2 | 0x3, vscmp_q, vscmp.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Set ComPare Quad word + +/* +vsge.s + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |1 1 0| vt |0| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x6 << 2 | 0x0, vsge_s, vsge.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Greater Equal Single word to value + +/* +vsge.p + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |1 1 0| vt |0| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x6 << 2 | 0x1, vsge_p, vsge.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Greater Equal Pair word to value + +/* +vsge.t + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |1 1 0| vt |1| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x6 << 2 | 0x2, vsge_t, vsge.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Greater Equal Triple word to value + +/* +vsge.q + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |1 1 0| vt |1| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x6 << 2 | 0x3, vsge_q, vsge.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // CGreater Equal Quad word to value + +/* +vslt.s + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |1 1 1| vt |0| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x7 << 2 | 0x0, vslt_s, vslt.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Less Than Single word to value + +/* +vslt.p + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |1 1 1| vt |0| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x7 << 2 | 0x1, vslt_p, vslt.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Less Than Pair word to value + +/* +vslt.t + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |1 1 1| vt |1| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x7 << 2 | 0x2, vslt_t, vslt.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Less Than Triple word to value + +/* +vslt.q + 31--------26-25-23-22---------16---14----------8---6------------0 + | VFPU3 |1 1 1| vt |1| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x7 << 2 | 0x3, vslt_q, vslt.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Less Than Quad word to value diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4.inc new file mode 100644 index 00000000..dd4125c5 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4.inc @@ -0,0 +1,29 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25-24---------------15--------------7--------------0 + | VFPU4 |fmt| |t| |p| | + ------6-------2------------------1---------------1--------------- + |-------00------|-------01------|-------10------|-------11------| fmt + 00 | *1 | --- | *2 | vwbn.s | + 01 | *1 | --- | *2 | --- | + 10 | *1 | --- | *2 | --- | + 11 | *1 | --- | *2 | --- | + tp |---------------|---------------|---------------|---------------| + *1 See fmt0 table + *2 See fmt2 table +*/ + +/* +vwbn.s + 31--------26-25-24------------16---14----------8---6------------0 + | VFPU4 |1 1| imm8 |0| vs |0| vd | + ------6-------2---------8--------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x3 << 2 | 0x0, vwbn_s, vwbn.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_bn}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // WrapBN Single word diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0.inc new file mode 100644 index 00000000..085f85f0 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0.inc @@ -0,0 +1,25 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25--23-----19--------------------------------------0 + | VFPU4 |0 0| fmt | | + ------6-------2------5------------------------------------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 00 | *1 | --- | *2 | *3 | *4 | --- | *5 | *6 | + 01 | *7 | *8 | *9 | *10 | *11 | *11 | *11 | *11 | + 10 | --- | --- | --- | --- | --- | --- | --- | --- | + 11 | --- | --- | --- | --- | --- | --- | --- | --- | + hi |-------|-------|-------|-------|-------|-------|-------|-------| + *1 = See FMT0 table + *2 = See FMT2 table + *3 = See FMT3 table + *4 = See RND table + *5 = See CVTFLT table + *6 = See CVTINT table + *7 = See FMT8 table + *8 = See FMT9 table + *9 = See CONTROL table + *10 = See COLOR table + *11 = See CST table +*/ diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_color.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_color.inc new file mode 100644 index 00000000..4cccb43e --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_color.inc @@ -0,0 +1,53 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25--23-----19----16-----------------7--------------0 + | VFPU4 |0 0|0 1 0 1 1| fmt |t| |p| | + ------6-------2------5-------3---1---------------1--------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| fmt + 00 | --- | --- | --- | --- | --- | --- | --- | --- | + 01 | --- | --- | --- | --- | --- | --- | --- | --- | + 10 | --- | --- | --- | --- | --- | --- | --- | --- | + 11| --- |vt4444.q|vt5551.q|vt5650.q|--- |--- | --- | --- | + tp |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + +/* +vt4444.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|1 1|0 0 1|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x3, vt4444_q, vt4444.q, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert to color4444 from packed unsigned chars Quad Word + +/* +vt5551.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|1 1|0 1 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x3, vt5551_q, vt5551.q, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert to color5551 from packed unsigned chars Quad Word + +/* +vt5650.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|1 1|0 1 1|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x3, vt5650_q, vt5650.q, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert to color5650 from packed unsigned chars Quad Word diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_control.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_control.inc new file mode 100644 index 00000000..94b8cb8d --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_control.inc @@ -0,0 +1,40 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25--23-----19----16-----------------7--------------0 + | VFPU4 |0 0|0 1 0 0 1| fmt |t| |p| | + ------6-------2------5-------3---1---------------1--------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| fmt + 00 | --- | --- | --- | --- | --- | --- | --- | --- | + 01 | --- | vmtvc | --- | --- | --- | --- | --- | --- | + 10 | vmfvc | --- | --- | --- | --- | --- | --- | --- | + 11 | --- | --- | --- | --- | --- | --- | --- | --- | + tp |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + +/* +vmfvc + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|1 0|0 0 0|1| cop2cs |0| vd | + ------6-------2----3----2----3---1-------7---------------7------- +*/ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x00 << 2 | 0x2, vmfvc, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_cop2cs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // VFPU Move Word from VFPU Control + +/* +vmtvc + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|1 0|0 0 1|0| vs |1| cop2cd | + ------6-------2----3----2----3-----------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x01 << 2 | 0x1, vmtvc, + .operands={RAB_OPERAND_r4000allegrex_cop2cd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // VFPU Move Word to VFPU Control diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_cst.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_cst.inc new file mode 100644 index 00000000..f1669d85 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_cst.inc @@ -0,0 +1,66 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25--23-21-----------15--------------7--------------0 + | VFPU4 |0 0|0 1 1| |t| |p| | + ------6-------2----3-------------1---------------1--------------- + |-------| + 00 | vcst.s| + 01 | vcst.p| + 10 | vcst.t| + 11 | vcst.q| + tp |-------| +*/ + +/* +vcst.s + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 1| imm5 |0|0 0 0 0 0 0 0|0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x0, vcst_s, vcst.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_vconstant}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Set ConsTant Single word + +/* +vcst.p + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 1| imm5 |0|0 0 0 0 0 0 0|1| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x1, vcst_p, vcst.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_vconstant}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Set ConsTant Pair word + +/* +vcst.t + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 1| imm5 |1|0 0 0 0 0 0 0|0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x2, vcst_t, vcst.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_vconstant}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Set ConsTant Triple word + +/* +vcst.q + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 1| imm5 |1|0 0 0 0 0 0 0|0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x3, vcst_q, vcst.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_vconstant}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Set ConsTant Quad word diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_cvtflt.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_cvtflt.inc new file mode 100644 index 00000000..e17ef362 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_cvtflt.inc @@ -0,0 +1,92 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25--23-----19----16-----------------7--------------0 + | VFPU4 |0 0|0 0 1 1 0| fmt |t| |p| | + ------6-------2------5-------3---1---------------1--------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| fmt + 00 | --- | --- | --- | vh2f.s| --- | --- | vsbz.s| vlgb.s| + 01 | --- | --- | vf2h.p| vh2f.p| --- | --- | --- | --- | + 10 | --- | --- | --- | --- | --- | --- | --- | --- | + 11 | --- | --- | vf2h.q| --- | --- | --- | --- | --- | + tp |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + +/* +vf2h.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 0|0 1 0|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x1, vf2h_p, vf2h.p, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert float to float16 Pair word + +/* +vf2h.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 0|0 1 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x3, vf2h_q, vf2h.q, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert float to float16 Quad word + +/* +vh2f.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 0|0 1 1|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x0, vh2f_s, vh2f.s, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert float16 to float Pair word + +/* +vh2f.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 0|0 1 1|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x1, vh2f_p, vh2f.p, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert float16 to float Pair word + +/* +vsbz.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 0|1 1 0|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x06 << 2 | 0x0, vsbz_s, vsbz.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ScaleBZ Pair word + +/* +vlgb.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 0|1 1 1|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x0, vlgb_s, vlgb.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // LoGB Pair word diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_cvtint.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_cvtint.inc new file mode 100644 index 00000000..eb683b35 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_cvtint.inc @@ -0,0 +1,170 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25--23-----19----16-----------------7--------------0 + | VFPU4 |0 0|0 0 1 1 1| fmt |t| |p| | + ------6-------2------5-------3---1---------------1--------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| fmt + 00|vuc2ifs.s|vc2i.s|vus2i.s| vs2i.s| --- | --- | --- | --- | + 01 | --- | --- |vus2i.p| vs2i.p| --- | --- |vi2us.p| vi2s.p| + 10 | --- | --- | --- | --- | --- | --- | --- | --- | + 11 | --- | --- | --- | --- |vi2uc.q| vi2c.q|vi2us.q| vi2s.q| + tp |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + +/* +vuc2ifs.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 1|0 0 0|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x0, vuc2ifs_s, vuc2ifs.s, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // convert Unsigned Char single word to Integer + +/* +vc2i.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 1|0 0 1|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x0, vc2i_s, vc2i.s, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert signed char single word to integer + +/* +vus2i.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 1|0 1 0|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x0, vus2i_s, vus2i.s, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert unsigned short to integer Single Word + +/* +vus2i.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 1|0 1 0|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x1, vus2i_p, vus2i.p, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert unsigned short to integer Pair Word + +/* +vs2i.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 1|0 1 1|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x0, vs2i_s, vs2i.s, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert signed short to integer Single Word + +/* +vs2i.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 1|0 1 1|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x1, vs2i_p, vs2i.p, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert signed short to integer Single Word + +/* +vi2uc.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 1|1 0 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x3, vi2uc_q, vi2uc.q, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert integer to unsigned char Quad Word + +/* +vi2c.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 1|1 0 1|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x05 << 2 | 0x3, vi2c_q, vi2c.q, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert integer to signed char Quad Word + +/* +vi2us.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 1|1 1 0|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x06 << 2 | 0x1, vi2us_p, vi2us.p, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert integer to unsigned short Pair Word + +/* +vi2us.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 1|1 1 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x06 << 2 | 0x3, vi2us_q, vi2us.q, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert integer to unsigned short Quad Word + +/* +vi2s.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 1|1 1 1|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x1, vi2s_p, vi2s.p, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert integer to signed short Pair Word + +/* +vi2s.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|1 1|1 1 1|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x3, vi2s_q, vi2s.q, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert integer to signed short Quad Word diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt0.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt0.inc new file mode 100644 index 00000000..15f024c0 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt0.inc @@ -0,0 +1,404 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25--23-----19----16-----------------7--------------0 + | VFPU4 |0 0|0 0 0 0 0| fmt |t| |p| | + ------6-------2------5-------3---1---------------1--------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| fmt + 00 | vmov.s| vabs.s| vneg.s| --- |vsat0.s|vsat1.s|vzero.s| vone.s| + 01 | vmov.p| vabs.p| vneg.p| vidt.p|vsat0.p|vsat1.p|vzero.p| vone.p| + 10 | vmov.t| vabs.t| vneg.t| --- |vsat0.t|vsat1.t|vzero.t| vone.t| + 11 | vmov.q| vabs.q| vneg.q| vidt.q|vsat0.q|vsat1.q|vzero.q| vone.q| + tp |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + +/* +vmov.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|0 0 0|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x0, vmov_s, vmov.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // MOVe Single word + +/* +vmov.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|0 0 0|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x1, vmov_p, vmov.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // MOVe Pair word + +/* +vmov.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|0 0 0|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x2, vmov_t, vmov.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // MOVe Triple word + +/* +vmov.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|0 0 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x3, vmov_q, vmov.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // MOVe Quad word + +/* +vabs.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|0 0 1|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x0, vabs_s, vabs.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ABSolute value Single word + +/* +vabs.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|0 0 1|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x1, vabs_p, vabs.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ABSolute value Pair word + +/* +vabs.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|0 0 1|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x2, vabs_t, vabs.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ABSolute value Triple word + +/* +vabs.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|0 0 1|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x3, vabs_q, vabs.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ABSolute value Quad word + +/* +vneg.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|0 1 0|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x0, vneg_s, vneg.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // NEGate Single word + +/* +vneg.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|0 1 0|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x1, vneg_p, vneg.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // NEGate Pair word + +/* +vneg.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|0 1 0|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x2, vneg_t, vneg.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // NEGate Triple word + +/* +vneg.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|0 1 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x3, vneg_q, vneg.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // NEGate Quad word + +/* +vidt.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|0 1 1|0|0 0 0 0 0 0 0|1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x1, vidt_p, vidt.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // IDenTity Pair word + +/* +vidt.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|0 1 1|1|0 0 0 0 0 0 0|1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x3, vidt_q, vidt.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // IDenTity Quad word + +/* +vsat0.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|1 0 0|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x0, vsat0_s, vsat0.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SATurate to [0.0:1.0] Single word + +/* +vsat0.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|1 0 0|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x1, vsat0_p, vsat0.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SATurate to [0.0:1.0] Pair word + +/* +vsat0.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|1 0 0|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x2, vsat0_t, vsat0.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SATurate to [0.0:1.0] Triple word + +/* +vsat0.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|1 0 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x3, vsat0_q, vsat0.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SATurate to [0.0:1.0] Quad word + +/* +vsat1.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|1 0 1|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x05 << 2 | 0x0, vsat1_s, vsat1.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SATurate to [-1.0:1.0] Single word + +/* +vsat1.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|1 0 1|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x05 << 2 | 0x1, vsat1_p, vsat1.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SATurate to [-1.0:1.0] Pair word + +/* +vsat1.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|1 0 1|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x05 << 2 | 0x2, vsat1_t, vsat1.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SATurate to [-1.0:1.0] Triple word + +/* +vsat1.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|1 0 1|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x05 << 2 | 0x3, vsat1_q, vsat1.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SATurate to [-1.0:1.0] Quad word + +/* +vzero.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|1 1 0|0|0 0 0 0 0 0 0|0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x06 << 2 | 0x0, vzero_s, vzero.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // set ZERO Single word + +/* +vzero.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|1 1 0|0|0 0 0 0 0 0 0|1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x06 << 2 | 0x1, vzero_p, vzero.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // set ZERO Pair word + +/* +vzero.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|1 1 0|1|0 0 0 0 0 0 0|0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x06 << 2 | 0x2, vzero_t, vzero.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // set ZERO Triple word + +/* +vzero.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|1 1 0|1|0 0 0 0 0 0 0|1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x06 << 2 | 0x3, vzero_q, vzero.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // set ZERO Quad word + +/* +vone.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|1 1 1|0|0 0 0 0 0 0 0|0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x0, vone_s, vone.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // One's ComPlement Single word + +/* +vone.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|1 1 1|0|0 0 0 0 0 0 0|1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x1, vone_p, vone.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // One's ComPlement Pair word + +/* +vone.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|1 1 1|1|0 0 0 0 0 0 0|0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x2, vone_t, vone.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // One's ComPlement Triple word + +/* +vone.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|0 0|1 1 1|1|0 0 0 0 0 0 0|1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x3, vone_q, vone.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // One's ComPlement Quad word diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt2.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt2.inc new file mode 100644 index 00000000..aa90df65 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt2.inc @@ -0,0 +1,432 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25--23-----19----16-----------------7--------------0 + | VFPU4 |0 0|0 0 0 1 0| fmt |t| |p| | + ------6-------2------5-------3---1---------------1--------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| fmt + 00 | vrcp.s| vrsq.s| vsin.s| vcos.s|vexp2.s|vlog2.s|vsqrt.s|vasin.s| + 01 | vrcp.p| vrsq.p| vsin.p| vcos.p|vexp2.p|vlog2.p|vsqrt.p|vasin.p| + 10 | vrcp.t| vrsq.t| vsin.t| vcos.t|vexp2.t|vlog2.t|vsqrt.t|vasin.t| + 11 | vrcp.q| vrsq.q| vsin.q| vcos.q|vexp2.q|vlog2.q|vsqrt.q|vasin.q| + tp |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + +/* +vrcp.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|0 0 0|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x0, vrcp_s, vrcp.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ReCiProcal Single word + +/* +vrcp.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|0 0 0|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x1, vrcp_p, vrcp.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ReCiProcal Pair word + +/* +vrcp.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|0 0 0|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x2, vrcp_t, vrcp.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ReCiProcal Triple word + +/* +vrcp.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|0 0 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x3, vrcp_q, vrcp.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ReCiProcal Quad word + +/* +vrsq.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|0 0 1|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x0, vrsq_s, vrsq.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Reciprocal Square Root value Single word + +/* +vrsq.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|0 0 1|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x1, vrsq_p, vrsq.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Reciprocal Square Root value Pair word + +/* +vrsq.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|0 0 1|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x2, vrsq_t, vrsq.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Reciprocal Square Root value Triple word + +/* +vrsq.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|0 0 1|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x3, vrsq_q, vrsq.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Reciprocal Square Root value Quad word + + +/* +vsin.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|0 1 0|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x0, vsin_s, vsin.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SINe Single word + +/* +vsin.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|0 1 0|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x1, vsin_p, vsin.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SINe Pair word + +/* +vsin.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|0 1 0|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x2, vsin_t, vsin.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SINe Triple word + +/* +vsin.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|0 1 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x3, vsin_q, vsin.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SINe Quad word + +/* +vcos.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|0 1 1|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x0, vcos_s, vcos.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // COSine Pair word + +/* +vcos.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|0 1 1|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x1, vcos_p, vcos.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // COSine Pair word + +/* +vcos.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|0 1 1|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x2, vcos_t, vcos.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // COSine Quad word + +/* +vcos.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|0 1 1|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x3, vcos_q, vcos.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // COSine Quad word + +/* +vexp2.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|1 0 0|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x0, vexp2_s, vexp2.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // EXPonential base 2 Single word + +/* +vexp2.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|1 0 0|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x1, vexp2_p, vexp2.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // EXPonential base 2 Pair word + +/* +vexp2.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|1 0 0|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x2, vexp2_t, vexp2.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // EXPonential base 2 Triple word + +/* +vexp2.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|1 0 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x3, vexp2_q, vexp2.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // EXPonential base 2 Quad word + +/* +vlog2.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|1 0 1|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x05 << 2 | 0x0, vlog2_s, vlog2.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // LOGarithm base 2 Single word + +/* +vlog2.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|1 0 1|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x05 << 2 | 0x1, vlog2_p, vlog2.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // LOGarithm base 2 Pair word + +/* +vlog2.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|1 0 1|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x05 << 2 | 0x2, vlog2_t, vlog2.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // LOGarithm base 2 Triple word + +/* +vlog2.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|1 0 1|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x05 << 2 | 0x3, vlog2_q, vlog2.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // LOGarithm base 2 Quad word + +/* +vsqrt.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|1 1 0|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x06 << 2 | 0x0, vsqrt_s, vsqrt.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SQuare RooT Single word + +/* +vsqrt.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|1 1 0|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x06 << 2 | 0x1, vsqrt_p, vsqrt.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SQuare RooT Pair word + +/* +vsqrt.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|1 1 0|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x06 << 2 | 0x2, vsqrt_t, vsqrt.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SQuare RooT Triple word + +/* +vsqrt.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|1 1 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x06 << 2 | 0x3, vsqrt_q, vsqrt.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SQuare RooT Quad word + +/* +vasin.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|1 1 1|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x0, vasin_s, vasin.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Arc SINe Single word + +/* +vasin.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|1 1 1|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x1, vasin_p, vasin.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Arc SINe Pair word + +/* +vasin.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|1 1 1|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x2, vasin_t, vasin.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Arc SINe Triple word + +/* +vasin.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 0|1 1 1|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x3, vasin_q, vasin.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Arc SINe Quad word diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt3.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt3.inc new file mode 100644 index 00000000..9dccfb46 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt3.inc @@ -0,0 +1,170 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25--23-----19----16-----------------7--------------0 + | VFPU4 |0 0|0 0 0 1 1| fmt |t| |p| | + ------6-------2-------5------3---1---------------1--------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| fmt + 00 |vnrcp.s| --- |vnsin.s| --- |vrexp2.s|--- | --- | --- | + 01 |vnrcp.p| --- |vnsin.p| --- |vrexp2.p|--- | --- | --- | + 10 |vnrcp.t| --- |vnsin.t| --- |vrexp2.t|--- | --- | --- | + 11 |vnrcp.q| --- |vnsin.q| --- |vrexp2.q|--- | --- | --- | + tp |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + +/* +vnrcp.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 1|0 0 0|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x0, vnrcp_s, vnrcp.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Negative ReCiProcal Single word + +/* +vnrcp.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 1|0 0 0|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x1, vnrcp_p, vnrcp.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Negative ReCiProcal Pair word + +/* +vnrcp.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 1|0 0 0|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x2, vnrcp_t, vnrcp.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Negative ReCiProcal Triple word + +/* +vnrcp.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 1|0 0 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x3, vnrcp_q, vnrcp.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Negative ReCiProcal Quad word + +/* +vnsin.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 1|0 1 0|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x0, vnsin_s, vnsin.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Negative SINe Single word + +/* +vnsin.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 1|0 1 0|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x1, vnsin_p, vnsin.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Negative SINe Pair word + +/* +vnsin.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 1|0 1 0|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x2, vnsin_t, vnsin.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Negative SINe Triple word + +/* +vnsin.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 1|0 1 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x3, vnsin_q, vnsin.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Negative SINe Quad word + +/* +vrexp2.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 1|1 0 0|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x0, vrexp2_s, vrexp2.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Reciprocal EXPonential base 2 Single word + +/* +vrexp2.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 1|1 0 0|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x1, vrexp2_p, vrexp2.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Reciprocal EXPonential base 2 Pair word + +/* +vrexp2.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 1|1 0 0|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x2, vrexp2_t, vrexp2.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Reciprocal EXPonential base 2 Triple word + +/* +vrexp2.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 0|1 1|1 0 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x3, vrexp2_q, vrexp2.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Reciprocal EXPonential base 2 Quad word diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt8.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt8.inc new file mode 100644 index 00000000..8eb83048 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt8.inc @@ -0,0 +1,236 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25--23-----19----16-----------------7--------------0 + | VFPU4 |0 0|0 1 0 0 0| fmt |t| |p| | + ------6-------2------5-------3---1---------------1--------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| fmt + 00 | --- | --- | --- | --- | vocp.s|vsocp.s| --- | --- | + 01 | --- | --- |vbfy1.p| --- | vocp.p|vsocp.p| vfad.p| vavg.p| + 10 | --- | --- | --- | --- | vocp.t| --- | vfad.t| vavg.t| + 11 |vsrt1.q|vsrt2.q|vbfy1.q|vbfy2.q| vocp.q| --- | vfad.q| vavg.q| + tp |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + +/* +vsrt1.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 0|0 0 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x3, vsrt1_q, vsrt1.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SoRT 1 Quad word + +/* +vsrt2.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 0|0 0 1|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x3, vsrt2_q, vsrt2.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SoRT 2 Quad word + +/* +vbfy1.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 0|0 1 0|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x1, vbfy1_p, vbfy1.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ButterFlY 1 Pair word + +/* +vbfy1.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 0|0 1 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x3, vbfy1_q, vbfy1.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ButterFlY 1 Quad word + +/* +vbfy2.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 0|0 1 1|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x3, vbfy2_q, vbfy2.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // ButterFlY 2 Quad word + +/* +vocp.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 0|1 0 0|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x0, vocp_s, vocp.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // One's Complement Single word + +/* +vocp.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 0|1 0 0|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x1, vocp_p, vocp.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // One's Complement Pair word + +/* +vocp.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 0|1 0 0|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x2, vocp_t, vocp.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // One's Complement Triple word + +/* +vocp.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 0|1 0 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x3, vocp_q, vocp.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // One's Complement Quad word + +/* +vsocp.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 0|1 0 1|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x05 << 2 | 0x0, vsocp_s, vsocp.s, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Saturate and One's Complement Single word + +/* +vsocp.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 0|1 0 1|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x05 << 2 | 0x1, vsocp_p, vsocp.p, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Saturate and One's Complement Pair word + +/* +vfad.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 0|1 1 0|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x06 << 2 | 0x1, vfad_p, vfad.p, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Funnel Add Pair word + +/* +vfad.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 0|1 1 0|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x06 << 2 | 0x2, vfad_t, vfad.t, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Funnel Add Triple word + +/* +vfad.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 0|1 1 0|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x06 << 2 | 0x3, vfad_q, vfad.q, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Funnel Add Quad word + +/* +vavg.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 0|1 1 1|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x1, vavg_p, vavg.p, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Average Pair word + +/* +vavg.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 0|1 1 1|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x2, vavg_t, vavg.t, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Average Triple word + +/* +vavg.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 0|1 1 1|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x3, vavg_q, vavg.q, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Average Quad word diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt9.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt9.inc new file mode 100644 index 00000000..5cbb8b27 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_fmt9.inc @@ -0,0 +1,92 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25--23-----19----16-----------------7--------------0 + | VFPU4 |0 0|0 1 0 0 1| fmt |t| |p| | + ------6-------2------5-------3---1---------------1--------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| fmt + 00 | --- | --- | vsgn.s| --- | --- | --- | --- | --- | + 01 | --- | --- | vsgn.p| --- | --- | --- | --- | --- | + 10 | --- | --- | vsgn.t| --- | --- | --- | --- | --- | + 11 |vsrt3.q|vsrt4.q| vsgn.q| --- | --- | --- | --- | --- | + tp |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + +/* +vsrt3.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 1|0 0 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x3, vsrt3_q, vsrt3.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SoRT 3 Quad word + +/* +vsrt4.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 1|0 0 1|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x3, vsrt4_q, vsrt4.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SoRT 4 Quad word + +/* +vsgn.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 1|0 1 0|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x0, vsgn_s, vsgn.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SiGN Single word + +/* +vsgn.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 1|0 1 0|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x1, vsgn_p, vsgn.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SiGN Pair word + +/* +vsgn.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 1|0 1 0|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x2, vsgn_t, vsgn.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SiGN Triple word + +/* +vsgn.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 1 0|0 1|0 1 0|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x3, vsgn_q, vsgn.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // SiGN Quad word diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_rnd.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_rnd.inc new file mode 100644 index 00000000..0db1497f --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt0_rnd.inc @@ -0,0 +1,183 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25--23-----19----16-----------------7--------------0 + | VFPU4 |0 0|0 0 1 0 0| fmt |t| |p| | + ------6-------2------5-------3---1---------------1--------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| fmt + 00 |vrnds.s|vrndi.s|vrndf1.s|vrndf2.s|--- |--- | --- | --- | + 01 | --- |vrndi.p|vrndf1.p|vrndf2.p|--- |--- | --- | --- | + 10 | --- |vrndi.t|vrndf1.t|vrndf2.t|--- |--- | --- | --- | + 11 | --- |vrndi.q|vrndf1.q|vrndf2.q|--- |--- | --- | --- | + tp |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + +/* +vrnds.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|0 0|0 0 0|0| vs |0|0 0 0 0 0 0 0| + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x0, vrnds_s, vrnds.s, + .operands={RAB_OPERAND_r4000allegrex_s_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // RaNDom Seed Single word + +/* +vrndi.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|0 0|0 0 1|0|0 0 0 0 0 0 0|0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x0, vrndi_s, vrndi.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // RaNDom Integer Single word + +/* +vrndi.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|0 0|0 0 1|0|0 0 0 0 0 0 0|1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x1, vrndi_p, vrndi.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // RaNDom Integer Pair word + +/* +vrndi.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|0 0|0 0 1|1|0 0 0 0 0 0 0|0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x2, vrndi_t, vrndi.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // RaNDom Integer Triple word + +/* +vrndi.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|0 0|0 0 1|1|0 0 0 0 0 0 0|1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x3, vrndi_q, vrndi.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // RaNDom Integer Quad word + +/* +vrndf1.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|0 0|0 1 0|0|0 0 0 0 0 0 0|0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x0, vrndf1_s, vrndf1.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // RaNDom Floating Single word + +/* +vrndf1.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|0 0|0 1 0|0|0 0 0 0 0 0 0|1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x1, vrndf1_p, vrndf1.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // RaNDom Floating Pair word + +/* +vrndf1.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|0 0|0 1 0|1|0 0 0 0 0 0 0|0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x2, vrndf1_t, vrndf1.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // RaNDom Floating Triple word + +/* +vrndf1.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|0 0|0 1 0|1|0 0 0 0 0 0 0|1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x3, vrndf1_q, vrndf1.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // RaNDom Floating Quad word + +/* +vrndf2.s + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|0 0|0 1 1|0|0 0 0 0 0 0 0|0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x0, vrndf2_s, vrndf2.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // RaNDom Floating Pair word + +/* +vrndf2.p + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|0 0|0 1 1|0|0 0 0 0 0 0 0|1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x1, vrndf2_p, vrndf2.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // RaNDom Floating Pair word + +/* +vrndf2.t + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|0 0|0 1 1|1|0 0 0 0 0 0 0|0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x2, vrndf2_t, vrndf2.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // RaNDom Floating Quad word + +/* +vrndf2.q + 31--------26-25-24--21--19----16---14----------8---6------------0 + | VFPU4 |0 0|0 0 1|0 0|0 1 1|1|0 0 0 0 0 0 0|1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x3, vrndf2_q, vrndf2.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // RaNDom Floating Quad word diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt2.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt2.inc new file mode 100644 index 00000000..6679c445 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt2.inc @@ -0,0 +1,275 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25-----21------------------------------------------0 + | VFPU4 |1 0| fmt | |t| |p| | + ------6-------2----3--------------------------------------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| fmt + 00 |vf2in.s|vf2iz.s|vf2iu.s|vf2id.s| vi2f.s| *1 | --- | --- | + 01 |vf2in.p|vf2iz.p|vf2iu.p|vf2id.p| vi2f.p| *1 | --- | --- | + 10 |vf2in.t|vf2iz.t|vf2iu.t|vf2id.t| vi2f.t| *1 | --- | --- | + 11 |vf2in.q|vf2iz.q|vf2iu.q|vf2id.q| vi2f.q| *1 | --- | --- | + tp |-------|-------|-------|-------|-------|-------|-------|-------| + *1 = See CNDMOVE table +*/ + +/* +vf2in.s + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|0 0 0| imm5 |0| vs |0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x0 << 2 | 0x0, vf2in_s, vf2in.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Round to nearest integer from float with Scaling Single Word + +/* +vf2in.p + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|0 0 0| imm5 |0| vs |1| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x0 << 2 | 0x1, vf2in_p, vf2in.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Round to nearest integer from float with Scaling Single Pair + +/* +vf2in.t + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|0 0 0| imm5 |1| vs |0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x0 << 2 | 0x2, vf2in_t, vf2in.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Round to nearest integer from float with Scaling Single Triple + +/* +vf2in.q + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|0 0 0| imm5 |1| vs |0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x0 << 2 | 0x3, vf2in_q, vf2in.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Round to nearest integer from float with Scaling Single Quad + +/* +vf2iz.s + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|0 0 1| imm5 |0| vs |0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x1 << 2 | 0x0, vf2iz_s, vf2iz.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Round to zero integer from float with Scaling Single Word + +/* +vf2iz.p + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|0 0 1| imm5 |0| vs |1| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x1 << 2 | 0x1, vf2iz_p, vf2iz.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Round to zero integer from float with Scaling Single Pair + +/* +vf2iz.t + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|0 0 1| imm5 |1| vs |0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x1 << 2 | 0x2, vf2iz_t, vf2iz.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Round to zero integer from float with Scaling Single Triple + +/* +vf2iz.q + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|0 0 1| imm5 |1| vs |0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x1 << 2 | 0x3, vf2iz_q, vf2iz.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Round to zero integer from float with Scaling Single Quad + +/* +vf2iu.s + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|0 1 0| imm5 |0| vs |0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x2 << 2 | 0x0, vf2iu_s, vf2iu.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Round to smallest integer from float with Scaling Single Word + +/* +vf2iu.p + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|0 1 0| imm5 |0| vs |1| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x2 << 2 | 0x1, vf2iu_p, vf2iu.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Round to smallest integer from float with Scaling Single Pair + +/* +vf2iu.t + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|0 1 0| imm5 |1| vs |0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x2 << 2 | 0x2, vf2iu_t, vf2iu.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Round to smallest integer from float with Scaling Single Triple + +/* +vf2iu.q + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|0 1 0| imm5 |1| vs |0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x2 << 2 | 0x3, vf2iu_q, vf2iu.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Round to smallest integer from float with Scaling Single Quad + +/* +vf2id.s + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|0 1 1| imm5 |0| vs |0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x3 << 2 | 0x0, vf2id_s, vf2id.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Round to largest integer from float with Scaling Single Word + +/* +vf2id.p + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|0 1 1| imm5 |0| vs |1| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x3 << 2 | 0x1, vf2id_p, vf2id.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Round to largest integer from float with Scaling Single Pair + +/* +vf2id.t + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|0 1 1| imm5 |1| vs |0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x3 << 2 | 0x2, vf2id_t, vf2id.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Round to largest integer from float with Scaling Single Triple + +/* +vf2id.q + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|0 1 1| imm5 |1| vs |0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x3 << 2 | 0x3, vf2id_q, vf2id.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Round to largest integer from float with Scaling Single Quad + +/* +vi2f.s + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|1 0 0| imm5 |0| vs |0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x4 << 2 | 0x0, vi2f_s, vi2f.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert integer to float with Scaling Single Word + +/* +vi2f.p + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|1 0 0| imm5 |0| vs |1| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x4 << 2 | 0x1, vi2f_p, vi2f.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert integer to float with Scaling Single Pair + +/* +vi2f.t + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|1 0 0| imm5 |1| vs |0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x4 << 2 | 0x2, vi2f_t, vi2f.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert integer to float with Scaling Single Triple + +/* +vi2f.q + 31--------26-25-24--21-20-----16---14----------8---6------------0 + | VFPU4 |1 0|1 0 0| imm5 |1| vs |0| vd | + ------6-------2----3-------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x4 << 2 | 0x3, vi2f_q, vi2f.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_power_of_two}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert integer to float with Scaling Single Quad diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt2_cndmove.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt2_cndmove.inc new file mode 100644 index 00000000..d6911394 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu4_fmt2_cndmove.inc @@ -0,0 +1,118 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25-----21--19-------15--------------7--------------0 + | VFPU4 |1 0|1 0 1|fmt| |t| |p| | + ------6-------2----3----2--------1---------------1--------------- + |-------00------|-------01------|-------10------|-------11------| fmt + 00 | vcmovt.s | vcmovf.s | --- | --- | + 01 | vcmovt.p | vcmovf.p | --- | --- | + 10 | vcmovt.q | vcmovf.q | --- | --- | + 11 | vcmovt.t | vcmovf.t | --- | --- | + tp |---------------|---------------|---------------|---------------| +*/ + +/* +vcmovt.s + 31--------26-25-24--21--19-18-16---14----------8---6------------0 + | VFPU4 |1 0|1 0 1|0 0| imm3|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x0 << 2 | 0x0, vcmovt_s, vcmovt.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_vfpu_cc_bit}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Conditional Move on True Single Word + +/* +vcmovt.p + 31--------26-25-24--21--19-18-16---14----------8---6------------0 + | VFPU4 |1 0|1 0 1|0 0| imm3|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x0 << 2 | 0x1, vcmovt_p, vcmovt.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_vfpu_cc_bit}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Conditional Move on True Single Pair + +/* +vcmovt.t + 31--------26-25-24--21--19-18-16---14----------8---6------------0 + | VFPU4 |1 0|1 0 1|0 0| imm3|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x0 << 2 | 0x2, vcmovt_t, vcmovt.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_vfpu_cc_bit}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Conditional Move on True Single Triple + +/* +vcmovt.q + 31--------26-25-24--21--19-18-16---14----------8---6------------0 + | VFPU4 |1 0|1 0 1|0 0| imm3|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x0 << 2 | 0x3, vcmovt_q, vcmovt.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_vfpu_cc_bit}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Conditional Move on True Single Quad + +/* +vcmovf.s + 31--------26-25-24--21--19-18-16---14----------8---6------------0 + | VFPU4 |1 0|1 0 1|0 1| imm3|0| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x1 << 2 | 0x0, vcmovf_s, vcmovf.s, + .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_vfpu_cc_bit}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Conditional Move on False Single Word + +/* +vcmovf.p + 31--------26-25-24--21--19-18-16---14----------8---6------------0 + | VFPU4 |1 0|1 0 1|0 1| imm3|0| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x1 << 2 | 0x1, vcmovf_p, vcmovf.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_vfpu_cc_bit}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Conditional Move on False Single Pair + +/* +vcmovf.t + 31--------26-25-24--21--19-18-16---14----------8---6------------0 + | VFPU4 |1 0|1 0 1|0 1| imm3|1| vs |0| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x1 << 2 | 0x2, vcmovf_t, vcmovf.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_vfpu_cc_bit}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Conditional Move on False Single Triple + +/* +vcmovf.q + 31--------26-25-24--21--19-18-16---14----------8---6------------0 + | VFPU4 |1 0|1 0 1|0 1| imm3|1| vs |1| vd | + ------6-------2----3----2----3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x1 << 2 | 0x3, vcmovf_q, vcmovf.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_vfpu_cc_bit}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Conditional Move on False Single Quad diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu5.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu5.inc new file mode 100644 index 00000000..cce97238 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu5.inc @@ -0,0 +1,77 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25-23----------------------------------------------0 + | VFPU5 | fmt | | + ------6--------3------------------------------------------------- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| fmt + | vpfxs | --- | vpfxt | --- | vpfxd | --- | viim.s| vfim.s| + |-------|-------|-------|-------|-------|-------|-------|-------| + *1 See fmt3 table +*/ + +/* +vpfxs + 31--------26-25-23-------19-------------------------------------0 + | VFPU5 |0 0 0| | | + ------6--------3-----------------------------20------------------- +*/ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x00, vpfxs, + .operands={RAB_OPERAND_r4000allegrex_rpx, RAB_OPERAND_r4000allegrex_rpy, RAB_OPERAND_r4000allegrex_rpz, RAB_OPERAND_r4000allegrex_rpw}, + .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN + ) // Source Prefix + +/* +vpfxt + 31--------26-25-23-------19-------------------------------------0 + | VFPU5 |0 1 0| | | + ------6--------3----------------------------20------------------- +*/ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x02, vpfxt, + .operands={RAB_OPERAND_r4000allegrex_rpx, RAB_OPERAND_r4000allegrex_rpy, RAB_OPERAND_r4000allegrex_rpz, RAB_OPERAND_r4000allegrex_rpw}, + .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN + ) // Target Prefix + +/* +vpfxd + 31--------26----23-------19-------------------------------------0 + | VFPU5 |1 0 0| | | + ------6--------3----------------------------20------------------- +*/ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x04, vpfxd, + .operands={RAB_OPERAND_r4000allegrex_wpx, RAB_OPERAND_r4000allegrex_wpy, RAB_OPERAND_r4000allegrex_wpz, RAB_OPERAND_r4000allegrex_wpw}, + .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN + ) // Destination Prefix + +/* +viim.s + 31--------26-25-23-22---------16-15-----------------------------0 + | VFPU5 |1 1 0| vt | imm16 | + ------6--------3---------7-----------------------16-------------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x6, viim_s, viim.s, + .operands={RAB_OPERAND_r4000allegrex_s_vt, RAB_OPERAND_r4000allegrex_int16}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert integer immediate to float Single Word + +/* +vfim.s + 31--------26-25-23-22---------16-15-----------------------------0 + | VFPU5 |1 1 1| vt | imm16 | + ------6--------3---------7-----------------------16-------------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x7, vfim_s, vfim.s, + .operands={RAB_OPERAND_r4000allegrex_s_vt, RAB_OPERAND_r4000allegrex_float16}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Convert integer immediate to float Single Word diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu6.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu6.inc new file mode 100644 index 00000000..15cca9c8 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu6.inc @@ -0,0 +1,197 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25-23---------------15--------------7--------------0 + | VFPU6 | fmt | |t| |p| | + ------6--------3-----------------1---------------1--------------- + |---000--|---001--|---010--|---011--|---100--|---101--|---110--|---111--| fmt + 00| --- |vhtfm2.p| --- | --- | --- | --- | --- | *1 | + 01| vmmul.p| vtfm2.p|vhtfm3.t| --- | vmscl.p| --- | --- | *1 | + 10| vmmul.t| --- | vtfm3.t|vhtfm4.q| vmscl.t| vcrsp.t| --- | *1 | + 11| vmmul.q| --- | --- | vtfm4.q| vmscl.q| vqmul.q| --- | *1 | + tp|--------|--------|--------|--------|--------|--------|--------|--------| + *1 See fmt7 table +*/ + +/* +vmmul.p + 31--------26-25----22---------16---14----------8---6------------0 + | VFPU6 |0 0 0| vt |0| vs^t |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x1, vmmul_p, vmmul.p, + .operands={RAB_OPERAND_r4000allegrex_mp_vd, RAB_OPERAND_r4000allegrex_mp_vs_transpose, RAB_OPERAND_r4000allegrex_mp_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Multiply Pair x Pair Matrix + +/* +vmmul.t + 31--------26-25----22---------16---14----------8---6------------0 + | VFPU6 |0 0 0| vt |1| vs^t |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x2, vmmul_t, vmmul.t, + .operands={RAB_OPERAND_r4000allegrex_mt_vd, RAB_OPERAND_r4000allegrex_mt_vs_transpose, RAB_OPERAND_r4000allegrex_mt_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Multiply Triple x Triple Matrix + +/* +vmmul.q + 31--------26-25----22---------16---14----------8---6------------0 + | VFPU6 |0 0 0| vt |1| vs^t |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x3, vmmul_q, vmmul.q, + .operands={RAB_OPERAND_r4000allegrex_mq_vd, RAB_OPERAND_r4000allegrex_mq_vs_transpose, RAB_OPERAND_r4000allegrex_mq_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Multiply Quad x Quad Matrix + +/* +vhtfm2.p + 31--------26-25----22---------16---14----------8---6------------0 + | VFPU6 |0 0 1| vt |0| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x0, vhtfm2_p, vhtfm2.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_mp_vs, RAB_OPERAND_r4000allegrex_p_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Homogeneous Transform 2 Pair Word + +/* +vtfm2.p + 31--------26-25----22---------16---14----------8---6------------0 + | VFPU6 |0 0 1| vt |0| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x1, vtfm2_p, vtfm2.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_mp_vs, RAB_OPERAND_r4000allegrex_p_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Transform 2 Pair Word + +/* +vhtfm3.t + 31--------26-25----22---------16---14----------8---6------------0 + | VFPU6 |0 1 0| vt |0| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x1, vhtfm3_t, vhtfm3.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_mt_vs, RAB_OPERAND_r4000allegrex_t_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Homogeneous Transform 3 Triple Word + +/* +vtfm3.t + 31--------26-25----22---------16---14----------8---6------------0 + | VFPU6 |0 1 0| vt |1| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x02 << 2 | 0x2, vtfm3_t, vtfm3.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_mt_vs, RAB_OPERAND_r4000allegrex_t_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Transform 3 Triple Word + +/* +vhtfm4.q + 31--------26-25----22---------16---14----------8---6------------0 + | VFPU6 |0 1 1| vt |1| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x2, vhtfm4_q, vhtfm4.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_mq_vs, RAB_OPERAND_r4000allegrex_q_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Homogeneous Transform 4 Quad Word + +/* +vtfm4.q + 31--------26-25----22---------16---14----------8---6------------0 + | VFPU6 |0 1 1| vt |1| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x3, vtfm4_q, vtfm4.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_mq_vs, RAB_OPERAND_r4000allegrex_q_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Transform 4 Quad Word + +/* +vmscl.p + 31--------26-25----22---------16---14----------8---6------------0 + | VFPU6 |1 0 0| vt |0| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x1, vmscl_p, vmscl.p, + .operands={RAB_OPERAND_r4000allegrex_mp_vd, RAB_OPERAND_r4000allegrex_mp_vs, RAB_OPERAND_r4000allegrex_s_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Scale Pair x Pair Matrix + +/* +vmscl.t + 31--------26-25----22---------16---14----------8---6------------0 + | VFPU6 |1 0 0| vt |1| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x2, vmscl_t, vmscl.t, + .operands={RAB_OPERAND_r4000allegrex_mt_vd, RAB_OPERAND_r4000allegrex_mt_vs, RAB_OPERAND_r4000allegrex_s_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Scale Triple x Triple Matrix + +/* +vmscl.q + 31--------26-25----22---------16---14----------8---6------------0 + | VFPU6 |1 0 0| vt |1| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x04 << 2 | 0x3, vmscl_q, vmscl.q, + .operands={RAB_OPERAND_r4000allegrex_mq_vd, RAB_OPERAND_r4000allegrex_mq_vs, RAB_OPERAND_r4000allegrex_s_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Scale Quad x Quad Matrix + +/* +vcrsp.t + 31--------26-25----22---------16---14----------8---6------------0 + | VFPU6 |1 0 1| vt |1| vs |0| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x05 << 2 | 0x2, vcrsp_t, vcrsp.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Cross Product Triple Word + +/* +vqmul.q + 31--------26-25----22---------16---14----------8---6------------0 + | VFPU6 |1 0 1| vt |1| vs |1| vd | + ------6--------3---------7-------1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x05 << 2 | 0x3, vqmul_q, vqmul.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vs, RAB_OPERAND_r4000allegrex_q_vt}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Quaternion Multiply Quad Word diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu6_fmt7.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu6_fmt7.inc new file mode 100644 index 00000000..5eaa7ffc --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu6_fmt7.inc @@ -0,0 +1,54 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26--------21-----------15--------------7--------------0 + | VFPU6 |1 1 1|fmt| |t| |p| | + ------6--------3----2------------1---------------1--------------- + |-------00------|-------01------|-------10------|-------11------| fmt + 00| *1 | --- | --- | --- | + 01| *1 | vrot.p | --- | --- | + 10| *1 | vrot.t | --- | --- | + 11| *1 | vrot.q | --- | --- | + tp|---------------|---------------|---------------|---------------| + *1 See fmt7 table +*/ + +/* +vrot.p + 31--------26-25-----21-20-----16---14----------8---6------------0 + | VFPU6 |1 1 1|0 1| imm5 |0| vs |1| vd | + ------6--------3----2------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x1, vrot_p, vrot.p, + .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_p_vrot_code}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Rotator Pair word + +/* +vrot.t + 31--------26-25-----21-20-----16---14----------8---6------------0 + | VFPU6 |1 1 1|0 1| imm5 |1| vs |0| vd | + ------6--------3----2------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x2, vrot_t, vrot.t, + .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_t_vrot_code}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Rotator Triple word + +/* +vrot.q + 31--------26-25-----21-20-----16---14----------8---6------------0 + | VFPU6 |1 1 1|0 1| imm5 |1| vs |1| vd | + ------6--------3----2------5-----1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x01 << 2 | 0x3, vrot_q, vrot.q, + .operands={RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_q_vrot_code}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Rotator Quad word diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu6_fmt7_fmt0.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu6_fmt7_fmt0.inc new file mode 100644 index 00000000..52c8ffa4 --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu6_fmt7_fmt0.inc @@ -0,0 +1,171 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26---------------18-16-15--------------7--------------0 + | VFPU6 |1 1 1|0 0| | fmt |t| |p| | + ------6--------3----2--------3---1---------------1--------------- + |---000--|---001--|---010--|---011--|---100--|---101--|---110--|---111--| fmt + 00| --- | --- | --- | --- | --- | --- | --- | --- | + 01| vmmov.p| --- | --- | vmidt.p| --- | --- |vmzero.p| vmone.p| + 10| vmmov.t| --- | --- | vmidt.t| --- | --- |vmzero.t| vmone.t| + 11| vmmov.q| --- | --- | vmidt.q| --- | --- |vmzero.q| vmone.q| + tp|--------|--------|--------|--------|--------|--------|--------|--------| +*/ + +/* +vmmov.p + 31--------26-25------------18-16---14----------8---6------------0 + | VFPU6 |1 1 1|0 0|0 0|0 0 0|0| vs |1| vd | + ------6----------------------3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x1, vmmov_p, vmmov.p, + .operands={RAB_OPERAND_r4000allegrex_mp_vd, RAB_OPERAND_r4000allegrex_mp_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Move Pair x Pair Matrix + +/* +vmmov.t + 31--------26-25------------18-16---14----------8---6------------0 + | VFPU6 |1 1 1|0 0|0 0|0 0 0|1| vs |0| vd | + ------6----------------------3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x2, vmmov_t, vmmov.t, + .operands={RAB_OPERAND_r4000allegrex_mt_vd, RAB_OPERAND_r4000allegrex_mt_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Move Triple x Triple Matrix + +/* +vmmov.q + 31--------26-25------------18-16---14----------8---6------------0 + | VFPU6 |1 1 1|0 0|0 0|0 0 0|1| vs |1| vd | + ------6----------------------3---1-------7-------1-------7------- +*/ + + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x00 << 2 | 0x3, vmmov_q, vmmov.q, + .operands={RAB_OPERAND_r4000allegrex_mq_vd, RAB_OPERAND_r4000allegrex_mq_vs}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Move Quad x Quad Matrix + +/* +vmidt.p + 31--------26-25------------18-16---14----------8---6------------0 + | VFPU6 |1 1 1|0 0|0 0|0 1 1|0|0 0 0 0 0 0 0|1| vd | + ------6----------------------3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x1, vmidt_p, vmidt.p, + .operands={RAB_OPERAND_r4000allegrex_mp_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Identity Pair x Pair Matrix + +/* +vmidt.t + 31--------26-25------------18-16---14----------8---6------------0 + | VFPU6 |1 1 1|0 0|0 0|0 1 1|1|0 0 0 0 0 0 0|0| vd | + ------6----------------------3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x2, vmidt_t, vmidt.t, + .operands={RAB_OPERAND_r4000allegrex_mt_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Identity Triple x Triple Matrix + +/* +vmidt.q + 31--------26-25------------18-16---14----------8---6------------0 + | VFPU6 |1 1 1|0 0|0 0|0 1 1|1|0 0 0 0 0 0 0|1| vd | + ------6----------------------3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x03 << 2 | 0x3, vmidt_q, vmidt.q, + .operands={RAB_OPERAND_r4000allegrex_mq_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Identity Quad x Quad Matrix + +/* +vmzero.p + 31--------26-25------------18-16---14----------8---6------------0 + | VFPU6 |1 1 1|0 0|0 0|1 1 0|0|0 0 0 0 0 0 0|1| vd | + ------6----------------------3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x06 << 2 | 0x1, vmzero_p, vmzero.p, + .operands={RAB_OPERAND_r4000allegrex_mp_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Zero Pair x Pair Matrix + +/* +vmzero.t + 31--------26-25------------18-16---14----------8---6------------0 + | VFPU6 |1 1 1|0 0|0 0|1 1 0|1|0 0 0 0 0 0 0|0| vd | + ------6----------------------3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x06 << 2 | 0x2, vmzero_t, vmzero.t, + .operands={RAB_OPERAND_r4000allegrex_mt_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Zero Triple x Triple Matrix + +/* +vmzero.q + 31--------26-25------------18-16---14----------8---6------------0 + | VFPU6 |1 1 1|0 0|0 0|1 1 0|1|0 0 0 0 0 0 0|1| vd | + ------6----------------------3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x06 << 2 | 0x3, vmzero_q, vmzero.q, + .operands={RAB_OPERAND_r4000allegrex_mq_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // Zero Quad x Quad Matrix + +/* +vmone.p + 31--------26-25------------18-16---14----------8---6------------0 + | VFPU6 |1 1 1|0 0|0 0|1 1 1|0|0 0 0 0 0 0 0|1| vd | + ------6----------------------3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x1, vmone_p, vmone.p, + .operands={RAB_OPERAND_r4000allegrex_mp_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // One Pair x Pair Matrix + +/* +vmone.t + 31--------26-25------------18-16---14----------8---6------------0 + | VFPU6 |1 1 1|0 0|0 0|1 1 1|1|0 0 0 0 0 0 0|0| vd | + ------6----------------------3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x2, vmone_t, vmone.t, + .operands={RAB_OPERAND_r4000allegrex_mt_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // One Triple x Triple Matrix + +/* +vmone.q + 31--------26-25------------18-16---14----------8---6------------0 + | VFPU6 |1 1 1|0 0|0 0|1 1 1|1|0 0 0 0 0 0 0|1| vd | + ------6----------------------3---1-------7-------1-------7------- +*/ + + RABBITIZER_DEF_INSTR_ID_ALTNAME( + r4000allegrex, 0x07 << 2 | 0x3, vmone_q, vmone.q, + .operands={RAB_OPERAND_r4000allegrex_mq_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R + ) // One Quad x Quad Matrix diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu7.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu7.inc new file mode 100644 index 00000000..1a5223ed --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_vfpu7.inc @@ -0,0 +1,41 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* +vnop + 31--------26-25-------------------------------------------------0 + | VFPU7 |1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0| + ------6-------------------------------26------------------------- +*/ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x3FF0000, vnop, + .operands={0}, + .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN + ) // Nop + +/* +vsync + 31--------26-25-------------------------------------------------0 + | VFPU7 |1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0| + ------6-------------------------------26------------------------- +*/ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x3FF0320, vsync, + .operands={0}, + .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN + ) // Synchronize + +/* +vflush + 31--------26-25-------------------------------------------------0 + | VFPU7 |1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 1 0 0 0 0 0 0 1 1 0 1| + ------6-------------------------------26------------------------- +*/ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x3FF040D, vflush, + .operands={0}, + .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN + ) // Flush Write Buffer diff --git a/tables/tables/instr_id/r5900/r5900_cop0_tlb.inc b/tables/tables/instr_id/r5900/r5900_cop0_tlb.inc index 12aef5bf..03d44082 100644 --- a/tables/tables/instr_id/r5900/r5900_cop0_tlb.inc +++ b/tables/tables/instr_id/r5900/r5900_cop0_tlb.inc @@ -6,14 +6,14 @@ | = COP0 | TLB | | fmt | ------6----------5----------------------------------------------- |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo -000 | --- | TLBR | TLBWI | --- | --- | --- | TLBWR | --- | -001 | TLBP | --- | --- | --- | --- | --- | --- | --- | -010 | --- | --- | --- | --- | --- | --- | --- | --- | -011 | ERET | --- | --- | --- | --- | --- | --- | --- | -100 | --- | --- | --- | --- | --- | --- | --- | --- | -101 | --- | --- | --- | --- | --- | --- | --- | --- | -110 | --- | --- | --- | --- | --- | --- | --- | --- | -111 | EI | DI | --- | --- | --- | --- | --- | --- | +000 | --- | TLBR | TLBWI | --- | --- | --- | TLBWR | --- | +001 | TLBP | --- | --- | --- | --- | --- | --- | --- | +010 | --- | --- | --- | --- | --- | --- | --- | --- | +011 | ERET | --- | --- | --- | --- | --- | --- | --- | +100 | --- | --- | --- | --- | --- | --- | --- | --- | +101 | --- | --- | --- | --- | --- | --- | --- | --- | +110 | --- | --- | --- | --- | --- | --- | --- | --- | +111 | EI | DI | --- | --- | --- | --- | --- | --- | hi |-------|-------|-------|-------|-------|-------|-------|-------| */ diff --git a/tables/tables/instr_id/r5900/r5900_cop1_fpu_s.inc b/tables/tables/instr_id/r5900/r5900_cop1_fpu_s.inc index fcf29884..7fac92f6 100644 --- a/tables/tables/instr_id/r5900/r5900_cop1_fpu_s.inc +++ b/tables/tables/instr_id/r5900/r5900_cop1_fpu_s.inc @@ -7,13 +7,13 @@ ------6----------5-----------------------------------------6----- |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo 000 | ADD.S | SUB.S | MUL.S | DIV.S | SQRT.S| ABS.S | MOV.S | NEG.S | -001 | --- | --- | --- | --- | --- | --- | --- | --- | -010 | --- | --- | --- | --- | --- | --- |RSQRT.S| --- | -011 | ADDA.S| SUBA.S| MULA.S| --- | MADD.S| MSUB.S|MADDA.S|MSUBA.S| -100 | --- | --- | --- | --- | CVT.W | --- | --- | --- | -101 | MAX.S | MIN.S | --- | --- | --- | --- | --- | --- | -110 | C.F | --- | C.EQ | --- | C.LT | --- | C.LE | --- | -111 | --- | --- | --- | --- | --- | --- | --- | --- | +001 | --- | --- | --- | --- | --- | --- | --- | --- | +010 | --- | --- | --- | --- | --- | --- |RSQRT.S| --- | +011 | ADDA.S| SUBA.S| MULA.S| --- | MADD.S| MSUB.S|MADDA.S|MSUBA.S| +100 | --- | --- | --- | --- | CVT.W | --- | --- | --- | +101 | MAX.S | MIN.S | --- | --- | --- | --- | --- | --- | +110 | C.F | --- | C.EQ | --- | C.LT | --- | C.LE | --- | +111 | --- | --- | --- | --- | --- | --- | --- | --- | hi |-------|-------|-------|-------|-------|-------|-------|-------| */ diff --git a/tables/tables/instr_id/r5900/r5900_cop2.inc b/tables/tables/instr_id/r5900/r5900_cop2.inc index 9ad598cc..24d35125 100644 --- a/tables/tables/instr_id/r5900/r5900_cop2.inc +++ b/tables/tables/instr_id/r5900/r5900_cop2.inc @@ -6,8 +6,8 @@ | = COP2 | fmt | | ------6----------5----------------------------------------------- |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo - 00 | --- | QMFC2 | CFC2 | --- | --- | QMTC2 | CTC2 | --- | - 01 | *1 | --- | --- | --- | --- | --- | --- | --- | + 00 | --- | QMFC2 | CFC2 | --- | --- | QMTC2 | CTC2 | --- | + 01 | *1 | --- | --- | --- | --- | --- | --- | --- | 10 | *2 | *2 | *2 | *2 | *2 | *2 | *2 | *2 | 11 | *2 | *2 | *2 | *2 | *2 | *2 | *2 | *2 | hi |-------|-------|-------|-------|-------|-------|-------|-------| diff --git a/tables/tables/instr_id/r5900/r5900_cop2_bc2.inc b/tables/tables/instr_id/r5900/r5900_cop2_bc2.inc index 0e8c18b5..36168a8b 100644 --- a/tables/tables/instr_id/r5900/r5900_cop2_bc2.inc +++ b/tables/tables/instr_id/r5900/r5900_cop2_bc2.inc @@ -6,10 +6,10 @@ | = COP0 | BC2 | fmt | | ------6----------5----------5------------------------------------ |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo - 00 | BC2F | BC2T | BC2FL | BC2TL | --- | --- | --- | --- | - 01 | --- | --- | --- | --- | --- | --- | --- | --- | - 10 | --- | --- | --- | --- | --- | --- | --- | --- | - 11 | --- | --- | --- | --- | --- | --- | --- | --- | + 00 | BC2F | BC2T | BC2FL | BC2TL | --- | --- | --- | --- | + 01 | --- | --- | --- | --- | --- | --- | --- | --- | + 10 | --- | --- | --- | --- | --- | --- | --- | --- | + 11 | --- | --- | --- | --- | --- | --- | --- | --- | hi |-------|-------|-------|-------|-------|-------|-------|-------| */ diff --git a/tables/tables/instr_id/r5900/r5900_cop2_special1.inc b/tables/tables/instr_id/r5900/r5900_cop2_special1.inc index d3362784..6f37e929 100644 --- a/tables/tables/instr_id/r5900/r5900_cop2_special1.inc +++ b/tables/tables/instr_id/r5900/r5900_cop2_special1.inc @@ -12,8 +12,8 @@ 011 |VMULx |VMULy |VMULz |VMULw |VMULq |VMAXi |VMULi |VMINIi | 100 |VADDq |VMADDq |VADDi |VMADDi |VSUBq |VMSUBq |VSUbi |VMSUBi | 101 |VADD |VMADD |VMUL |VMAX |VSUB |VMSUB |VOPMSUB|VMINI | -110 |VIADD |VISUB |VIADDI | --- |VIAND |VIOR | --- | --- | -111 |VCALLMS|VCALLMSR| --- | --- | *1 | *1 | *1 | *1 | +110 |VIADD |VISUB |VIADDI | --- |VIAND |VIOR | --- | --- | +111 |VCALLMS|VCALLMSR| --- | --- | *1 | *1 | *1 | *1 | hi |-------|-------|-------|-------|-------|-------|-------|-------| *1=see special2 table */ diff --git a/tables/tables/instr_id/r5900/r5900_cop2_special2.inc b/tables/tables/instr_id/r5900/r5900_cop2_special2.inc index 69aa01c1..c78392c9 100644 --- a/tables/tables/instr_id/r5900/r5900_cop2_special2.inc +++ b/tables/tables/instr_id/r5900/r5900_cop2_special2.inc @@ -14,17 +14,17 @@ Note: opcode is flo | ( 0010 |VITOF0 |VITOF4 |VITOF12|VITOF15|VFTOI0 |VFTOI4 |VFTOI12|VFTOI15| 0011 |VMULAx |VMULAy |VMULAz |VMULAw |VMULAq |VABS |VMULAi |VCLIPw | 0100 |VADDAq |VMADDAq|VADDAi |VMADDAi|VSUBAq |VMSUBAq|VSUBAi |VMSUBAi| -0101 |VADDA |VMADDA |VMULA | --- |VSUBA |VMSUBA |VOPMULA|VNOP | -0110 |VMOVE |VMR32 | --- | --- |VLQI |VSQI |VLQD |VSQD | +0101 |VADDA |VMADDA |VMULA | --- |VSUBA |VMSUBA |VOPMULA|VNOP | +0110 |VMOVE |VMR32 | --- | --- |VLQI |VSQI |VLQD |VSQD | 0111 |VDIV |VSQRT |VRSQRT |VWAITQ |VMTIR |VMFIR |VILWR |VISWR | -1000 |VRNEXT |VRGET |VRINIT |VRXOR | --- | --- | --- | --- | -1001 | --- | --- | --- | --- | --- | --- | --- | --- | -1010 | --- | --- | --- | --- | --- | --- | --- | --- | -1011 | --- | --- | --- | --- | --- | --- | --- | --- | -1100 | --- | --- | --- | --- | --- | --- | --- | --- | -1101 | --- | --- | --- | --- | --- | --- | --- | --- | -1110 | --- | --- | --- | --- | --- | --- | --- | --- | -1111 | --- | --- | --- | --- | --- | --- | --- | --- | +1000 |VRNEXT |VRGET |VRINIT |VRXOR | --- | --- | --- | --- | +1001 | --- | --- | --- | --- | --- | --- | --- | --- | +1010 | --- | --- | --- | --- | --- | --- | --- | --- | +1011 | --- | --- | --- | --- | --- | --- | --- | --- | +1100 | --- | --- | --- | --- | --- | --- | --- | --- | +1101 | --- | --- | --- | --- | --- | --- | --- | --- | +1110 | --- | --- | --- | --- | --- | --- | --- | --- | +1111 | --- | --- | --- | --- | --- | --- | --- | --- | hi |-------|-------|-------|-------|-------|-------|-------|-------| */ diff --git a/tables/tables/instr_id/r5900/r5900_mmi.inc b/tables/tables/instr_id/r5900/r5900_mmi.inc index b05d3f80..32668337 100644 --- a/tables/tables/instr_id/r5900/r5900_mmi.inc +++ b/tables/tables/instr_id/r5900/r5900_mmi.inc @@ -6,14 +6,14 @@ | = MMI | | function| ------6----------------------------------------------------6----- |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo -000 | MADD | MADDU | --- | --- | PLZCW | --- | --- | --- | -001 | *1 | *2 | --- | --- | --- | --- | --- | --- | -010 | MFHI1 | MTHI1 | MFLO1 | MTLO1 | --- | --- | --- | --- | -011 | MULT1 | MULTU1| DIV1 | DIVU1 | --- | --- | --- | --- | -100 | MADD1 | MADDU1| --- | --- | --- | --- | --- | --- | -101 | *3 | *4 | --- | --- | --- | --- | --- | --- | -110 | PMFHL | PMTHL | --- | --- | PSLLH | --- | PSRLH | PSRAH | -111 | --- | --- | --- | --- | PSLLW | --- | PSRLW | PSRAW | +000 | MADD | MADDU | --- | --- | PLZCW | --- | --- | --- | +001 | *1 | *2 | --- | --- | --- | --- | --- | --- | +010 | MFHI1 | MTHI1 | MFLO1 | MTLO1 | --- | --- | --- | --- | +011 | MULT1 | MULTU1| DIV1 | DIVU1 | --- | --- | --- | --- | +100 | MADD1 | MADDU1| --- | --- | --- | --- | --- | --- | +101 | *3 | *4 | --- | --- | --- | --- | --- | --- | +110 | PMFHL | PMTHL | --- | --- | PSLLH | --- | PSRLH | PSRAH | +111 | --- | --- | --- | --- | PSLLW | --- | PSRLW | PSRAW | hi |-------|-------|-------|-------|-------|-------|-------|-------| *1 = MMI0 list *2 = MMI2 list *3 = MMI1 list *4 = MMI3 list diff --git a/tables/tables/instr_id/r5900/r5900_mmi_0.inc b/tables/tables/instr_id/r5900/r5900_mmi_0.inc index 1ed1532b..95597fdf 100644 --- a/tables/tables/instr_id/r5900/r5900_mmi_0.inc +++ b/tables/tables/instr_id/r5900/r5900_mmi_0.inc @@ -8,12 +8,12 @@ |---00--|---01--|---10--|---11--| lo 000 |PADDW | PSUBW | PCGTW | PMAXW | 001 |PADDH | PSUBH | PCGTH | PMAXH | -010 |PADDB | PSUBB | PCGTB | --- | -011 | --- | --- | --- | --- | +010 |PADDB | PSUBB | PCGTB | --- | +011 | --- | --- | --- | --- | 100 |PADDSW |PSUBSW |PEXTLW | PPACW | 101 |PADDSH |PSUBSH |PEXTLH | PPACH | 110 |PADDSB |PSUBSB |PEXTLB | PPACB | -111 | --- | --- | PEXT5 | PPAC5 | +111 | --- | --- | PEXT5 | PPAC5 | hi |-------|-------|-------|-------| */ diff --git a/tables/tables/instr_id/r5900/r5900_mmi_1.inc b/tables/tables/instr_id/r5900/r5900_mmi_1.inc index c4734fbd..278212ed 100644 --- a/tables/tables/instr_id/r5900/r5900_mmi_1.inc +++ b/tables/tables/instr_id/r5900/r5900_mmi_1.inc @@ -6,14 +6,14 @@ | | |function | MMI1 | ------6----------------------------------------------------6----- |---00--|---01--|---10--|---11--| lo -000 | --- | PABSW | PCEQW | PMINW | +000 | --- | PABSW | PCEQW | PMINW | 001 |PADSBH | PABSH | PCEQH | PMINH | -010 | --- | --- | PCEQB | --- | -011 | --- | --- | --- | --- | -100 |PADDUW |PSUBUW |PEXTUW | --- | -101 |PADDUH |PSUBUH |PEXTUH | --- | +010 | --- | --- | PCEQB | --- | +011 | --- | --- | --- | --- | +100 |PADDUW |PSUBUW |PEXTUW | --- | +101 |PADDUH |PSUBUH |PEXTUH | --- | 110 |PADDUB |PSUBUB |PEXTUB | QFSRV | -111 | --- | --- | --- | --- | +111 | --- | --- | --- | --- | hi |-------|-------|-------|-------| */ diff --git a/tables/tables/instr_id/r5900/r5900_mmi_2.inc b/tables/tables/instr_id/r5900/r5900_mmi_2.inc index 4140e3d6..613441ed 100644 --- a/tables/tables/instr_id/r5900/r5900_mmi_2.inc +++ b/tables/tables/instr_id/r5900/r5900_mmi_2.inc @@ -6,13 +6,13 @@ | | |function | MMI2 | ------6----------------------------------------------------6----- |---00--|---01--|---10--|---11--| lo -000 |PMADDW | --- |PSLLVW |PSRLVW | -001 |PMSUBW | --- | --- | --- | -010 |PMFHI |PMFLO |PINTH | --- | -011 |PMULTW |PDIVW |PCPYLD | --- | +000 |PMADDW | --- |PSLLVW |PSRLVW | +001 |PMSUBW | --- | --- | --- | +010 |PMFHI |PMFLO |PINTH | --- | +011 |PMULTW |PDIVW |PCPYLD | --- | 100 |PMADDH |PHMADH | PAND | PXOR | -101 |PMSUBH |PHMSBH | --- | --- | -110 | --- | --- | PEXEH | PREVH | +101 |PMSUBH |PHMSBH | --- | --- | +110 | --- | --- | PEXEH | PREVH | 111 |PMULTH |PDIVBW | PEXEW |PROT3W | hi |-------|-------|-------|-------| */ diff --git a/tables/tables/instr_id/r5900/r5900_mmi_3.inc b/tables/tables/instr_id/r5900/r5900_mmi_3.inc index 6341687a..d124f24a 100644 --- a/tables/tables/instr_id/r5900/r5900_mmi_3.inc +++ b/tables/tables/instr_id/r5900/r5900_mmi_3.inc @@ -6,14 +6,14 @@ | | |function | MMI3 | ------6----------------------------------------------------6----- |---00--|---01--|---10--|---11--| lo -000 |PMADDUW| --- | --- |PSRAVW | -001 | --- | --- | --- | --- | -010 |PMTHI | PMTLO |PINTEH | --- | -011 |PMULTUW| PDIVUW|PCPYUD | --- | -100 | --- | --- | POR | PNOR | -101 | --- | --- | --- | --- | -110 | --- | --- | PEXCH | PCPYH | -111 | --- | --- | PEXCW | --- | +000 |PMADDUW| --- | --- |PSRAVW | +001 | --- | --- | --- | --- | +010 |PMTHI | PMTLO |PINTEH | --- | +011 |PMULTUW| PDIVUW|PCPYUD | --- | +100 | --- | --- | POR | PNOR | +101 | --- | --- | --- | --- | +110 | --- | --- | PEXCH | PCPYH | +111 | --- | --- | PEXCW | --- | hi |-------|-------|-------|-------| */ diff --git a/tables/tables/instr_id/r5900/r5900_normal.inc b/tables/tables/instr_id/r5900/r5900_normal.inc index 5651292c..ecdd2ee2 100644 --- a/tables/tables/instr_id/r5900/r5900_normal.inc +++ b/tables/tables/instr_id/r5900/r5900_normal.inc @@ -9,7 +9,7 @@ 000 | *1 | *2 | J | JAL | BEQ | BNE | BLEZ | BGTZ | 001 | ADDI | ADDIU | SLTI | SLTIU | ANDI | ORI | XORI | LUI | 010 | *3 | *4 | *5 | --- | BEQL | BNEL | BLEZL | BGTZL | -011 | DADDI |DADDIU | LDL | LDR | *6 | --- | LQ | SQ | +011 | DADDI |DADDIU | LDL | LDR | *6 | --- | LQ | SQ | 100 | LB | LH | LWL | LW | LBU | LHU | LWR | LWU | 101 | SB | SH | SWL | SW | SDL | SDR | SWR | CACHE | 110 | --- | LWC1 | --- | PREF | --- | --- | LQC2 | LD | diff --git a/tables/tables/instr_id/r5900/r5900_regimm.inc b/tables/tables/instr_id/r5900/r5900_regimm.inc index 454948c3..1d8c4ffc 100644 --- a/tables/tables/instr_id/r5900/r5900_regimm.inc +++ b/tables/tables/instr_id/r5900/r5900_regimm.inc @@ -6,10 +6,10 @@ | = REGIMM | | rt | | ------6---------------------5------------------------------------ |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo - 00 | BLTZ | BGEZ | BLTZL | BGEZL | --- | --- | --- | --- | - 01 | TGEI | TGEIU | TLTI | TLTIU | TEQI | --- | TNEI | --- | - 10 | BLTZAL| BGEZAL|BLTZALL|BGEZALL| --- | --- | --- | --- | - 11 | MTSAB | MTSAH | --- | --- | --- | --- | --- | --- | + 00 | BLTZ | BGEZ | BLTZL | BGEZL | --- | --- | --- | --- | + 01 | TGEI | TGEIU | TLTI | TLTIU | TEQI | --- | TNEI | --- | + 10 | BLTZAL| BGEZAL|BLTZALL|BGEZALL| --- | --- | --- | --- | + 11 | MTSAB | MTSAH | --- | --- | --- | --- | --- | --- | hi |-------|-------|-------|-------|-------|-------|-------|-------| */ diff --git a/tables/tables/instr_id/r5900/r5900_special.inc b/tables/tables/instr_id/r5900/r5900_special.inc index 0d17cd50..3192459a 100644 --- a/tables/tables/instr_id/r5900/r5900_special.inc +++ b/tables/tables/instr_id/r5900/r5900_special.inc @@ -6,14 +6,14 @@ | = SPECIAL | | function| ------6----------------------------------------------------6----- |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo -000 | SLL | --- | SRL | SRA | SLLV | --- | SRLV | SRAV | -001 | JR | JALR | MOVZ | MOVN |SYSCALL| BREAK | --- | SYNC | -010 | MFHI | MTHI | MFLO | MTLO | DSLLV | --- | DSRLV | DSRAV | -011 | MULT | MULTU | DIV | DIVU | ---- | --- | ---- | ----- | +000 | SLL | --- | SRL | SRA | SLLV | --- | SRLV | SRAV | +001 | JR | JALR | MOVZ | MOVN |SYSCALL| BREAK | --- | SYNC | +010 | MFHI | MTHI | MFLO | MTLO | DSLLV | --- | DSRLV | DSRAV | +011 | MULT | MULTU | DIV | DIVU | ---- | --- | ---- | ----- | 100 | ADD | ADDU | SUB | SUBU | AND | OR | XOR | NOR | 101 | MFSA | MTSA | SLT | SLTU | DADD | DADDU | DSUB | DSUBU | -110 | TGE | TGEU | TLT | TLTU | TEQ | --- | TNE | --- | -111 | DSLL | --- | DSRL | DSRA |DSLL32 | --- |DSRL32 |DSRA32 | +110 | TGE | TGEU | TLT | TLTU | TEQ | --- | TNE | --- | +111 | DSLL | --- | DSRL | DSRA |DSLL32 | --- |DSRL32 |DSRA32 | hi |-------|-------|-------|-------|-------|-------|-------|-------| */ diff --git a/tables/tables/instr_id_types/InstrIdType_r4000allegrex.inc b/tables/tables/instr_id_types/InstrIdType_r4000allegrex.inc new file mode 100644 index 00000000..0b56e518 --- /dev/null +++ b/tables/tables/instr_id_types/InstrIdType_r4000allegrex.inc @@ -0,0 +1,67 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, INVALID) + + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, NORMAL) + + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, SPECIAL) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, SPECIAL_RS) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, SPECIAL_SA) + + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, REGIMM) + + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, SPECIAL2) + + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, SPECIAL3) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, SPECIAL3_BSHFL) + + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, COP0) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, COP0_BC0) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, COP0_TLB) + + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, COP1) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, COP1_BC1) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, COP1_FPUS) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, COP1_FPUW) + + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, COP2) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, COP2_BC2) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, COP2_MFHC2) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, COP2_MFHC2_P) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, COP2_MFHC2_P_S) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, COP2_MTHC2) + + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU0) + + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU1) + + // VFPU2 doesn't exist? + + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU3) + + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU4) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU4_FMT0) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU4_FMT0_FMT0) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU4_FMT0_FMT2) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU4_FMT0_FMT3) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU4_FMT0_RND) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU4_FMT0_CVTFLT) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU4_FMT0_CVTINT) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU4_FMT0_FMT8) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU4_FMT0_FMT9) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU4_FMT0_CONTROL) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU4_FMT0_COLOR) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU4_FMT0_CST) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU4_FMT2) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU4_FMT2_CNDMOVE) + + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU5) + + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU6) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU6_FMT7) + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU6_FMT7_FMT0) + + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, VFPU7) + + RABBITIZER_DEF_INSTR_ID_TYPE(R4000ALLEGREX, QUADLR) diff --git a/tables/tables/operands/RabbitizerOperandType_r4000allegrex.inc b/tables/tables/operands/RabbitizerOperandType_r4000allegrex.inc new file mode 100644 index 00000000..aa9ddf67 --- /dev/null +++ b/tables/tables/operands/RabbitizerOperandType_r4000allegrex.inc @@ -0,0 +1,85 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + + // scalar + RAB_DEF_OPERAND(r4000allegrex, s_vs) + RAB_DEF_OPERAND(r4000allegrex, s_vt) + RAB_DEF_OPERAND(r4000allegrex, s_vd) + RAB_DEF_OPERAND(r4000allegrex, s_vt_imm) + RAB_DEF_OPERAND(r4000allegrex, s_vd_imm) + + // pair + RAB_DEF_OPERAND(r4000allegrex, p_vs) + RAB_DEF_OPERAND(r4000allegrex, p_vt) + RAB_DEF_OPERAND(r4000allegrex, p_vd) + + // triple + RAB_DEF_OPERAND(r4000allegrex, t_vs) + RAB_DEF_OPERAND(r4000allegrex, t_vt) + RAB_DEF_OPERAND(r4000allegrex, t_vd) + + // quad + RAB_DEF_OPERAND(r4000allegrex, q_vs) + RAB_DEF_OPERAND(r4000allegrex, q_vt) + RAB_DEF_OPERAND(r4000allegrex, q_vd) + RAB_DEF_OPERAND(r4000allegrex, q_vt_imm) + + // matrix pair + RAB_DEF_OPERAND(r4000allegrex, mp_vs) + RAB_DEF_OPERAND(r4000allegrex, mp_vt) + RAB_DEF_OPERAND(r4000allegrex, mp_vd) + RAB_DEF_OPERAND(r4000allegrex, mp_vs_transpose) + + // matrix triple + RAB_DEF_OPERAND(r4000allegrex, mt_vs) + RAB_DEF_OPERAND(r4000allegrex, mt_vt) + RAB_DEF_OPERAND(r4000allegrex, mt_vd) + RAB_DEF_OPERAND(r4000allegrex, mt_vs_transpose) + + // matrix quad + RAB_DEF_OPERAND(r4000allegrex, mq_vs) + RAB_DEF_OPERAND(r4000allegrex, mq_vt) + RAB_DEF_OPERAND(r4000allegrex, mq_vd) + RAB_DEF_OPERAND(r4000allegrex, mq_vs_transpose) + + RAB_DEF_OPERAND(r4000allegrex, cop2cs) + RAB_DEF_OPERAND(r4000allegrex, cop2cd) + + RAB_DEF_OPERAND(r4000allegrex, pos) + RAB_DEF_OPERAND(r4000allegrex, size) + RAB_DEF_OPERAND(r4000allegrex, size_plus_pos) + + RAB_DEF_OPERAND(r4000allegrex, imm3) + + // RAB_DEF_OPERAND(r4000allegrex, offset14) + RAB_DEF_OPERAND(r4000allegrex, offset14_base) + RAB_DEF_OPERAND(r4000allegrex, offset14_base_maybe_wb) + + RAB_DEF_OPERAND(r4000allegrex, vcmp_cond) + RAB_DEF_OPERAND(r4000allegrex, vcmp_cond_s_maybe_vs_maybe_vt) + RAB_DEF_OPERAND(r4000allegrex, vcmp_cond_p_maybe_vs_maybe_vt) + RAB_DEF_OPERAND(r4000allegrex, vcmp_cond_t_maybe_vs_maybe_vt) + RAB_DEF_OPERAND(r4000allegrex, vcmp_cond_q_maybe_vs_maybe_vt) + + RAB_DEF_OPERAND(r4000allegrex, vconstant) + + RAB_DEF_OPERAND(r4000allegrex, power_of_two) + RAB_DEF_OPERAND(r4000allegrex, vfpu_cc_bit) + RAB_DEF_OPERAND(r4000allegrex, bn) + + RAB_DEF_OPERAND(r4000allegrex, int16) + RAB_DEF_OPERAND(r4000allegrex, float16) + + RAB_DEF_OPERAND(r4000allegrex, p_vrot_code) + RAB_DEF_OPERAND(r4000allegrex, t_vrot_code) + RAB_DEF_OPERAND(r4000allegrex, q_vrot_code) + + RAB_DEF_OPERAND(r4000allegrex, rpx) + RAB_DEF_OPERAND(r4000allegrex, rpy) + RAB_DEF_OPERAND(r4000allegrex, rpz) + RAB_DEF_OPERAND(r4000allegrex, rpw) + + RAB_DEF_OPERAND(r4000allegrex, wpx) + RAB_DEF_OPERAND(r4000allegrex, wpy) + RAB_DEF_OPERAND(r4000allegrex, wpz) + RAB_DEF_OPERAND(r4000allegrex, wpw) diff --git a/tables/tables/registers/RabbitizerRegister_R4000AllegrexM2x2.inc b/tables/tables/registers/RabbitizerRegister_R4000AllegrexM2x2.inc new file mode 100644 index 00000000..0d8a584e --- /dev/null +++ b/tables/tables/registers/RabbitizerRegister_R4000AllegrexM2x2.inc @@ -0,0 +1,131 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M000, 0, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M010, 1, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M020, 2, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M030, 3, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M100, 4, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M110, 5, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M120, 6, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M130, 7, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M200, 8, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M210, 9, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M220, 10, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M230, 11, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M300, 12, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M310, 13, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M320, 14, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M330, 15, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M400, 16, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M410, 17, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M420, 18, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M430, 19, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M500, 20, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M510, 21, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M520, 22, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M530, 23, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M600, 24, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M610, 25, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M620, 26, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M630, 27, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M700, 28, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M710, 29, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M720, 30, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M730, 31, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E000, 32, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E001, 33, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E002, 34, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E003, 35, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E100, 36, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E101, 37, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E102, 38, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E103, 39, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E200, 40, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E201, 41, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E202, 42, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E203, 43, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E300, 44, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E301, 45, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E302, 46, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E303, 47, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E400, 48, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E401, 49, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E402, 50, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E403, 51, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E500, 52, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E501, 53, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E502, 54, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E503, 55, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E600, 56, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E601, 57, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E602, 58, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E603, 59, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E700, 60, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E701, 61, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E702, 62, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E703, 63, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M002, 64, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M012, 65, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M022, 66, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M032, 67, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M102, 68, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M112, 69, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M122, 70, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M132, 71, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M202, 72, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M212, 73, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M222, 74, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M232, 75, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M302, 76, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M312, 77, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M322, 78, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M332, 79, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M402, 80, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M412, 81, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M422, 82, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M432, 83, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M502, 84, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M512, 85, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M522, 86, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M532, 87, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M602, 88, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M612, 89, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M622, 90, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M632, 91, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M702, 92, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M712, 93, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M722, 94, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, M732, 95, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E020, 96, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E021, 97, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E022, 98, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E023, 99, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E120, 100, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E121, 101, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E122, 102, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E123, 103, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E220, 104, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E221, 105, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E222, 106, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E223, 107, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E320, 108, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E321, 109, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E322, 110, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E323, 111, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E420, 112, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E421, 113, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E422, 114, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E423, 115, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E520, 116, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E521, 117, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E522, 118, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E523, 119, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E620, 120, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E621, 121, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E622, 122, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E623, 123, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E720, 124, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E721, 125, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E722, 126, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M2X2, E723, 127, 0) diff --git a/tables/tables/registers/RabbitizerRegister_R4000AllegrexM3x3.inc b/tables/tables/registers/RabbitizerRegister_R4000AllegrexM3x3.inc new file mode 100644 index 00000000..bd1afac4 --- /dev/null +++ b/tables/tables/registers/RabbitizerRegister_R4000AllegrexM3x3.inc @@ -0,0 +1,131 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M000, 0, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M010, 1, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M020, 2, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M030, 3, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M100, 4, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M110, 5, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M120, 6, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M130, 7, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M200, 8, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M210, 9, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M220, 10, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M230, 11, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M300, 12, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M310, 13, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M320, 14, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M330, 15, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M400, 16, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M410, 17, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M420, 18, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M430, 19, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M500, 20, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M510, 21, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M520, 22, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M530, 23, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M600, 24, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M610, 25, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M620, 26, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M630, 27, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M700, 28, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M710, 29, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M720, 30, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M730, 31, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E000, 32, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E001, 33, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E002, 34, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E003, 35, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E100, 36, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E101, 37, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E102, 38, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E103, 39, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E200, 40, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E201, 41, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E202, 42, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E203, 43, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E300, 44, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E301, 45, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E302, 46, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E303, 47, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E400, 48, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E401, 49, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E402, 50, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E403, 51, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E500, 52, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E501, 53, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E502, 54, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E503, 55, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E600, 56, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E601, 57, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E602, 58, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E603, 59, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E700, 60, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E701, 61, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E702, 62, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E703, 63, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M001, 64, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M011, 65, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M021, 66, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M031, 67, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M101, 68, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M111, 69, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M121, 70, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M131, 71, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M201, 72, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M211, 73, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M221, 74, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M231, 75, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M301, 76, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M311, 77, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M321, 78, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M331, 79, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M401, 80, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M411, 81, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M421, 82, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M431, 83, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M501, 84, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M511, 85, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M521, 86, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M531, 87, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M601, 88, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M611, 89, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M621, 90, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M631, 91, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M701, 92, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M711, 93, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M721, 94, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, M731, 95, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E010, 96, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E011, 97, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E012, 98, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E013, 99, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E110, 100, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E111, 101, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E112, 102, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E113, 103, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E210, 104, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E211, 105, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E212, 106, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E213, 107, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E310, 108, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E311, 109, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E312, 110, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E313, 111, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E410, 112, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E411, 113, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E412, 114, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E413, 115, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E510, 116, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E511, 117, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E512, 118, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E513, 119, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E610, 120, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E611, 121, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E612, 122, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E613, 123, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E710, 124, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E711, 125, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E712, 126, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M3X3, E713, 127, 0) diff --git a/tables/tables/registers/RabbitizerRegister_R4000AllegrexM4x4.inc b/tables/tables/registers/RabbitizerRegister_R4000AllegrexM4x4.inc new file mode 100644 index 00000000..c3cee97f --- /dev/null +++ b/tables/tables/registers/RabbitizerRegister_R4000AllegrexM4x4.inc @@ -0,0 +1,131 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M000, 0, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M010, 1, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M020, 2, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M030, 3, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M100, 4, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M110, 5, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M120, 6, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M130, 7, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M200, 8, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M210, 9, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M220, 10, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M230, 11, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M300, 12, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M310, 13, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M320, 14, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M330, 15, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M400, 16, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M410, 17, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M420, 18, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M430, 19, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M500, 20, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M510, 21, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M520, 22, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M530, 23, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M600, 24, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M610, 25, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M620, 26, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M630, 27, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M700, 28, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M710, 29, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M720, 30, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M730, 31, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E000, 32, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E001, 33, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E002, 34, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E003, 35, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E100, 36, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E101, 37, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E102, 38, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E103, 39, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E200, 40, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E201, 41, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E202, 42, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E203, 43, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E300, 44, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E301, 45, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E302, 46, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E303, 47, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E400, 48, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E401, 49, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E402, 50, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E403, 51, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E500, 52, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E501, 53, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E502, 54, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E503, 55, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E600, 56, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E601, 57, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E602, 58, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E603, 59, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E700, 60, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E701, 61, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E702, 62, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E703, 63, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M002, 64, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M012, 65, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M022, 66, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M032, 67, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M102, 68, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M112, 69, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M122, 70, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M132, 71, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M202, 72, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M212, 73, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M222, 74, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M232, 75, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M302, 76, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M312, 77, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M322, 78, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M332, 79, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M402, 80, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M412, 81, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M422, 82, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M432, 83, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M502, 84, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M512, 85, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M522, 86, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M532, 87, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M602, 88, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M612, 89, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M622, 90, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M632, 91, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M702, 92, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M712, 93, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M722, 94, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, M732, 95, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E020, 96, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E021, 97, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E022, 98, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E023, 99, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E120, 100, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E121, 101, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E122, 102, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E123, 103, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E220, 104, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E221, 105, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E222, 106, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E223, 107, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E320, 108, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E321, 109, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E322, 110, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E323, 111, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E420, 112, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E421, 113, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E422, 114, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E423, 115, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E520, 116, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E521, 117, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E522, 118, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E523, 119, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E620, 120, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E621, 121, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E622, 122, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E623, 123, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E720, 124, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E721, 125, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E722, 126, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_M4X4, E723, 127, 0) diff --git a/tables/tables/registers/RabbitizerRegister_R4000AllegrexS.inc b/tables/tables/registers/RabbitizerRegister_R4000AllegrexS.inc new file mode 100644 index 00000000..e70b49ed --- /dev/null +++ b/tables/tables/registers/RabbitizerRegister_R4000AllegrexS.inc @@ -0,0 +1,131 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S000, 0, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S010, 1, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S020, 2, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S030, 3, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S100, 4, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S110, 5, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S120, 6, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S130, 7, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S200, 8, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S210, 9, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S220, 10, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S230, 11, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S300, 12, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S310, 13, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S320, 14, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S330, 15, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S400, 16, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S410, 17, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S420, 18, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S430, 19, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S500, 20, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S510, 21, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S520, 22, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S530, 23, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S600, 24, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S610, 25, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S620, 26, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S630, 27, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S700, 28, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S710, 29, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S720, 30, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S730, 31, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S001, 32, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S011, 33, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S021, 34, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S031, 35, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S101, 36, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S111, 37, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S121, 38, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S131, 39, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S201, 40, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S211, 41, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S221, 42, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S231, 43, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S301, 44, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S311, 45, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S321, 46, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S331, 47, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S401, 48, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S411, 49, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S421, 50, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S431, 51, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S501, 52, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S511, 53, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S521, 54, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S531, 55, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S601, 56, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S611, 57, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S621, 58, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S631, 59, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S701, 60, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S711, 61, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S721, 62, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S731, 63, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S002, 64, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S012, 65, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S022, 66, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S032, 67, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S102, 68, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S112, 69, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S122, 70, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S132, 71, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S202, 72, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S212, 73, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S222, 74, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S232, 75, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S302, 76, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S312, 77, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S322, 78, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S332, 79, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S402, 80, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S412, 81, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S422, 82, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S432, 83, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S502, 84, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S512, 85, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S522, 86, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S532, 87, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S602, 88, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S612, 89, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S622, 90, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S632, 91, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S702, 92, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S712, 93, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S722, 94, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S732, 95, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S003, 96, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S013, 97, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S023, 98, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S033, 99, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S103, 100, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S113, 101, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S123, 102, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S133, 103, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S203, 104, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S213, 105, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S223, 106, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S233, 107, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S303, 108, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S313, 109, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S323, 110, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S333, 111, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S403, 112, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S413, 113, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S423, 114, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S433, 115, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S503, 116, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S513, 117, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S523, 118, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S533, 119, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S603, 120, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S613, 121, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S623, 122, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S633, 123, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S703, 124, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S713, 125, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S723, 126, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_S, S733, 127, 0) diff --git a/tables/tables/registers/RabbitizerRegister_R4000AllegrexV2D.inc b/tables/tables/registers/RabbitizerRegister_R4000AllegrexV2D.inc new file mode 100644 index 00000000..aed80f60 --- /dev/null +++ b/tables/tables/registers/RabbitizerRegister_R4000AllegrexV2D.inc @@ -0,0 +1,131 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C000, 0, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C010, 1, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C020, 2, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C030, 3, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C100, 4, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C110, 5, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C120, 6, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C130, 7, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C200, 8, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C210, 9, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C220, 10, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C230, 11, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C300, 12, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C310, 13, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C320, 14, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C330, 15, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C400, 16, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C410, 17, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C420, 18, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C430, 19, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C500, 20, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C510, 21, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C520, 22, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C530, 23, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C600, 24, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C610, 25, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C620, 26, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C630, 27, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C700, 28, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C710, 29, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C720, 30, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C730, 31, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R000, 32, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R001, 33, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R002, 34, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R003, 35, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R100, 36, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R101, 37, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R102, 38, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R103, 39, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R200, 40, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R201, 41, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R202, 42, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R203, 43, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R300, 44, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R301, 45, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R302, 46, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R303, 47, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R400, 48, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R401, 49, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R402, 50, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R403, 51, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R500, 52, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R501, 53, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R502, 54, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R503, 55, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R600, 56, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R601, 57, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R602, 58, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R603, 59, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R700, 60, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R701, 61, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R702, 62, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R703, 63, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C002, 64, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C012, 65, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C022, 66, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C032, 67, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C102, 68, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C112, 69, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C122, 70, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C132, 71, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C202, 72, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C212, 73, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C222, 74, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C232, 75, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C302, 76, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C312, 77, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C322, 78, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C332, 79, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C402, 80, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C412, 81, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C422, 82, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C432, 83, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C502, 84, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C512, 85, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C522, 86, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C532, 87, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C602, 88, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C612, 89, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C622, 90, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C632, 91, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C702, 92, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C712, 93, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C722, 94, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, C732, 95, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R020, 96, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R021, 97, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R022, 98, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R023, 99, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R120, 100, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R121, 101, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R122, 102, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R123, 103, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R220, 104, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R221, 105, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R222, 106, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R223, 107, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R320, 108, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R321, 109, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R322, 110, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R323, 111, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R420, 112, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R421, 113, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R422, 114, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R423, 115, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R520, 116, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R521, 117, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R522, 118, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R523, 119, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R620, 120, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R621, 121, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R622, 122, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R623, 123, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R720, 124, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R721, 125, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R722, 126, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V2D, R723, 127, 0) diff --git a/tables/tables/registers/RabbitizerRegister_R4000AllegrexV3D.inc b/tables/tables/registers/RabbitizerRegister_R4000AllegrexV3D.inc new file mode 100644 index 00000000..3c23df7c --- /dev/null +++ b/tables/tables/registers/RabbitizerRegister_R4000AllegrexV3D.inc @@ -0,0 +1,131 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C000, 0, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C010, 1, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C020, 2, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C030, 3, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C100, 4, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C110, 5, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C120, 6, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C130, 7, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C200, 8, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C210, 9, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C220, 10, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C230, 11, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C300, 12, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C310, 13, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C320, 14, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C330, 15, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C400, 16, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C410, 17, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C420, 18, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C430, 19, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C500, 20, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C510, 21, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C520, 22, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C530, 23, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C600, 24, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C610, 25, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C620, 26, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C630, 27, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C700, 28, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C710, 29, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C720, 30, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C730, 31, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R000, 32, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R001, 33, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R002, 34, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R003, 35, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R100, 36, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R101, 37, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R102, 38, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R103, 39, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R200, 40, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R201, 41, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R202, 42, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R203, 43, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R300, 44, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R301, 45, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R302, 46, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R303, 47, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R400, 48, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R401, 49, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R402, 50, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R403, 51, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R500, 52, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R501, 53, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R502, 54, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R503, 55, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R600, 56, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R601, 57, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R602, 58, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R603, 59, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R700, 60, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R701, 61, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R702, 62, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R703, 63, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C001, 64, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C011, 65, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C021, 66, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C031, 67, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C101, 68, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C111, 69, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C121, 70, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C131, 71, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C201, 72, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C211, 73, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C221, 74, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C231, 75, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C301, 76, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C311, 77, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C321, 78, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C331, 79, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C401, 80, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C411, 81, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C421, 82, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C431, 83, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C501, 84, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C511, 85, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C521, 86, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C531, 87, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C601, 88, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C611, 89, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C621, 90, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C631, 91, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C701, 92, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C711, 93, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C721, 94, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, C731, 95, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R010, 96, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R011, 97, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R012, 98, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R013, 99, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R110, 100, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R111, 101, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R112, 102, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R113, 103, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R210, 104, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R211, 105, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R212, 106, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R213, 107, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R310, 108, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R311, 109, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R312, 110, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R313, 111, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R410, 112, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R411, 113, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R412, 114, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R413, 115, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R510, 116, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R511, 117, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R512, 118, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R513, 119, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R610, 120, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R611, 121, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R612, 122, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R613, 123, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R710, 124, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R711, 125, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R712, 126, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V3D, R713, 127, 0) diff --git a/tables/tables/registers/RabbitizerRegister_R4000AllegrexV4D.inc b/tables/tables/registers/RabbitizerRegister_R4000AllegrexV4D.inc new file mode 100644 index 00000000..5e661c1a --- /dev/null +++ b/tables/tables/registers/RabbitizerRegister_R4000AllegrexV4D.inc @@ -0,0 +1,131 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C000, 0, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C010, 1, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C020, 2, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C030, 3, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C100, 4, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C110, 5, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C120, 6, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C130, 7, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C200, 8, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C210, 9, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C220, 10, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C230, 11, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C300, 12, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C310, 13, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C320, 14, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C330, 15, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C400, 16, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C410, 17, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C420, 18, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C430, 19, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C500, 20, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C510, 21, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C520, 22, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C530, 23, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C600, 24, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C610, 25, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C620, 26, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C630, 27, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C700, 28, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C710, 29, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C720, 30, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C730, 31, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R000, 32, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R001, 33, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R002, 34, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R003, 35, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R100, 36, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R101, 37, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R102, 38, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R103, 39, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R200, 40, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R201, 41, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R202, 42, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R203, 43, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R300, 44, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R301, 45, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R302, 46, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R303, 47, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R400, 48, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R401, 49, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R402, 50, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R403, 51, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R500, 52, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R501, 53, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R502, 54, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R503, 55, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R600, 56, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R601, 57, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R602, 58, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R603, 59, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R700, 60, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R701, 61, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R702, 62, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R703, 63, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C002, 64, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C012, 65, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C022, 66, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C032, 67, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C102, 68, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C112, 69, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C122, 70, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C132, 71, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C202, 72, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C212, 73, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C222, 74, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C232, 75, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C302, 76, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C312, 77, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C322, 78, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C332, 79, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C402, 80, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C412, 81, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C422, 82, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C432, 83, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C502, 84, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C512, 85, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C522, 86, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C532, 87, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C602, 88, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C612, 89, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C622, 90, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C632, 91, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C702, 92, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C712, 93, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C722, 94, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, C732, 95, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R020, 96, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R021, 97, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R022, 98, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R023, 99, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R120, 100, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R121, 101, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R122, 102, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R123, 103, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R220, 104, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R221, 105, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R222, 106, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R223, 107, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R320, 108, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R321, 109, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R322, 110, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R323, 111, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R420, 112, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R421, 113, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R422, 114, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R423, 115, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R520, 116, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R521, 117, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R522, 118, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R523, 119, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R620, 120, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R621, 121, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R622, 122, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R623, 123, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R720, 124, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R721, 125, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R722, 126, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_V4D, R723, 127, 0) diff --git a/tables/tables/registers/RabbitizerRegister_R4000AllegrexVConstant.inc b/tables/tables/registers/RabbitizerRegister_R4000AllegrexVConstant.inc new file mode 100644 index 00000000..51b1b0e1 --- /dev/null +++ b/tables/tables/registers/RabbitizerRegister_R4000AllegrexVConstant.inc @@ -0,0 +1,35 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, INVALID_0, 0, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_HUGE, 1, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_SQRT2, 2, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_SQRT1_2, 3, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_2_SQRTPI, 4, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_2_PI, 5, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_1_PI, 6, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_PI_4, 7, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_PI_2, 8, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_PI, 9, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_E, 10, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_LOG2E, 11, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_LOG10E, 12, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_LN2, 13, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_LN10, 14, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_2PI, 15, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_PI_6, 16, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_LOG10TWO, 17, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_LOG2TEN, 18, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, VFPU_SQRT3_2, 19, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, INVALID_20, 20, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, INVALID_21, 21, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, INVALID_22, 22, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, INVALID_23, 23, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, INVALID_24, 24, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, INVALID_25, 25, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, INVALID_26, 26, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, INVALID_27, 27, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, INVALID_28, 28, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, INVALID_29, 29, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, INVALID_30, 30, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VCONSTANT, INVALID_31, 31, 0) diff --git a/tables/tables/registers/RabbitizerRegister_R4000AllegrexVfpuControl.inc b/tables/tables/registers/RabbitizerRegister_R4000AllegrexVfpuControl.inc new file mode 100644 index 00000000..a373f929 --- /dev/null +++ b/tables/tables/registers/RabbitizerRegister_R4000AllegrexVfpuControl.inc @@ -0,0 +1,131 @@ +/* SPDX-FileCopyrightText: © 2022-2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_PFXS, 128, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_PFXT, 129, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_PFXD, 130, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_CC, 131, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_INF4, 132, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RSV5, 133, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RSV6, 134, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_REV, 135, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RCX0, 136, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RCX1, 137, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RCX2, 138, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RCX3, 139, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RCX4, 140, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RCX5, 141, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RCX6, 142, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RCX7, 143, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 144, 144, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 145, 145, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 146, 146, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 147, 147, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 148, 148, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 149, 149, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 150, 150, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 151, 151, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 152, 152, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 153, 153, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 154, 154, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 155, 155, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 156, 156, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 157, 157, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 158, 158, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 159, 159, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 160, 160, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 161, 161, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 162, 162, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 163, 163, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 164, 164, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 165, 165, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 166, 166, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 167, 167, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 168, 168, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 169, 169, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 170, 170, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 171, 171, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 172, 172, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 173, 173, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 174, 174, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 175, 175, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 176, 176, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 177, 177, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 178, 178, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 179, 179, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 180, 180, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 181, 181, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 182, 182, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 183, 183, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 184, 184, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 185, 185, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 186, 186, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 187, 187, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 188, 188, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 189, 189, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 190, 190, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 191, 191, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 192, 192, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 193, 193, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 194, 194, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 195, 195, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 196, 196, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 197, 197, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 198, 198, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 199, 199, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 200, 200, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 201, 201, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 202, 202, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 203, 203, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 204, 204, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 205, 205, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 206, 206, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 207, 207, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 208, 208, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 209, 209, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 210, 210, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 211, 211, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 212, 212, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 213, 213, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 214, 214, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 215, 215, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 216, 216, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 217, 217, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 218, 218, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 219, 219, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 220, 220, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 221, 221, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 222, 222, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 223, 223, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 224, 224, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 225, 225, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 226, 226, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 227, 227, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 228, 228, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 229, 229, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 230, 230, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 231, 231, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 232, 232, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 233, 233, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 234, 234, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 235, 235, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 236, 236, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 237, 237, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 238, 238, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 239, 239, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 240, 240, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 241, 241, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 242, 242, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 243, 243, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 244, 244, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 245, 245, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 246, 246, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 247, 247, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 248, 248, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 249, 249, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 250, 250, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 251, 251, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 252, 252, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 253, 253, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 254, 254, 0) + RABBITIZER_DEF_REG( R4000ALLEGREX_VFPUCONTROL, 255, 255, 0) diff --git a/tables/templates/c/InstrId_enum.table.template b/tables/templates/c/InstrId_enum.table.template index aa9251fc..056c6175 100644 --- a/tables/templates/c/InstrId_enum.table.template +++ b/tables/templates/c/InstrId_enum.table.template @@ -10,7 +10,8 @@ typedef enum RabbitizerInstrId { #include "InstrIds.inc" - RABBITIZER_INSTR_ID_ALL_MAX = RABBITIZER_DEF_INSTR_ID(r5900, , MAX, ) + RABBITIZER_INSTR_ID_ALL_LAST, + RABBITIZER_INSTR_ID_ALL_MAX = RABBITIZER_INSTR_ID_ALL_LAST - 1 } RabbitizerInstrId; #undef RABBITIZER_DEF_INSTR_ID diff --git a/tables/templates/c/RegisterDescriptor_Descriptors_arrays.table.template b/tables/templates/c/RegisterDescriptor_Descriptors_arrays.table.template index 476c7da8..61825481 100644 --- a/tables/templates/c/RegisterDescriptor_Descriptors_arrays.table.template +++ b/tables/templates/c/RegisterDescriptor_Descriptors_arrays.table.template @@ -63,6 +63,46 @@ const RabbitizerRegisterDescriptor RabbitizerRegister_RspVector_Descriptors[] = /* RSP */ +/* R4000ALLEGREX */ + +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexS_Descriptors[] = { +#include "registers/RabbitizerRegister_R4000AllegrexS.inc" +}; + +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexV2D_Descriptors[] = { +#include "registers/RabbitizerRegister_R4000AllegrexV2D.inc" +}; + +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexV3D_Descriptors[] = { +#include "registers/RabbitizerRegister_R4000AllegrexV3D.inc" +}; + +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexV4D_Descriptors[] = { +#include "registers/RabbitizerRegister_R4000AllegrexV4D.inc" +}; + +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexM2x2_Descriptors[] = { +#include "registers/RabbitizerRegister_R4000AllegrexM2x2.inc" +}; + +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexM3x3_Descriptors[] = { +#include "registers/RabbitizerRegister_R4000AllegrexM3x3.inc" +}; + +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexM4x4_Descriptors[] = { +#include "registers/RabbitizerRegister_R4000AllegrexM4x4.inc" +}; + +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexVfpuControl_Descriptors[] = { +#include "registers/RabbitizerRegister_R4000AllegrexVfpuControl.inc" +}; + +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexVConstant_Descriptors[] = { +#include "registers/RabbitizerRegister_R4000AllegrexVConstant.inc" +}; + +/* R4000ALLEGREX */ + /* R5900 */ const RabbitizerRegisterDescriptor RabbitizerRegister_R5900VF_Descriptors[] = { diff --git a/tables/templates/c/Registers_Names_arrays.table.template b/tables/templates/c/Registers_Names_arrays.table.template index bb26155b..7146906f 100644 --- a/tables/templates/c/Registers_Names_arrays.table.template +++ b/tables/templates/c/Registers_Names_arrays.table.template @@ -65,6 +65,46 @@ const char *RabbitizerRegister_RspVector_Names[][2] = { /* RSP */ +/* R4000ALLEGREX */ + +const char *RabbitizerRegister_R4000AllegrexS_Names[][2] = { +#include "registers/RabbitizerRegister_R4000AllegrexS.inc" +}; + +const char *RabbitizerRegister_R4000AllegrexV2D_Names[][2] = { +#include "registers/RabbitizerRegister_R4000AllegrexV2D.inc" +}; + +const char *RabbitizerRegister_R4000AllegrexV3D_Names[][2] = { +#include "registers/RabbitizerRegister_R4000AllegrexV3D.inc" +}; + +const char *RabbitizerRegister_R4000AllegrexV4D_Names[][2] = { +#include "registers/RabbitizerRegister_R4000AllegrexV4D.inc" +}; + +const char *RabbitizerRegister_R4000AllegrexM2x2_Names[][2] = { +#include "registers/RabbitizerRegister_R4000AllegrexM2x2.inc" +}; + +const char *RabbitizerRegister_R4000AllegrexM3x3_Names[][2] = { +#include "registers/RabbitizerRegister_R4000AllegrexM3x3.inc" +}; + +const char *RabbitizerRegister_R4000AllegrexM4x4_Names[][2] = { +#include "registers/RabbitizerRegister_R4000AllegrexM4x4.inc" +}; + +const char *RabbitizerRegister_R4000AllegrexVfpuControl_Names[][2] = { +#include "registers/RabbitizerRegister_R4000AllegrexVfpuControl.inc" +}; + +const char *RabbitizerRegister_R4000AllegrexVConstant_Names[][2] = { +#include "registers/RabbitizerRegister_R4000AllegrexVConstant.inc" +}; + +/* R4000ALLEGREX */ + /* R5900 */ const char *RabbitizerRegister_R5900VF_Names[][2] = { diff --git a/tables/templates/c/Registers_enums.table.template b/tables/templates/c/Registers_enums.table.template index 077f8244..28066ffb 100644 --- a/tables/templates/c/Registers_enums.table.template +++ b/tables/templates/c/Registers_enums.table.template @@ -66,6 +66,46 @@ typedef enum RabbitizerRegister_RspVector { /* RSP */ +/* R4000ALLEGREX */ + +typedef enum RabbitizerRegister_R4000AllegrexS { + #include "registers/RabbitizerRegister_R4000AllegrexS.inc" +} RabbitizerRegister_R4000AllegrexS; + +typedef enum RabbitizerRegister_R4000AllegrexV2D { + #include "registers/RabbitizerRegister_R4000AllegrexV2D.inc" +} RabbitizerRegister_R4000AllegrexV2D; + +typedef enum RabbitizerRegister_R4000AllegrexV3D { + #include "registers/RabbitizerRegister_R4000AllegrexV3D.inc" +} RabbitizerRegister_R4000AllegrexV3D; + +typedef enum RabbitizerRegister_R4000AllegrexV4D { + #include "registers/RabbitizerRegister_R4000AllegrexV4D.inc" +} RabbitizerRegister_R4000AllegrexV4D; + +typedef enum RabbitizerRegister_R4000AllegrexM2x2 { + #include "registers/RabbitizerRegister_R4000AllegrexM2x2.inc" +} RabbitizerRegister_R4000AllegrexM2x2; + +typedef enum RabbitizerRegister_R4000AllegrexM3x3 { + #include "registers/RabbitizerRegister_R4000AllegrexM3x3.inc" +} RabbitizerRegister_R4000AllegrexM3x3; + +typedef enum RabbitizerRegister_R4000AllegrexM4x4 { + #include "registers/RabbitizerRegister_R4000AllegrexM4x4.inc" +} RabbitizerRegister_R4000AllegrexM4x4; + +typedef enum RabbitizerRegister_R4000AllegrexVfpuControl { + #include "registers/RabbitizerRegister_R4000AllegrexVfpuControl.inc" +} RabbitizerRegister_R4000AllegrexVfpuControl; + +typedef enum RabbitizerRegister_R4000AllegrexVConstant { + #include "registers/RabbitizerRegister_R4000AllegrexVConstant.inc" +} RabbitizerRegister_R4000AllegrexVConstant; + +/* R4000ALLEGREX */ + /* R5900 */ typedef enum RabbitizerRegister_R5900VF { diff --git a/tables/templates/cplusplus/Registers_enum_classes.table.template b/tables/templates/cplusplus/Registers_enum_classes.table.template index da1d400e..211fdacc 100644 --- a/tables/templates/cplusplus/Registers_enum_classes.table.template +++ b/tables/templates/cplusplus/Registers_enum_classes.table.template @@ -5,7 +5,7 @@ prefix##_##name, #define RABBITIZER_DEF_REG_NODOLLAR(prefix, name, numeric, ...) \ - prefix##_##name, + RABBITIZER_DEF_REG(prefix, name, numeric, __VA_ARGS__) namespace Cpu { enum class GprO32 { @@ -66,6 +66,43 @@ }; }; + namespace R4000Allegrex { + enum class S { + #include "registers/RabbitizerRegister_R4000AllegrexS.inc" + }; + + enum class V2D { + #include "registers/RabbitizerRegister_R4000AllegrexV2D.inc" + }; + + enum class V3D { + #include "registers/RabbitizerRegister_R4000AllegrexV3D.inc" + }; + + enum class V4D { + #include "registers/RabbitizerRegister_R4000AllegrexV4D.inc" + }; + + enum class M2x2 { + #include "registers/RabbitizerRegister_R4000AllegrexM2x2.inc" + }; + + enum class M3x3 { + #include "registers/RabbitizerRegister_R4000AllegrexM3x3.inc" + }; + + enum class M4x4 { + #include "registers/RabbitizerRegister_R4000AllegrexM4x4.inc" + }; + + enum class VfpuControl { + #include "registers/RabbitizerRegister_R4000AllegrexVfpuControl.inc" + }; + + enum class VConstant { + #include "registers/RabbitizerRegister_R4000AllegrexVConstant.inc" + }; + }; namespace R5900 { enum class VF { diff --git a/tables/templates/rust/registers_enum.tablers.template b/tables/templates/rust/registers_enum.tablers.template index e289123a..7e524908 100644 --- a/tables/templates/rust/registers_enum.tablers.template +++ b/tables/templates/rust/registers_enum.tablers.template @@ -142,6 +142,92 @@ pub mod registers { /* RSP */ + /* R4000ALLEGREX */ + + SPECIAL_RS_TAG(repr(u32)) + SPECIAL_RS_TAG(derive(Debug, Copy, Clone, Hash, PartialEq, Eq)) + SPECIAL_RS_TAG(allow(non_camel_case_types)) + SPECIAL_RS_TAG(derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)) + pub enum R4000AllegrexS { + #include "registers/RabbitizerRegister_R4000AllegrexS.inc" + } + + SPECIAL_RS_TAG(repr(u32)) + SPECIAL_RS_TAG(derive(Debug, Copy, Clone, Hash, PartialEq, Eq)) + SPECIAL_RS_TAG(allow(non_camel_case_types)) + SPECIAL_RS_TAG(derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)) + pub enum R4000AllegrexV2D { + #include "registers/RabbitizerRegister_R4000AllegrexV2D.inc" + } + + SPECIAL_RS_TAG(repr(u32)) + SPECIAL_RS_TAG(derive(Debug, Copy, Clone, Hash, PartialEq, Eq)) + SPECIAL_RS_TAG(allow(non_camel_case_types)) + SPECIAL_RS_TAG(derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)) + pub enum R4000AllegrexV3D { + #include "registers/RabbitizerRegister_R4000AllegrexV3D.inc" + } + + SPECIAL_RS_TAG(repr(u32)) + SPECIAL_RS_TAG(derive(Debug, Copy, Clone, Hash, PartialEq, Eq)) + SPECIAL_RS_TAG(allow(non_camel_case_types)) + SPECIAL_RS_TAG(derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)) + pub enum R4000AllegrexV4D { + #include "registers/RabbitizerRegister_R4000AllegrexV4D.inc" + } + + SPECIAL_RS_TAG(repr(u32)) + SPECIAL_RS_TAG(derive(Debug, Copy, Clone, Hash, PartialEq, Eq)) + SPECIAL_RS_TAG(allow(non_camel_case_types)) + SPECIAL_RS_TAG(derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)) + pub enum R4000AllegrexM2x2 { + #include "registers/RabbitizerRegister_R4000AllegrexM2x2.inc" + } + + SPECIAL_RS_TAG(repr(u32)) + SPECIAL_RS_TAG(derive(Debug, Copy, Clone, Hash, PartialEq, Eq)) + SPECIAL_RS_TAG(allow(non_camel_case_types)) + SPECIAL_RS_TAG(derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)) + pub enum R4000AllegrexM3x3 { + #include "registers/RabbitizerRegister_R4000AllegrexM3x3.inc" + } + + SPECIAL_RS_TAG(repr(u32)) + SPECIAL_RS_TAG(derive(Debug, Copy, Clone, Hash, PartialEq, Eq)) + SPECIAL_RS_TAG(allow(non_camel_case_types)) + SPECIAL_RS_TAG(derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)) + pub enum R4000AllegrexM4x4 { + #include "registers/RabbitizerRegister_R4000AllegrexM4x4.inc" + } + +#undef RABBITIZER_DEF_REG + +#define RABBITIZER_DEF_REG(prefix, name, numeric, ...) \ + prefix##_##name, + + SPECIAL_RS_TAG(repr(u32)) + SPECIAL_RS_TAG(derive(Debug, Copy, Clone, Hash, PartialEq, Eq)) + SPECIAL_RS_TAG(allow(non_camel_case_types)) + SPECIAL_RS_TAG(derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)) + pub enum R4000AllegrexVfpuControl { + #include "registers/RabbitizerRegister_R4000AllegrexVfpuControl.inc" + } + +#undef RABBITIZER_DEF_REG + +#define RABBITIZER_DEF_REG(prefix, name, numeric, ...) \ + name, + + SPECIAL_RS_TAG(repr(u32)) + SPECIAL_RS_TAG(derive(Debug, Copy, Clone, Hash, PartialEq, Eq)) + SPECIAL_RS_TAG(allow(non_camel_case_types)) + SPECIAL_RS_TAG(derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)) + pub enum R4000AllegrexVConstant { + #include "registers/RabbitizerRegister_R4000AllegrexVConstant.inc" + } + + /* R4000ALLEGREX */ + /* R5900 */ SPECIAL_RS_TAG(repr(u32)) diff --git a/tests/asm/r4000allegrex/Makefile b/tests/asm/r4000allegrex/Makefile new file mode 100644 index 00000000..4c33b22b --- /dev/null +++ b/tests/asm/r4000allegrex/Makefile @@ -0,0 +1,27 @@ +# SPDX-FileCopyrightText: © 2024 Decompollaborate +# SPDX-License-Identifier: MIT + +TARGETS := allegrex_instrs_pspsnc.dump.s allegrex_vfpu_pspsnc.dump.s allegrex_vfpu_expecteds_pspsnc.dump.s + + +COMPILER_PATH ?= +WINE ?= wine + +ifeq ($(COMPILER_PATH),) +$(error Please set 'COMPILER_PATH' to the path where the SN toolchain is located) +endif + +CC := $(WINE) "$(COMPILER_PATH)/pspsnc.exe" +OBJDUMP := $(WINE) "${COMPILER_PATH}/snbin.exe" + +COMP_FLAGS := -O2 -g + + +all: $(TARGETS) + + +%_pspsnc.dump.s: %.s + $(CC) -c $(COMP_FLAGS) -o $(<:.s=_pspsnc.o) $< + $(OBJDUMP) -d $(<:.s=_pspsnc.o) > $@ + dos2unix $@ + diff --git a/tests/asm/r4000allegrex/README.txt b/tests/asm/r4000allegrex/README.txt new file mode 100644 index 00000000..f2d3dc67 --- /dev/null +++ b/tests/asm/r4000allegrex/README.txt @@ -0,0 +1,9 @@ +This folder is a small test suite to check how the official SN toolchain +encodes and decodes instructions, so we can properly mimic it. + +The `.dump.s` files are the decoded files by the `snbin.exe` tool. + +To add more cases to the existing files then add them to the `.s` files and run +`make COMPILER_PATH=path/to/psp/sn/toolchain`. This will use `wine` by default. +The `wine` path can be changing by using the setting the `WINE=` variable when +invoking the makefile. diff --git a/tests/asm/r4000allegrex/allegrex_instrs.s b/tests/asm/r4000allegrex/allegrex_instrs.s new file mode 100644 index 00000000..d6cbba86 --- /dev/null +++ b/tests/asm/r4000allegrex/allegrex_instrs.s @@ -0,0 +1,408 @@ +.section .text + +.type count_leading_one,@function +.globl count_leading_one +count_leading_one: + clo $v0, $a0 # + jr $ra +.size count_leading_one, . - count_leading_one + + +.type count_leading_zero,@function +.globl count_leading_zero +count_leading_zero: + clz $v0, $a0 # + jr $ra +.size count_leading_zero, . - count_leading_zero + + +.type multiply_add,@function +.globl multiply_add +multiply_add: + mult $a0, $a1 + madd $a2, $a3 # + mflo $v0 + jr $ra +.size multiply_add, . - multiply_add + + +.type multiply_add_unsigned,@function +.globl multiply_add_unsigned +multiply_add_unsigned: + mult $a0, $a1 + maddu $a2, $a3 # + mflo $v0 + jr $ra +.size multiply_add_unsigned, . - multiply_add_unsigned + + +.type multiply_subtract,@function +.globl multiply_subtract +multiply_subtract: + mult $a0, $a1 + msub $a2, $a3 # + mflo $v0 + jr $ra +.size multiply_subtract, . - multiply_subtract + + +.type multiply_subtract_unsigned,@function +.globl multiply_subtract_unsigned +multiply_subtract_unsigned: + mult $a0, $a1 + msubu $a2, $a3 # + mflo $v0 + jr $ra +.size multiply_subtract_unsigned, . - multiply_subtract_unsigned + + + + +.type select_max,@function +.globl select_max +select_max: + max $v0, $a0, $a1 # + jr $ra +.size select_max, . - select_max + + +.type select_min,@function +.globl select_min +select_min: + min $v0, $a0, $a1 # + jr $ra +.size select_min, . - select_min + + +.type move_conditional_on_not_zero,@function +.globl move_conditional_on_not_zero +move_conditional_on_not_zero: + li $t0, -1 + move $v0, $t0 + movn $v0, $a0, $a1 # + jr $ra +.size move_conditional_on_not_zero, . - move_conditional_on_not_zero + + +.type move_conditional_on_zero,@function +.globl move_conditional_on_zero +move_conditional_on_zero: + li $t0, -1 + move $v0, $t0 + movz $v0, $a0, $a1 # + jr $ra +.size move_conditional_on_zero, . - move_conditional_on_zero + + + + +.type extract_bit_field_2_5,@function +.globl extract_bit_field_2_5 +extract_bit_field_2_5: + ext $v0, $a0, 2, 5 # + jr $ra +.size extract_bit_field_2_5, . - extract_bit_field_2_5 + + +.type extract_bit_field_7_5,@function +.globl extract_bit_field_7_5 +extract_bit_field_7_5: + ext $v0, $a0, 7, 5 # + jr $ra +.size extract_bit_field_7_5, . - extract_bit_field_7_5 + + + +.type insert_bit_field_2_5,@function +.globl insert_bit_field_2_5 +insert_bit_field_2_5: + ins $v0, $a0, 2, 5 # + jr $ra +.size insert_bit_field_2_5, . - insert_bit_field_2_5 + + +.type insert_bit_field_7_5,@function +.globl insert_bit_field_7_5 +insert_bit_field_7_5: + ins $v0, $a0, 7, 5 # + jr $ra +.size insert_bit_field_7_5, . - insert_bit_field_7_5 + + +.type sign_extend_byte,@function +.globl sign_extend_byte +sign_extend_byte: + sll $a0, $a0, 24 + sra $a0, $a0, 24 + seb $v0, $a0 # + jr $ra +.size sign_extend_byte, . - sign_extend_byte + + +.type sign_extend_halfword,@function +.globl sign_extend_halfword +sign_extend_halfword: + sll $a0, $a0, 16 + sra $a0, $a0, 16 + seh $v0, $a0 # + jr $ra +.size sign_extend_halfword, . - sign_extend_halfword + + + +.type bit_reverse,@function +.globl bit_reverse +bit_reverse: + bitrev $v0, $a0 # + jr $ra +.size bit_reverse, . - bit_reverse + + + +.type rotate_word_right_6,@function +.globl rotate_word_right_6 +rotate_word_right_6: + rotr $v0, $a0, 6 # + jr $ra +.size rotate_word_right_6, . - rotate_word_right_6 + + +.type rotate_word_right_19,@function +.globl rotate_word_right_19 +rotate_word_right_19: + rotr $v0, $a0, 19 # + jr $ra +.size rotate_word_right_19, . - rotate_word_right_19 + + + +.type rotate_word_right_variable,@function +.globl rotate_word_right_variable +rotate_word_right_variable: + rotrv $v0, $a0, $a1 # + jr $ra +.size rotate_word_right_variable, . - rotate_word_right_variable + + + + +.type word_swap_bytes_within_halfword,@function +.globl word_swap_bytes_within_halfword +word_swap_bytes_within_halfword: + wsbh $v0, $a0 # + jr $ra +.size word_swap_bytes_within_halfword, . - word_swap_bytes_within_halfword + + +.type word_swap_bytes_within_word,@function +.globl word_swap_bytes_within_word +word_swap_bytes_within_word: + wsbw $v0, $a0 # + jr $ra +.size word_swap_bytes_within_word, . - word_swap_bytes_within_word + + + + + +.type cache_index_invalidate,@function +.globl cache_index_invalidate +cache_index_invalidate: + cache 0x04, 0x0($a0) # + jr $ra +.size cache_index_invalidate, . - cache_index_invalidate + +.type cache_index_unlock,@function +.globl cache_index_unlock +cache_index_unlock: + cache 0x06, 0x0($a0) # + jr $ra +.size cache_index_unlock, . - cache_index_unlock + +.type cache_hit_invalidate,@function +.globl cache_hit_invalidate +cache_hit_invalidate: + cache 0x08, 0x0($a0) # + jr $ra +.size cache_hit_invalidate, . - cache_hit_invalidate + +.type cache_fill,@function +.globl cache_fill +cache_fill: + cache 0x0A, 0x0($a0) # + jr $ra +.size cache_fill, . - cache_fill + +.type cache_fill_with_lock,@function +.globl cache_fill_with_lock +cache_fill_with_lock: + cache 0x0B, 0x0($a0) # + jr $ra +.size cache_fill_with_lock, . - cache_fill_with_lock + +.type cache_index_writeback_invalidate,@function +.globl cache_index_writeback_invalidate +cache_index_writeback_invalidate: + cache 0x14, 0x0($a0) # + jr $ra +.size cache_index_writeback_invalidate, . - cache_index_writeback_invalidate + +.type cache_index_unlock_D,@function +.globl cache_index_unlock_D +cache_index_unlock_D: + cache 0x16, 0x0($a0) # + jr $ra +.size cache_index_unlock_D, . - cache_index_unlock_D + +.type cache_create_dirty_exclusive,@function +.globl cache_create_dirty_exclusive +cache_create_dirty_exclusive: + cache 0x18, 0x0($a0) # + jr $ra +.size cache_create_dirty_exclusive, . - cache_create_dirty_exclusive + +.type cache_hit_invalidate_D,@function +.globl cache_hit_invalidate_D +cache_hit_invalidate_D: + cache 0x19, 0x0($a0) # + jr $ra +.size cache_hit_invalidate_D, . - cache_hit_invalidate_D + +.type cache_hit_writeback,@function +.globl cache_hit_writeback +cache_hit_writeback: + cache 0x1A, 0x0($a0) # + jr $ra +.size cache_hit_writeback, . - cache_hit_writeback + +.type cache_hit_writeback_invalidate,@function +.globl cache_hit_writeback_invalidate +cache_hit_writeback_invalidate: + cache 0x1B, 0x0($a0) # + jr $ra +.size cache_hit_writeback_invalidate, . - cache_hit_writeback_invalidate + +.type cache_create_dirty_exclsuive_with_lock,@function +.globl cache_create_dirty_exclsuive_with_lock +cache_create_dirty_exclsuive_with_lock: + cache 0x1C, 0x0($a0) # + jr $ra +.size cache_create_dirty_exclsuive_with_lock, . - cache_create_dirty_exclsuive_with_lock + +.type cache_fill_D,@function +.globl cache_fill_D +cache_fill_D: + cache 0x1E, 0x0($a0) # + jr $ra +.size cache_fill_D, . - cache_fill_D + +.type cache_fill_with_lock_D,@function +.globl cache_fill_with_lock_D +cache_fill_with_lock_D: + cache 0x1F, 0x0($a0) # + jr $ra +.size cache_fill_with_lock_D, . - cache_fill_with_lock_D + + + + +.type synchronize_shared_memory,@function +.globl synchronize_shared_memory +synchronize_shared_memory: + sync # + jr $ra +.size synchronize_shared_memory, . - synchronize_shared_memory + + + +# sets LLbit to 1 +.type load_linked,@function +.globl load_linked +load_linked: + ll $v0, 0x0($a0) # + jr $ra +.size load_linked, . - load_linked + + + + +.type store_conditional,@function +.globl store_conditional +store_conditional: + sc $a1, 0x0($a0) # + jr $ra +.size store_conditional, . - store_conditional + + + + + + +.type all_caches,@function +.globl all_caches +all_caches: + cache 0x00, 0x0($a0) # + cache 0x01, 0x0($a0) # + cache 0x02, 0x0($a0) # + cache 0x03, 0x0($a0) # + cache 0x04, 0x0($a0) # + cache 0x05, 0x0($a0) # + cache 0x06, 0x0($a0) # + cache 0x07, 0x0($a0) # + cache 0x08, 0x0($a0) # + cache 0x09, 0x0($a0) # + cache 0x0A, 0x0($a0) # + cache 0x0B, 0x0($a0) # + cache 0x0C, 0x0($a0) # + cache 0x0D, 0x0($a0) # + cache 0x0E, 0x0($a0) # + cache 0x0F, 0x0($a0) # + cache 0x10, 0x0($a0) # + cache 0x11, 0x0($a0) # + cache 0x12, 0x0($a0) # + cache 0x13, 0x0($a0) # + cache 0x14, 0x0($a0) # + cache 0x15, 0x0($a0) # + cache 0x16, 0x0($a0) # + cache 0x17, 0x0($a0) # + cache 0x18, 0x0($a0) # + cache 0x19, 0x0($a0) # + cache 0x1A, 0x0($a0) # + cache 0x1B, 0x0($a0) # + cache 0x1C, 0x0($a0) # + cache 0x1D, 0x0($a0) # + cache 0x1E, 0x0($a0) # + cache 0x1F, 0x0($a0) # + jr $ra +.size all_caches, . - all_caches + + + +.type halt,@function +.globl halt +halt: + sleep # + jr $ra +.size halt, . - halt + +.type get_interrupt_state,@function +.globl get_interrupt_state +get_interrupt_state: + mfie $v0 + jr $ra +.size get_interrupt_state, . - get_interrupt_state + +.type disable_interrupts,@function +.globl disable_interrupts +disable_interrupts: + mfie $zero + jr $ra +.size disable_interrupts, . - disable_interrupts + +.type set_interrupt_state,@function +.globl set_interrupt_state +set_interrupt_state: + mtie $a0 + jr $ra +.size set_interrupt_state, . - set_interrupt_state + diff --git a/tests/asm/r4000allegrex/allegrex_instrs_pspsnc.dump.s b/tests/asm/r4000allegrex/allegrex_instrs_pspsnc.dump.s new file mode 100644 index 00000000..55bc60c4 --- /dev/null +++ b/tests/asm/r4000allegrex/allegrex_instrs_pspsnc.dump.s @@ -0,0 +1,269 @@ +Disassembly of section .text: + +count_leading_one: +0x00000000: 0x00801017 clo v0,a0 +0x00000004: 0x03E00008 jr ra +0x00000008: 0x00000000 nop + +count_leading_zero: +0x0000000C: 0x00801016 clz v0,a0 +0x00000010: 0x03E00008 jr ra +0x00000014: 0x00000000 nop + +multiply_add: +0x00000018: 0x00850018 mult a0,a1 +0x0000001C: 0x00C7001C madd a2,a3 +0x00000020: 0x00001012 mflo v0 04 (0000001C) REG +0x00000024: 0x03E00008 jr ra +0x00000028: 0x00000000 nop + +multiply_add_unsigned: +0x0000002C: 0x00850018 mult a0,a1 +0x00000030: 0x00C7001D maddu a2,a3 +0x00000034: 0x00001012 mflo v0 04 (00000030) REG +0x00000038: 0x03E00008 jr ra +0x0000003C: 0x00000000 nop + +multiply_subtract: +0x00000040: 0x00850018 mult a0,a1 +0x00000044: 0x00C7002E msub a2,a3 +0x00000048: 0x00001012 mflo v0 04 (00000044) REG +0x0000004C: 0x03E00008 jr ra +0x00000050: 0x00000000 nop + +multiply_subtract_unsigned: +0x00000054: 0x00850018 mult a0,a1 +0x00000058: 0x00C7002F msubu a2,a3 +0x0000005C: 0x00001012 mflo v0 04 (00000058) REG +0x00000060: 0x03E00008 jr ra +0x00000064: 0x00000000 nop + +select_max: +0x00000068: 0x0085102C max v0,a0,a1 +0x0000006C: 0x03E00008 jr ra +0x00000070: 0x00000000 nop + +select_min: +0x00000074: 0x0085102D min v0,a0,a1 +0x00000078: 0x03E00008 jr ra +0x0000007C: 0x00000000 nop + +move_conditional_on_not_zero: +0x00000080: 0x2408FFFF li t0,-0x1 +0x00000084: 0x01001021 move v0,t0 +0x00000088: 0x0085100B movn v0,a0,a1 +0x0000008C: 0x03E00008 jr ra +0x00000090: 0x00000000 nop + +move_conditional_on_zero: +0x00000094: 0x2408FFFF li t0,-0x1 +0x00000098: 0x01001021 move v0,t0 +0x0000009C: 0x0085100A movz v0,a0,a1 +0x000000A0: 0x03E00008 jr ra +0x000000A4: 0x00000000 nop + +extract_bit_field_2_5: +0x000000A8: 0x7C822080 ext v0,a0,2,5 +0x000000AC: 0x03E00008 jr ra +0x000000B0: 0x00000000 nop + +extract_bit_field_7_5: +0x000000B4: 0x7C8221C0 ext v0,a0,7,5 +0x000000B8: 0x03E00008 jr ra +0x000000BC: 0x00000000 nop + +insert_bit_field_2_5: +0x000000C0: 0x7C823084 ins v0,a0,2,5 +0x000000C4: 0x03E00008 jr ra +0x000000C8: 0x00000000 nop + +insert_bit_field_7_5: +0x000000CC: 0x7C8259C4 ins v0,a0,7,5 +0x000000D0: 0x03E00008 jr ra +0x000000D4: 0x00000000 nop + +sign_extend_byte: +0x000000D8: 0x00042600 sll a0,a0,24 +0x000000DC: 0x00042603 sra a0,a0,24 +0x000000E0: 0x7C041420 seb v0,a0 +0x000000E4: 0x03E00008 jr ra +0x000000E8: 0x00000000 nop + +sign_extend_halfword: +0x000000EC: 0x00042400 sll a0,a0,16 +0x000000F0: 0x00042403 sra a0,a0,16 +0x000000F4: 0x7C041620 seh v0,a0 +0x000000F8: 0x03E00008 jr ra +0x000000FC: 0x00000000 nop + +bit_reverse: +0x00000100: 0x7C041520 bitrev v0,a0 +0x00000104: 0x03E00008 jr ra +0x00000108: 0x00000000 nop + +rotate_word_right_6: +0x0000010C: 0x00241182 rotr v0,a0,6 +0x00000110: 0x03E00008 jr ra +0x00000114: 0x00000000 nop + +rotate_word_right_19: +0x00000118: 0x002414C2 rotr v0,a0,19 +0x0000011C: 0x03E00008 jr ra +0x00000120: 0x00000000 nop + +rotate_word_right_variable: +0x00000124: 0x00A41046 rotrv v0,a0,a1 +0x00000128: 0x03E00008 jr ra +0x0000012C: 0x00000000 nop + +word_swap_bytes_within_halfword: +0x00000130: 0x7C0410A0 wsbh v0,a0 +0x00000134: 0x03E00008 jr ra +0x00000138: 0x00000000 nop + +word_swap_bytes_within_word: +0x0000013C: 0x7C0410E0 wsbw v0,a0 +0x00000140: 0x03E00008 jr ra +0x00000144: 0x00000000 nop + +cache_index_invalidate: +0x00000148: 0xBC840000 cache IXIN,0x0000(a0) +0x0000014C: 0x03E00008 jr ra +0x00000150: 0x00000000 nop + +cache_index_unlock: +0x00000154: 0xBC860000 cache IXUN,0x0000(a0) +0x00000158: 0x03E00008 jr ra +0x0000015C: 0x00000000 nop + +cache_hit_invalidate: +0x00000160: 0xBC880000 cache IHIN,0x0000(a0) +0x00000164: 0x03E00008 jr ra +0x00000168: 0x00000000 nop + +cache_fill: +0x0000016C: 0xBC8A0000 cache IF,0x0000(a0) +0x00000170: 0x03E00008 jr ra +0x00000174: 0x00000000 nop + +cache_fill_with_lock: +0x00000178: 0xBC8B0000 cache IFL,0x0000(a0) +0x0000017C: 0x03E00008 jr ra +0x00000180: 0x00000000 nop + +cache_index_writeback_invalidate: +0x00000184: 0xBC940000 cache DXWBIN,0x0000(a0) +0x00000188: 0x03E00008 jr ra +0x0000018C: 0x00000000 nop + +cache_index_unlock_D: +0x00000190: 0xBC960000 cache DXUN,0x0000(a0) +0x00000194: 0x03E00008 jr ra +0x00000198: 0x00000000 nop + +cache_create_dirty_exclusive: +0x0000019C: 0xBC980000 cache DCDEX,0x0000(a0) +0x000001A0: 0x03E00008 jr ra +0x000001A4: 0x00000000 nop + +cache_hit_invalidate_D: +0x000001A8: 0xBC990000 cache DHIN,0x0000(a0) +0x000001AC: 0x03E00008 jr ra +0x000001B0: 0x00000000 nop + +cache_hit_writeback: +0x000001B4: 0xBC9A0000 cache DHWB,0x0000(a0) +0x000001B8: 0x03E00008 jr ra +0x000001BC: 0x00000000 nop + +cache_hit_writeback_invalidate: +0x000001C0: 0xBC9B0000 cache DHWBIN,0x0000(a0) +0x000001C4: 0x03E00008 jr ra +0x000001C8: 0x00000000 nop + +cache_create_dirty_exclsuive_with_lock: +0x000001CC: 0xBC9C0000 cache DCDEXL,0x0000(a0) +0x000001D0: 0x03E00008 jr ra +0x000001D4: 0x00000000 nop + +cache_fill_D: +0x000001D8: 0xBC9E0000 cache DF,0x0000(a0) +0x000001DC: 0x03E00008 jr ra +0x000001E0: 0x00000000 nop + +cache_fill_with_lock_D: +0x000001E4: 0xBC9F0000 cache DFL,0x0000(a0) +0x000001E8: 0x03E00008 jr ra +0x000001EC: 0x00000000 nop + +synchronize_shared_memory: +0x000001F0: 0x0000000F sync +0x000001F4: 0x03E00008 jr ra +0x000001F8: 0x00000000 nop + +load_linked: +0x000001FC: 0xC0820000 ll v0,0x0000(a0) +0x00000200: 0x03E00008 jr ra +0x00000204: 0x00000000 nop + +store_conditional: +0x00000208: 0xE0850000 sc a1,0x0000(a0) +0x0000020C: 0x03E00008 jr ra +0x00000210: 0x00000000 nop + +all_caches: +0x00000214: 0xBC800000 cache 0x00,0x0000(a0) +0x00000218: 0xBC810000 cache 0x01,0x0000(a0) +0x0000021C: 0xBC820000 cache 0x02,0x0000(a0) +0x00000220: 0xBC830000 cache 0x03,0x0000(a0) +0x00000224: 0xBC840000 cache IXIN,0x0000(a0) +0x00000228: 0xBC850000 cache 0x05,0x0000(a0) +0x0000022C: 0xBC860000 cache IXUN,0x0000(a0) +0x00000230: 0xBC870000 cache 0x07,0x0000(a0) +0x00000234: 0xBC880000 cache IHIN,0x0000(a0) +0x00000238: 0xBC890000 cache 0x09,0x0000(a0) +0x0000023C: 0xBC8A0000 cache IF,0x0000(a0) +0x00000240: 0xBC8B0000 cache IFL,0x0000(a0) +0x00000244: 0xBC8C0000 cache 0x0C,0x0000(a0) +0x00000248: 0xBC8D0000 cache 0x0D,0x0000(a0) +0x0000024C: 0xBC8E0000 cache 0x0E,0x0000(a0) +0x00000250: 0xBC8F0000 cache 0x0F,0x0000(a0) +0x00000254: 0xBC900000 cache 0x10,0x0000(a0) +0x00000258: 0xBC910000 cache 0x11,0x0000(a0) +0x0000025C: 0xBC920000 cache 0x12,0x0000(a0) +0x00000260: 0xBC930000 cache 0x13,0x0000(a0) +0x00000264: 0xBC940000 cache DXWBIN,0x0000(a0) +0x00000268: 0xBC950000 cache 0x15,0x0000(a0) +0x0000026C: 0xBC960000 cache DXUN,0x0000(a0) +0x00000270: 0xBC970000 cache 0x17,0x0000(a0) +0x00000274: 0xBC980000 cache DCDEX,0x0000(a0) +0x00000278: 0xBC990000 cache DHIN,0x0000(a0) +0x0000027C: 0xBC9A0000 cache DHWB,0x0000(a0) +0x00000280: 0xBC9B0000 cache DHWBIN,0x0000(a0) +0x00000284: 0xBC9C0000 cache DCDEXL,0x0000(a0) +0x00000288: 0xBC9D0000 cache 0x1D,0x0000(a0) +0x0000028C: 0xBC9E0000 cache DF,0x0000(a0) +0x00000290: 0xBC9F0000 cache DFL,0x0000(a0) +0x00000294: 0x03E00008 jr ra +0x00000298: 0x00000000 nop + +halt: +0x0000029C: 0x70000000 sleep +0x000002A0: 0x03E00008 jr ra +0x000002A4: 0x00000000 nop + +get_interrupt_state: +0x000002A8: 0x70020024 mfie v0 +0x000002AC: 0x03E00008 jr ra +0x000002B0: 0x00000000 nop + +disable_interrupts: +0x000002B4: 0x70000024 mfie zero +0x000002B8: 0x03E00008 jr ra +0x000002BC: 0x00000000 nop + +set_interrupt_state: +0x000002C0: 0x70040026 mtie a0 +0x000002C4: 0x03E00008 jr ra +0x000002C8: 0x00000000 nop + diff --git a/tests/asm/r4000allegrex/allegrex_vfpu.s b/tests/asm/r4000allegrex/allegrex_vfpu.s new file mode 100644 index 00000000..7f5168c7 --- /dev/null +++ b/tests/asm/r4000allegrex/allegrex_vfpu.s @@ -0,0 +1,5365 @@ +.section .text + + +.type scale_quad_x_quad_matrix,@function +.globl scale_quad_x_quad_matrix +scale_quad_x_quad_matrix: + # vmscl.q + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x01 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x02 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x03 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x04 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x05 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x06 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x07 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x08 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x09 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x0A << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x0B << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x0C << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x0D << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x0E << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x0F << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x10 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x11 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x12 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x13 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x14 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x15 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x16 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x17 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x18 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x19 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x1A << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x1B << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x1C << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x1D << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x1E << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x1F << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x20 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x21 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x22 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x23 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x24 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x25 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x26 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x27 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x28 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x29 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x2A << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x2B << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x2C << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x2D << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x2E << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x2F << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x30 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x31 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x32 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x33 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x34 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x35 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x36 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x37 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x38 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x39 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x3A << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x3B << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x3C << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x3D << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x3E << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x3F << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x40 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x41 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x42 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x43 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x44 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x45 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x46 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x47 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x48 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x49 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x4A << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x4B << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x4C << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x4D << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x4E << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x4F << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x50 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x51 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x52 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x53 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x54 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x55 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x56 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x57 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x58 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x59 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x5A << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x5B << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x5C << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x5D << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x5E << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x5F << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x60 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x61 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x62 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x63 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x64 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x65 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x66 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x67 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x68 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x69 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x6A << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x6B << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x6C << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x6D << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x6E << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x6F << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x70 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x71 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x72 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x73 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x74 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x75 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x76 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x77 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x78 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x79 << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x7A << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x7B << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x7C << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x7D << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x7E << 16) + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x7F << 16) + nop + .word 0xF2008080 | (0x00 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x01 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x02 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x03 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x04 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x05 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x06 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x07 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x08 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x09 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x0A << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x0B << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x0C << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x0D << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x0E << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x0F << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x10 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x11 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x12 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x13 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x14 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x15 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x16 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x17 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x18 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x19 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x1A << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x1B << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x1C << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x1D << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x1E << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x1F << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x20 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x21 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x22 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x23 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x24 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x25 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x26 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x27 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x28 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x29 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x2A << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x2B << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x2C << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x2D << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x2E << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x2F << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x30 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x31 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x32 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x33 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x34 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x35 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x36 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x37 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x38 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x39 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x3A << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x3B << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x3C << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x3D << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x3E << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x3F << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x40 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x41 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x42 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x43 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x44 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x45 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x46 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x47 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x48 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x49 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x4A << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x4B << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x4C << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x4D << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x4E << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x4F << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x50 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x51 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x52 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x53 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x54 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x55 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x56 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x57 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x58 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x59 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x5A << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x5B << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x5C << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x5D << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x5E << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x5F << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x60 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x61 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x62 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x63 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x64 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x65 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x66 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x67 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x68 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x69 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x6A << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x6B << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x6C << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x6D << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x6E << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x6F << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x70 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x71 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x72 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x73 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x74 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x75 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x76 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x77 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x78 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x79 << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x7A << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x7B << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x7C << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x7D << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x7E << 0) | (0x00 << 8) | (0x00 << 16) + .word 0xF2008080 | (0x7F << 0) | (0x00 << 8) | (0x00 << 16) + + jr $ra +.size scale_quad_x_quad_matrix, . - scale_quad_x_quad_matrix + + +vmscl.q M000,M000,S000 +vmscl.q M010,M000,S000 +vmscl.q M020,M000,S000 +vmscl.q M030,M000,S000 +vmscl.q M100,M000,S000 +vmscl.q M110,M000,S000 +vmscl.q M120,M000,S000 + + + + + +.type vector_zero,@function +.globl vector_zero +vector_zero: + # vzero.s + + .word 0xD0060000 | (0x00 << 0) + .word 0xD0060000 | (0x01 << 0) + .word 0xD0060000 | (0x02 << 0) + .word 0xD0060000 | (0x03 << 0) + .word 0xD0060000 | (0x04 << 0) + .word 0xD0060000 | (0x05 << 0) + .word 0xD0060000 | (0x06 << 0) + .word 0xD0060000 | (0x07 << 0) + .word 0xD0060000 | (0x08 << 0) + .word 0xD0060000 | (0x09 << 0) + .word 0xD0060000 | (0x0A << 0) + .word 0xD0060000 | (0x0B << 0) + .word 0xD0060000 | (0x0C << 0) + .word 0xD0060000 | (0x0D << 0) + .word 0xD0060000 | (0x0E << 0) + .word 0xD0060000 | (0x0F << 0) + .word 0xD0060000 | (0x10 << 0) + .word 0xD0060000 | (0x11 << 0) + .word 0xD0060000 | (0x12 << 0) + .word 0xD0060000 | (0x13 << 0) + .word 0xD0060000 | (0x14 << 0) + .word 0xD0060000 | (0x15 << 0) + .word 0xD0060000 | (0x16 << 0) + .word 0xD0060000 | (0x17 << 0) + .word 0xD0060000 | (0x18 << 0) + .word 0xD0060000 | (0x19 << 0) + .word 0xD0060000 | (0x1A << 0) + .word 0xD0060000 | (0x1B << 0) + .word 0xD0060000 | (0x1C << 0) + .word 0xD0060000 | (0x1D << 0) + .word 0xD0060000 | (0x1E << 0) + .word 0xD0060000 | (0x1F << 0) + .word 0xD0060000 | (0x20 << 0) + .word 0xD0060000 | (0x21 << 0) + .word 0xD0060000 | (0x22 << 0) + .word 0xD0060000 | (0x23 << 0) + .word 0xD0060000 | (0x24 << 0) + .word 0xD0060000 | (0x25 << 0) + .word 0xD0060000 | (0x26 << 0) + .word 0xD0060000 | (0x27 << 0) + .word 0xD0060000 | (0x28 << 0) + .word 0xD0060000 | (0x29 << 0) + .word 0xD0060000 | (0x2A << 0) + .word 0xD0060000 | (0x2B << 0) + .word 0xD0060000 | (0x2C << 0) + .word 0xD0060000 | (0x2D << 0) + .word 0xD0060000 | (0x2E << 0) + .word 0xD0060000 | (0x2F << 0) + .word 0xD0060000 | (0x30 << 0) + .word 0xD0060000 | (0x31 << 0) + .word 0xD0060000 | (0x32 << 0) + .word 0xD0060000 | (0x33 << 0) + .word 0xD0060000 | (0x34 << 0) + .word 0xD0060000 | (0x35 << 0) + .word 0xD0060000 | (0x36 << 0) + .word 0xD0060000 | (0x37 << 0) + .word 0xD0060000 | (0x38 << 0) + .word 0xD0060000 | (0x39 << 0) + .word 0xD0060000 | (0x3A << 0) + .word 0xD0060000 | (0x3B << 0) + .word 0xD0060000 | (0x3C << 0) + .word 0xD0060000 | (0x3D << 0) + .word 0xD0060000 | (0x3E << 0) + .word 0xD0060000 | (0x3F << 0) + .word 0xD0060000 | (0x40 << 0) + .word 0xD0060000 | (0x41 << 0) + .word 0xD0060000 | (0x42 << 0) + .word 0xD0060000 | (0x43 << 0) + .word 0xD0060000 | (0x44 << 0) + .word 0xD0060000 | (0x45 << 0) + .word 0xD0060000 | (0x46 << 0) + .word 0xD0060000 | (0x47 << 0) + .word 0xD0060000 | (0x48 << 0) + .word 0xD0060000 | (0x49 << 0) + .word 0xD0060000 | (0x4A << 0) + .word 0xD0060000 | (0x4B << 0) + .word 0xD0060000 | (0x4C << 0) + .word 0xD0060000 | (0x4D << 0) + .word 0xD0060000 | (0x4E << 0) + .word 0xD0060000 | (0x4F << 0) + .word 0xD0060000 | (0x50 << 0) + .word 0xD0060000 | (0x51 << 0) + .word 0xD0060000 | (0x52 << 0) + .word 0xD0060000 | (0x53 << 0) + .word 0xD0060000 | (0x54 << 0) + .word 0xD0060000 | (0x55 << 0) + .word 0xD0060000 | (0x56 << 0) + .word 0xD0060000 | (0x57 << 0) + .word 0xD0060000 | (0x58 << 0) + .word 0xD0060000 | (0x59 << 0) + .word 0xD0060000 | (0x5A << 0) + .word 0xD0060000 | (0x5B << 0) + .word 0xD0060000 | (0x5C << 0) + .word 0xD0060000 | (0x5D << 0) + .word 0xD0060000 | (0x5E << 0) + .word 0xD0060000 | (0x5F << 0) + .word 0xD0060000 | (0x60 << 0) + .word 0xD0060000 | (0x61 << 0) + .word 0xD0060000 | (0x62 << 0) + .word 0xD0060000 | (0x63 << 0) + .word 0xD0060000 | (0x64 << 0) + .word 0xD0060000 | (0x65 << 0) + .word 0xD0060000 | (0x66 << 0) + .word 0xD0060000 | (0x67 << 0) + .word 0xD0060000 | (0x68 << 0) + .word 0xD0060000 | (0x69 << 0) + .word 0xD0060000 | (0x6A << 0) + .word 0xD0060000 | (0x6B << 0) + .word 0xD0060000 | (0x6C << 0) + .word 0xD0060000 | (0x6D << 0) + .word 0xD0060000 | (0x6E << 0) + .word 0xD0060000 | (0x6F << 0) + .word 0xD0060000 | (0x70 << 0) + .word 0xD0060000 | (0x71 << 0) + .word 0xD0060000 | (0x72 << 0) + .word 0xD0060000 | (0x73 << 0) + .word 0xD0060000 | (0x74 << 0) + .word 0xD0060000 | (0x75 << 0) + .word 0xD0060000 | (0x76 << 0) + .word 0xD0060000 | (0x77 << 0) + .word 0xD0060000 | (0x78 << 0) + .word 0xD0060000 | (0x79 << 0) + .word 0xD0060000 | (0x7A << 0) + .word 0xD0060000 | (0x7B << 0) + .word 0xD0060000 | (0x7C << 0) + .word 0xD0060000 | (0x7D << 0) + .word 0xD0060000 | (0x7E << 0) + .word 0xD0060000 | (0x7F << 0) + + + # vzero.p + .word 0xD0060080 | (0x00 << 0) + .word 0xD0060080 | (0x01 << 0) + .word 0xD0060080 | (0x02 << 0) + .word 0xD0060080 | (0x03 << 0) + .word 0xD0060080 | (0x04 << 0) + .word 0xD0060080 | (0x05 << 0) + .word 0xD0060080 | (0x06 << 0) + .word 0xD0060080 | (0x07 << 0) + .word 0xD0060080 | (0x08 << 0) + .word 0xD0060080 | (0x09 << 0) + .word 0xD0060080 | (0x0A << 0) + .word 0xD0060080 | (0x0B << 0) + .word 0xD0060080 | (0x0C << 0) + .word 0xD0060080 | (0x0D << 0) + .word 0xD0060080 | (0x0E << 0) + .word 0xD0060080 | (0x0F << 0) + .word 0xD0060080 | (0x10 << 0) + .word 0xD0060080 | (0x11 << 0) + .word 0xD0060080 | (0x12 << 0) + .word 0xD0060080 | (0x13 << 0) + .word 0xD0060080 | (0x14 << 0) + .word 0xD0060080 | (0x15 << 0) + .word 0xD0060080 | (0x16 << 0) + .word 0xD0060080 | (0x17 << 0) + .word 0xD0060080 | (0x18 << 0) + .word 0xD0060080 | (0x19 << 0) + .word 0xD0060080 | (0x1A << 0) + .word 0xD0060080 | (0x1B << 0) + .word 0xD0060080 | (0x1C << 0) + .word 0xD0060080 | (0x1D << 0) + .word 0xD0060080 | (0x1E << 0) + .word 0xD0060080 | (0x1F << 0) + .word 0xD0060080 | (0x20 << 0) + .word 0xD0060080 | (0x21 << 0) + .word 0xD0060080 | (0x22 << 0) + .word 0xD0060080 | (0x23 << 0) + .word 0xD0060080 | (0x24 << 0) + .word 0xD0060080 | (0x25 << 0) + .word 0xD0060080 | (0x26 << 0) + .word 0xD0060080 | (0x27 << 0) + .word 0xD0060080 | (0x28 << 0) + .word 0xD0060080 | (0x29 << 0) + .word 0xD0060080 | (0x2A << 0) + .word 0xD0060080 | (0x2B << 0) + .word 0xD0060080 | (0x2C << 0) + .word 0xD0060080 | (0x2D << 0) + .word 0xD0060080 | (0x2E << 0) + .word 0xD0060080 | (0x2F << 0) + .word 0xD0060080 | (0x30 << 0) + .word 0xD0060080 | (0x31 << 0) + .word 0xD0060080 | (0x32 << 0) + .word 0xD0060080 | (0x33 << 0) + .word 0xD0060080 | (0x34 << 0) + .word 0xD0060080 | (0x35 << 0) + .word 0xD0060080 | (0x36 << 0) + .word 0xD0060080 | (0x37 << 0) + .word 0xD0060080 | (0x38 << 0) + .word 0xD0060080 | (0x39 << 0) + .word 0xD0060080 | (0x3A << 0) + .word 0xD0060080 | (0x3B << 0) + .word 0xD0060080 | (0x3C << 0) + .word 0xD0060080 | (0x3D << 0) + .word 0xD0060080 | (0x3E << 0) + .word 0xD0060080 | (0x3F << 0) + .word 0xD0060080 | (0x40 << 0) + .word 0xD0060080 | (0x41 << 0) + .word 0xD0060080 | (0x42 << 0) + .word 0xD0060080 | (0x43 << 0) + .word 0xD0060080 | (0x44 << 0) + .word 0xD0060080 | (0x45 << 0) + .word 0xD0060080 | (0x46 << 0) + .word 0xD0060080 | (0x47 << 0) + .word 0xD0060080 | (0x48 << 0) + .word 0xD0060080 | (0x49 << 0) + .word 0xD0060080 | (0x4A << 0) + .word 0xD0060080 | (0x4B << 0) + .word 0xD0060080 | (0x4C << 0) + .word 0xD0060080 | (0x4D << 0) + .word 0xD0060080 | (0x4E << 0) + .word 0xD0060080 | (0x4F << 0) + .word 0xD0060080 | (0x50 << 0) + .word 0xD0060080 | (0x51 << 0) + .word 0xD0060080 | (0x52 << 0) + .word 0xD0060080 | (0x53 << 0) + .word 0xD0060080 | (0x54 << 0) + .word 0xD0060080 | (0x55 << 0) + .word 0xD0060080 | (0x56 << 0) + .word 0xD0060080 | (0x57 << 0) + .word 0xD0060080 | (0x58 << 0) + .word 0xD0060080 | (0x59 << 0) + .word 0xD0060080 | (0x5A << 0) + .word 0xD0060080 | (0x5B << 0) + .word 0xD0060080 | (0x5C << 0) + .word 0xD0060080 | (0x5D << 0) + .word 0xD0060080 | (0x5E << 0) + .word 0xD0060080 | (0x5F << 0) + .word 0xD0060080 | (0x60 << 0) + .word 0xD0060080 | (0x61 << 0) + .word 0xD0060080 | (0x62 << 0) + .word 0xD0060080 | (0x63 << 0) + .word 0xD0060080 | (0x64 << 0) + .word 0xD0060080 | (0x65 << 0) + .word 0xD0060080 | (0x66 << 0) + .word 0xD0060080 | (0x67 << 0) + .word 0xD0060080 | (0x68 << 0) + .word 0xD0060080 | (0x69 << 0) + .word 0xD0060080 | (0x6A << 0) + .word 0xD0060080 | (0x6B << 0) + .word 0xD0060080 | (0x6C << 0) + .word 0xD0060080 | (0x6D << 0) + .word 0xD0060080 | (0x6E << 0) + .word 0xD0060080 | (0x6F << 0) + .word 0xD0060080 | (0x70 << 0) + .word 0xD0060080 | (0x71 << 0) + .word 0xD0060080 | (0x72 << 0) + .word 0xD0060080 | (0x73 << 0) + .word 0xD0060080 | (0x74 << 0) + .word 0xD0060080 | (0x75 << 0) + .word 0xD0060080 | (0x76 << 0) + .word 0xD0060080 | (0x77 << 0) + .word 0xD0060080 | (0x78 << 0) + .word 0xD0060080 | (0x79 << 0) + .word 0xD0060080 | (0x7A << 0) + .word 0xD0060080 | (0x7B << 0) + .word 0xD0060080 | (0x7C << 0) + .word 0xD0060080 | (0x7D << 0) + .word 0xD0060080 | (0x7E << 0) + .word 0xD0060080 | (0x7F << 0) + + + # vzero.t + .word 0xD0068000 | (0x00 << 0) + .word 0xD0068000 | (0x01 << 0) + .word 0xD0068000 | (0x02 << 0) + .word 0xD0068000 | (0x03 << 0) + .word 0xD0068000 | (0x04 << 0) + .word 0xD0068000 | (0x05 << 0) + .word 0xD0068000 | (0x06 << 0) + .word 0xD0068000 | (0x07 << 0) + .word 0xD0068000 | (0x08 << 0) + .word 0xD0068000 | (0x09 << 0) + .word 0xD0068000 | (0x0A << 0) + .word 0xD0068000 | (0x0B << 0) + .word 0xD0068000 | (0x0C << 0) + .word 0xD0068000 | (0x0D << 0) + .word 0xD0068000 | (0x0E << 0) + .word 0xD0068000 | (0x0F << 0) + .word 0xD0068000 | (0x10 << 0) + .word 0xD0068000 | (0x11 << 0) + .word 0xD0068000 | (0x12 << 0) + .word 0xD0068000 | (0x13 << 0) + .word 0xD0068000 | (0x14 << 0) + .word 0xD0068000 | (0x15 << 0) + .word 0xD0068000 | (0x16 << 0) + .word 0xD0068000 | (0x17 << 0) + .word 0xD0068000 | (0x18 << 0) + .word 0xD0068000 | (0x19 << 0) + .word 0xD0068000 | (0x1A << 0) + .word 0xD0068000 | (0x1B << 0) + .word 0xD0068000 | (0x1C << 0) + .word 0xD0068000 | (0x1D << 0) + .word 0xD0068000 | (0x1E << 0) + .word 0xD0068000 | (0x1F << 0) + .word 0xD0068000 | (0x20 << 0) + .word 0xD0068000 | (0x21 << 0) + .word 0xD0068000 | (0x22 << 0) + .word 0xD0068000 | (0x23 << 0) + .word 0xD0068000 | (0x24 << 0) + .word 0xD0068000 | (0x25 << 0) + .word 0xD0068000 | (0x26 << 0) + .word 0xD0068000 | (0x27 << 0) + .word 0xD0068000 | (0x28 << 0) + .word 0xD0068000 | (0x29 << 0) + .word 0xD0068000 | (0x2A << 0) + .word 0xD0068000 | (0x2B << 0) + .word 0xD0068000 | (0x2C << 0) + .word 0xD0068000 | (0x2D << 0) + .word 0xD0068000 | (0x2E << 0) + .word 0xD0068000 | (0x2F << 0) + .word 0xD0068000 | (0x30 << 0) + .word 0xD0068000 | (0x31 << 0) + .word 0xD0068000 | (0x32 << 0) + .word 0xD0068000 | (0x33 << 0) + .word 0xD0068000 | (0x34 << 0) + .word 0xD0068000 | (0x35 << 0) + .word 0xD0068000 | (0x36 << 0) + .word 0xD0068000 | (0x37 << 0) + .word 0xD0068000 | (0x38 << 0) + .word 0xD0068000 | (0x39 << 0) + .word 0xD0068000 | (0x3A << 0) + .word 0xD0068000 | (0x3B << 0) + .word 0xD0068000 | (0x3C << 0) + .word 0xD0068000 | (0x3D << 0) + .word 0xD0068000 | (0x3E << 0) + .word 0xD0068000 | (0x3F << 0) + .word 0xD0068000 | (0x40 << 0) + .word 0xD0068000 | (0x41 << 0) + .word 0xD0068000 | (0x42 << 0) + .word 0xD0068000 | (0x43 << 0) + .word 0xD0068000 | (0x44 << 0) + .word 0xD0068000 | (0x45 << 0) + .word 0xD0068000 | (0x46 << 0) + .word 0xD0068000 | (0x47 << 0) + .word 0xD0068000 | (0x48 << 0) + .word 0xD0068000 | (0x49 << 0) + .word 0xD0068000 | (0x4A << 0) + .word 0xD0068000 | (0x4B << 0) + .word 0xD0068000 | (0x4C << 0) + .word 0xD0068000 | (0x4D << 0) + .word 0xD0068000 | (0x4E << 0) + .word 0xD0068000 | (0x4F << 0) + .word 0xD0068000 | (0x50 << 0) + .word 0xD0068000 | (0x51 << 0) + .word 0xD0068000 | (0x52 << 0) + .word 0xD0068000 | (0x53 << 0) + .word 0xD0068000 | (0x54 << 0) + .word 0xD0068000 | (0x55 << 0) + .word 0xD0068000 | (0x56 << 0) + .word 0xD0068000 | (0x57 << 0) + .word 0xD0068000 | (0x58 << 0) + .word 0xD0068000 | (0x59 << 0) + .word 0xD0068000 | (0x5A << 0) + .word 0xD0068000 | (0x5B << 0) + .word 0xD0068000 | (0x5C << 0) + .word 0xD0068000 | (0x5D << 0) + .word 0xD0068000 | (0x5E << 0) + .word 0xD0068000 | (0x5F << 0) + .word 0xD0068000 | (0x60 << 0) + .word 0xD0068000 | (0x61 << 0) + .word 0xD0068000 | (0x62 << 0) + .word 0xD0068000 | (0x63 << 0) + .word 0xD0068000 | (0x64 << 0) + .word 0xD0068000 | (0x65 << 0) + .word 0xD0068000 | (0x66 << 0) + .word 0xD0068000 | (0x67 << 0) + .word 0xD0068000 | (0x68 << 0) + .word 0xD0068000 | (0x69 << 0) + .word 0xD0068000 | (0x6A << 0) + .word 0xD0068000 | (0x6B << 0) + .word 0xD0068000 | (0x6C << 0) + .word 0xD0068000 | (0x6D << 0) + .word 0xD0068000 | (0x6E << 0) + .word 0xD0068000 | (0x6F << 0) + .word 0xD0068000 | (0x70 << 0) + .word 0xD0068000 | (0x71 << 0) + .word 0xD0068000 | (0x72 << 0) + .word 0xD0068000 | (0x73 << 0) + .word 0xD0068000 | (0x74 << 0) + .word 0xD0068000 | (0x75 << 0) + .word 0xD0068000 | (0x76 << 0) + .word 0xD0068000 | (0x77 << 0) + .word 0xD0068000 | (0x78 << 0) + .word 0xD0068000 | (0x79 << 0) + .word 0xD0068000 | (0x7A << 0) + .word 0xD0068000 | (0x7B << 0) + .word 0xD0068000 | (0x7C << 0) + .word 0xD0068000 | (0x7D << 0) + .word 0xD0068000 | (0x7E << 0) + .word 0xD0068000 | (0x7F << 0) + + # vzero.q + .word 0xD0068080 | (0x00 << 0) + .word 0xD0068080 | (0x01 << 0) + .word 0xD0068080 | (0x02 << 0) + .word 0xD0068080 | (0x03 << 0) + .word 0xD0068080 | (0x04 << 0) + .word 0xD0068080 | (0x05 << 0) + .word 0xD0068080 | (0x06 << 0) + .word 0xD0068080 | (0x07 << 0) + .word 0xD0068080 | (0x08 << 0) + .word 0xD0068080 | (0x09 << 0) + .word 0xD0068080 | (0x0A << 0) + .word 0xD0068080 | (0x0B << 0) + .word 0xD0068080 | (0x0C << 0) + .word 0xD0068080 | (0x0D << 0) + .word 0xD0068080 | (0x0E << 0) + .word 0xD0068080 | (0x0F << 0) + .word 0xD0068080 | (0x10 << 0) + .word 0xD0068080 | (0x11 << 0) + .word 0xD0068080 | (0x12 << 0) + .word 0xD0068080 | (0x13 << 0) + .word 0xD0068080 | (0x14 << 0) + .word 0xD0068080 | (0x15 << 0) + .word 0xD0068080 | (0x16 << 0) + .word 0xD0068080 | (0x17 << 0) + .word 0xD0068080 | (0x18 << 0) + .word 0xD0068080 | (0x19 << 0) + .word 0xD0068080 | (0x1A << 0) + .word 0xD0068080 | (0x1B << 0) + .word 0xD0068080 | (0x1C << 0) + .word 0xD0068080 | (0x1D << 0) + .word 0xD0068080 | (0x1E << 0) + .word 0xD0068080 | (0x1F << 0) + .word 0xD0068080 | (0x20 << 0) + .word 0xD0068080 | (0x21 << 0) + .word 0xD0068080 | (0x22 << 0) + .word 0xD0068080 | (0x23 << 0) + .word 0xD0068080 | (0x24 << 0) + .word 0xD0068080 | (0x25 << 0) + .word 0xD0068080 | (0x26 << 0) + .word 0xD0068080 | (0x27 << 0) + .word 0xD0068080 | (0x28 << 0) + .word 0xD0068080 | (0x29 << 0) + .word 0xD0068080 | (0x2A << 0) + .word 0xD0068080 | (0x2B << 0) + .word 0xD0068080 | (0x2C << 0) + .word 0xD0068080 | (0x2D << 0) + .word 0xD0068080 | (0x2E << 0) + .word 0xD0068080 | (0x2F << 0) + .word 0xD0068080 | (0x30 << 0) + .word 0xD0068080 | (0x31 << 0) + .word 0xD0068080 | (0x32 << 0) + .word 0xD0068080 | (0x33 << 0) + .word 0xD0068080 | (0x34 << 0) + .word 0xD0068080 | (0x35 << 0) + .word 0xD0068080 | (0x36 << 0) + .word 0xD0068080 | (0x37 << 0) + .word 0xD0068080 | (0x38 << 0) + .word 0xD0068080 | (0x39 << 0) + .word 0xD0068080 | (0x3A << 0) + .word 0xD0068080 | (0x3B << 0) + .word 0xD0068080 | (0x3C << 0) + .word 0xD0068080 | (0x3D << 0) + .word 0xD0068080 | (0x3E << 0) + .word 0xD0068080 | (0x3F << 0) + .word 0xD0068080 | (0x40 << 0) + .word 0xD0068080 | (0x41 << 0) + .word 0xD0068080 | (0x42 << 0) + .word 0xD0068080 | (0x43 << 0) + .word 0xD0068080 | (0x44 << 0) + .word 0xD0068080 | (0x45 << 0) + .word 0xD0068080 | (0x46 << 0) + .word 0xD0068080 | (0x47 << 0) + .word 0xD0068080 | (0x48 << 0) + .word 0xD0068080 | (0x49 << 0) + .word 0xD0068080 | (0x4A << 0) + .word 0xD0068080 | (0x4B << 0) + .word 0xD0068080 | (0x4C << 0) + .word 0xD0068080 | (0x4D << 0) + .word 0xD0068080 | (0x4E << 0) + .word 0xD0068080 | (0x4F << 0) + .word 0xD0068080 | (0x50 << 0) + .word 0xD0068080 | (0x51 << 0) + .word 0xD0068080 | (0x52 << 0) + .word 0xD0068080 | (0x53 << 0) + .word 0xD0068080 | (0x54 << 0) + .word 0xD0068080 | (0x55 << 0) + .word 0xD0068080 | (0x56 << 0) + .word 0xD0068080 | (0x57 << 0) + .word 0xD0068080 | (0x58 << 0) + .word 0xD0068080 | (0x59 << 0) + .word 0xD0068080 | (0x5A << 0) + .word 0xD0068080 | (0x5B << 0) + .word 0xD0068080 | (0x5C << 0) + .word 0xD0068080 | (0x5D << 0) + .word 0xD0068080 | (0x5E << 0) + .word 0xD0068080 | (0x5F << 0) + .word 0xD0068080 | (0x60 << 0) + .word 0xD0068080 | (0x61 << 0) + .word 0xD0068080 | (0x62 << 0) + .word 0xD0068080 | (0x63 << 0) + .word 0xD0068080 | (0x64 << 0) + .word 0xD0068080 | (0x65 << 0) + .word 0xD0068080 | (0x66 << 0) + .word 0xD0068080 | (0x67 << 0) + .word 0xD0068080 | (0x68 << 0) + .word 0xD0068080 | (0x69 << 0) + .word 0xD0068080 | (0x6A << 0) + .word 0xD0068080 | (0x6B << 0) + .word 0xD0068080 | (0x6C << 0) + .word 0xD0068080 | (0x6D << 0) + .word 0xD0068080 | (0x6E << 0) + .word 0xD0068080 | (0x6F << 0) + .word 0xD0068080 | (0x70 << 0) + .word 0xD0068080 | (0x71 << 0) + .word 0xD0068080 | (0x72 << 0) + .word 0xD0068080 | (0x73 << 0) + .word 0xD0068080 | (0x74 << 0) + .word 0xD0068080 | (0x75 << 0) + .word 0xD0068080 | (0x76 << 0) + .word 0xD0068080 | (0x77 << 0) + .word 0xD0068080 | (0x78 << 0) + .word 0xD0068080 | (0x79 << 0) + .word 0xD0068080 | (0x7A << 0) + .word 0xD0068080 | (0x7B << 0) + .word 0xD0068080 | (0x7C << 0) + .word 0xD0068080 | (0x7D << 0) + .word 0xD0068080 | (0x7E << 0) + .word 0xD0068080 | (0x7F << 0) + + + jr $ra +.size vector_zero, . - vector_zero + + + +.type matrix_zero,@function +.globl matrix_zero +matrix_zero: + # vmzero.p + .word 0xF3860080 | (0x00 << 0) + .word 0xF3860080 | (0x01 << 0) + .word 0xF3860080 | (0x02 << 0) + .word 0xF3860080 | (0x03 << 0) + .word 0xF3860080 | (0x04 << 0) + .word 0xF3860080 | (0x05 << 0) + .word 0xF3860080 | (0x06 << 0) + .word 0xF3860080 | (0x07 << 0) + .word 0xF3860080 | (0x08 << 0) + .word 0xF3860080 | (0x09 << 0) + .word 0xF3860080 | (0x0A << 0) + .word 0xF3860080 | (0x0B << 0) + .word 0xF3860080 | (0x0C << 0) + .word 0xF3860080 | (0x0D << 0) + .word 0xF3860080 | (0x0E << 0) + .word 0xF3860080 | (0x0F << 0) + .word 0xF3860080 | (0x10 << 0) + .word 0xF3860080 | (0x11 << 0) + .word 0xF3860080 | (0x12 << 0) + .word 0xF3860080 | (0x13 << 0) + .word 0xF3860080 | (0x14 << 0) + .word 0xF3860080 | (0x15 << 0) + .word 0xF3860080 | (0x16 << 0) + .word 0xF3860080 | (0x17 << 0) + .word 0xF3860080 | (0x18 << 0) + .word 0xF3860080 | (0x19 << 0) + .word 0xF3860080 | (0x1A << 0) + .word 0xF3860080 | (0x1B << 0) + .word 0xF3860080 | (0x1C << 0) + .word 0xF3860080 | (0x1D << 0) + .word 0xF3860080 | (0x1E << 0) + .word 0xF3860080 | (0x1F << 0) + .word 0xF3860080 | (0x20 << 0) + .word 0xF3860080 | (0x21 << 0) + .word 0xF3860080 | (0x22 << 0) + .word 0xF3860080 | (0x23 << 0) + .word 0xF3860080 | (0x24 << 0) + .word 0xF3860080 | (0x25 << 0) + .word 0xF3860080 | (0x26 << 0) + .word 0xF3860080 | (0x27 << 0) + .word 0xF3860080 | (0x28 << 0) + .word 0xF3860080 | (0x29 << 0) + .word 0xF3860080 | (0x2A << 0) + .word 0xF3860080 | (0x2B << 0) + .word 0xF3860080 | (0x2C << 0) + .word 0xF3860080 | (0x2D << 0) + .word 0xF3860080 | (0x2E << 0) + .word 0xF3860080 | (0x2F << 0) + .word 0xF3860080 | (0x30 << 0) + .word 0xF3860080 | (0x31 << 0) + .word 0xF3860080 | (0x32 << 0) + .word 0xF3860080 | (0x33 << 0) + .word 0xF3860080 | (0x34 << 0) + .word 0xF3860080 | (0x35 << 0) + .word 0xF3860080 | (0x36 << 0) + .word 0xF3860080 | (0x37 << 0) + .word 0xF3860080 | (0x38 << 0) + .word 0xF3860080 | (0x39 << 0) + .word 0xF3860080 | (0x3A << 0) + .word 0xF3860080 | (0x3B << 0) + .word 0xF3860080 | (0x3C << 0) + .word 0xF3860080 | (0x3D << 0) + .word 0xF3860080 | (0x3E << 0) + .word 0xF3860080 | (0x3F << 0) + .word 0xF3860080 | (0x40 << 0) + .word 0xF3860080 | (0x41 << 0) + .word 0xF3860080 | (0x42 << 0) + .word 0xF3860080 | (0x43 << 0) + .word 0xF3860080 | (0x44 << 0) + .word 0xF3860080 | (0x45 << 0) + .word 0xF3860080 | (0x46 << 0) + .word 0xF3860080 | (0x47 << 0) + .word 0xF3860080 | (0x48 << 0) + .word 0xF3860080 | (0x49 << 0) + .word 0xF3860080 | (0x4A << 0) + .word 0xF3860080 | (0x4B << 0) + .word 0xF3860080 | (0x4C << 0) + .word 0xF3860080 | (0x4D << 0) + .word 0xF3860080 | (0x4E << 0) + .word 0xF3860080 | (0x4F << 0) + .word 0xF3860080 | (0x50 << 0) + .word 0xF3860080 | (0x51 << 0) + .word 0xF3860080 | (0x52 << 0) + .word 0xF3860080 | (0x53 << 0) + .word 0xF3860080 | (0x54 << 0) + .word 0xF3860080 | (0x55 << 0) + .word 0xF3860080 | (0x56 << 0) + .word 0xF3860080 | (0x57 << 0) + .word 0xF3860080 | (0x58 << 0) + .word 0xF3860080 | (0x59 << 0) + .word 0xF3860080 | (0x5A << 0) + .word 0xF3860080 | (0x5B << 0) + .word 0xF3860080 | (0x5C << 0) + .word 0xF3860080 | (0x5D << 0) + .word 0xF3860080 | (0x5E << 0) + .word 0xF3860080 | (0x5F << 0) + .word 0xF3860080 | (0x60 << 0) + .word 0xF3860080 | (0x61 << 0) + .word 0xF3860080 | (0x62 << 0) + .word 0xF3860080 | (0x63 << 0) + .word 0xF3860080 | (0x64 << 0) + .word 0xF3860080 | (0x65 << 0) + .word 0xF3860080 | (0x66 << 0) + .word 0xF3860080 | (0x67 << 0) + .word 0xF3860080 | (0x68 << 0) + .word 0xF3860080 | (0x69 << 0) + .word 0xF3860080 | (0x6A << 0) + .word 0xF3860080 | (0x6B << 0) + .word 0xF3860080 | (0x6C << 0) + .word 0xF3860080 | (0x6D << 0) + .word 0xF3860080 | (0x6E << 0) + .word 0xF3860080 | (0x6F << 0) + .word 0xF3860080 | (0x70 << 0) + .word 0xF3860080 | (0x71 << 0) + .word 0xF3860080 | (0x72 << 0) + .word 0xF3860080 | (0x73 << 0) + .word 0xF3860080 | (0x74 << 0) + .word 0xF3860080 | (0x75 << 0) + .word 0xF3860080 | (0x76 << 0) + .word 0xF3860080 | (0x77 << 0) + .word 0xF3860080 | (0x78 << 0) + .word 0xF3860080 | (0x79 << 0) + .word 0xF3860080 | (0x7A << 0) + .word 0xF3860080 | (0x7B << 0) + .word 0xF3860080 | (0x7C << 0) + .word 0xF3860080 | (0x7D << 0) + .word 0xF3860080 | (0x7E << 0) + .word 0xF3860080 | (0x7F << 0) + + + # vmzero.t + .word 0xF3868000 | (0x00 << 0) + .word 0xF3868000 | (0x01 << 0) + .word 0xF3868000 | (0x02 << 0) + .word 0xF3868000 | (0x03 << 0) + .word 0xF3868000 | (0x04 << 0) + .word 0xF3868000 | (0x05 << 0) + .word 0xF3868000 | (0x06 << 0) + .word 0xF3868000 | (0x07 << 0) + .word 0xF3868000 | (0x08 << 0) + .word 0xF3868000 | (0x09 << 0) + .word 0xF3868000 | (0x0A << 0) + .word 0xF3868000 | (0x0B << 0) + .word 0xF3868000 | (0x0C << 0) + .word 0xF3868000 | (0x0D << 0) + .word 0xF3868000 | (0x0E << 0) + .word 0xF3868000 | (0x0F << 0) + .word 0xF3868000 | (0x10 << 0) + .word 0xF3868000 | (0x11 << 0) + .word 0xF3868000 | (0x12 << 0) + .word 0xF3868000 | (0x13 << 0) + .word 0xF3868000 | (0x14 << 0) + .word 0xF3868000 | (0x15 << 0) + .word 0xF3868000 | (0x16 << 0) + .word 0xF3868000 | (0x17 << 0) + .word 0xF3868000 | (0x18 << 0) + .word 0xF3868000 | (0x19 << 0) + .word 0xF3868000 | (0x1A << 0) + .word 0xF3868000 | (0x1B << 0) + .word 0xF3868000 | (0x1C << 0) + .word 0xF3868000 | (0x1D << 0) + .word 0xF3868000 | (0x1E << 0) + .word 0xF3868000 | (0x1F << 0) + .word 0xF3868000 | (0x20 << 0) + .word 0xF3868000 | (0x21 << 0) + .word 0xF3868000 | (0x22 << 0) + .word 0xF3868000 | (0x23 << 0) + .word 0xF3868000 | (0x24 << 0) + .word 0xF3868000 | (0x25 << 0) + .word 0xF3868000 | (0x26 << 0) + .word 0xF3868000 | (0x27 << 0) + .word 0xF3868000 | (0x28 << 0) + .word 0xF3868000 | (0x29 << 0) + .word 0xF3868000 | (0x2A << 0) + .word 0xF3868000 | (0x2B << 0) + .word 0xF3868000 | (0x2C << 0) + .word 0xF3868000 | (0x2D << 0) + .word 0xF3868000 | (0x2E << 0) + .word 0xF3868000 | (0x2F << 0) + .word 0xF3868000 | (0x30 << 0) + .word 0xF3868000 | (0x31 << 0) + .word 0xF3868000 | (0x32 << 0) + .word 0xF3868000 | (0x33 << 0) + .word 0xF3868000 | (0x34 << 0) + .word 0xF3868000 | (0x35 << 0) + .word 0xF3868000 | (0x36 << 0) + .word 0xF3868000 | (0x37 << 0) + .word 0xF3868000 | (0x38 << 0) + .word 0xF3868000 | (0x39 << 0) + .word 0xF3868000 | (0x3A << 0) + .word 0xF3868000 | (0x3B << 0) + .word 0xF3868000 | (0x3C << 0) + .word 0xF3868000 | (0x3D << 0) + .word 0xF3868000 | (0x3E << 0) + .word 0xF3868000 | (0x3F << 0) + .word 0xF3868000 | (0x40 << 0) + .word 0xF3868000 | (0x41 << 0) + .word 0xF3868000 | (0x42 << 0) + .word 0xF3868000 | (0x43 << 0) + .word 0xF3868000 | (0x44 << 0) + .word 0xF3868000 | (0x45 << 0) + .word 0xF3868000 | (0x46 << 0) + .word 0xF3868000 | (0x47 << 0) + .word 0xF3868000 | (0x48 << 0) + .word 0xF3868000 | (0x49 << 0) + .word 0xF3868000 | (0x4A << 0) + .word 0xF3868000 | (0x4B << 0) + .word 0xF3868000 | (0x4C << 0) + .word 0xF3868000 | (0x4D << 0) + .word 0xF3868000 | (0x4E << 0) + .word 0xF3868000 | (0x4F << 0) + .word 0xF3868000 | (0x50 << 0) + .word 0xF3868000 | (0x51 << 0) + .word 0xF3868000 | (0x52 << 0) + .word 0xF3868000 | (0x53 << 0) + .word 0xF3868000 | (0x54 << 0) + .word 0xF3868000 | (0x55 << 0) + .word 0xF3868000 | (0x56 << 0) + .word 0xF3868000 | (0x57 << 0) + .word 0xF3868000 | (0x58 << 0) + .word 0xF3868000 | (0x59 << 0) + .word 0xF3868000 | (0x5A << 0) + .word 0xF3868000 | (0x5B << 0) + .word 0xF3868000 | (0x5C << 0) + .word 0xF3868000 | (0x5D << 0) + .word 0xF3868000 | (0x5E << 0) + .word 0xF3868000 | (0x5F << 0) + .word 0xF3868000 | (0x60 << 0) + .word 0xF3868000 | (0x61 << 0) + .word 0xF3868000 | (0x62 << 0) + .word 0xF3868000 | (0x63 << 0) + .word 0xF3868000 | (0x64 << 0) + .word 0xF3868000 | (0x65 << 0) + .word 0xF3868000 | (0x66 << 0) + .word 0xF3868000 | (0x67 << 0) + .word 0xF3868000 | (0x68 << 0) + .word 0xF3868000 | (0x69 << 0) + .word 0xF3868000 | (0x6A << 0) + .word 0xF3868000 | (0x6B << 0) + .word 0xF3868000 | (0x6C << 0) + .word 0xF3868000 | (0x6D << 0) + .word 0xF3868000 | (0x6E << 0) + .word 0xF3868000 | (0x6F << 0) + .word 0xF3868000 | (0x70 << 0) + .word 0xF3868000 | (0x71 << 0) + .word 0xF3868000 | (0x72 << 0) + .word 0xF3868000 | (0x73 << 0) + .word 0xF3868000 | (0x74 << 0) + .word 0xF3868000 | (0x75 << 0) + .word 0xF3868000 | (0x76 << 0) + .word 0xF3868000 | (0x77 << 0) + .word 0xF3868000 | (0x78 << 0) + .word 0xF3868000 | (0x79 << 0) + .word 0xF3868000 | (0x7A << 0) + .word 0xF3868000 | (0x7B << 0) + .word 0xF3868000 | (0x7C << 0) + .word 0xF3868000 | (0x7D << 0) + .word 0xF3868000 | (0x7E << 0) + .word 0xF3868000 | (0x7F << 0) + + + # vmzero.q + .word 0xF3868080 | (0x00 << 0) + .word 0xF3868080 | (0x01 << 0) + .word 0xF3868080 | (0x02 << 0) + .word 0xF3868080 | (0x03 << 0) + .word 0xF3868080 | (0x04 << 0) + .word 0xF3868080 | (0x05 << 0) + .word 0xF3868080 | (0x06 << 0) + .word 0xF3868080 | (0x07 << 0) + .word 0xF3868080 | (0x08 << 0) + .word 0xF3868080 | (0x09 << 0) + .word 0xF3868080 | (0x0A << 0) + .word 0xF3868080 | (0x0B << 0) + .word 0xF3868080 | (0x0C << 0) + .word 0xF3868080 | (0x0D << 0) + .word 0xF3868080 | (0x0E << 0) + .word 0xF3868080 | (0x0F << 0) + .word 0xF3868080 | (0x10 << 0) + .word 0xF3868080 | (0x11 << 0) + .word 0xF3868080 | (0x12 << 0) + .word 0xF3868080 | (0x13 << 0) + .word 0xF3868080 | (0x14 << 0) + .word 0xF3868080 | (0x15 << 0) + .word 0xF3868080 | (0x16 << 0) + .word 0xF3868080 | (0x17 << 0) + .word 0xF3868080 | (0x18 << 0) + .word 0xF3868080 | (0x19 << 0) + .word 0xF3868080 | (0x1A << 0) + .word 0xF3868080 | (0x1B << 0) + .word 0xF3868080 | (0x1C << 0) + .word 0xF3868080 | (0x1D << 0) + .word 0xF3868080 | (0x1E << 0) + .word 0xF3868080 | (0x1F << 0) + .word 0xF3868080 | (0x20 << 0) + .word 0xF3868080 | (0x21 << 0) + .word 0xF3868080 | (0x22 << 0) + .word 0xF3868080 | (0x23 << 0) + .word 0xF3868080 | (0x24 << 0) + .word 0xF3868080 | (0x25 << 0) + .word 0xF3868080 | (0x26 << 0) + .word 0xF3868080 | (0x27 << 0) + .word 0xF3868080 | (0x28 << 0) + .word 0xF3868080 | (0x29 << 0) + .word 0xF3868080 | (0x2A << 0) + .word 0xF3868080 | (0x2B << 0) + .word 0xF3868080 | (0x2C << 0) + .word 0xF3868080 | (0x2D << 0) + .word 0xF3868080 | (0x2E << 0) + .word 0xF3868080 | (0x2F << 0) + .word 0xF3868080 | (0x30 << 0) + .word 0xF3868080 | (0x31 << 0) + .word 0xF3868080 | (0x32 << 0) + .word 0xF3868080 | (0x33 << 0) + .word 0xF3868080 | (0x34 << 0) + .word 0xF3868080 | (0x35 << 0) + .word 0xF3868080 | (0x36 << 0) + .word 0xF3868080 | (0x37 << 0) + .word 0xF3868080 | (0x38 << 0) + .word 0xF3868080 | (0x39 << 0) + .word 0xF3868080 | (0x3A << 0) + .word 0xF3868080 | (0x3B << 0) + .word 0xF3868080 | (0x3C << 0) + .word 0xF3868080 | (0x3D << 0) + .word 0xF3868080 | (0x3E << 0) + .word 0xF3868080 | (0x3F << 0) + .word 0xF3868080 | (0x40 << 0) + .word 0xF3868080 | (0x41 << 0) + .word 0xF3868080 | (0x42 << 0) + .word 0xF3868080 | (0x43 << 0) + .word 0xF3868080 | (0x44 << 0) + .word 0xF3868080 | (0x45 << 0) + .word 0xF3868080 | (0x46 << 0) + .word 0xF3868080 | (0x47 << 0) + .word 0xF3868080 | (0x48 << 0) + .word 0xF3868080 | (0x49 << 0) + .word 0xF3868080 | (0x4A << 0) + .word 0xF3868080 | (0x4B << 0) + .word 0xF3868080 | (0x4C << 0) + .word 0xF3868080 | (0x4D << 0) + .word 0xF3868080 | (0x4E << 0) + .word 0xF3868080 | (0x4F << 0) + .word 0xF3868080 | (0x50 << 0) + .word 0xF3868080 | (0x51 << 0) + .word 0xF3868080 | (0x52 << 0) + .word 0xF3868080 | (0x53 << 0) + .word 0xF3868080 | (0x54 << 0) + .word 0xF3868080 | (0x55 << 0) + .word 0xF3868080 | (0x56 << 0) + .word 0xF3868080 | (0x57 << 0) + .word 0xF3868080 | (0x58 << 0) + .word 0xF3868080 | (0x59 << 0) + .word 0xF3868080 | (0x5A << 0) + .word 0xF3868080 | (0x5B << 0) + .word 0xF3868080 | (0x5C << 0) + .word 0xF3868080 | (0x5D << 0) + .word 0xF3868080 | (0x5E << 0) + .word 0xF3868080 | (0x5F << 0) + .word 0xF3868080 | (0x60 << 0) + .word 0xF3868080 | (0x61 << 0) + .word 0xF3868080 | (0x62 << 0) + .word 0xF3868080 | (0x63 << 0) + .word 0xF3868080 | (0x64 << 0) + .word 0xF3868080 | (0x65 << 0) + .word 0xF3868080 | (0x66 << 0) + .word 0xF3868080 | (0x67 << 0) + .word 0xF3868080 | (0x68 << 0) + .word 0xF3868080 | (0x69 << 0) + .word 0xF3868080 | (0x6A << 0) + .word 0xF3868080 | (0x6B << 0) + .word 0xF3868080 | (0x6C << 0) + .word 0xF3868080 | (0x6D << 0) + .word 0xF3868080 | (0x6E << 0) + .word 0xF3868080 | (0x6F << 0) + .word 0xF3868080 | (0x70 << 0) + .word 0xF3868080 | (0x71 << 0) + .word 0xF3868080 | (0x72 << 0) + .word 0xF3868080 | (0x73 << 0) + .word 0xF3868080 | (0x74 << 0) + .word 0xF3868080 | (0x75 << 0) + .word 0xF3868080 | (0x76 << 0) + .word 0xF3868080 | (0x77 << 0) + .word 0xF3868080 | (0x78 << 0) + .word 0xF3868080 | (0x79 << 0) + .word 0xF3868080 | (0x7A << 0) + .word 0xF3868080 | (0x7B << 0) + .word 0xF3868080 | (0x7C << 0) + .word 0xF3868080 | (0x7D << 0) + .word 0xF3868080 | (0x7E << 0) + .word 0xF3868080 | (0x7F << 0) + + + + jr $ra +.size vector_zero, . - vector_zero + + + +.type branches,@function +.globl branches +branches: + .word 0x49000000 | (0x00 << 18) | (0x00 << 16) | (0x02 << 0) + nop + .word 0x49000000 | (0x01 << 18) | (0x01 << 16) | (0x02 << 0) + nop + .word 0x49000000 | (0x02 << 18) | (0x02 << 16) | (0x02 << 0) + nop + .word 0x49000000 | (0x03 << 18) | (0x03 << 16) | (0x02 << 0) + nop + .word 0x49000000 | (0x04 << 18) | (0x00 << 16) | (0x02 << 0) + nop + .word 0x49000000 | (0x05 << 18) | (0x01 << 16) | (0x02 << 0) + nop + .word 0x49000000 | (0x06 << 18) | (0x02 << 16) | (0x02 << 0) + nop + .word 0x49000000 | (0x07 << 18) | (0x03 << 16) | (0x02 << 0) + nop + + + bvf 0, branches_end + nop + +branches_end: + jr $ra +.size branches, . - branches + + + + +.type load_move_store,@function +.globl load_move_store +load_move_store: + # lv.s (vt[6:5]) (vt[4:0]) (offset) (rs) + .word 0xC8000000 | (0x0 << 0) | (0x00 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x01 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x02 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x03 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x04 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x05 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x06 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x07 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x08 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x09 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x0A << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x0B << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x0C << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x0D << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x0E << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x0F << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x10 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x11 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x12 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x13 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x14 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x15 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x16 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x17 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x18 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x19 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x1A << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x1B << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x1C << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x1D << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x1E << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x0 << 0) | (0x1F << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x00 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x01 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x02 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x03 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x04 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x05 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x06 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x07 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x08 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x09 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x0A << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x0B << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x0C << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x0D << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x0E << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x0F << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x10 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x11 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x12 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x13 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x14 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x15 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x16 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x17 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x18 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x19 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x1A << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x1B << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x1C << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x1D << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x1E << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x1 << 0) | (0x1F << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x00 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x01 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x02 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x03 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x04 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x05 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x06 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x07 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x08 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x09 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x0A << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x0B << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x0C << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x0D << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x0E << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x0F << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x10 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x11 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x12 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x13 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x14 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x15 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x16 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x17 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x18 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x19 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x1A << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x1B << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x1C << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x1D << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x1E << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x2 << 0) | (0x1F << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x00 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x01 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x02 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x03 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x04 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x05 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x06 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x07 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x08 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x09 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x0A << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x0B << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x0C << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x0D << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x0E << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x0F << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x10 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x11 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x12 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x13 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x14 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x15 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x16 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x17 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x18 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x19 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x1A << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x1B << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x1C << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x1D << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x1E << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xC8000000 | (0x3 << 0) | (0x1F << 16) | (0x0010 << 2) | (0x04 << 21) + + + # lv.q (vt[5:5]) (vt[4:0]) (offset) (rs) + .word 0xD8000000 | (0x0 << 0) | (0x00 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x01 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x02 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x03 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x04 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x05 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x06 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x07 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x08 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x09 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x0A << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x0B << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x0C << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x0D << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x0E << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x0F << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x10 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x11 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x12 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x13 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x14 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x15 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x16 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x17 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x18 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x19 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x1A << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x1B << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x1C << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x1D << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x1E << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x0 << 0) | (0x1F << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x00 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x01 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x02 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x03 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x04 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x05 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x06 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x07 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x08 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x09 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x0A << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x0B << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x0C << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x0D << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x0E << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x0F << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x10 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x11 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x12 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x13 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x14 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x15 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x16 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x17 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x18 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x19 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x1A << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x1B << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x1C << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x1D << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x1E << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x1 << 0) | (0x1F << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x00 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x01 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x02 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x03 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x04 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x05 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x06 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x07 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x08 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x09 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x0A << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x0B << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x0C << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x0D << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x0E << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x0F << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x10 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x11 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x12 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x13 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x14 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x15 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x16 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x17 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x18 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x19 << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x1A << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x1B << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x1C << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x1D << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x1E << 16) | (0x0010 << 2) | (0x04 << 21) + .word 0xD8000000 | (0x2 << 0) | (0x1F << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x00 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x01 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x02 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x03 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x04 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x05 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x06 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x07 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x08 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x09 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x0A << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x0B << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x0C << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x0D << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x0E << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x0F << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x10 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x11 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x12 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x13 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x14 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x15 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x16 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x17 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x18 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x19 << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x1A << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x1B << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x1C << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x1D << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x1E << 16) | (0x0010 << 2) | (0x04 << 21) + # .word 0xD8000000 | (0x3 << 0) | (0x1F << 16) | (0x0010 << 2) | (0x04 << 21) + + + # mfv + .word 0x48640004 + mfv $a0, S100 + mfvc $a0, $128 # bit 7 is always 1 + .word 0x48640084 + + # mtv + .word 0x48E40004 + # mtvc + .word 0x48E40084 + + + # sv.s + .word 0xE8800040 + # sv.q + .word 0xF8800040 + # sv.q , , wb + .word 0xF8800042 + # svl.q + .word 0xF4800040 + # svr.q + .word 0xF4800042 + + jr $ra +.size load_move_store, . - load_move_store + +.type abs_all,@function +.globl abs_all +abs_all: + + # vabs.s vd vs + .word 0xD0010000 | (0x00 << 8) | (0x00 << 0) + .word 0xD0010000 | (0x01 << 8) | (0x01 << 0) + .word 0xD0010000 | (0x02 << 8) | (0x02 << 0) + .word 0xD0010000 | (0x03 << 8) | (0x03 << 0) + .word 0xD0010000 | (0x04 << 8) | (0x04 << 0) + .word 0xD0010000 | (0x05 << 8) | (0x05 << 0) + .word 0xD0010000 | (0x06 << 8) | (0x06 << 0) + .word 0xD0010000 | (0x07 << 8) | (0x07 << 0) + .word 0xD0010000 | (0x08 << 8) | (0x08 << 0) + .word 0xD0010000 | (0x09 << 8) | (0x09 << 0) + .word 0xD0010000 | (0x0A << 8) | (0x0A << 0) + .word 0xD0010000 | (0x0B << 8) | (0x0B << 0) + .word 0xD0010000 | (0x0C << 8) | (0x0C << 0) + .word 0xD0010000 | (0x0D << 8) | (0x0D << 0) + .word 0xD0010000 | (0x0E << 8) | (0x0E << 0) + .word 0xD0010000 | (0x0F << 8) | (0x0F << 0) + .word 0xD0010000 | (0x10 << 8) | (0x10 << 0) + .word 0xD0010000 | (0x11 << 8) | (0x11 << 0) + .word 0xD0010000 | (0x12 << 8) | (0x12 << 0) + .word 0xD0010000 | (0x13 << 8) | (0x13 << 0) + .word 0xD0010000 | (0x14 << 8) | (0x14 << 0) + .word 0xD0010000 | (0x15 << 8) | (0x15 << 0) + .word 0xD0010000 | (0x16 << 8) | (0x16 << 0) + .word 0xD0010000 | (0x17 << 8) | (0x17 << 0) + .word 0xD0010000 | (0x18 << 8) | (0x18 << 0) + .word 0xD0010000 | (0x19 << 8) | (0x19 << 0) + .word 0xD0010000 | (0x1A << 8) | (0x1A << 0) + .word 0xD0010000 | (0x1B << 8) | (0x1B << 0) + .word 0xD0010000 | (0x1C << 8) | (0x1C << 0) + .word 0xD0010000 | (0x1D << 8) | (0x1D << 0) + .word 0xD0010000 | (0x1E << 8) | (0x1E << 0) + .word 0xD0010000 | (0x1F << 8) | (0x1F << 0) + .word 0xD0010000 | (0x20 << 8) | (0x20 << 0) + .word 0xD0010000 | (0x21 << 8) | (0x21 << 0) + .word 0xD0010000 | (0x22 << 8) | (0x22 << 0) + .word 0xD0010000 | (0x23 << 8) | (0x23 << 0) + .word 0xD0010000 | (0x24 << 8) | (0x24 << 0) + .word 0xD0010000 | (0x25 << 8) | (0x25 << 0) + .word 0xD0010000 | (0x26 << 8) | (0x26 << 0) + .word 0xD0010000 | (0x27 << 8) | (0x27 << 0) + .word 0xD0010000 | (0x28 << 8) | (0x28 << 0) + .word 0xD0010000 | (0x29 << 8) | (0x29 << 0) + .word 0xD0010000 | (0x2A << 8) | (0x2A << 0) + .word 0xD0010000 | (0x2B << 8) | (0x2B << 0) + .word 0xD0010000 | (0x2C << 8) | (0x2C << 0) + .word 0xD0010000 | (0x2D << 8) | (0x2D << 0) + .word 0xD0010000 | (0x2E << 8) | (0x2E << 0) + .word 0xD0010000 | (0x2F << 8) | (0x2F << 0) + .word 0xD0010000 | (0x30 << 8) | (0x30 << 0) + .word 0xD0010000 | (0x31 << 8) | (0x31 << 0) + .word 0xD0010000 | (0x32 << 8) | (0x32 << 0) + .word 0xD0010000 | (0x33 << 8) | (0x33 << 0) + .word 0xD0010000 | (0x34 << 8) | (0x34 << 0) + .word 0xD0010000 | (0x35 << 8) | (0x35 << 0) + .word 0xD0010000 | (0x36 << 8) | (0x36 << 0) + .word 0xD0010000 | (0x37 << 8) | (0x37 << 0) + .word 0xD0010000 | (0x38 << 8) | (0x38 << 0) + .word 0xD0010000 | (0x39 << 8) | (0x39 << 0) + .word 0xD0010000 | (0x3A << 8) | (0x3A << 0) + .word 0xD0010000 | (0x3B << 8) | (0x3B << 0) + .word 0xD0010000 | (0x3C << 8) | (0x3C << 0) + .word 0xD0010000 | (0x3D << 8) | (0x3D << 0) + .word 0xD0010000 | (0x3E << 8) | (0x3E << 0) + .word 0xD0010000 | (0x3F << 8) | (0x3F << 0) + .word 0xD0010000 | (0x40 << 8) | (0x40 << 0) + .word 0xD0010000 | (0x41 << 8) | (0x41 << 0) + .word 0xD0010000 | (0x42 << 8) | (0x42 << 0) + .word 0xD0010000 | (0x43 << 8) | (0x43 << 0) + .word 0xD0010000 | (0x44 << 8) | (0x44 << 0) + .word 0xD0010000 | (0x45 << 8) | (0x45 << 0) + .word 0xD0010000 | (0x46 << 8) | (0x46 << 0) + .word 0xD0010000 | (0x47 << 8) | (0x47 << 0) + .word 0xD0010000 | (0x48 << 8) | (0x48 << 0) + .word 0xD0010000 | (0x49 << 8) | (0x49 << 0) + .word 0xD0010000 | (0x4A << 8) | (0x4A << 0) + .word 0xD0010000 | (0x4B << 8) | (0x4B << 0) + .word 0xD0010000 | (0x4C << 8) | (0x4C << 0) + .word 0xD0010000 | (0x4D << 8) | (0x4D << 0) + .word 0xD0010000 | (0x4E << 8) | (0x4E << 0) + .word 0xD0010000 | (0x4F << 8) | (0x4F << 0) + .word 0xD0010000 | (0x50 << 8) | (0x50 << 0) + .word 0xD0010000 | (0x51 << 8) | (0x51 << 0) + .word 0xD0010000 | (0x52 << 8) | (0x52 << 0) + .word 0xD0010000 | (0x53 << 8) | (0x53 << 0) + .word 0xD0010000 | (0x54 << 8) | (0x54 << 0) + .word 0xD0010000 | (0x55 << 8) | (0x55 << 0) + .word 0xD0010000 | (0x56 << 8) | (0x56 << 0) + .word 0xD0010000 | (0x57 << 8) | (0x57 << 0) + .word 0xD0010000 | (0x58 << 8) | (0x58 << 0) + .word 0xD0010000 | (0x59 << 8) | (0x59 << 0) + .word 0xD0010000 | (0x5A << 8) | (0x5A << 0) + .word 0xD0010000 | (0x5B << 8) | (0x5B << 0) + .word 0xD0010000 | (0x5C << 8) | (0x5C << 0) + .word 0xD0010000 | (0x5D << 8) | (0x5D << 0) + .word 0xD0010000 | (0x5E << 8) | (0x5E << 0) + .word 0xD0010000 | (0x5F << 8) | (0x5F << 0) + .word 0xD0010000 | (0x60 << 8) | (0x60 << 0) + .word 0xD0010000 | (0x61 << 8) | (0x61 << 0) + .word 0xD0010000 | (0x62 << 8) | (0x62 << 0) + .word 0xD0010000 | (0x63 << 8) | (0x63 << 0) + .word 0xD0010000 | (0x64 << 8) | (0x64 << 0) + .word 0xD0010000 | (0x65 << 8) | (0x65 << 0) + .word 0xD0010000 | (0x66 << 8) | (0x66 << 0) + .word 0xD0010000 | (0x67 << 8) | (0x67 << 0) + .word 0xD0010000 | (0x68 << 8) | (0x68 << 0) + .word 0xD0010000 | (0x69 << 8) | (0x69 << 0) + .word 0xD0010000 | (0x6A << 8) | (0x6A << 0) + .word 0xD0010000 | (0x6B << 8) | (0x6B << 0) + .word 0xD0010000 | (0x6C << 8) | (0x6C << 0) + .word 0xD0010000 | (0x6D << 8) | (0x6D << 0) + .word 0xD0010000 | (0x6E << 8) | (0x6E << 0) + .word 0xD0010000 | (0x6F << 8) | (0x6F << 0) + .word 0xD0010000 | (0x70 << 8) | (0x70 << 0) + .word 0xD0010000 | (0x71 << 8) | (0x71 << 0) + .word 0xD0010000 | (0x72 << 8) | (0x72 << 0) + .word 0xD0010000 | (0x73 << 8) | (0x73 << 0) + .word 0xD0010000 | (0x74 << 8) | (0x74 << 0) + .word 0xD0010000 | (0x75 << 8) | (0x75 << 0) + .word 0xD0010000 | (0x76 << 8) | (0x76 << 0) + .word 0xD0010000 | (0x77 << 8) | (0x77 << 0) + .word 0xD0010000 | (0x78 << 8) | (0x78 << 0) + .word 0xD0010000 | (0x79 << 8) | (0x79 << 0) + .word 0xD0010000 | (0x7A << 8) | (0x7A << 0) + .word 0xD0010000 | (0x7B << 8) | (0x7B << 0) + .word 0xD0010000 | (0x7C << 8) | (0x7C << 0) + .word 0xD0010000 | (0x7D << 8) | (0x7D << 0) + .word 0xD0010000 | (0x7E << 8) | (0x7E << 0) + .word 0xD0010000 | (0x7F << 8) | (0x7F << 0) + + # vabs.p vd vs + .word 0xD0010080 | (0x00 << 8) | (0x00 << 0) + .word 0xD0010080 | (0x01 << 8) | (0x01 << 0) + .word 0xD0010080 | (0x02 << 8) | (0x02 << 0) + .word 0xD0010080 | (0x03 << 8) | (0x03 << 0) + .word 0xD0010080 | (0x04 << 8) | (0x04 << 0) + .word 0xD0010080 | (0x05 << 8) | (0x05 << 0) + .word 0xD0010080 | (0x06 << 8) | (0x06 << 0) + .word 0xD0010080 | (0x07 << 8) | (0x07 << 0) + .word 0xD0010080 | (0x08 << 8) | (0x08 << 0) + .word 0xD0010080 | (0x09 << 8) | (0x09 << 0) + .word 0xD0010080 | (0x0A << 8) | (0x0A << 0) + .word 0xD0010080 | (0x0B << 8) | (0x0B << 0) + .word 0xD0010080 | (0x0C << 8) | (0x0C << 0) + .word 0xD0010080 | (0x0D << 8) | (0x0D << 0) + .word 0xD0010080 | (0x0E << 8) | (0x0E << 0) + .word 0xD0010080 | (0x0F << 8) | (0x0F << 0) + .word 0xD0010080 | (0x10 << 8) | (0x10 << 0) + .word 0xD0010080 | (0x11 << 8) | (0x11 << 0) + .word 0xD0010080 | (0x12 << 8) | (0x12 << 0) + .word 0xD0010080 | (0x13 << 8) | (0x13 << 0) + .word 0xD0010080 | (0x14 << 8) | (0x14 << 0) + .word 0xD0010080 | (0x15 << 8) | (0x15 << 0) + .word 0xD0010080 | (0x16 << 8) | (0x16 << 0) + .word 0xD0010080 | (0x17 << 8) | (0x17 << 0) + .word 0xD0010080 | (0x18 << 8) | (0x18 << 0) + .word 0xD0010080 | (0x19 << 8) | (0x19 << 0) + .word 0xD0010080 | (0x1A << 8) | (0x1A << 0) + .word 0xD0010080 | (0x1B << 8) | (0x1B << 0) + .word 0xD0010080 | (0x1C << 8) | (0x1C << 0) + .word 0xD0010080 | (0x1D << 8) | (0x1D << 0) + .word 0xD0010080 | (0x1E << 8) | (0x1E << 0) + .word 0xD0010080 | (0x1F << 8) | (0x1F << 0) + .word 0xD0010080 | (0x20 << 8) | (0x20 << 0) + .word 0xD0010080 | (0x21 << 8) | (0x21 << 0) + .word 0xD0010080 | (0x22 << 8) | (0x22 << 0) + .word 0xD0010080 | (0x23 << 8) | (0x23 << 0) + .word 0xD0010080 | (0x24 << 8) | (0x24 << 0) + .word 0xD0010080 | (0x25 << 8) | (0x25 << 0) + .word 0xD0010080 | (0x26 << 8) | (0x26 << 0) + .word 0xD0010080 | (0x27 << 8) | (0x27 << 0) + .word 0xD0010080 | (0x28 << 8) | (0x28 << 0) + .word 0xD0010080 | (0x29 << 8) | (0x29 << 0) + .word 0xD0010080 | (0x2A << 8) | (0x2A << 0) + .word 0xD0010080 | (0x2B << 8) | (0x2B << 0) + .word 0xD0010080 | (0x2C << 8) | (0x2C << 0) + .word 0xD0010080 | (0x2D << 8) | (0x2D << 0) + .word 0xD0010080 | (0x2E << 8) | (0x2E << 0) + .word 0xD0010080 | (0x2F << 8) | (0x2F << 0) + .word 0xD0010080 | (0x30 << 8) | (0x30 << 0) + .word 0xD0010080 | (0x31 << 8) | (0x31 << 0) + .word 0xD0010080 | (0x32 << 8) | (0x32 << 0) + .word 0xD0010080 | (0x33 << 8) | (0x33 << 0) + .word 0xD0010080 | (0x34 << 8) | (0x34 << 0) + .word 0xD0010080 | (0x35 << 8) | (0x35 << 0) + .word 0xD0010080 | (0x36 << 8) | (0x36 << 0) + .word 0xD0010080 | (0x37 << 8) | (0x37 << 0) + .word 0xD0010080 | (0x38 << 8) | (0x38 << 0) + .word 0xD0010080 | (0x39 << 8) | (0x39 << 0) + .word 0xD0010080 | (0x3A << 8) | (0x3A << 0) + .word 0xD0010080 | (0x3B << 8) | (0x3B << 0) + .word 0xD0010080 | (0x3C << 8) | (0x3C << 0) + .word 0xD0010080 | (0x3D << 8) | (0x3D << 0) + .word 0xD0010080 | (0x3E << 8) | (0x3E << 0) + .word 0xD0010080 | (0x3F << 8) | (0x3F << 0) + .word 0xD0010080 | (0x40 << 8) | (0x40 << 0) + .word 0xD0010080 | (0x41 << 8) | (0x41 << 0) + .word 0xD0010080 | (0x42 << 8) | (0x42 << 0) + .word 0xD0010080 | (0x43 << 8) | (0x43 << 0) + .word 0xD0010080 | (0x44 << 8) | (0x44 << 0) + .word 0xD0010080 | (0x45 << 8) | (0x45 << 0) + .word 0xD0010080 | (0x46 << 8) | (0x46 << 0) + .word 0xD0010080 | (0x47 << 8) | (0x47 << 0) + .word 0xD0010080 | (0x48 << 8) | (0x48 << 0) + .word 0xD0010080 | (0x49 << 8) | (0x49 << 0) + .word 0xD0010080 | (0x4A << 8) | (0x4A << 0) + .word 0xD0010080 | (0x4B << 8) | (0x4B << 0) + .word 0xD0010080 | (0x4C << 8) | (0x4C << 0) + .word 0xD0010080 | (0x4D << 8) | (0x4D << 0) + .word 0xD0010080 | (0x4E << 8) | (0x4E << 0) + .word 0xD0010080 | (0x4F << 8) | (0x4F << 0) + .word 0xD0010080 | (0x50 << 8) | (0x50 << 0) + .word 0xD0010080 | (0x51 << 8) | (0x51 << 0) + .word 0xD0010080 | (0x52 << 8) | (0x52 << 0) + .word 0xD0010080 | (0x53 << 8) | (0x53 << 0) + .word 0xD0010080 | (0x54 << 8) | (0x54 << 0) + .word 0xD0010080 | (0x55 << 8) | (0x55 << 0) + .word 0xD0010080 | (0x56 << 8) | (0x56 << 0) + .word 0xD0010080 | (0x57 << 8) | (0x57 << 0) + .word 0xD0010080 | (0x58 << 8) | (0x58 << 0) + .word 0xD0010080 | (0x59 << 8) | (0x59 << 0) + .word 0xD0010080 | (0x5A << 8) | (0x5A << 0) + .word 0xD0010080 | (0x5B << 8) | (0x5B << 0) + .word 0xD0010080 | (0x5C << 8) | (0x5C << 0) + .word 0xD0010080 | (0x5D << 8) | (0x5D << 0) + .word 0xD0010080 | (0x5E << 8) | (0x5E << 0) + .word 0xD0010080 | (0x5F << 8) | (0x5F << 0) + .word 0xD0010080 | (0x60 << 8) | (0x60 << 0) + .word 0xD0010080 | (0x61 << 8) | (0x61 << 0) + .word 0xD0010080 | (0x62 << 8) | (0x62 << 0) + .word 0xD0010080 | (0x63 << 8) | (0x63 << 0) + .word 0xD0010080 | (0x64 << 8) | (0x64 << 0) + .word 0xD0010080 | (0x65 << 8) | (0x65 << 0) + .word 0xD0010080 | (0x66 << 8) | (0x66 << 0) + .word 0xD0010080 | (0x67 << 8) | (0x67 << 0) + .word 0xD0010080 | (0x68 << 8) | (0x68 << 0) + .word 0xD0010080 | (0x69 << 8) | (0x69 << 0) + .word 0xD0010080 | (0x6A << 8) | (0x6A << 0) + .word 0xD0010080 | (0x6B << 8) | (0x6B << 0) + .word 0xD0010080 | (0x6C << 8) | (0x6C << 0) + .word 0xD0010080 | (0x6D << 8) | (0x6D << 0) + .word 0xD0010080 | (0x6E << 8) | (0x6E << 0) + .word 0xD0010080 | (0x6F << 8) | (0x6F << 0) + .word 0xD0010080 | (0x70 << 8) | (0x70 << 0) + .word 0xD0010080 | (0x71 << 8) | (0x71 << 0) + .word 0xD0010080 | (0x72 << 8) | (0x72 << 0) + .word 0xD0010080 | (0x73 << 8) | (0x73 << 0) + .word 0xD0010080 | (0x74 << 8) | (0x74 << 0) + .word 0xD0010080 | (0x75 << 8) | (0x75 << 0) + .word 0xD0010080 | (0x76 << 8) | (0x76 << 0) + .word 0xD0010080 | (0x77 << 8) | (0x77 << 0) + .word 0xD0010080 | (0x78 << 8) | (0x78 << 0) + .word 0xD0010080 | (0x79 << 8) | (0x79 << 0) + .word 0xD0010080 | (0x7A << 8) | (0x7A << 0) + .word 0xD0010080 | (0x7B << 8) | (0x7B << 0) + .word 0xD0010080 | (0x7C << 8) | (0x7C << 0) + .word 0xD0010080 | (0x7D << 8) | (0x7D << 0) + .word 0xD0010080 | (0x7E << 8) | (0x7E << 0) + .word 0xD0010080 | (0x7F << 8) | (0x7F << 0) + + # vabs.t vd, vs + .word 0xD0018000 | (0x00 << 8) | (0x00 << 0) + .word 0xD0018000 | (0x01 << 8) | (0x01 << 0) + .word 0xD0018000 | (0x02 << 8) | (0x02 << 0) + .word 0xD0018000 | (0x03 << 8) | (0x03 << 0) + .word 0xD0018000 | (0x04 << 8) | (0x04 << 0) + .word 0xD0018000 | (0x05 << 8) | (0x05 << 0) + .word 0xD0018000 | (0x06 << 8) | (0x06 << 0) + .word 0xD0018000 | (0x07 << 8) | (0x07 << 0) + .word 0xD0018000 | (0x08 << 8) | (0x08 << 0) + .word 0xD0018000 | (0x09 << 8) | (0x09 << 0) + .word 0xD0018000 | (0x0A << 8) | (0x0A << 0) + .word 0xD0018000 | (0x0B << 8) | (0x0B << 0) + .word 0xD0018000 | (0x0C << 8) | (0x0C << 0) + .word 0xD0018000 | (0x0D << 8) | (0x0D << 0) + .word 0xD0018000 | (0x0E << 8) | (0x0E << 0) + .word 0xD0018000 | (0x0F << 8) | (0x0F << 0) + .word 0xD0018000 | (0x10 << 8) | (0x10 << 0) + .word 0xD0018000 | (0x11 << 8) | (0x11 << 0) + .word 0xD0018000 | (0x12 << 8) | (0x12 << 0) + .word 0xD0018000 | (0x13 << 8) | (0x13 << 0) + .word 0xD0018000 | (0x14 << 8) | (0x14 << 0) + .word 0xD0018000 | (0x15 << 8) | (0x15 << 0) + .word 0xD0018000 | (0x16 << 8) | (0x16 << 0) + .word 0xD0018000 | (0x17 << 8) | (0x17 << 0) + .word 0xD0018000 | (0x18 << 8) | (0x18 << 0) + .word 0xD0018000 | (0x19 << 8) | (0x19 << 0) + .word 0xD0018000 | (0x1A << 8) | (0x1A << 0) + .word 0xD0018000 | (0x1B << 8) | (0x1B << 0) + .word 0xD0018000 | (0x1C << 8) | (0x1C << 0) + .word 0xD0018000 | (0x1D << 8) | (0x1D << 0) + .word 0xD0018000 | (0x1E << 8) | (0x1E << 0) + .word 0xD0018000 | (0x1F << 8) | (0x1F << 0) + .word 0xD0018000 | (0x20 << 8) | (0x20 << 0) + .word 0xD0018000 | (0x21 << 8) | (0x21 << 0) + .word 0xD0018000 | (0x22 << 8) | (0x22 << 0) + .word 0xD0018000 | (0x23 << 8) | (0x23 << 0) + .word 0xD0018000 | (0x24 << 8) | (0x24 << 0) + .word 0xD0018000 | (0x25 << 8) | (0x25 << 0) + .word 0xD0018000 | (0x26 << 8) | (0x26 << 0) + .word 0xD0018000 | (0x27 << 8) | (0x27 << 0) + .word 0xD0018000 | (0x28 << 8) | (0x28 << 0) + .word 0xD0018000 | (0x29 << 8) | (0x29 << 0) + .word 0xD0018000 | (0x2A << 8) | (0x2A << 0) + .word 0xD0018000 | (0x2B << 8) | (0x2B << 0) + .word 0xD0018000 | (0x2C << 8) | (0x2C << 0) + .word 0xD0018000 | (0x2D << 8) | (0x2D << 0) + .word 0xD0018000 | (0x2E << 8) | (0x2E << 0) + .word 0xD0018000 | (0x2F << 8) | (0x2F << 0) + .word 0xD0018000 | (0x30 << 8) | (0x30 << 0) + .word 0xD0018000 | (0x31 << 8) | (0x31 << 0) + .word 0xD0018000 | (0x32 << 8) | (0x32 << 0) + .word 0xD0018000 | (0x33 << 8) | (0x33 << 0) + .word 0xD0018000 | (0x34 << 8) | (0x34 << 0) + .word 0xD0018000 | (0x35 << 8) | (0x35 << 0) + .word 0xD0018000 | (0x36 << 8) | (0x36 << 0) + .word 0xD0018000 | (0x37 << 8) | (0x37 << 0) + .word 0xD0018000 | (0x38 << 8) | (0x38 << 0) + .word 0xD0018000 | (0x39 << 8) | (0x39 << 0) + .word 0xD0018000 | (0x3A << 8) | (0x3A << 0) + .word 0xD0018000 | (0x3B << 8) | (0x3B << 0) + .word 0xD0018000 | (0x3C << 8) | (0x3C << 0) + .word 0xD0018000 | (0x3D << 8) | (0x3D << 0) + .word 0xD0018000 | (0x3E << 8) | (0x3E << 0) + .word 0xD0018000 | (0x3F << 8) | (0x3F << 0) + .word 0xD0018000 | (0x40 << 8) | (0x40 << 0) + .word 0xD0018000 | (0x41 << 8) | (0x41 << 0) + .word 0xD0018000 | (0x42 << 8) | (0x42 << 0) + .word 0xD0018000 | (0x43 << 8) | (0x43 << 0) + .word 0xD0018000 | (0x44 << 8) | (0x44 << 0) + .word 0xD0018000 | (0x45 << 8) | (0x45 << 0) + .word 0xD0018000 | (0x46 << 8) | (0x46 << 0) + .word 0xD0018000 | (0x47 << 8) | (0x47 << 0) + .word 0xD0018000 | (0x48 << 8) | (0x48 << 0) + .word 0xD0018000 | (0x49 << 8) | (0x49 << 0) + .word 0xD0018000 | (0x4A << 8) | (0x4A << 0) + .word 0xD0018000 | (0x4B << 8) | (0x4B << 0) + .word 0xD0018000 | (0x4C << 8) | (0x4C << 0) + .word 0xD0018000 | (0x4D << 8) | (0x4D << 0) + .word 0xD0018000 | (0x4E << 8) | (0x4E << 0) + .word 0xD0018000 | (0x4F << 8) | (0x4F << 0) + .word 0xD0018000 | (0x50 << 8) | (0x50 << 0) + .word 0xD0018000 | (0x51 << 8) | (0x51 << 0) + .word 0xD0018000 | (0x52 << 8) | (0x52 << 0) + .word 0xD0018000 | (0x53 << 8) | (0x53 << 0) + .word 0xD0018000 | (0x54 << 8) | (0x54 << 0) + .word 0xD0018000 | (0x55 << 8) | (0x55 << 0) + .word 0xD0018000 | (0x56 << 8) | (0x56 << 0) + .word 0xD0018000 | (0x57 << 8) | (0x57 << 0) + .word 0xD0018000 | (0x58 << 8) | (0x58 << 0) + .word 0xD0018000 | (0x59 << 8) | (0x59 << 0) + .word 0xD0018000 | (0x5A << 8) | (0x5A << 0) + .word 0xD0018000 | (0x5B << 8) | (0x5B << 0) + .word 0xD0018000 | (0x5C << 8) | (0x5C << 0) + .word 0xD0018000 | (0x5D << 8) | (0x5D << 0) + .word 0xD0018000 | (0x5E << 8) | (0x5E << 0) + .word 0xD0018000 | (0x5F << 8) | (0x5F << 0) + .word 0xD0018000 | (0x60 << 8) | (0x60 << 0) + .word 0xD0018000 | (0x61 << 8) | (0x61 << 0) + .word 0xD0018000 | (0x62 << 8) | (0x62 << 0) + .word 0xD0018000 | (0x63 << 8) | (0x63 << 0) + .word 0xD0018000 | (0x64 << 8) | (0x64 << 0) + .word 0xD0018000 | (0x65 << 8) | (0x65 << 0) + .word 0xD0018000 | (0x66 << 8) | (0x66 << 0) + .word 0xD0018000 | (0x67 << 8) | (0x67 << 0) + .word 0xD0018000 | (0x68 << 8) | (0x68 << 0) + .word 0xD0018000 | (0x69 << 8) | (0x69 << 0) + .word 0xD0018000 | (0x6A << 8) | (0x6A << 0) + .word 0xD0018000 | (0x6B << 8) | (0x6B << 0) + .word 0xD0018000 | (0x6C << 8) | (0x6C << 0) + .word 0xD0018000 | (0x6D << 8) | (0x6D << 0) + .word 0xD0018000 | (0x6E << 8) | (0x6E << 0) + .word 0xD0018000 | (0x6F << 8) | (0x6F << 0) + .word 0xD0018000 | (0x70 << 8) | (0x70 << 0) + .word 0xD0018000 | (0x71 << 8) | (0x71 << 0) + .word 0xD0018000 | (0x72 << 8) | (0x72 << 0) + .word 0xD0018000 | (0x73 << 8) | (0x73 << 0) + .word 0xD0018000 | (0x74 << 8) | (0x74 << 0) + .word 0xD0018000 | (0x75 << 8) | (0x75 << 0) + .word 0xD0018000 | (0x76 << 8) | (0x76 << 0) + .word 0xD0018000 | (0x77 << 8) | (0x77 << 0) + .word 0xD0018000 | (0x78 << 8) | (0x78 << 0) + .word 0xD0018000 | (0x79 << 8) | (0x79 << 0) + .word 0xD0018000 | (0x7A << 8) | (0x7A << 0) + .word 0xD0018000 | (0x7B << 8) | (0x7B << 0) + .word 0xD0018000 | (0x7C << 8) | (0x7C << 0) + .word 0xD0018000 | (0x7D << 8) | (0x7D << 0) + .word 0xD0018000 | (0x7E << 8) | (0x7E << 0) + .word 0xD0018000 | (0x7F << 8) | (0x7F << 0) + + # vabs.q vd, vs + .word 0xD0018080 | (0x00 << 8) | (0x00 << 0) + .word 0xD0018080 | (0x01 << 8) | (0x01 << 0) + .word 0xD0018080 | (0x02 << 8) | (0x02 << 0) + .word 0xD0018080 | (0x03 << 8) | (0x03 << 0) + .word 0xD0018080 | (0x04 << 8) | (0x04 << 0) + .word 0xD0018080 | (0x05 << 8) | (0x05 << 0) + .word 0xD0018080 | (0x06 << 8) | (0x06 << 0) + .word 0xD0018080 | (0x07 << 8) | (0x07 << 0) + .word 0xD0018080 | (0x08 << 8) | (0x08 << 0) + .word 0xD0018080 | (0x09 << 8) | (0x09 << 0) + .word 0xD0018080 | (0x0A << 8) | (0x0A << 0) + .word 0xD0018080 | (0x0B << 8) | (0x0B << 0) + .word 0xD0018080 | (0x0C << 8) | (0x0C << 0) + .word 0xD0018080 | (0x0D << 8) | (0x0D << 0) + .word 0xD0018080 | (0x0E << 8) | (0x0E << 0) + .word 0xD0018080 | (0x0F << 8) | (0x0F << 0) + .word 0xD0018080 | (0x10 << 8) | (0x10 << 0) + .word 0xD0018080 | (0x11 << 8) | (0x11 << 0) + .word 0xD0018080 | (0x12 << 8) | (0x12 << 0) + .word 0xD0018080 | (0x13 << 8) | (0x13 << 0) + .word 0xD0018080 | (0x14 << 8) | (0x14 << 0) + .word 0xD0018080 | (0x15 << 8) | (0x15 << 0) + .word 0xD0018080 | (0x16 << 8) | (0x16 << 0) + .word 0xD0018080 | (0x17 << 8) | (0x17 << 0) + .word 0xD0018080 | (0x18 << 8) | (0x18 << 0) + .word 0xD0018080 | (0x19 << 8) | (0x19 << 0) + .word 0xD0018080 | (0x1A << 8) | (0x1A << 0) + .word 0xD0018080 | (0x1B << 8) | (0x1B << 0) + .word 0xD0018080 | (0x1C << 8) | (0x1C << 0) + .word 0xD0018080 | (0x1D << 8) | (0x1D << 0) + .word 0xD0018080 | (0x1E << 8) | (0x1E << 0) + .word 0xD0018080 | (0x1F << 8) | (0x1F << 0) + .word 0xD0018080 | (0x20 << 8) | (0x20 << 0) + .word 0xD0018080 | (0x21 << 8) | (0x21 << 0) + .word 0xD0018080 | (0x22 << 8) | (0x22 << 0) + .word 0xD0018080 | (0x23 << 8) | (0x23 << 0) + .word 0xD0018080 | (0x24 << 8) | (0x24 << 0) + .word 0xD0018080 | (0x25 << 8) | (0x25 << 0) + .word 0xD0018080 | (0x26 << 8) | (0x26 << 0) + .word 0xD0018080 | (0x27 << 8) | (0x27 << 0) + .word 0xD0018080 | (0x28 << 8) | (0x28 << 0) + .word 0xD0018080 | (0x29 << 8) | (0x29 << 0) + .word 0xD0018080 | (0x2A << 8) | (0x2A << 0) + .word 0xD0018080 | (0x2B << 8) | (0x2B << 0) + .word 0xD0018080 | (0x2C << 8) | (0x2C << 0) + .word 0xD0018080 | (0x2D << 8) | (0x2D << 0) + .word 0xD0018080 | (0x2E << 8) | (0x2E << 0) + .word 0xD0018080 | (0x2F << 8) | (0x2F << 0) + .word 0xD0018080 | (0x30 << 8) | (0x30 << 0) + .word 0xD0018080 | (0x31 << 8) | (0x31 << 0) + .word 0xD0018080 | (0x32 << 8) | (0x32 << 0) + .word 0xD0018080 | (0x33 << 8) | (0x33 << 0) + .word 0xD0018080 | (0x34 << 8) | (0x34 << 0) + .word 0xD0018080 | (0x35 << 8) | (0x35 << 0) + .word 0xD0018080 | (0x36 << 8) | (0x36 << 0) + .word 0xD0018080 | (0x37 << 8) | (0x37 << 0) + .word 0xD0018080 | (0x38 << 8) | (0x38 << 0) + .word 0xD0018080 | (0x39 << 8) | (0x39 << 0) + .word 0xD0018080 | (0x3A << 8) | (0x3A << 0) + .word 0xD0018080 | (0x3B << 8) | (0x3B << 0) + .word 0xD0018080 | (0x3C << 8) | (0x3C << 0) + .word 0xD0018080 | (0x3D << 8) | (0x3D << 0) + .word 0xD0018080 | (0x3E << 8) | (0x3E << 0) + .word 0xD0018080 | (0x3F << 8) | (0x3F << 0) + .word 0xD0018080 | (0x40 << 8) | (0x40 << 0) + .word 0xD0018080 | (0x41 << 8) | (0x41 << 0) + .word 0xD0018080 | (0x42 << 8) | (0x42 << 0) + .word 0xD0018080 | (0x43 << 8) | (0x43 << 0) + .word 0xD0018080 | (0x44 << 8) | (0x44 << 0) + .word 0xD0018080 | (0x45 << 8) | (0x45 << 0) + .word 0xD0018080 | (0x46 << 8) | (0x46 << 0) + .word 0xD0018080 | (0x47 << 8) | (0x47 << 0) + .word 0xD0018080 | (0x48 << 8) | (0x48 << 0) + .word 0xD0018080 | (0x49 << 8) | (0x49 << 0) + .word 0xD0018080 | (0x4A << 8) | (0x4A << 0) + .word 0xD0018080 | (0x4B << 8) | (0x4B << 0) + .word 0xD0018080 | (0x4C << 8) | (0x4C << 0) + .word 0xD0018080 | (0x4D << 8) | (0x4D << 0) + .word 0xD0018080 | (0x4E << 8) | (0x4E << 0) + .word 0xD0018080 | (0x4F << 8) | (0x4F << 0) + .word 0xD0018080 | (0x50 << 8) | (0x50 << 0) + .word 0xD0018080 | (0x51 << 8) | (0x51 << 0) + .word 0xD0018080 | (0x52 << 8) | (0x52 << 0) + .word 0xD0018080 | (0x53 << 8) | (0x53 << 0) + .word 0xD0018080 | (0x54 << 8) | (0x54 << 0) + .word 0xD0018080 | (0x55 << 8) | (0x55 << 0) + .word 0xD0018080 | (0x56 << 8) | (0x56 << 0) + .word 0xD0018080 | (0x57 << 8) | (0x57 << 0) + .word 0xD0018080 | (0x58 << 8) | (0x58 << 0) + .word 0xD0018080 | (0x59 << 8) | (0x59 << 0) + .word 0xD0018080 | (0x5A << 8) | (0x5A << 0) + .word 0xD0018080 | (0x5B << 8) | (0x5B << 0) + .word 0xD0018080 | (0x5C << 8) | (0x5C << 0) + .word 0xD0018080 | (0x5D << 8) | (0x5D << 0) + .word 0xD0018080 | (0x5E << 8) | (0x5E << 0) + .word 0xD0018080 | (0x5F << 8) | (0x5F << 0) + .word 0xD0018080 | (0x60 << 8) | (0x60 << 0) + .word 0xD0018080 | (0x61 << 8) | (0x61 << 0) + .word 0xD0018080 | (0x62 << 8) | (0x62 << 0) + .word 0xD0018080 | (0x63 << 8) | (0x63 << 0) + .word 0xD0018080 | (0x64 << 8) | (0x64 << 0) + .word 0xD0018080 | (0x65 << 8) | (0x65 << 0) + .word 0xD0018080 | (0x66 << 8) | (0x66 << 0) + .word 0xD0018080 | (0x67 << 8) | (0x67 << 0) + .word 0xD0018080 | (0x68 << 8) | (0x68 << 0) + .word 0xD0018080 | (0x69 << 8) | (0x69 << 0) + .word 0xD0018080 | (0x6A << 8) | (0x6A << 0) + .word 0xD0018080 | (0x6B << 8) | (0x6B << 0) + .word 0xD0018080 | (0x6C << 8) | (0x6C << 0) + .word 0xD0018080 | (0x6D << 8) | (0x6D << 0) + .word 0xD0018080 | (0x6E << 8) | (0x6E << 0) + .word 0xD0018080 | (0x6F << 8) | (0x6F << 0) + .word 0xD0018080 | (0x70 << 8) | (0x70 << 0) + .word 0xD0018080 | (0x71 << 8) | (0x71 << 0) + .word 0xD0018080 | (0x72 << 8) | (0x72 << 0) + .word 0xD0018080 | (0x73 << 8) | (0x73 << 0) + .word 0xD0018080 | (0x74 << 8) | (0x74 << 0) + .word 0xD0018080 | (0x75 << 8) | (0x75 << 0) + .word 0xD0018080 | (0x76 << 8) | (0x76 << 0) + .word 0xD0018080 | (0x77 << 8) | (0x77 << 0) + .word 0xD0018080 | (0x78 << 8) | (0x78 << 0) + .word 0xD0018080 | (0x79 << 8) | (0x79 << 0) + .word 0xD0018080 | (0x7A << 8) | (0x7A << 0) + .word 0xD0018080 | (0x7B << 8) | (0x7B << 0) + .word 0xD0018080 | (0x7C << 8) | (0x7C << 0) + .word 0xD0018080 | (0x7D << 8) | (0x7D << 0) + .word 0xD0018080 | (0x7E << 8) | (0x7E << 0) + .word 0xD0018080 | (0x7F << 8) | (0x7F << 0) + + jr $ra +.size abs_all, . - abs_all + +.type vfpu0_all,@function +.globl vfpu0_all +vfpu0_all: + # VFPU0 + .word 0x60000000 | 0x00000000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x00000080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x00008000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x00008080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x00800000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x00800080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x00808000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x00808080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x01000000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x01000080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x01008000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x01008080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x01800000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x01800080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x01808000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x01808080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x02000000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x02000080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x02008000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x02008080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x02800000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x02800080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x02808000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x02808080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x03000000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x03000080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x03008000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x03008080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x03800000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x03800080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x03808000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x60000000 | 0x03808080 | 0x00000000 | 0x00001000 | 0x00000040 + + jr $ra +.size vfpu0_all, . - vfpu0_all + +.type vfpu1_all,@function +.globl vfpu1_all +vfpu1_all: + # VFPU1 + .word 0x64000000 | 0x00000000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x00000080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x00008000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x00008080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x00800000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x00800080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x00808000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x00808080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x01000000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x01000080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x01008000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x01008080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x01800000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x01800080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x01808000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x01808080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x02000000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x02000080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x02008000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x02008080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x02800000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x02800080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x02808000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x02808080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x03000000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x03000080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x03008000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x03008080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x03800000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x03800080 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x03808000 | 0x00000000 | 0x00001000 | 0x00000040 + .word 0x64000000 | 0x03808080 | 0x00000000 | 0x00001000 | 0x00000040 + + jr $ra +.size vfpu1_all, . - vfpu1_all + +.type vfpu3_all,@function +.globl vfpu3_all +vfpu3_all: + # VFPU3 + .word 0x6C000000 | 0x00000000 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x00000080 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x00008000 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x00008080 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x00800000 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x00800080 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x00808000 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x00808080 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x01000000 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x01000080 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x01008000 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x01008080 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x01800000 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x01800080 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x01808000 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x01808080 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x02000000 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x02000080 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x02008000 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x02008080 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x02800000 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x02800080 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x02808000 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x02808080 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x03000000 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x03000080 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x03008000 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x03008080 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x03800000 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x03800080 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x03808000 | 0x00400000 | 0x00001000 | 0x00000001 + .word 0x6C000000 | 0x03808080 | 0x00400000 | 0x00001000 | 0x00000001 + + jr $ra +.size vfpu3_all, . - vfpu3_all + +.type vcmp_all,@function +.globl vcmp_all +vcmp_all: + # vcmp. + .word 0x6C000000 | 0x00000000 | 0x00400000 | 0x00000800 | 0x00000000 + .word 0x6C000000 | 0x00000080 | 0x00400000 | 0x00000800 | 0x00000000 + .word 0x6C000000 | 0x00008000 | 0x00400000 | 0x00000800 | 0x00000000 + .word 0x6C000000 | 0x00008080 | 0x00400000 | 0x00000800 | 0x00000000 + .word 0x6C000000 | 0x00000000 | 0x00400000 | 0x00000800 | 0x00000001 + .word 0x6C000000 | 0x00000080 | 0x00400000 | 0x00000800 | 0x00000001 + .word 0x6C000000 | 0x00008000 | 0x00400000 | 0x00000800 | 0x00000001 + .word 0x6C000000 | 0x00008080 | 0x00400000 | 0x00000800 | 0x00000001 + .word 0x6C000000 | 0x00000000 | 0x00400000 | 0x00000800 | 0x00000002 + .word 0x6C000000 | 0x00000080 | 0x00400000 | 0x00000800 | 0x00000002 + .word 0x6C000000 | 0x00008000 | 0x00400000 | 0x00000800 | 0x00000002 + .word 0x6C000000 | 0x00008080 | 0x00400000 | 0x00000800 | 0x00000002 + .word 0x6C000000 | 0x00000000 | 0x00400000 | 0x00000800 | 0x00000003 + .word 0x6C000000 | 0x00000080 | 0x00400000 | 0x00000800 | 0x00000003 + .word 0x6C000000 | 0x00008000 | 0x00400000 | 0x00000800 | 0x00000003 + .word 0x6C000000 | 0x00008080 | 0x00400000 | 0x00000800 | 0x00000003 + .word 0x6C000000 | 0x00000000 | 0x00400000 | 0x00000800 | 0x00000004 + .word 0x6C000000 | 0x00000080 | 0x00400000 | 0x00000800 | 0x00000004 + .word 0x6C000000 | 0x00008000 | 0x00400000 | 0x00000800 | 0x00000004 + .word 0x6C000000 | 0x00008080 | 0x00400000 | 0x00000800 | 0x00000004 + .word 0x6C000000 | 0x00000000 | 0x00400000 | 0x00000800 | 0x00000005 + .word 0x6C000000 | 0x00000080 | 0x00400000 | 0x00000800 | 0x00000005 + .word 0x6C000000 | 0x00008000 | 0x00400000 | 0x00000800 | 0x00000005 + .word 0x6C000000 | 0x00008080 | 0x00400000 | 0x00000800 | 0x00000005 + .word 0x6C000000 | 0x00000000 | 0x00400000 | 0x00000800 | 0x00000006 + .word 0x6C000000 | 0x00000080 | 0x00400000 | 0x00000800 | 0x00000006 + .word 0x6C000000 | 0x00008000 | 0x00400000 | 0x00000800 | 0x00000006 + .word 0x6C000000 | 0x00008080 | 0x00400000 | 0x00000800 | 0x00000006 + .word 0x6C000000 | 0x00000000 | 0x00400000 | 0x00000800 | 0x00000007 + .word 0x6C000000 | 0x00000080 | 0x00400000 | 0x00000800 | 0x00000007 + .word 0x6C000000 | 0x00008000 | 0x00400000 | 0x00000800 | 0x00000007 + .word 0x6C000000 | 0x00008080 | 0x00400000 | 0x00000800 | 0x00000007 + .word 0x6C000000 | 0x00000000 | 0x00400000 | 0x00000800 | 0x00000008 + .word 0x6C000000 | 0x00000080 | 0x00400000 | 0x00000800 | 0x00000008 + .word 0x6C000000 | 0x00008000 | 0x00400000 | 0x00000800 | 0x00000008 + .word 0x6C000000 | 0x00008080 | 0x00400000 | 0x00000800 | 0x00000008 + .word 0x6C000000 | 0x00000000 | 0x00400000 | 0x00000800 | 0x00000009 + .word 0x6C000000 | 0x00000080 | 0x00400000 | 0x00000800 | 0x00000009 + .word 0x6C000000 | 0x00008000 | 0x00400000 | 0x00000800 | 0x00000009 + .word 0x6C000000 | 0x00008080 | 0x00400000 | 0x00000800 | 0x00000009 + .word 0x6C000000 | 0x00000000 | 0x00400000 | 0x00000800 | 0x0000000A + .word 0x6C000000 | 0x00000080 | 0x00400000 | 0x00000800 | 0x0000000A + .word 0x6C000000 | 0x00008000 | 0x00400000 | 0x00000800 | 0x0000000A + .word 0x6C000000 | 0x00008080 | 0x00400000 | 0x00000800 | 0x0000000A + .word 0x6C000000 | 0x00000000 | 0x00400000 | 0x00000800 | 0x0000000B + .word 0x6C000000 | 0x00000080 | 0x00400000 | 0x00000800 | 0x0000000B + .word 0x6C000000 | 0x00008000 | 0x00400000 | 0x00000800 | 0x0000000B + .word 0x6C000000 | 0x00008080 | 0x00400000 | 0x00000800 | 0x0000000B + .word 0x6C000000 | 0x00000000 | 0x00400000 | 0x00000800 | 0x0000000C + .word 0x6C000000 | 0x00000080 | 0x00400000 | 0x00000800 | 0x0000000C + .word 0x6C000000 | 0x00008000 | 0x00400000 | 0x00000800 | 0x0000000C + .word 0x6C000000 | 0x00008080 | 0x00400000 | 0x00000800 | 0x0000000C + .word 0x6C000000 | 0x00000000 | 0x00400000 | 0x00000800 | 0x0000000D + .word 0x6C000000 | 0x00000080 | 0x00400000 | 0x00000800 | 0x0000000D + .word 0x6C000000 | 0x00008000 | 0x00400000 | 0x00000800 | 0x0000000D + .word 0x6C000000 | 0x00008080 | 0x00400000 | 0x00000800 | 0x0000000D + .word 0x6C000000 | 0x00000000 | 0x00400000 | 0x00000800 | 0x0000000E + .word 0x6C000000 | 0x00000080 | 0x00400000 | 0x00000800 | 0x0000000E + .word 0x6C000000 | 0x00008000 | 0x00400000 | 0x00000800 | 0x0000000E + .word 0x6C000000 | 0x00008080 | 0x00400000 | 0x00000800 | 0x0000000E + .word 0x6C000000 | 0x00000000 | 0x00400000 | 0x00000800 | 0x0000000F + .word 0x6C000000 | 0x00000080 | 0x00400000 | 0x00000800 | 0x0000000F + .word 0x6C000000 | 0x00008000 | 0x00400000 | 0x00000800 | 0x0000000F + .word 0x6C000000 | 0x00008080 | 0x00400000 | 0x00000800 | 0x0000000F + + jr $ra +.size vcmp_all, . - vcmp_all + +.type vcmp_zero,@function +.globl vcmp_zero +vcmp_zero: + # vcmp zero + .word 0x6C000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 + .word 0x6C000000 | 0x00000080 | 0x00000000 | 0x00000000 | 0x00000000 + .word 0x6C000000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x00000000 + .word 0x6C000000 | 0x00008080 | 0x00000000 | 0x00000000 | 0x00000000 + .word 0x6C000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000001 + .word 0x6C000000 | 0x00000080 | 0x00000000 | 0x00000000 | 0x00000001 + .word 0x6C000000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x00000001 + .word 0x6C000000 | 0x00008080 | 0x00000000 | 0x00000000 | 0x00000001 + .word 0x6C000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000002 + .word 0x6C000000 | 0x00000080 | 0x00000000 | 0x00000000 | 0x00000002 + .word 0x6C000000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x00000002 + .word 0x6C000000 | 0x00008080 | 0x00000000 | 0x00000000 | 0x00000002 + .word 0x6C000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000003 + .word 0x6C000000 | 0x00000080 | 0x00000000 | 0x00000000 | 0x00000003 + .word 0x6C000000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x00000003 + .word 0x6C000000 | 0x00008080 | 0x00000000 | 0x00000000 | 0x00000003 + .word 0x6C000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000004 + .word 0x6C000000 | 0x00000080 | 0x00000000 | 0x00000000 | 0x00000004 + .word 0x6C000000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x00000004 + .word 0x6C000000 | 0x00008080 | 0x00000000 | 0x00000000 | 0x00000004 + .word 0x6C000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000005 + .word 0x6C000000 | 0x00000080 | 0x00000000 | 0x00000000 | 0x00000005 + .word 0x6C000000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x00000005 + .word 0x6C000000 | 0x00008080 | 0x00000000 | 0x00000000 | 0x00000005 + .word 0x6C000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000006 + .word 0x6C000000 | 0x00000080 | 0x00000000 | 0x00000000 | 0x00000006 + .word 0x6C000000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x00000006 + .word 0x6C000000 | 0x00008080 | 0x00000000 | 0x00000000 | 0x00000006 + .word 0x6C000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000007 + .word 0x6C000000 | 0x00000080 | 0x00000000 | 0x00000000 | 0x00000007 + .word 0x6C000000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x00000007 + .word 0x6C000000 | 0x00008080 | 0x00000000 | 0x00000000 | 0x00000007 + .word 0x6C000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000008 + .word 0x6C000000 | 0x00000080 | 0x00000000 | 0x00000000 | 0x00000008 + .word 0x6C000000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x00000008 + .word 0x6C000000 | 0x00008080 | 0x00000000 | 0x00000000 | 0x00000008 + .word 0x6C000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000009 + .word 0x6C000000 | 0x00000080 | 0x00000000 | 0x00000000 | 0x00000009 + .word 0x6C000000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x00000009 + .word 0x6C000000 | 0x00008080 | 0x00000000 | 0x00000000 | 0x00000009 + .word 0x6C000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x0000000A + .word 0x6C000000 | 0x00000080 | 0x00000000 | 0x00000000 | 0x0000000A + .word 0x6C000000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000000A + .word 0x6C000000 | 0x00008080 | 0x00000000 | 0x00000000 | 0x0000000A + .word 0x6C000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x0000000B + .word 0x6C000000 | 0x00000080 | 0x00000000 | 0x00000000 | 0x0000000B + .word 0x6C000000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000000B + .word 0x6C000000 | 0x00008080 | 0x00000000 | 0x00000000 | 0x0000000B + .word 0x6C000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x0000000C + .word 0x6C000000 | 0x00000080 | 0x00000000 | 0x00000000 | 0x0000000C + .word 0x6C000000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000000C + .word 0x6C000000 | 0x00008080 | 0x00000000 | 0x00000000 | 0x0000000C + .word 0x6C000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x0000000D + .word 0x6C000000 | 0x00000080 | 0x00000000 | 0x00000000 | 0x0000000D + .word 0x6C000000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000000D + .word 0x6C000000 | 0x00008080 | 0x00000000 | 0x00000000 | 0x0000000D + .word 0x6C000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x0000000E + .word 0x6C000000 | 0x00000080 | 0x00000000 | 0x00000000 | 0x0000000E + .word 0x6C000000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000000E + .word 0x6C000000 | 0x00008080 | 0x00000000 | 0x00000000 | 0x0000000E + .word 0x6C000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x0000000F + .word 0x6C000000 | 0x00000080 | 0x00000000 | 0x00000000 | 0x0000000F + .word 0x6C000000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000000F + .word 0x6C000000 | 0x00008080 | 0x00000000 | 0x00000000 | 0x0000000F + + jr $ra +.size vcmp_zero, . - vcmp_zero + +.type mfvc_test,@function +.globl mfvc_test +mfvc_test: + mfvc $a0, $128 + mfvc $a0, $129 + mfvc $a0, $130 + mfvc $a0, $131 + mfvc $a0, $132 + mfvc $a0, $133 + mfvc $a0, $134 + mfvc $a0, $135 + mfvc $a0, $136 + mfvc $a0, $137 + mfvc $a0, $138 + mfvc $a0, $139 + mfvc $a0, $140 + mfvc $a0, $141 + mfvc $a0, $142 + mfvc $a0, $143 + nop + mfvc $a0, $144 + mfvc $a0, $145 + mfvc $a0, $146 + jr $ra +.size mfvc_test, . - mfvc_test + + +.type cop2_test,@function +.globl cop2_test +cop2_test: + vsync2 + mfv $a1, S000 + mfvc $a1, $129 + mtv $a1, S000 + mtvc $a1, $129 + + jr $ra +.size cop2_test, . - cop2_test +.type vfpu4_fmt0_all,@function +.globl vfpu4_fmt0_all +vfpu4_fmt0_all: + # VFPU4 FMT0 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00008000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00008080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00010000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00010080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00018000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00018080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00020000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00020080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00028000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00028080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00030000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00030080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00038000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00038080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00040000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00040080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00048000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00048080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00050000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00050080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00058000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00058080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00060000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00060080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00068000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00068080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00070000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00070080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00078000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00078080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00000080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00008000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00008080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00010000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00010080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00018000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00018080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00020000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00020080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00028000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00028080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00030000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00030080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00038000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00038080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 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0x00068000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00068080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00070000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00070080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00078000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00080000 | 0x00078080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00000080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00008000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00008080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00010000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00010080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00018000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00018080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00020000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00020080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00028000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00028080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00030000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00030080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00038000 | 0x00001000 | 0x00000001 + .word 0xD0000000 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0x00100000 | 0x00060080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00068000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00068080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00070000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00070080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00078000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00100000 | 0x00078080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00180000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00180000 | 0x00000080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00180000 | 0x00008000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00180000 | 0x00008080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00180000 | 0x00010000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00180000 | 0x00010080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00180000 | 0x00018000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00180000 | 0x00018080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00180000 | 0x00020000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00180000 | 0x00020080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00180000 | 0x00028000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00180000 | 0x00028080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00180000 | 0x00030000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00000000 | 0x00180000 | 0x00030080 | 0x00001000 | 0x00000001 + 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0x00180000 | 0x00040080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00C00000 | 0x00180000 | 0x00048000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00C00000 | 0x00180000 | 0x00048080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00C00000 | 0x00180000 | 0x00050000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00C00000 | 0x00180000 | 0x00050080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00C00000 | 0x00180000 | 0x00058000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00C00000 | 0x00180000 | 0x00058080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00C00000 | 0x00180000 | 0x00060000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00C00000 | 0x00180000 | 0x00060080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00C00000 | 0x00180000 | 0x00068000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00C00000 | 0x00180000 | 0x00068080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00C00000 | 0x00180000 | 0x00070000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00C00000 | 0x00180000 | 0x00070080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00C00000 | 0x00180000 | 0x00078000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00C00000 | 0x00180000 | 0x00078080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00000080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00008000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00008080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00010000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00010080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00018000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00018080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00020000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00020080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00028000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00028080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00030000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00030080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00038000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00038080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00040000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00040080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00048000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00048080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00050000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00050080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00058000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00058080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00060000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00060080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00068000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00068080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00070000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00070080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00078000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00000000 | 0x00078080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00000080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00008000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00008080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00010000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00010080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00018000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00018080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00020000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00020080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00028000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00028080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00030000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00030080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00038000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00038080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00040000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00040080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00048000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00048080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00050000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00050080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00058000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00058080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00060000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00060080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00068000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00068080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00070000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00070080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00078000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00080000 | 0x00078080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00000080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00008000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00008080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00010000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00010080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00018000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00018080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00020000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00020080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00028000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00028080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00030000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00030080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00038000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00038080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00040000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00040080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00048000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00048080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00050000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00050080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00058000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00058080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00060000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00060080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00068000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00068080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00070000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00070080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00078000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00100000 | 0x00078080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00000080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00008000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00008080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00010000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00010080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00018000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00018080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00020000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00020080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00028000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00028080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00030000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00030080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00038000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00038080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00040000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00040080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00048000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00048080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00050000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00050080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00058000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00058080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00060000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00060080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00068000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00068080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00070000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00070080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00078000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x00000000 | 0x00E00000 | 0x00180000 | 0x00078080 | 0x00001000 | 0x00000001 + + jr $ra +.size vfpu4_fmt0_all, . - vfpu4_fmt0_all +.type vfpu4_fmt2_all,@function +.globl vfpu4_fmt2_all +vfpu4_fmt2_all: + # VFPU4 FMT2 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00008000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00008080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00010000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00010080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00018000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00018080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00020000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00020080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00028000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00028080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00030000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00030080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00038000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00038080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00040000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00040080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00048000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00048080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00050000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00050080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00058000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00058080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00060000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00060080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00068000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00068080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00070000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00070080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00078000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00000000 | 0x00078080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00000080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00008000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00008080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00010000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00010080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00018000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00018080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00020000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00020080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00028000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00028080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00030000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00030080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00038000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00038080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00040000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00040080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00048000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00048080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00050000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00050080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00058000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00058080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00060000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00060080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00068000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00068080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00070000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00070080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00078000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00080000 | 0x00078080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00000080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00008000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00008080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00010000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00010080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00018000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00018080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00020000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00020080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00028000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00028080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00030000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00030080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00038000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00038080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00040000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00000000 | 0x00100000 | 0x00040080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 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| 0x00C00000 | 0x00180000 | 0x00028000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00028080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00030000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00030080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00038000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00038080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00040000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00040080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00048000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00048080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00050000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00050080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00058000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00058080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00060000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00060080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00068000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00068080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00070000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00070080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00078000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00C00000 | 0x00180000 | 0x00078080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00000080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00008000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00008080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00010000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00010080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00018000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00018080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00020000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00020080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00028000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00028080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00030000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00030080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00038000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00038080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00040000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00040080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00048000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00048080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00050000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00050080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00058000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00058080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00060000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00060080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00068000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00068080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00070000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00070080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00078000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00000000 | 0x00078080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00000080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00008000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00008080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00010000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00010080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00018000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00018080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00020000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00020080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00028000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00028080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00030000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00030080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00038000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00038080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00040000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00040080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00048000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00048080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00050000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00050080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00058000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00058080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00060000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00060080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00068000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00068080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00070000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00070080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00078000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00080000 | 0x00078080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00000080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00008000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00008080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00010000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00010080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00018000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00018080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00020000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00020080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00028000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00028080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00030000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00030080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00038000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00038080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00040000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00040080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00048000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00048080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00050000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00050080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00058000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00058080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00060000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00060080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00068000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00068080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00070000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00070080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00078000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00100000 | 0x00078080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00000080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00008000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00008080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00010000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00010080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00018000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00018080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00020000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00020080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00028000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00028080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00030000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00030080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00038000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00038080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00040000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00040080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00048000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00048080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00050000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00050080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00058000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00058080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00060000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00060080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00068000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00068080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00070000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00070080 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00078000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x02000000 | 0x00E00000 | 0x00180000 | 0x00078080 | 0x00001000 | 0x00000001 + + jr $ra +.size vfpu4_fmt2_all, . - vfpu4_fmt2_all + +.type vfpu4_fmt3_all,@function +.globl vfpu4_fmt3_all +vfpu4_fmt3_all: + # VFPU4 FMT3 + .word 0xD0000000 | 0x03000000 | 0x00000000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00010000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00020000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00030000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00040000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00050000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00060000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00070000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00080000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00090000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x000A0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x000B0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x000C0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x000D0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x000E0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x000F0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00100000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00110000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00120000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00130000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00140000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00150000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00160000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00170000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00180000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00190000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x001A0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x001B0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x001C0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x001D0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x001E0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x001F0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00200000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00210000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00220000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00230000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00240000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00250000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00260000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00270000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00280000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00290000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x002A0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x002B0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x002C0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x002D0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x002E0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x002F0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00300000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00310000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00320000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00330000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00340000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00350000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00360000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00370000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00380000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00390000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x003A0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x003B0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x003C0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x003D0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x003E0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x003F0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00400000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00410000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00420000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00430000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00440000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00450000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00460000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00470000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00480000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00490000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x004A0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x004B0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x004C0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x004D0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x004E0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x004F0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00500000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00510000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00520000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00530000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00540000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00550000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00560000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00570000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00580000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00590000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x005A0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x005B0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x005C0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x005D0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x005E0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x005F0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00600000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00610000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00620000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00630000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00640000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00650000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00660000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00670000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00680000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00690000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x006A0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x006B0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x006C0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x006D0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x006E0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x006F0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00700000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00710000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00720000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00730000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00740000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00750000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00760000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00770000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00780000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00790000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x007A0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x007B0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x007C0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x007D0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x007E0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x007F0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00800000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00810000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00820000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00830000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00840000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00850000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00860000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00870000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00880000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00890000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x008A0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x008B0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x008C0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x008D0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x008E0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x008F0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00900000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00910000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00920000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00930000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00940000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00950000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00960000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00970000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00980000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00990000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x009A0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x009B0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x009C0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x009D0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x009E0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x009F0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00A00000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00A10000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00A20000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00A30000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00A40000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00A50000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00A60000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00A70000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00A80000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00A90000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00AA0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00AB0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00AC0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00AD0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00AE0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00AF0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00B00000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00B10000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00B20000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00B30000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00B40000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00B50000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00B60000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00B70000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00B80000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00B90000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00BA0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00BB0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00BC0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00BD0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00BE0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00BF0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00C00000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00C10000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00C20000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00C30000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00C40000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00C50000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00C60000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00C70000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00C80000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00C90000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00CA0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00CB0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00CC0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00CD0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00CE0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00CF0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00D00000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00D10000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00D20000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00D30000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00D40000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00D50000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00D60000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00D70000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00D80000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00D90000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00DA0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00DB0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00DC0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00DD0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00DE0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00DF0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00E00000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00E10000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00E20000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00E30000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00E40000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00E50000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00E60000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00E70000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00E80000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00E90000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00EA0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00EB0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00EC0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00ED0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00EE0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00EF0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00F00000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00F10000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00F20000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00F30000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00F40000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00F50000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00F60000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00F70000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00F80000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00F90000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00FA0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00FB0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00FC0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00FD0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00FE0000 | 0x00000000 | 0x00001000 | 0x00000001 + .word 0xD0000000 | 0x03000000 | 0x00FF0000 | 0x00000000 | 0x00001000 | 0x00000001 + + jr $ra +.size vfpu4_fmt3_all, . - vfpu4_fmt3_all + +.type vfpu5_all,@function +.globl vfpu5_all +vfpu5_all: + # VFPU5 + .word 0xDC000000 | 0x00000000 | 0x00000000 + .word 0xDC000000 | 0x00000000 | 0x00000001 + .word 0xDC000000 | 0x00000000 | 0x00000010 + .word 0xDC000000 | 0x00000000 | 0x00000100 + .word 0xDC000000 | 0x00000000 | 0x00001000 + .word 0xDC000000 | 0x00000000 | 0x00010000 + .word 0xDC000000 | 0x00000000 | 0x00100000 + .word 0xDC000000 | 0x00000000 | 0x00800000 + .word 0xDC000000 | 0x00000000 | 0x00F00000 + .word 0xDC000000 | 0x01000000 | 0x00000000 + .word 0xDC000000 | 0x01000000 | 0x00000001 + .word 0xDC000000 | 0x01000000 | 0x00000010 + .word 0xDC000000 | 0x01000000 | 0x00000100 + .word 0xDC000000 | 0x01000000 | 0x00001000 + .word 0xDC000000 | 0x01000000 | 0x00010000 + .word 0xDC000000 | 0x01000000 | 0x00100000 + .word 0xDC000000 | 0x01000000 | 0x00800000 + .word 0xDC000000 | 0x01000000 | 0x00F00000 + .word 0xDC000000 | 0x02000000 | 0x00000000 + .word 0xDC000000 | 0x02000000 | 0x00000001 + .word 0xDC000000 | 0x02000000 | 0x00000010 + .word 0xDC000000 | 0x02000000 | 0x00000100 + .word 0xDC000000 | 0x02000000 | 0x00001000 + .word 0xDC000000 | 0x02000000 | 0x00010000 + .word 0xDC000000 | 0x02000000 | 0x00100000 + .word 0xDC000000 | 0x02000000 | 0x00800000 + .word 0xDC000000 | 0x02000000 | 0x00F00000 + .word 0xDC000000 | 0x03000000 | 0x00000000 | 0x00400000 | 0x00000000 + .word 0xDC000000 | 0x03000000 | 0x00000000 | 0x00400000 | 0x00000001 + .word 0xDC000000 | 0x03000000 | 0x00000000 | 0x00400000 | 0x00000010 + .word 0xDC000000 | 0x03000000 | 0x00000000 | 0x00400000 | 0x00000100 + .word 0xDC000000 | 0x03000000 | 0x00000000 | 0x00400000 | 0x00001000 + .word 0xDC000000 | 0x03000000 | 0x00000000 | 0x00400000 | 0x00008000 + .word 0xDC000000 | 0x03000000 | 0x00000000 | 0x00400000 | 0x0000F000 + .word 0xDC000000 | 0x03000000 | 0x00800000 | 0x00400000 | 0x00000000 + .word 0xDC000000 | 0x03000000 | 0x00800000 | 0x00400000 | 0x00000001 + .word 0xDC000000 | 0x03000000 | 0x00800000 | 0x00400000 | 0x00000010 + .word 0xDC000000 | 0x03000000 | 0x00800000 | 0x00400000 | 0x00000100 + .word 0xDC000000 | 0x03000000 | 0x00800000 | 0x00400000 | 0x00001000 + .word 0xDC000000 | 0x03000000 | 0x00800000 | 0x00400000 | 0x00008000 + .word 0xDC000000 | 0x03000000 | 0x00800000 | 0x00400000 | 0x0000F000 + + jr $ra +.size vfpu5_all, . - vfpu5_all + +.type vmmul_test,@function +.globl vmmul_test +vmmul_test: + # vmmul + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00000000 | 0x00000100 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00000000 | 0x00000200 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00000000 | 0x00000300 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00000000 | 0x00000400 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00000000 | 0x00000500 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00000000 | 0x00000600 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00000000 | 0x00000700 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00000000 | 0x00000800 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00000000 | 0x00000900 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00000000 | 0x00000A00 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00000000 | 0x00000B00 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00000000 | 0x00000C00 | 0x00000000 | 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0x00003200 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00003300 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00003400 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00003500 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00003600 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00003700 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00003800 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00003900 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00003A00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00003B00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00003C00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00003D00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00003E00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00003F00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00004000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00004100 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00004200 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00004300 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00004400 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00004500 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00004600 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00004700 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00004800 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00004900 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00004A00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00004B00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00004C00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00004D00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00004E00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00004F00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00005000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00005100 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00005200 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00005300 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00005400 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00005500 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00005600 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00005700 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00005800 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00005900 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00005A00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00005B00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00005C00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00005D00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00005E00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00005F00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00006000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00006100 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00006200 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00006300 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00006400 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00006500 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00006600 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00006700 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00006800 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00006900 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00006A00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00006B00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00006C00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00006D00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00006E00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00006F00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00007000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00007100 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00007200 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00007300 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00007400 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00007500 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00007600 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00007700 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00007800 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00007900 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00007A00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00007B00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00007C00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00007D00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00007E00 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00000000 | 0x00040000 | 0x00008000 | 0x00007F00 | 0x00000080 | 0x0000001F + + jr $ra +.size vmmul_test, . - vmmul_test + +.type vrot_test,@function +.globl vrot_test +vrot_test: + # vrot + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00000000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00010000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00020000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00030000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00040000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00050000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00060000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00070000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00080000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00090000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000A0000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000B0000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000C0000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000D0000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000E0000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000F0000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00100000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00110000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00120000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00130000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00140000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00150000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00160000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00170000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00180000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00190000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x001A0000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x001B0000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x001C0000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x001D0000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x001E0000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x001F0000 | 0x00000000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00000000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00010000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00020000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00030000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00040000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00050000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00060000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00070000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00080000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00090000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000A0000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000B0000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000C0000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000D0000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000E0000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000F0000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00100000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00110000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00120000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00130000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00140000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00150000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00160000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00170000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00180000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00190000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x001A0000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x001B0000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x001C0000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x001D0000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x001E0000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x001F0000 | 0x00008000 | 0x00000000 | 0x00000000 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00000000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00010000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00020000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00030000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00040000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00050000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00060000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00070000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00080000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00090000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000A0000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000B0000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000C0000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000D0000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000E0000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x000F0000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00100000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00110000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00120000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00130000 | 0x00008000 | 0x00000000 | 0x00000080 | 0x0000001F + .word 0xF0000000 | 0x00200000 | 0x03800000 | 0x00140000 | 0x00008000 | 0x00000000 | 0x00000080 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+lv.s S601, 0x40($a0) +lv.s S611, 0x40($a0) +lv.s S621, 0x40($a0) +lv.s S631, 0x40($a0) +lv.s S701, 0x40($a0) +lv.s S711, 0x40($a0) +lv.s S721, 0x40($a0) +lv.s S731, 0x40($a0) +lv.s S002, 0x40($a0) +lv.s S012, 0x40($a0) +lv.s S022, 0x40($a0) +lv.s S032, 0x40($a0) +lv.s S102, 0x40($a0) +lv.s S112, 0x40($a0) +lv.s S122, 0x40($a0) +lv.s S132, 0x40($a0) +lv.s S202, 0x40($a0) +lv.s S212, 0x40($a0) +lv.s S222, 0x40($a0) +lv.s S232, 0x40($a0) +lv.s S302, 0x40($a0) +lv.s S312, 0x40($a0) +lv.s S322, 0x40($a0) +lv.s S332, 0x40($a0) +lv.s S402, 0x40($a0) +lv.s S412, 0x40($a0) +lv.s S422, 0x40($a0) +lv.s S432, 0x40($a0) +lv.s S502, 0x40($a0) +lv.s S512, 0x40($a0) +lv.s S522, 0x40($a0) +lv.s S532, 0x40($a0) +lv.s S602, 0x40($a0) +lv.s S612, 0x40($a0) +lv.s S622, 0x40($a0) +lv.s S632, 0x40($a0) +lv.s S702, 0x40($a0) +lv.s S712, 0x40($a0) +lv.s S722, 0x40($a0) +lv.s S732, 0x40($a0) +lv.s S003, 0x40($a0) +lv.s S013, 0x40($a0) +lv.s S023, 0x40($a0) +lv.s S033, 0x40($a0) +lv.s S103, 0x40($a0) +lv.s S113, 0x40($a0) +lv.s S123, 0x40($a0) +lv.s S133, 0x40($a0) +lv.s S203, 0x40($a0) +lv.s S213, 0x40($a0) +lv.s S223, 0x40($a0) +lv.s S233, 0x40($a0) +lv.s S303, 0x40($a0) +lv.s S313, 0x40($a0) +lv.s S323, 0x40($a0) +lv.s S333, 0x40($a0) +lv.s S403, 0x40($a0) +lv.s S413, 0x40($a0) +lv.s S423, 0x40($a0) +lv.s S433, 0x40($a0) +lv.s S503, 0x40($a0) +lv.s S513, 0x40($a0) +lv.s S523, 0x40($a0) +lv.s S533, 0x40($a0) +lv.s S603, 0x40($a0) +lv.s S613, 0x40($a0) +lv.s S623, 0x40($a0) +lv.s S633, 0x40($a0) +lv.s S703, 0x40($a0) +lv.s S713, 0x40($a0) +lv.s S723, 0x40($a0) +lv.s S733, 0x40($a0) +lv.q C000, 0x40($a0) +lv.q C010, 0x40($a0) +lv.q C020, 0x40($a0) +lv.q C030, 0x40($a0) +lv.q C100, 0x40($a0) +lv.q C110, 0x40($a0) +lv.q C120, 0x40($a0) +lv.q C130, 0x40($a0) +lv.q C200, 0x40($a0) +lv.q C210, 0x40($a0) +lv.q C220, 0x40($a0) +lv.q C230, 0x40($a0) +lv.q C300, 0x40($a0) +lv.q C310, 0x40($a0) +lv.q C320, 0x40($a0) +lv.q C330, 0x40($a0) +lv.q C400, 0x40($a0) +lv.q C410, 0x40($a0) +lv.q C420, 0x40($a0) +lv.q C430, 0x40($a0) +lv.q C500, 0x40($a0) +lv.q C510, 0x40($a0) +lv.q C520, 0x40($a0) +lv.q C530, 0x40($a0) +lv.q C600, 0x40($a0) +lv.q C610, 0x40($a0) +lv.q C620, 0x40($a0) +lv.q C630, 0x40($a0) +lv.q C700, 0x40($a0) +lv.q C710, 0x40($a0) +lv.q C720, 0x40($a0) +lv.q C730, 0x40($a0) +lv.q R000, 0x40($a0) +lv.q R001, 0x40($a0) +lv.q R002, 0x40($a0) +lv.q R003, 0x40($a0) +lv.q R100, 0x40($a0) +lv.q R101, 0x40($a0) +lv.q R102, 0x40($a0) +lv.q R103, 0x40($a0) +lv.q R200, 0x40($a0) +lv.q R201, 0x40($a0) +lv.q R202, 0x40($a0) +lv.q R203, 0x40($a0) +lv.q R300, 0x40($a0) +lv.q R301, 0x40($a0) +lv.q R302, 0x40($a0) +lv.q R303, 0x40($a0) +lv.q R400, 0x40($a0) +lv.q R401, 0x40($a0) +lv.q R402, 0x40($a0) +lv.q R403, 0x40($a0) +lv.q R500, 0x40($a0) +lv.q R501, 0x40($a0) +lv.q R502, 0x40($a0) +lv.q R503, 0x40($a0) +lv.q R600, 0x40($a0) +lv.q R601, 0x40($a0) +lv.q R602, 0x40($a0) +lv.q R603, 0x40($a0) +lv.q R700, 0x40($a0) +lv.q R701, 0x40($a0) +lv.q R702, 0x40($a0) +lv.q R703, 0x40($a0) +mfv $a0, S100 +mtv $a0, S100 +mtvc $a0, $132 +sv.s S000, 0x40($a0) +sv.q C000, 0x40($a0) +sv.q C000, 0x40($a0), wb +svl.q C000, 0x40($a0) +svr.q C000, 0x40($a0) +vmscl.q M000, M000, S000 +vmscl.q M000, M000, S010 +vmscl.q M000, M000, S020 +vmscl.q M000, M000, S030 +vmscl.q M000, M000, S100 +vmscl.q M000, M000, S110 +vmscl.q M000, M000, S120 +vmscl.q M000, M000, S130 +vmscl.q M000, M000, S200 +vmscl.q M000, M000, S210 +vmscl.q M000, M000, S220 +vmscl.q M000, M000, S230 +vmscl.q M000, M000, S300 +vmscl.q M000, M000, S310 +vmscl.q M000, M000, S320 +vmscl.q M000, M000, S330 +vmscl.q M000, M000, S400 +vmscl.q M000, M000, S410 +vmscl.q M000, M000, S420 +vmscl.q M000, M000, S430 +vmscl.q M000, M000, S500 +vmscl.q M000, M000, S510 +vmscl.q M000, M000, S520 +vmscl.q M000, M000, S530 +vmscl.q M000, M000, S600 +vmscl.q M000, M000, S610 +vmscl.q M000, M000, S620 +vmscl.q M000, M000, S630 +vmscl.q M000, M000, S700 +vmscl.q M000, M000, S710 +vmscl.q M000, M000, S720 +vmscl.q M000, M000, S730 +vmscl.q M000, M000, S001 +vmscl.q M000, M000, S011 +vmscl.q M000, M000, S021 +vmscl.q M000, M000, S031 +vmscl.q M000, M000, S101 +vmscl.q M000, M000, S111 +vmscl.q M000, M000, S121 +vmscl.q M000, M000, S131 +vmscl.q M000, M000, S201 +vmscl.q M000, M000, S211 +vmscl.q M000, M000, S221 +vmscl.q M000, M000, S231 +vmscl.q M000, M000, S301 +vmscl.q M000, M000, S311 +vmscl.q M000, M000, S321 +vmscl.q M000, M000, S331 +vmscl.q M000, M000, S401 +vmscl.q M000, M000, S411 +vmscl.q M000, M000, S421 +vmscl.q M000, M000, S431 +vmscl.q M000, M000, S501 +vmscl.q M000, M000, S511 +vmscl.q M000, M000, S521 +vmscl.q M000, M000, S531 +vmscl.q M000, M000, S601 +vmscl.q M000, M000, S611 +vmscl.q M000, M000, S621 +vmscl.q M000, M000, S631 +vmscl.q M000, M000, S701 +vmscl.q M000, M000, S711 +vmscl.q M000, M000, S721 +vmscl.q M000, M000, S731 +vmscl.q M000, M000, S002 +vmscl.q M000, M000, S012 +vmscl.q M000, M000, S022 +vmscl.q M000, M000, S032 +vmscl.q M000, M000, S102 +vmscl.q M000, M000, S112 +vmscl.q M000, M000, S122 +vmscl.q M000, M000, S132 +vmscl.q M000, M000, S202 +vmscl.q M000, M000, S212 +vmscl.q M000, M000, S222 +vmscl.q M000, M000, S232 +vmscl.q M000, M000, S302 +vmscl.q M000, M000, S312 +vmscl.q M000, M000, S322 +vmscl.q M000, M000, S332 +vmscl.q M000, M000, S402 +vmscl.q M000, M000, S412 +vmscl.q M000, M000, S422 +vmscl.q M000, M000, S432 +vmscl.q M000, M000, S502 +vmscl.q M000, M000, S512 +vmscl.q M000, M000, S522 +vmscl.q M000, M000, S532 +vmscl.q M000, M000, S602 +vmscl.q M000, M000, S612 +vmscl.q M000, M000, S622 +vmscl.q M000, M000, S632 +vmscl.q M000, M000, S702 +vmscl.q M000, M000, S712 +vmscl.q M000, M000, S722 +vmscl.q M000, M000, S732 +vmscl.q M000, M000, S003 +vmscl.q M000, M000, S013 +vmscl.q M000, M000, S023 +vmscl.q M000, M000, S033 +vmscl.q M000, M000, S103 +vmscl.q M000, M000, S113 +vmscl.q M000, M000, S123 +vmscl.q M000, M000, S133 +vmscl.q M000, M000, S203 +vmscl.q M000, M000, S213 +vmscl.q M000, M000, S223 +vmscl.q M000, M000, S233 +vmscl.q M000, M000, S303 +vmscl.q M000, M000, S313 +vmscl.q M000, M000, S323 +vmscl.q M000, M000, S333 +vmscl.q M000, M000, S403 +vmscl.q M000, M000, S413 +vmscl.q M000, M000, S423 +vmscl.q M000, M000, S433 +vmscl.q M000, M000, S503 +vmscl.q M000, M000, S513 +vmscl.q M000, M000, S523 +vmscl.q M000, M000, S533 +vmscl.q M000, M000, S603 +vmscl.q M000, M000, S613 +vmscl.q M000, M000, S623 +vmscl.q M000, M000, S633 +vmscl.q M000, M000, S703 +vmscl.q M000, M000, S713 +vmscl.q M000, M000, S723 +vmscl.q M000, M000, S733 +vmscl.q M010, M000, S000 +vmscl.q M020, M000, S000 +vmscl.q M030, M000, S000 +vmscl.q M100, M000, S000 +vmscl.q M110, M000, S000 +vmscl.q M120, M000, S000 +vmscl.q M130, M000, S000 +vmscl.q M200, M000, S000 +vmscl.q M210, M000, S000 +vmscl.q M220, M000, S000 +vmscl.q M230, M000, S000 +vmscl.q M300, M000, S000 +vmscl.q M310, M000, S000 +vmscl.q M320, M000, S000 +vmscl.q M330, M000, S000 +vmscl.q M400, M000, S000 +vmscl.q M410, M000, S000 +vmscl.q M420, M000, S000 +vmscl.q M430, M000, S000 +vmscl.q M500, M000, S000 +vmscl.q M510, M000, S000 +vmscl.q M520, M000, S000 +vmscl.q M530, M000, S000 +vmscl.q M600, M000, S000 +vmscl.q M610, M000, S000 +vmscl.q M620, M000, S000 +vmscl.q M630, M000, S000 +vmscl.q M700, M000, S000 +vmscl.q M710, M000, S000 +vmscl.q M720, M000, S000 +vmscl.q M730, M000, S000 +vmscl.q E000, M000, S000 +vmscl.q E001, M000, S000 +vmscl.q E002, M000, S000 +vmscl.q E003, M000, S000 +vmscl.q E100, M000, S000 +vmscl.q E101, M000, S000 +vmscl.q E102, M000, S000 +vmscl.q E103, M000, S000 +vmscl.q E200, M000, S000 +vmscl.q E201, M000, S000 +vmscl.q E202, M000, S000 +vmscl.q E203, M000, S000 +vmscl.q E300, M000, S000 +vmscl.q E301, M000, S000 +vmscl.q E302, M000, S000 +vmscl.q E303, M000, S000 +vmscl.q E400, M000, S000 +vmscl.q E401, M000, S000 +vmscl.q E402, M000, S000 +vmscl.q E403, M000, S000 +vmscl.q E500, M000, S000 +vmscl.q E501, M000, S000 +vmscl.q E502, M000, S000 +vmscl.q E503, M000, S000 +vmscl.q E600, M000, S000 +vmscl.q E601, M000, S000 +vmscl.q E602, M000, S000 +vmscl.q E603, M000, S000 +vmscl.q E700, M000, S000 +vmscl.q E701, M000, S000 +vmscl.q E702, M000, S000 +vmscl.q E703, M000, S000 +vmscl.q M002, M000, S000 +vmscl.q M012, M000, S000 +vmscl.q M022, M000, S000 +vmscl.q M032, M000, S000 +vmscl.q M102, M000, S000 +vmscl.q M112, M000, S000 +vmscl.q M122, M000, S000 +vmscl.q M132, M000, S000 +vmscl.q M202, M000, S000 +vmscl.q M212, M000, S000 +vmscl.q M222, M000, S000 +vmscl.q M232, M000, S000 +vmscl.q M302, M000, S000 +vmscl.q M312, M000, S000 +vmscl.q M322, M000, S000 +vmscl.q M332, M000, S000 +vmscl.q M402, M000, S000 +vmscl.q M412, M000, S000 +vmscl.q M422, M000, S000 +vmscl.q M432, M000, S000 +vmscl.q M502, M000, S000 +vmscl.q M512, M000, S000 +vmscl.q M522, M000, S000 +vmscl.q M532, M000, S000 +vmscl.q M602, M000, S000 +vmscl.q M612, M000, S000 +vmscl.q M622, M000, S000 +vmscl.q M632, M000, S000 +vmscl.q M702, M000, S000 +vmscl.q M712, M000, S000 +vmscl.q M722, M000, S000 +vmscl.q M732, M000, S000 +vmscl.q E020, M000, S000 +vmscl.q E021, M000, S000 +vmscl.q E022, M000, S000 +vmscl.q E023, M000, S000 +vmscl.q E120, M000, S000 +vmscl.q E121, M000, S000 +vmscl.q E122, M000, S000 +vmscl.q E123, M000, S000 +vmscl.q E220, M000, S000 +vmscl.q E221, M000, S000 +vmscl.q E222, M000, S000 +vmscl.q E223, M000, S000 +vmscl.q E320, M000, S000 +vmscl.q E321, M000, S000 +vmscl.q E322, M000, S000 +vmscl.q E323, M000, S000 +vmscl.q E420, M000, S000 +vmscl.q E421, M000, S000 +vmscl.q E422, M000, S000 +vmscl.q E423, M000, S000 +vmscl.q E520, M000, S000 +vmscl.q E521, M000, S000 +vmscl.q E522, M000, S000 +vmscl.q E523, M000, S000 +vmscl.q E620, M000, S000 +vmscl.q E621, M000, S000 +vmscl.q E622, M000, S000 +vmscl.q E623, M000, S000 +vmscl.q E720, M000, S000 +vmscl.q E721, M000, S000 +vmscl.q E722, M000, S000 +vmscl.q E723, M000, S000 +vabs.s S000, S000 +vabs.s S010, S010 +vabs.s S020, S020 +vabs.s S030, S030 +vabs.s S100, S100 +vabs.s S110, S110 +vabs.s S120, S120 +vabs.s S130, S130 +vabs.s S200, S200 +vabs.s S210, S210 +vabs.s S220, S220 +vabs.s S230, S230 +vabs.s S300, S300 +vabs.s S310, S310 +vabs.s S320, S320 +vabs.s S330, S330 +vabs.s S400, S400 +vabs.s S410, S410 +vabs.s S420, S420 +vabs.s S430, S430 +vabs.s S500, S500 +vabs.s S510, S510 +vabs.s S520, S520 +vabs.s S530, S530 +vabs.s S600, S600 +vabs.s S610, S610 +vabs.s S620, S620 +vabs.s S630, S630 +vabs.s S700, S700 +vabs.s S710, S710 +vabs.s S720, S720 +vabs.s S730, S730 +vabs.s S001, S001 +vabs.s S011, S011 +vabs.s S021, S021 +vabs.s S031, S031 +vabs.s S101, S101 +vabs.s S111, S111 +vabs.s S121, S121 +vabs.s S131, S131 +vabs.s S201, S201 +vabs.s S211, S211 +vabs.s S221, S221 +vabs.s S231, S231 +vabs.s S301, S301 +vabs.s S311, S311 +vabs.s S321, S321 +vabs.s S331, S331 +vabs.s S401, S401 +vabs.s S411, S411 +vabs.s S421, S421 +vabs.s S431, S431 +vabs.s S501, S501 +vabs.s S511, S511 +vabs.s S521, S521 +vabs.s S531, S531 +vabs.s S601, S601 +vabs.s S611, S611 +vabs.s S621, S621 +vabs.s S631, S631 +vabs.s S701, S701 +vabs.s S711, S711 +vabs.s S721, S721 +vabs.s S731, S731 +vabs.s S002, S002 +vabs.s S012, S012 +vabs.s S022, S022 +vabs.s S032, S032 +vabs.s S102, S102 +vabs.s S112, S112 +vabs.s S122, S122 +vabs.s S132, S132 +vabs.s S202, S202 +vabs.s S212, S212 +vabs.s S222, S222 +vabs.s S232, S232 +vabs.s S302, S302 +vabs.s S312, S312 +vabs.s S322, S322 +vabs.s S332, S332 +vabs.s S402, S402 +vabs.s S412, S412 +vabs.s S422, S422 +vabs.s S432, S432 +vabs.s S502, S502 +vabs.s S512, S512 +vabs.s S522, S522 +vabs.s S532, S532 +vabs.s S602, S602 +vabs.s S612, S612 +vabs.s S622, S622 +vabs.s S632, S632 +vabs.s S702, S702 +vabs.s S712, S712 +vabs.s S722, S722 +vabs.s S732, S732 +vabs.s S003, S003 +vabs.s S013, S013 +vabs.s S023, S023 +vabs.s S033, S033 +vabs.s S103, S103 +vabs.s S113, S113 +vabs.s S123, S123 +vabs.s S133, S133 +vabs.s S203, S203 +vabs.s S213, S213 +vabs.s S223, S223 +vabs.s S233, S233 +vabs.s S303, S303 +vabs.s S313, S313 +vabs.s S323, S323 +vabs.s S333, S333 +vabs.s S403, S403 +vabs.s S413, S413 +vabs.s S423, S423 +vabs.s S433, S433 +vabs.s S503, S503 +vabs.s S513, S513 +vabs.s S523, S523 +vabs.s S533, S533 +vabs.s S603, S603 +vabs.s S613, S613 +vabs.s S623, S623 +vabs.s S633, S633 +vabs.s S703, S703 +vabs.s S713, S713 +vabs.s S723, S723 +vabs.s S733, S733 +vabs.p C000, C000 +vabs.p C010, C010 +vabs.p C020, C020 +vabs.p C030, C030 +vabs.p C100, C100 +vabs.p C110, C110 +vabs.p C120, C120 +vabs.p C130, C130 +vabs.p C200, C200 +vabs.p C210, C210 +vabs.p C220, C220 +vabs.p C230, C230 +vabs.p C300, C300 +vabs.p C310, C310 +vabs.p C320, C320 +vabs.p C330, C330 +vabs.p C400, C400 +vabs.p C410, C410 +vabs.p C420, C420 +vabs.p C430, C430 +vabs.p C500, C500 +vabs.p C510, C510 +vabs.p C520, C520 +vabs.p C530, C530 +vabs.p C600, C600 +vabs.p C610, C610 +vabs.p C620, C620 +vabs.p C630, C630 +vabs.p C700, C700 +vabs.p C710, C710 +vabs.p C720, C720 +vabs.p C730, C730 +vabs.p R000, R000 +vabs.p R001, R001 +vabs.p R002, R002 +vabs.p R003, R003 +vabs.p R100, R100 +vabs.p R101, R101 +vabs.p R102, R102 +vabs.p R103, R103 +vabs.p R200, R200 +vabs.p R201, R201 +vabs.p R202, R202 +vabs.p R203, R203 +vabs.p R300, R300 +vabs.p R301, R301 +vabs.p R302, R302 +vabs.p R303, R303 +vabs.p R400, R400 +vabs.p R401, R401 +vabs.p R402, R402 +vabs.p R403, R403 +vabs.p R500, R500 +vabs.p R501, R501 +vabs.p R502, R502 +vabs.p R503, R503 +vabs.p R600, R600 +vabs.p R601, R601 +vabs.p R602, R602 +vabs.p R603, R603 +vabs.p R700, R700 +vabs.p R701, R701 +vabs.p R702, R702 +vabs.p R703, R703 +vabs.p C002, C002 +vabs.p C012, C012 +vabs.p C022, C022 +vabs.p C032, C032 +vabs.p C102, C102 +vabs.p C112, C112 +vabs.p C122, C122 +vabs.p C132, C132 +vabs.p C202, C202 +vabs.p C212, C212 +vabs.p C222, C222 +vabs.p C232, C232 +vabs.p C302, C302 +vabs.p C312, C312 +vabs.p C322, C322 +vabs.p C332, C332 +vabs.p C402, C402 +vabs.p C412, C412 +vabs.p C422, C422 +vabs.p C432, C432 +vabs.p C502, C502 +vabs.p C512, C512 +vabs.p C522, C522 +vabs.p C532, C532 +vabs.p C602, C602 +vabs.p C612, C612 +vabs.p C622, C622 +vabs.p C632, C632 +vabs.p C702, C702 +vabs.p C712, C712 +vabs.p C722, C722 +vabs.p C732, C732 +vabs.p R020, R020 +vabs.p R021, R021 +vabs.p R022, R022 +vabs.p R023, R023 +vabs.p R120, R120 +vabs.p R121, R121 +vabs.p R122, R122 +vabs.p R123, R123 +vabs.p R220, R220 +vabs.p R221, R221 +vabs.p R222, R222 +vabs.p R223, R223 +vabs.p R320, R320 +vabs.p R321, R321 +vabs.p R322, R322 +vabs.p R323, R323 +vabs.p R420, R420 +vabs.p R421, R421 +vabs.p R422, R422 +vabs.p R423, R423 +vabs.p R520, R520 +vabs.p R521, R521 +vabs.p R522, R522 +vabs.p R523, R523 +vabs.p R620, R620 +vabs.p R621, R621 +vabs.p R622, R622 +vabs.p R623, R623 +vabs.p R720, R720 +vabs.p R721, R721 +vabs.p R722, R722 +vabs.p R723, R723 +vabs.t C000, C000 +vabs.t C010, C010 +vabs.t C020, C020 +vabs.t C030, C030 +vabs.t C100, C100 +vabs.t C110, C110 +vabs.t C120, C120 +vabs.t C130, C130 +vabs.t C200, C200 +vabs.t C210, C210 +vabs.t C220, C220 +vabs.t C230, C230 +vabs.t C300, C300 +vabs.t C310, C310 +vabs.t C320, C320 +vabs.t C330, C330 +vabs.t C400, C400 +vabs.t C410, C410 +vabs.t C420, C420 +vabs.t C430, C430 +vabs.t C500, C500 +vabs.t C510, C510 +vabs.t C520, C520 +vabs.t C530, C530 +vabs.t C600, C600 +vabs.t C610, C610 +vabs.t C620, C620 +vabs.t C630, C630 +vabs.t C700, C700 +vabs.t C710, C710 +vabs.t C720, C720 +vabs.t C730, C730 +vabs.t R000, R000 +vabs.t R001, R001 +vabs.t R002, R002 +vabs.t R003, R003 +vabs.t R100, R100 +vabs.t R101, R101 +vabs.t R102, R102 +vabs.t R103, R103 +vabs.t R200, R200 +vabs.t R201, R201 +vabs.t R202, R202 +vabs.t R203, R203 +vabs.t R300, R300 +vabs.t R301, R301 +vabs.t R302, R302 +vabs.t R303, R303 +vabs.t R400, R400 +vabs.t R401, R401 +vabs.t R402, R402 +vabs.t R403, R403 +vabs.t R500, R500 +vabs.t R501, R501 +vabs.t R502, R502 +vabs.t R503, R503 +vabs.t R600, R600 +vabs.t R601, R601 +vabs.t R602, R602 +vabs.t R603, R603 +vabs.t R700, R700 +vabs.t R701, R701 +vabs.t R702, R702 +vabs.t R703, R703 +vabs.t C001, C001 +vabs.t C011, C011 +vabs.t C021, C021 +vabs.t C031, C031 +vabs.t C101, C101 +vabs.t C111, C111 +vabs.t C121, C121 +vabs.t C131, C131 +vabs.t C201, C201 +vabs.t C211, C211 +vabs.t C221, C221 +vabs.t C231, C231 +vabs.t C301, C301 +vabs.t C311, C311 +vabs.t C321, C321 +vabs.t C331, C331 +vabs.t C401, C401 +vabs.t C411, C411 +vabs.t C421, C421 +vabs.t C431, C431 +vabs.t C501, C501 +vabs.t C511, C511 +vabs.t C521, C521 +vabs.t C531, C531 +vabs.t C601, C601 +vabs.t C611, C611 +vabs.t C621, C621 +vabs.t C631, C631 +vabs.t C701, C701 +vabs.t C711, C711 +vabs.t C721, C721 +vabs.t C731, C731 +vabs.t R010, R010 +vabs.t R011, R011 +vabs.t R012, R012 +vabs.t R013, R013 +vabs.t R110, R110 +vabs.t R111, R111 +vabs.t R112, R112 +vabs.t R113, R113 +vabs.t R210, R210 +vabs.t R211, R211 +vabs.t R212, R212 +vabs.t R213, R213 +vabs.t R310, R310 +vabs.t R311, R311 +vabs.t R312, R312 +vabs.t R313, R313 +vabs.t R410, R410 +vabs.t R411, R411 +vabs.t R412, R412 +vabs.t R413, R413 +vabs.t R510, R510 +vabs.t R511, R511 +vabs.t R512, R512 +vabs.t R513, R513 +vabs.t R610, R610 +vabs.t R611, R611 +vabs.t R612, R612 +vabs.t R613, R613 +vabs.t R710, R710 +vabs.t R711, R711 +vabs.t R712, R712 +vabs.t R713, R713 +vabs.q C000, C000 +vabs.q C010, C010 +vabs.q C020, C020 +vabs.q C030, C030 +vabs.q C100, C100 +vabs.q C110, C110 +vabs.q C120, C120 +vabs.q C130, C130 +vabs.q C200, C200 +vabs.q C210, C210 +vabs.q C220, C220 +vabs.q C230, C230 +vabs.q C300, C300 +vabs.q C310, C310 +vabs.q C320, C320 +vabs.q C330, C330 +vabs.q C400, C400 +vabs.q C410, C410 +vabs.q C420, C420 +vabs.q C430, C430 +vabs.q C500, C500 +vabs.q C510, C510 +vabs.q C520, C520 +vabs.q C530, C530 +vabs.q C600, C600 +vabs.q C610, C610 +vabs.q C620, C620 +vabs.q C630, C630 +vabs.q C700, C700 +vabs.q C710, C710 +vabs.q C720, C720 +vabs.q C730, C730 +vabs.q R000, R000 +vabs.q R001, R001 +vabs.q R002, R002 +vabs.q R003, R003 +vabs.q R100, R100 +vabs.q R101, R101 +vabs.q R102, R102 +vabs.q R103, R103 +vabs.q R200, R200 +vabs.q R201, R201 +vabs.q R202, R202 +vabs.q R203, R203 +vabs.q R300, R300 +vabs.q R301, R301 +vabs.q R302, R302 +vabs.q R303, R303 +vabs.q R400, R400 +vabs.q R401, R401 +vabs.q R402, R402 +vabs.q R403, R403 +vabs.q R500, R500 +vabs.q R501, R501 +vabs.q R502, R502 +vabs.q R503, R503 +vabs.q R600, R600 +vabs.q R601, R601 +vabs.q R602, R602 +vabs.q R603, R603 +vabs.q R700, R700 +vabs.q R701, R701 +vabs.q R702, R702 +vabs.q R703, R703 +vabs.q C002, C002 +vabs.q C012, C012 +vabs.q C022, C022 +vabs.q C032, C032 +vabs.q C102, C102 +vabs.q C112, C112 +vabs.q C122, C122 +vabs.q C132, C132 +vabs.q C202, C202 +vabs.q C212, C212 +vabs.q C222, C222 +vabs.q C232, C232 +vabs.q C302, C302 +vabs.q C312, C312 +vabs.q C322, C322 +vabs.q C332, C332 +vabs.q C402, C402 +vabs.q C412, C412 +vabs.q C422, C422 +vabs.q C432, C432 +vabs.q C502, C502 +vabs.q C512, C512 +vabs.q C522, C522 +vabs.q C532, C532 +vabs.q C602, C602 +vabs.q C612, C612 +vabs.q C622, C622 +vabs.q C632, C632 +vabs.q C702, C702 +vabs.q C712, C712 +vabs.q C722, C722 +vabs.q C732, C732 +vabs.q R020, R020 +vabs.q R021, R021 +vabs.q R022, R022 +vabs.q R023, R023 +vabs.q R120, R120 +vabs.q R121, R121 +vabs.q R122, R122 +vabs.q R123, R123 +vabs.q R220, R220 +vabs.q R221, R221 +vabs.q R222, R222 +vabs.q R223, R223 +vabs.q R320, R320 +vabs.q R321, R321 +vabs.q R322, R322 +vabs.q R323, R323 +vabs.q R420, R420 +vabs.q R421, R421 +vabs.q R422, R422 +vabs.q R423, R423 +vabs.q R520, R520 +vabs.q R521, R521 +vabs.q R522, R522 +vabs.q R523, R523 +vabs.q R620, R620 +vabs.q R621, R621 +vabs.q R622, R622 +vabs.q R623, R623 +vabs.q R720, R720 +vabs.q R721, R721 +vabs.q R722, R722 +vabs.q R723, R723 +vadd.s S002, S400, S000 +vadd.p C002, C400, C000 +vadd.t C001, C400, C000 +vadd.q C002, C400, C000 +vsub.s S002, S400, S000 +vsub.p C002, C400, C000 +vsub.t C001, C400, C000 +vsub.q C002, C400, C000 +vsbn.s S002, S400, S000 +vdiv.s S002, S400, S000 +vdiv.p C100, C400, C000 +vdiv.t C100, C400, C000 +vdiv.q C100, C400, C000 +vmul.s S002, S400, S000 +vmul.p C002, C400, C000 +vmul.t C001, C400, C000 +vmul.q C002, C400, C000 +vdot.p S002, C400, C000 +vdot.t S002, C400, C000 +vdot.q S002, C400, C000 +vscl.p C002, C400, S000 +vscl.t C001, C400, S000 +vscl.q C002, C400, S000 +vhdp.p S002, C400, C000 +vhdp.t S002, C400, C000 +vhdp.q S002, C400, C000 +vcrs.t C001, C400, C000 +vdet.p S002, C400, C000 +vcmp.s eq, S400, S002 +vcmp.p eq, C400, C002 +vcmp.t eq, C400, C001 +vcmp.q eq, C400, C002 +vmin.s S010, S400, S002 +vmin.p C010, C400, C002 +vmin.t C010, C400, C001 +vmin.q C010, C400, C002 +vmax.s S010, S400, S002 +vmax.p C010, C400, C002 +vmax.t C010, C400, C001 +vmax.q C010, C400, C002 +vscmp.s S010, S400, S002 +vscmp.p C010, C400, C002 +vscmp.t C010, C400, C001 +vscmp.q C010, C400, C002 +vsge.s S010, S400, S002 +vsge.p C010, C400, C002 +vsge.t C010, C400, C001 +vsge.q C010, C400, C002 +vslt.s S010, S400, S002 +vslt.p C010, C400, C002 +vslt.t C010, C400, C001 +vslt.q C010, C400, C002 +vcmp.s fl, S200, S002 +vcmp.p fl, C200, C002 +vcmp.t fl, C200, C001 +vcmp.q fl, C200, C002 +vcmp.s eq, S200, S002 +vcmp.p eq, C200, C002 +vcmp.t eq, C200, C001 +vcmp.q eq, C200, C002 +vcmp.s lt, S200, S002 +vcmp.p lt, C200, C002 +vcmp.t lt, C200, C001 +vcmp.q lt, C200, C002 +vcmp.s le, S200, S002 +vcmp.p le, C200, C002 +vcmp.t le, C200, C001 +vcmp.q le, C200, C002 +vcmp.s tr, S200, S002 +vcmp.p tr, C200, C002 +vcmp.t tr, C200, C001 +vcmp.q tr, C200, C002 +vcmp.s ne, S200, S002 +vcmp.p ne, C200, C002 +vcmp.t ne, C200, C001 +vcmp.q ne, C200, C002 +vcmp.s ge, S200, S002 +vcmp.p ge, C200, C002 +vcmp.t ge, C200, C001 +vcmp.q ge, C200, C002 +vcmp.s gt, S200, S002 +vcmp.p gt, C200, C002 +vcmp.t gt, C200, C001 +vcmp.q gt, C200, C002 +vcmp.s ez, S200, S002 +vcmp.p ez, C200, C002 +vcmp.t ez, C200, C001 +vcmp.q ez, C200, C002 +vcmp.s en, S200, S002 +vcmp.p en, C200, C002 +vcmp.t en, C200, C001 +vcmp.q en, C200, C002 +vcmp.s ei, S200, S002 +vcmp.p ei, C200, C002 +vcmp.t ei, C200, C001 +vcmp.q ei, C200, C002 +vcmp.s es, S200, S002 +vcmp.p es, C200, C002 +vcmp.t es, C200, C001 +vcmp.q es, C200, C002 +vcmp.s nz, S200, S002 +vcmp.p nz, C200, C002 +vcmp.t nz, C200, C001 +vcmp.q nz, C200, C002 +vcmp.s nn, S200, S002 +vcmp.p nn, C200, C002 +vcmp.t nn, C200, C001 +vcmp.q nn, C200, C002 +vcmp.s ni, S200, S002 +vcmp.p ni, C200, C002 +vcmp.t ni, C200, C001 +vcmp.q ni, C200, C002 +vcmp.s ns, S200, S002 +vcmp.p ns, C200, C002 +vcmp.t ns, C200, C001 +vcmp.q ns, C200, C002 +vcmp.s fl +vcmp.p fl +vcmp.t fl +vcmp.q fl +vcmp.s eq, S000, S000 +vcmp.p eq, C000, C000 +vcmp.t eq, C000, C000 +vcmp.q eq, C000, C000 +vcmp.s lt, S000, S000 +vcmp.p lt, C000, C000 +vcmp.t lt, C000, C000 +vcmp.q lt, C000, C000 +vcmp.s le, S000, S000 +vcmp.p le, C000, C000 +vcmp.t le, C000, C000 +vcmp.q le, C000, C000 +vcmp.s tr +vcmp.p tr +vcmp.t tr +vcmp.q tr +vcmp.s ne, S000, S000 +vcmp.p ne, C000, C000 +vcmp.t ne, C000, C000 +vcmp.q ne, C000, C000 +vcmp.s ge, S000, S000 +vcmp.p ge, C000, C000 +vcmp.t ge, C000, C000 +vcmp.q ge, C000, C000 +vcmp.s gt, S000, S000 +vcmp.p gt, C000, C000 +vcmp.t gt, C000, C000 +vcmp.q gt, C000, C000 +vcmp.s ez, S000 +vcmp.p ez, C000 +vcmp.t ez, C000 +vcmp.q ez, C000 +vcmp.s en, S000 +vcmp.p en, C000 +vcmp.t en, C000 +vcmp.q en, C000 +vcmp.s ei, S000 +vcmp.p ei, C000 +vcmp.t ei, C000 +vcmp.q ei, C000 +vcmp.s es, S000 +vcmp.p es, C000 +vcmp.t es, C000 +vcmp.q es, C000 +vcmp.s nz, S000 +vcmp.p nz, C000 +vcmp.t nz, C000 +vcmp.q nz, C000 +vcmp.s nn, S000 +vcmp.p nn, C000 +vcmp.t nn, C000 +vcmp.q nn, C000 +vcmp.s ni, S000 +vcmp.p ni, C000 +vcmp.t ni, C000 +vcmp.q ni, C000 +vcmp.s ns, S000 +vcmp.p ns, C000 +vcmp.t ns, C000 +vcmp.q ns, C000 +mfvc $a0, $128 +mfvc $a0, $129 +mfvc $a0, $130 +mfvc $a0, $131 +mfvc $a0, $132 +mfvc $a0, $133 +mfvc $a0, $134 +mfvc $a0, $135 +mfvc $a0, $136 +mfvc $a0, $137 +mfvc $a0, $138 +mfvc $a0, $139 +mfvc $a0, $140 +mfvc $a0, $141 +mfvc $a0, $142 +mfvc $a0, $143 +vsync2 +mfv $a1, S000 +mfvc $a1, $129 +mtv $a1, S000 +mtvc $a1, $129 +vmov.s S010, S400 +vmov.p C010, C400 +vmov.t C010, C400 +vmov.q C010, C400 +vabs.s S010, S400 +vabs.p C010, C400 +vabs.t C010, C400 +vabs.q C010, C400 +vneg.s S010, S400 +vneg.p C010, C400 +vneg.t C010, C400 +vneg.q C010, C400 +vidt.p C010 +vidt.q C010 +vsat0.s S010, S400 +vsat0.p C010, C400 +vsat0.t C010, C400 +vsat0.q C010, C400 +vsat1.s S010, S400 +vsat1.p C010, C400 +vsat1.t C010, C400 +vsat1.q C010, C400 +vone.s S010 +vone.p C010 +vone.t C010 +vone.q C010 +vrcp.s S010, S400 +vrcp.p C010, C400 +vrcp.t C010, C400 +vrcp.q C010, C400 +vrsq.s S010, S400 +vrsq.p C010, C400 +vrsq.t C010, C400 +vrsq.q C010, C400 +vsin.s S010, S400 +vsin.p C010, C400 +vsin.t C010, C400 +vsin.q C010, C400 +vcos.s S010, S400 +vcos.p C010, C400 +vcos.t C010, C400 +vcos.q C010, C400 +vexp2.s S010, S400 +vexp2.p C010, C400 +vexp2.t C010, C400 +vexp2.q C010, C400 +vlog2.s S010, S400 +vlog2.p C010, C400 +vlog2.t C010, C400 +vlog2.q C010, C400 +vsqrt.s S010, S400 +vsqrt.p C010, C400 +vsqrt.t C010, C400 +vsqrt.q C010, C400 +vasin.s S010, S400 +vasin.p C010, C400 +vasin.t C010, C400 +vasin.q C010, C400 +vnrcp.s S010, S400 +vnrcp.p C010, C400 +vnrcp.t C010, C400 +vnrcp.q C010, C400 +vnsin.s S010, S400 +vnsin.p C010, C400 +vnsin.t C010, C400 +vnsin.q C010, C400 +vrexp2.s S010, S400 +vrexp2.p C010, C400 +vrexp2.t C010, C400 +vrexp2.q C010, C400 +vrnds.s S400 +vrndi.s S010 +vrndi.p C010 +vrndi.t C010 +vrndi.q C010 +vrndf1.s S010 +vrndf1.p C010 +vrndf1.t C010 +vrndf1.q C010 +vrndf2.s S010 +vrndf2.p C010 +vrndf2.t C010 +vrndf2.q C010 +vf2h.p S010, C400 +vf2h.q C010, C400 +vh2f.s C010, S400 +vh2f.p C010, C400 +vsbz.s S010, S400 +vlgb.s S010, S400 +vuc2ifs.s C010, S400 +vc2i.s C010, S400 +vus2i.s C010, S400 +vus2i.p C010, C400 +vs2i.s C010, S400 +vs2i.p C010, C400 +vi2uc.q S010, C400 +vi2c.q S010, C400 +vi2us.p S010, C400 +vi2us.q C010, C400 +vi2s.p S010, C400 +vi2s.q C010, C400 +vsrt1.q C010, C400 +vsrt2.q C010, C400 +vbfy1.p C010, C400 +vbfy1.q C010, C400 +vbfy2.q C010, C400 +vocp.s S010, S400 +vocp.p C010, C400 +vocp.t C010, C400 +vocp.q C010, C400 +vsocp.s C010, S400 +vsocp.p C010, C400 +vfad.p S010, C400 +vfad.t S010, C400 +vfad.q S010, C400 +vavg.p S010, C400 +vavg.t S010, C400 +vavg.q S010, C400 +vsrt3.q C010, C400 +vsrt4.q C010, C400 +vsgn.s S010, S400 +vsgn.p C010, C400 +vsgn.t C010, C400 +vsgn.q C010, C400 +vmfvc S010, $128 +vmfvc S010, $129 +vmfvc S010, $130 +vmfvc S010, $131 +vmfvc S010, $132 +vmfvc S010, $133 +vmfvc S010, $134 +vmfvc S010, $135 +vmfvc S010, $136 +vmfvc S010, $137 +vmfvc S010, $138 +vmfvc S010, $139 +vmfvc S010, $140 +vmfvc S010, $141 +vmfvc S010, $142 +vmfvc S010, $143 +vmfvc S010, $144 +vmfvc S010, $145 +vmfvc S010, $146 +vmfvc S010, $147 +vmfvc S010, $148 +vmfvc S010, $149 +vmfvc S010, $150 +vmfvc S010, $151 +vmfvc S010, $152 +vmfvc S010, $153 +vmfvc S010, $154 +vmfvc S010, $155 +vmfvc S010, $156 +vmfvc S010, $157 +vmfvc S010, $158 +vmfvc S010, $159 +vmfvc S010, $160 +vmfvc S010, $161 +vmfvc S010, $162 +vmfvc S010, $163 +vmfvc S010, $164 +vmfvc S010, $165 +vmfvc S010, $166 +vmfvc S010, $167 +vmfvc S010, $168 +vmfvc S010, $169 +vmfvc S010, $170 +vmfvc S010, $171 +vmfvc S010, $172 +vmfvc S010, $173 +vmfvc S010, $174 +vmfvc S010, $175 +vmfvc S010, $176 +vmfvc S010, $177 +vmfvc S010, $178 +vmfvc S010, $179 +vmfvc S010, $180 +vmfvc S010, $181 +vmfvc S010, $182 +vmfvc S010, $183 +vmfvc S010, $184 +vmfvc S010, $185 +vmfvc S010, $186 +vmfvc S010, $187 +vmfvc S010, $188 +vmfvc S010, $189 +vmfvc S010, $190 +vmfvc S010, $191 +vmfvc S010, $192 +vmfvc S010, $193 +vmfvc S010, $194 +vmfvc S010, $195 +vmfvc S010, $196 +vmfvc S010, $197 +vmfvc S010, $198 +vmfvc S010, $199 +vmfvc S010, $200 +vmfvc S010, $201 +vmfvc S010, $202 +vmfvc S010, $203 +vmfvc S010, $204 +vmfvc S010, $205 +vmfvc S010, $206 +vmfvc S010, $207 +vmfvc S010, $208 +vmfvc S010, $209 +vmfvc S010, $210 +vmfvc S010, $211 +vmfvc S010, $212 +vmfvc S010, $213 +vmfvc S010, $214 +vmfvc S010, $215 +vmfvc S010, $216 +vmfvc S010, $217 +vmfvc S010, $218 +vmfvc S010, $219 +vmfvc S010, $220 +vmfvc S010, $221 +vmfvc S010, $222 +vmfvc S010, $223 +vmfvc S010, $224 +vmfvc S010, $225 +vmfvc S010, $226 +vmfvc S010, $227 +vmfvc S010, $228 +vmfvc S010, $229 +vmfvc S010, $230 +vmfvc S010, $231 +vmfvc S010, $232 +vmfvc S010, $233 +vmfvc S010, $234 +vmfvc S010, $235 +vmfvc S010, $236 +vmfvc S010, $237 +vmfvc S010, $238 +vmfvc S010, $239 +vmfvc S010, $240 +vmfvc S010, $241 +vmfvc S010, $242 +vmfvc S010, $243 +vmfvc S010, $244 +vmfvc S010, $245 +vmfvc S010, $246 +vmfvc S010, $247 +vmfvc S010, $248 +vmfvc S010, $249 +vmfvc S010, $250 +vmfvc S010, $251 +vmfvc S010, $252 +vmfvc S010, $253 +vmfvc S010, $254 +vmfvc S010, $255 +vmtvc $128, S010 +vmtvc $129, S010 +vmtvc $130, S010 +vmtvc $131, S010 +vmtvc $132, S010 +vmtvc $133, S010 +vmtvc $134, S010 +vmtvc $135, S010 +vmtvc $136, S010 +vmtvc $137, S010 +vmtvc $138, S010 +vmtvc $139, S010 +vmtvc $140, S010 +vmtvc $141, S010 +vmtvc $142, S010 +vmtvc $143, S010 +vmtvc $144, S010 +vmtvc $145, S010 +vmtvc $146, S010 +vmtvc $147, S010 +vmtvc $148, S010 +vmtvc $149, S010 +vmtvc $150, S010 +vmtvc $151, S010 +vmtvc $152, S010 +vmtvc $153, S010 +vmtvc $154, S010 +vmtvc $155, S010 +vmtvc $156, S010 +vmtvc $157, S010 +vmtvc $158, S010 +vmtvc $159, S010 +vmtvc $160, S010 +vmtvc $161, S010 +vmtvc $162, S010 +vmtvc $163, S010 +vmtvc $164, S010 +vmtvc $165, S010 +vmtvc $166, S010 +vmtvc $167, S010 +vmtvc $168, S010 +vmtvc $169, S010 +vmtvc $170, S010 +vmtvc $171, S010 +vmtvc $172, S010 +vmtvc $173, S010 +vmtvc $174, S010 +vmtvc $175, S010 +vmtvc $176, S010 +vmtvc $177, S010 +vmtvc $178, S010 +vmtvc $179, S010 +vmtvc $180, S010 +vmtvc $181, S010 +vmtvc $182, S010 +vmtvc $183, S010 +vmtvc $184, S010 +vmtvc $185, S010 +vmtvc $186, S010 +vmtvc $187, S010 +vmtvc $188, S010 +vmtvc $189, S010 +vmtvc $190, S010 +vmtvc $191, S010 +vmtvc $192, S010 +vmtvc $193, S010 +vmtvc $194, S010 +vmtvc $195, S010 +vmtvc $196, S010 +vmtvc $197, S010 +vmtvc $198, S010 +vmtvc $199, S010 +vmtvc $200, S010 +vmtvc $201, S010 +vmtvc $202, S010 +vmtvc $203, S010 +vmtvc $204, S010 +vmtvc $205, S010 +vmtvc $206, S010 +vmtvc $207, S010 +vmtvc $208, S010 +vmtvc $209, S010 +vmtvc $210, S010 +vmtvc $211, S010 +vmtvc $212, S010 +vmtvc $213, S010 +vmtvc $214, S010 +vmtvc $215, S010 +vmtvc $216, S010 +vmtvc $217, S010 +vmtvc $218, S010 +vmtvc $219, S010 +vmtvc $220, S010 +vmtvc $221, S010 +vmtvc $222, S010 +vmtvc $223, S010 +vmtvc $224, S010 +vmtvc $225, S010 +vmtvc $226, S010 +vmtvc $227, S010 +vmtvc $228, S010 +vmtvc $229, S010 +vmtvc $230, S010 +vmtvc $231, S010 +vmtvc $232, S010 +vmtvc $233, S010 +vmtvc $234, S010 +vmtvc $235, S010 +vmtvc $236, S010 +vmtvc $237, S010 +vmtvc $238, S010 +vmtvc $239, S010 +vmtvc $240, S010 +vmtvc $241, S010 +vmtvc $242, S010 +vmtvc $243, S010 +vmtvc $244, S010 +vmtvc $245, S010 +vmtvc $246, S010 +vmtvc $247, S010 +vmtvc $248, S010 +vmtvc $249, S010 +vmtvc $250, S010 +vmtvc $251, S010 +vmtvc $252, S010 +vmtvc $253, S010 +vmtvc $254, S010 +vmtvc $255, S010 +vt4444.q C010, C400 +vt5551.q C010, C400 +vt5650.q C010, C400 +nop # vcst.s S010, INVALID_0 +nop # vcst.p C010, INVALID_0 +nop # vcst.t C010, INVALID_0 +nop # vcst.q C010, INVALID_0 +vcst.s S010, VFPU_HUGE +vcst.p C010, VFPU_HUGE +vcst.t C010, VFPU_HUGE +vcst.q C010, VFPU_HUGE +vcst.s S010, VFPU_SQRT2 +vcst.p C010, VFPU_SQRT2 +vcst.t C010, VFPU_SQRT2 +vcst.q C010, VFPU_SQRT2 +vcst.s S010, VFPU_SQRT1_2 +vcst.p C010, VFPU_SQRT1_2 +vcst.t C010, VFPU_SQRT1_2 +vcst.q C010, VFPU_SQRT1_2 +vcst.s S010, VFPU_2_SQRTPI +vcst.p C010, VFPU_2_SQRTPI +vcst.t C010, VFPU_2_SQRTPI +vcst.q C010, VFPU_2_SQRTPI +vcst.s S010, VFPU_2_PI +vcst.p C010, VFPU_2_PI +vcst.t C010, VFPU_2_PI +vcst.q C010, VFPU_2_PI +vcst.s S010, VFPU_1_PI +vcst.p C010, VFPU_1_PI +vcst.t C010, VFPU_1_PI +vcst.q C010, VFPU_1_PI +vcst.s S010, VFPU_PI_4 +vcst.p C010, VFPU_PI_4 +vcst.t C010, VFPU_PI_4 +vcst.q C010, VFPU_PI_4 +vcst.s S010, VFPU_PI_2 +vcst.p C010, VFPU_PI_2 +vcst.t C010, VFPU_PI_2 +vcst.q C010, VFPU_PI_2 +vcst.s S010, VFPU_PI +vcst.p C010, VFPU_PI +vcst.t C010, VFPU_PI +vcst.q C010, VFPU_PI +vcst.s S010, VFPU_E +vcst.p C010, VFPU_E +vcst.t C010, VFPU_E +vcst.q C010, VFPU_E +vcst.s S010, VFPU_LOG2E +vcst.p C010, VFPU_LOG2E +vcst.t C010, VFPU_LOG2E +vcst.q C010, VFPU_LOG2E +vcst.s S010, VFPU_LOG10E +vcst.p C010, VFPU_LOG10E +vcst.t C010, VFPU_LOG10E +vcst.q C010, VFPU_LOG10E +vcst.s S010, VFPU_LN2 +vcst.p C010, VFPU_LN2 +vcst.t C010, VFPU_LN2 +vcst.q C010, VFPU_LN2 +vcst.s S010, VFPU_LN10 +vcst.p C010, VFPU_LN10 +vcst.t C010, VFPU_LN10 +vcst.q C010, VFPU_LN10 +vcst.s S010, VFPU_2PI +vcst.p C010, VFPU_2PI +vcst.t C010, VFPU_2PI +vcst.q C010, VFPU_2PI +vcst.s S010, VFPU_PI_6 +vcst.p C010, VFPU_PI_6 +vcst.t C010, VFPU_PI_6 +vcst.q C010, VFPU_PI_6 +vcst.s S010, VFPU_LOG10TWO +vcst.p C010, VFPU_LOG10TWO +vcst.t C010, VFPU_LOG10TWO +vcst.q C010, VFPU_LOG10TWO +vcst.s S010, VFPU_LOG2TEN +vcst.p C010, VFPU_LOG2TEN +vcst.t C010, VFPU_LOG2TEN +vcst.q C010, VFPU_LOG2TEN +vcst.s S010, VFPU_SQRT3_2 +vcst.p C010, VFPU_SQRT3_2 +vcst.t C010, VFPU_SQRT3_2 +vcst.q C010, VFPU_SQRT3_2 +nop # vcst.s S010, INVALID_20 +nop # vcst.p C010, INVALID_20 +nop # vcst.t C010, INVALID_20 +nop # vcst.q C010, INVALID_20 +nop # vcst.s S010, INVALID_21 +nop # vcst.p C010, INVALID_21 +nop # vcst.t C010, INVALID_21 +nop # vcst.q C010, INVALID_21 +nop # vcst.s S010, INVALID_22 +nop # vcst.p C010, INVALID_22 +nop # vcst.t C010, INVALID_22 +nop # vcst.q C010, INVALID_22 +nop # vcst.s S010, INVALID_23 +nop # vcst.p C010, INVALID_23 +nop # vcst.t C010, INVALID_23 +nop # vcst.q C010, INVALID_23 +nop # vcst.s S010, INVALID_24 +nop # vcst.p C010, INVALID_24 +nop # vcst.t C010, INVALID_24 +nop # vcst.q C010, INVALID_24 +nop # vcst.s S010, INVALID_25 +nop # vcst.p C010, INVALID_25 +nop # vcst.t C010, INVALID_25 +nop # vcst.q C010, INVALID_25 +nop # vcst.s S010, INVALID_26 +nop # vcst.p C010, INVALID_26 +nop # vcst.t C010, INVALID_26 +nop # vcst.q C010, INVALID_26 +nop # vcst.s S010, INVALID_27 +nop # vcst.p C010, INVALID_27 +nop # vcst.t C010, INVALID_27 +nop # vcst.q C010, INVALID_27 +nop # vcst.s S010, INVALID_28 +nop # vcst.p C010, INVALID_28 +nop # vcst.t C010, INVALID_28 +nop # vcst.q C010, INVALID_28 +nop # vcst.s S010, INVALID_29 +nop # vcst.p C010, INVALID_29 +nop # vcst.t C010, INVALID_29 +nop # vcst.q C010, INVALID_29 +nop # vcst.s S010, INVALID_30 +nop # vcst.p C010, INVALID_30 +nop # vcst.t C010, INVALID_30 +nop # vcst.q C010, INVALID_30 +nop # vcst.s S010, INVALID_31 +nop # vcst.p C010, INVALID_31 +nop # vcst.t C010, INVALID_31 +nop # vcst.q C010, INVALID_31 +vf2in.s S010, S400, 0 +vf2in.p C010, C400, 0 +vf2in.t C010, C400, 0 +vf2in.q C010, C400, 0 +vf2in.s S010, S400, 1 +vf2in.p C010, C400, 1 +vf2in.t C010, C400, 1 +vf2in.q C010, C400, 1 +vf2in.s S010, S400, 2 +vf2in.p C010, C400, 2 +vf2in.t C010, C400, 2 +vf2in.q C010, C400, 2 +vf2in.s S010, S400, 3 +vf2in.p C010, C400, 3 +vf2in.t C010, C400, 3 +vf2in.q C010, C400, 3 +vf2in.s S010, S400, 4 +vf2in.p C010, C400, 4 +vf2in.t C010, C400, 4 +vf2in.q C010, C400, 4 +vf2in.s S010, S400, 5 +vf2in.p C010, C400, 5 +vf2in.t C010, C400, 5 +vf2in.q C010, C400, 5 +vf2in.s S010, S400, 6 +vf2in.p C010, C400, 6 +vf2in.t C010, C400, 6 +vf2in.q C010, C400, 6 +vf2in.s S010, S400, 7 +vf2in.p C010, C400, 7 +vf2in.t C010, C400, 7 +vf2in.q C010, C400, 7 +vf2in.s S010, S400, 8 +vf2in.p C010, C400, 8 +vf2in.t C010, C400, 8 +vf2in.q C010, C400, 8 +vf2in.s S010, S400, 9 +vf2in.p C010, C400, 9 +vf2in.t C010, C400, 9 +vf2in.q C010, C400, 9 +vf2in.s S010, S400, 10 +vf2in.p C010, C400, 10 +vf2in.t C010, C400, 10 +vf2in.q C010, C400, 10 +vf2in.s S010, S400, 11 +vf2in.p C010, C400, 11 +vf2in.t C010, C400, 11 +vf2in.q C010, C400, 11 +vf2in.s S010, S400, 12 +vf2in.p C010, C400, 12 +vf2in.t C010, C400, 12 +vf2in.q C010, C400, 12 +vf2in.s S010, S400, 13 +vf2in.p C010, C400, 13 +vf2in.t C010, C400, 13 +vf2in.q C010, C400, 13 +vf2in.s S010, S400, 14 +vf2in.p C010, C400, 14 +vf2in.t C010, C400, 14 +vf2in.q C010, C400, 14 +vf2in.s S010, S400, 15 +vf2in.p C010, C400, 15 +vf2in.t C010, C400, 15 +vf2in.q C010, C400, 15 +vf2in.s S010, S400, 16 +vf2in.p C010, C400, 16 +vf2in.t C010, C400, 16 +vf2in.q C010, C400, 16 +vf2in.s S010, S400, 17 +vf2in.p C010, C400, 17 +vf2in.t C010, C400, 17 +vf2in.q C010, C400, 17 +vf2in.s S010, S400, 18 +vf2in.p C010, C400, 18 +vf2in.t C010, C400, 18 +vf2in.q C010, C400, 18 +vf2in.s S010, S400, 19 +vf2in.p C010, C400, 19 +vf2in.t C010, C400, 19 +vf2in.q C010, C400, 19 +vf2in.s S010, S400, 20 +vf2in.p C010, C400, 20 +vf2in.t C010, C400, 20 +vf2in.q C010, C400, 20 +vf2in.s S010, S400, 21 +vf2in.p C010, C400, 21 +vf2in.t C010, C400, 21 +vf2in.q C010, C400, 21 +vf2in.s S010, S400, 22 +vf2in.p C010, C400, 22 +vf2in.t C010, C400, 22 +vf2in.q C010, C400, 22 +vf2in.s S010, S400, 23 +vf2in.p C010, C400, 23 +vf2in.t C010, C400, 23 +vf2in.q C010, C400, 23 +vf2in.s S010, S400, 24 +vf2in.p C010, C400, 24 +vf2in.t C010, C400, 24 +vf2in.q C010, C400, 24 +vf2in.s S010, S400, 25 +vf2in.p C010, C400, 25 +vf2in.t C010, C400, 25 +vf2in.q C010, C400, 25 +vf2in.s S010, S400, 26 +vf2in.p C010, C400, 26 +vf2in.t C010, C400, 26 +vf2in.q C010, C400, 26 +vf2in.s S010, S400, 27 +vf2in.p C010, C400, 27 +vf2in.t C010, C400, 27 +vf2in.q C010, C400, 27 +vf2in.s S010, S400, 28 +vf2in.p C010, C400, 28 +vf2in.t C010, C400, 28 +vf2in.q C010, C400, 28 +vf2in.s S010, S400, 29 +vf2in.p C010, C400, 29 +vf2in.t C010, C400, 29 +vf2in.q C010, C400, 29 +vf2in.s S010, S400, 30 +vf2in.p C010, C400, 30 +vf2in.t C010, C400, 30 +vf2in.q C010, C400, 30 +vf2in.s S010, S400, 31 +vf2in.p C010, C400, 31 +vf2in.t C010, C400, 31 +vf2in.q C010, C400, 31 +vf2iz.s S010, S400, 0 +vf2iz.p C010, C400, 0 +vf2iz.t C010, C400, 0 +vf2iz.q C010, C400, 0 +vf2iz.s S010, S400, 1 +vf2iz.p C010, C400, 1 +vf2iz.t C010, C400, 1 +vf2iz.q C010, C400, 1 +vf2iz.s S010, S400, 2 +vf2iz.p C010, C400, 2 +vf2iz.t C010, C400, 2 +vf2iz.q C010, C400, 2 +vf2iz.s S010, S400, 3 +vf2iz.p C010, C400, 3 +vf2iz.t C010, C400, 3 +vf2iz.q C010, C400, 3 +vf2iz.s S010, S400, 4 +vf2iz.p C010, C400, 4 +vf2iz.t C010, C400, 4 +vf2iz.q C010, C400, 4 +vf2iz.s S010, S400, 5 +vf2iz.p C010, C400, 5 +vf2iz.t C010, C400, 5 +vf2iz.q C010, C400, 5 +vf2iz.s S010, S400, 6 +vf2iz.p C010, C400, 6 +vf2iz.t C010, C400, 6 +vf2iz.q C010, C400, 6 +vf2iz.s S010, S400, 7 +vf2iz.p C010, C400, 7 +vf2iz.t C010, C400, 7 +vf2iz.q C010, C400, 7 +vf2iz.s S010, S400, 8 +vf2iz.p C010, C400, 8 +vf2iz.t C010, C400, 8 +vf2iz.q C010, C400, 8 +vf2iz.s S010, S400, 9 +vf2iz.p C010, C400, 9 +vf2iz.t C010, C400, 9 +vf2iz.q C010, C400, 9 +vf2iz.s S010, S400, 10 +vf2iz.p C010, C400, 10 +vf2iz.t C010, C400, 10 +vf2iz.q C010, C400, 10 +vf2iz.s S010, S400, 11 +vf2iz.p C010, C400, 11 +vf2iz.t C010, C400, 11 +vf2iz.q C010, C400, 11 +vf2iz.s S010, S400, 12 +vf2iz.p C010, C400, 12 +vf2iz.t C010, C400, 12 +vf2iz.q C010, C400, 12 +vf2iz.s S010, S400, 13 +vf2iz.p C010, C400, 13 +vf2iz.t C010, C400, 13 +vf2iz.q C010, C400, 13 +vf2iz.s S010, S400, 14 +vf2iz.p C010, C400, 14 +vf2iz.t C010, C400, 14 +vf2iz.q C010, C400, 14 +vf2iz.s S010, S400, 15 +vf2iz.p C010, C400, 15 +vf2iz.t C010, C400, 15 +vf2iz.q C010, C400, 15 +vf2iz.s S010, S400, 16 +vf2iz.p C010, C400, 16 +vf2iz.t C010, C400, 16 +vf2iz.q C010, C400, 16 +vf2iz.s S010, S400, 17 +vf2iz.p C010, C400, 17 +vf2iz.t C010, C400, 17 +vf2iz.q C010, C400, 17 +vf2iz.s S010, S400, 18 +vf2iz.p C010, C400, 18 +vf2iz.t C010, C400, 18 +vf2iz.q C010, C400, 18 +vf2iz.s S010, S400, 19 +vf2iz.p C010, C400, 19 +vf2iz.t C010, C400, 19 +vf2iz.q C010, C400, 19 +vf2iz.s S010, S400, 20 +vf2iz.p C010, C400, 20 +vf2iz.t C010, C400, 20 +vf2iz.q C010, C400, 20 +vf2iz.s S010, S400, 21 +vf2iz.p C010, C400, 21 +vf2iz.t C010, C400, 21 +vf2iz.q C010, C400, 21 +vf2iz.s S010, S400, 22 +vf2iz.p C010, C400, 22 +vf2iz.t C010, C400, 22 +vf2iz.q C010, C400, 22 +vf2iz.s S010, S400, 23 +vf2iz.p C010, C400, 23 +vf2iz.t C010, C400, 23 +vf2iz.q C010, C400, 23 +vf2iz.s S010, S400, 24 +vf2iz.p C010, C400, 24 +vf2iz.t C010, C400, 24 +vf2iz.q C010, C400, 24 +vf2iz.s S010, S400, 25 +vf2iz.p C010, C400, 25 +vf2iz.t C010, C400, 25 +vf2iz.q C010, C400, 25 +vf2iz.s S010, S400, 26 +vf2iz.p C010, C400, 26 +vf2iz.t C010, C400, 26 +vf2iz.q C010, C400, 26 +vf2iz.s S010, S400, 27 +vf2iz.p C010, C400, 27 +vf2iz.t C010, C400, 27 +vf2iz.q C010, C400, 27 +vf2iz.s S010, S400, 28 +vf2iz.p C010, C400, 28 +vf2iz.t C010, C400, 28 +vf2iz.q C010, C400, 28 +vf2iz.s S010, S400, 29 +vf2iz.p C010, C400, 29 +vf2iz.t C010, C400, 29 +vf2iz.q C010, C400, 29 +vf2iz.s S010, S400, 30 +vf2iz.p C010, C400, 30 +vf2iz.t C010, C400, 30 +vf2iz.q C010, C400, 30 +vf2iz.s S010, S400, 31 +vf2iz.p C010, C400, 31 +vf2iz.t C010, C400, 31 +vf2iz.q C010, C400, 31 +vf2iu.s S010, S400, 0 +vf2iu.p C010, C400, 0 +vf2iu.t C010, C400, 0 +vf2iu.q C010, C400, 0 +vf2iu.s S010, S400, 1 +vf2iu.p C010, C400, 1 +vf2iu.t C010, C400, 1 +vf2iu.q C010, C400, 1 +vf2iu.s S010, S400, 2 +vf2iu.p C010, C400, 2 +vf2iu.t C010, C400, 2 +vf2iu.q C010, C400, 2 +vf2iu.s S010, S400, 3 +vf2iu.p C010, C400, 3 +vf2iu.t C010, C400, 3 +vf2iu.q C010, C400, 3 +vf2iu.s S010, S400, 4 +vf2iu.p C010, C400, 4 +vf2iu.t C010, C400, 4 +vf2iu.q C010, C400, 4 +vf2iu.s S010, S400, 5 +vf2iu.p C010, C400, 5 +vf2iu.t C010, C400, 5 +vf2iu.q C010, C400, 5 +vf2iu.s S010, S400, 6 +vf2iu.p C010, C400, 6 +vf2iu.t C010, C400, 6 +vf2iu.q C010, C400, 6 +vf2iu.s S010, S400, 7 +vf2iu.p C010, C400, 7 +vf2iu.t C010, C400, 7 +vf2iu.q C010, C400, 7 +vf2iu.s S010, S400, 8 +vf2iu.p C010, C400, 8 +vf2iu.t C010, C400, 8 +vf2iu.q C010, C400, 8 +vf2iu.s S010, S400, 9 +vf2iu.p C010, C400, 9 +vf2iu.t C010, C400, 9 +vf2iu.q C010, C400, 9 +vf2iu.s S010, S400, 10 +vf2iu.p C010, C400, 10 +vf2iu.t C010, C400, 10 +vf2iu.q C010, C400, 10 +vf2iu.s S010, S400, 11 +vf2iu.p C010, C400, 11 +vf2iu.t C010, C400, 11 +vf2iu.q C010, C400, 11 +vf2iu.s S010, S400, 12 +vf2iu.p C010, C400, 12 +vf2iu.t C010, C400, 12 +vf2iu.q C010, C400, 12 +vf2iu.s S010, S400, 13 +vf2iu.p C010, C400, 13 +vf2iu.t C010, C400, 13 +vf2iu.q C010, C400, 13 +vf2iu.s S010, S400, 14 +vf2iu.p C010, C400, 14 +vf2iu.t C010, C400, 14 +vf2iu.q C010, C400, 14 +vf2iu.s S010, S400, 15 +vf2iu.p C010, C400, 15 +vf2iu.t C010, C400, 15 +vf2iu.q C010, C400, 15 +vf2iu.s S010, S400, 16 +vf2iu.p C010, C400, 16 +vf2iu.t C010, C400, 16 +vf2iu.q C010, C400, 16 +vf2iu.s S010, S400, 17 +vf2iu.p C010, C400, 17 +vf2iu.t C010, C400, 17 +vf2iu.q C010, C400, 17 +vf2iu.s S010, S400, 18 +vf2iu.p C010, C400, 18 +vf2iu.t C010, C400, 18 +vf2iu.q C010, C400, 18 +vf2iu.s S010, S400, 19 +vf2iu.p C010, C400, 19 +vf2iu.t C010, C400, 19 +vf2iu.q C010, C400, 19 +vf2iu.s S010, S400, 20 +vf2iu.p C010, C400, 20 +vf2iu.t C010, C400, 20 +vf2iu.q C010, C400, 20 +vf2iu.s S010, S400, 21 +vf2iu.p C010, C400, 21 +vf2iu.t C010, C400, 21 +vf2iu.q C010, C400, 21 +vf2iu.s S010, S400, 22 +vf2iu.p C010, C400, 22 +vf2iu.t C010, C400, 22 +vf2iu.q C010, C400, 22 +vf2iu.s S010, S400, 23 +vf2iu.p C010, C400, 23 +vf2iu.t C010, C400, 23 +vf2iu.q C010, C400, 23 +vf2iu.s S010, S400, 24 +vf2iu.p C010, C400, 24 +vf2iu.t C010, C400, 24 +vf2iu.q C010, C400, 24 +vf2iu.s S010, S400, 25 +vf2iu.p C010, C400, 25 +vf2iu.t C010, C400, 25 +vf2iu.q C010, C400, 25 +vf2iu.s S010, S400, 26 +vf2iu.p C010, C400, 26 +vf2iu.t C010, C400, 26 +vf2iu.q C010, C400, 26 +vf2iu.s S010, S400, 27 +vf2iu.p C010, C400, 27 +vf2iu.t C010, C400, 27 +vf2iu.q C010, C400, 27 +vf2iu.s S010, S400, 28 +vf2iu.p C010, C400, 28 +vf2iu.t C010, C400, 28 +vf2iu.q C010, C400, 28 +vf2iu.s S010, S400, 29 +vf2iu.p C010, C400, 29 +vf2iu.t C010, C400, 29 +vf2iu.q C010, C400, 29 +vf2iu.s S010, S400, 30 +vf2iu.p C010, C400, 30 +vf2iu.t C010, C400, 30 +vf2iu.q C010, C400, 30 +vf2iu.s S010, S400, 31 +vf2iu.p C010, C400, 31 +vf2iu.t C010, C400, 31 +vf2iu.q C010, C400, 31 +vf2id.s S010, S400, 0 +vf2id.p C010, C400, 0 +vf2id.t C010, C400, 0 +vf2id.q C010, C400, 0 +vf2id.s S010, S400, 1 +vf2id.p C010, C400, 1 +vf2id.t C010, C400, 1 +vf2id.q C010, C400, 1 +vf2id.s S010, S400, 2 +vf2id.p C010, C400, 2 +vf2id.t C010, C400, 2 +vf2id.q C010, C400, 2 +vf2id.s S010, S400, 3 +vf2id.p C010, C400, 3 +vf2id.t C010, C400, 3 +vf2id.q C010, C400, 3 +vf2id.s S010, S400, 4 +vf2id.p C010, C400, 4 +vf2id.t C010, C400, 4 +vf2id.q C010, C400, 4 +vf2id.s S010, S400, 5 +vf2id.p C010, C400, 5 +vf2id.t C010, C400, 5 +vf2id.q C010, C400, 5 +vf2id.s S010, S400, 6 +vf2id.p C010, C400, 6 +vf2id.t C010, C400, 6 +vf2id.q C010, C400, 6 +vf2id.s S010, S400, 7 +vf2id.p C010, C400, 7 +vf2id.t C010, C400, 7 +vf2id.q C010, C400, 7 +vf2id.s S010, S400, 8 +vf2id.p C010, C400, 8 +vf2id.t C010, C400, 8 +vf2id.q C010, C400, 8 +vf2id.s S010, S400, 9 +vf2id.p C010, C400, 9 +vf2id.t C010, C400, 9 +vf2id.q C010, C400, 9 +vf2id.s S010, S400, 10 +vf2id.p C010, C400, 10 +vf2id.t C010, C400, 10 +vf2id.q C010, C400, 10 +vf2id.s S010, S400, 11 +vf2id.p C010, C400, 11 +vf2id.t C010, C400, 11 +vf2id.q C010, C400, 11 +vf2id.s S010, S400, 12 +vf2id.p C010, C400, 12 +vf2id.t C010, C400, 12 +vf2id.q C010, C400, 12 +vf2id.s S010, S400, 13 +vf2id.p C010, C400, 13 +vf2id.t C010, C400, 13 +vf2id.q C010, C400, 13 +vf2id.s S010, S400, 14 +vf2id.p C010, C400, 14 +vf2id.t C010, C400, 14 +vf2id.q C010, C400, 14 +vf2id.s S010, S400, 15 +vf2id.p C010, C400, 15 +vf2id.t C010, C400, 15 +vf2id.q C010, C400, 15 +vf2id.s S010, S400, 16 +vf2id.p C010, C400, 16 +vf2id.t C010, C400, 16 +vf2id.q C010, C400, 16 +vf2id.s S010, S400, 17 +vf2id.p C010, C400, 17 +vf2id.t C010, C400, 17 +vf2id.q C010, C400, 17 +vf2id.s S010, S400, 18 +vf2id.p C010, C400, 18 +vf2id.t C010, C400, 18 +vf2id.q C010, C400, 18 +vf2id.s S010, S400, 19 +vf2id.p C010, C400, 19 +vf2id.t C010, C400, 19 +vf2id.q C010, C400, 19 +vf2id.s S010, S400, 20 +vf2id.p C010, C400, 20 +vf2id.t C010, C400, 20 +vf2id.q C010, C400, 20 +vf2id.s S010, S400, 21 +vf2id.p C010, C400, 21 +vf2id.t C010, C400, 21 +vf2id.q C010, C400, 21 +vf2id.s S010, S400, 22 +vf2id.p C010, C400, 22 +vf2id.t C010, C400, 22 +vf2id.q C010, C400, 22 +vf2id.s S010, S400, 23 +vf2id.p C010, C400, 23 +vf2id.t C010, C400, 23 +vf2id.q C010, C400, 23 +vf2id.s S010, S400, 24 +vf2id.p C010, C400, 24 +vf2id.t C010, C400, 24 +vf2id.q C010, C400, 24 +vf2id.s S010, S400, 25 +vf2id.p C010, C400, 25 +vf2id.t C010, C400, 25 +vf2id.q C010, C400, 25 +vf2id.s S010, S400, 26 +vf2id.p C010, C400, 26 +vf2id.t C010, C400, 26 +vf2id.q C010, C400, 26 +vf2id.s S010, S400, 27 +vf2id.p C010, C400, 27 +vf2id.t C010, C400, 27 +vf2id.q C010, C400, 27 +vf2id.s S010, S400, 28 +vf2id.p C010, C400, 28 +vf2id.t C010, C400, 28 +vf2id.q C010, C400, 28 +vf2id.s S010, S400, 29 +vf2id.p C010, C400, 29 +vf2id.t C010, C400, 29 +vf2id.q C010, C400, 29 +vf2id.s S010, S400, 30 +vf2id.p C010, C400, 30 +vf2id.t C010, C400, 30 +vf2id.q C010, C400, 30 +vf2id.s S010, S400, 31 +vf2id.p C010, C400, 31 +vf2id.t C010, C400, 31 +vf2id.q C010, C400, 31 +vi2f.s S010, S400, 0 +vi2f.p C010, C400, 0 +vi2f.t C010, C400, 0 +vi2f.q C010, C400, 0 +vi2f.s S010, S400, 1 +vi2f.p C010, C400, 1 +vi2f.t C010, C400, 1 +vi2f.q C010, C400, 1 +vi2f.s S010, S400, 2 +vi2f.p C010, C400, 2 +vi2f.t C010, C400, 2 +vi2f.q C010, C400, 2 +vi2f.s S010, S400, 3 +vi2f.p C010, C400, 3 +vi2f.t C010, C400, 3 +vi2f.q C010, C400, 3 +vi2f.s S010, S400, 4 +vi2f.p C010, C400, 4 +vi2f.t C010, C400, 4 +vi2f.q C010, C400, 4 +vi2f.s S010, S400, 5 +vi2f.p C010, C400, 5 +vi2f.t C010, C400, 5 +vi2f.q C010, C400, 5 +vi2f.s S010, S400, 6 +vi2f.p C010, C400, 6 +vi2f.t C010, C400, 6 +vi2f.q C010, C400, 6 +vi2f.s S010, S400, 7 +vi2f.p C010, C400, 7 +vi2f.t C010, C400, 7 +vi2f.q C010, C400, 7 +vi2f.s S010, S400, 8 +vi2f.p C010, C400, 8 +vi2f.t C010, C400, 8 +vi2f.q C010, C400, 8 +vi2f.s S010, S400, 9 +vi2f.p C010, C400, 9 +vi2f.t C010, C400, 9 +vi2f.q C010, C400, 9 +vi2f.s S010, S400, 10 +vi2f.p C010, C400, 10 +vi2f.t C010, C400, 10 +vi2f.q C010, C400, 10 +vi2f.s S010, S400, 11 +vi2f.p C010, C400, 11 +vi2f.t C010, C400, 11 +vi2f.q C010, C400, 11 +vi2f.s S010, S400, 12 +vi2f.p C010, C400, 12 +vi2f.t C010, C400, 12 +vi2f.q C010, C400, 12 +vi2f.s S010, S400, 13 +vi2f.p C010, C400, 13 +vi2f.t C010, C400, 13 +vi2f.q C010, C400, 13 +vi2f.s S010, S400, 14 +vi2f.p C010, C400, 14 +vi2f.t C010, C400, 14 +vi2f.q C010, C400, 14 +vi2f.s S010, S400, 15 +vi2f.p C010, C400, 15 +vi2f.t C010, C400, 15 +vi2f.q C010, C400, 15 +vi2f.s S010, S400, 16 +vi2f.p C010, C400, 16 +vi2f.t C010, C400, 16 +vi2f.q C010, C400, 16 +vi2f.s S010, S400, 17 +vi2f.p C010, C400, 17 +vi2f.t C010, C400, 17 +vi2f.q C010, C400, 17 +vi2f.s S010, S400, 18 +vi2f.p C010, C400, 18 +vi2f.t C010, C400, 18 +vi2f.q C010, C400, 18 +vi2f.s S010, S400, 19 +vi2f.p C010, C400, 19 +vi2f.t C010, C400, 19 +vi2f.q C010, C400, 19 +vi2f.s S010, S400, 20 +vi2f.p C010, C400, 20 +vi2f.t C010, C400, 20 +vi2f.q C010, C400, 20 +vi2f.s S010, S400, 21 +vi2f.p C010, C400, 21 +vi2f.t C010, C400, 21 +vi2f.q C010, C400, 21 +vi2f.s S010, S400, 22 +vi2f.p C010, C400, 22 +vi2f.t C010, C400, 22 +vi2f.q C010, C400, 22 +vi2f.s S010, S400, 23 +vi2f.p C010, C400, 23 +vi2f.t C010, C400, 23 +vi2f.q C010, C400, 23 +vi2f.s S010, S400, 24 +vi2f.p C010, C400, 24 +vi2f.t C010, C400, 24 +vi2f.q C010, C400, 24 +vi2f.s S010, S400, 25 +vi2f.p C010, C400, 25 +vi2f.t C010, C400, 25 +vi2f.q C010, C400, 25 +vi2f.s S010, S400, 26 +vi2f.p C010, C400, 26 +vi2f.t C010, C400, 26 +vi2f.q C010, C400, 26 +vi2f.s S010, S400, 27 +vi2f.p C010, C400, 27 +vi2f.t C010, C400, 27 +vi2f.q C010, C400, 27 +vi2f.s S010, S400, 28 +vi2f.p C010, C400, 28 +vi2f.t C010, C400, 28 +vi2f.q C010, C400, 28 +vi2f.s S010, S400, 29 +vi2f.p C010, C400, 29 +vi2f.t C010, C400, 29 +vi2f.q C010, C400, 29 +vi2f.s S010, S400, 30 +vi2f.p C010, C400, 30 +vi2f.t C010, C400, 30 +vi2f.q C010, C400, 30 +vi2f.s S010, S400, 31 +vi2f.p C010, C400, 31 +vi2f.t C010, C400, 31 +vi2f.q C010, C400, 31 +vcmovt.s S010, S400, 0 +vcmovt.p C010, C400, 0 +vcmovt.t C010, C400, 0 +vcmovt.q C010, C400, 0 +vcmovt.s S010, S400, 1 +vcmovt.p C010, C400, 1 +vcmovt.t C010, C400, 1 +vcmovt.q C010, C400, 1 +vcmovt.s S010, S400, 2 +vcmovt.p C010, C400, 2 +vcmovt.t C010, C400, 2 +vcmovt.q C010, C400, 2 +vcmovt.s S010, S400, 3 +vcmovt.p C010, C400, 3 +vcmovt.t C010, C400, 3 +vcmovt.q C010, C400, 3 +vcmovt.s S010, S400, 4 +vcmovt.p C010, C400, 4 +vcmovt.t C010, C400, 4 +vcmovt.q C010, C400, 4 +vcmovt.s S010, S400, 5 +vcmovt.p C010, C400, 5 +vcmovt.t C010, C400, 5 +vcmovt.q C010, C400, 5 +vcmovt.s S010, S400, 6 +vcmovt.p C010, C400, 6 +vcmovt.t C010, C400, 6 +vcmovt.q C010, C400, 6 +vcmovf.s S010, S400, 0 +vcmovf.p C010, C400, 0 +vcmovf.t C010, C400, 0 +vcmovf.q C010, C400, 0 +vcmovf.s S010, S400, 1 +vcmovf.p C010, C400, 1 +vcmovf.t C010, C400, 1 +vcmovf.q C010, C400, 1 +vcmovf.s S010, S400, 2 +vcmovf.p C010, C400, 2 +vcmovf.t C010, C400, 2 +vcmovf.q C010, C400, 2 +vcmovf.s S010, S400, 3 +vcmovf.p C010, C400, 3 +vcmovf.t C010, C400, 3 +vcmovf.q C010, C400, 3 +vcmovf.s S010, S400, 4 +vcmovf.p C010, C400, 4 +vcmovf.t C010, C400, 4 +vcmovf.q C010, C400, 4 +vcmovf.s S010, S400, 5 +vcmovf.p C010, C400, 5 +vcmovf.t C010, C400, 5 +vcmovf.q C010, C400, 5 +vcmovf.s S010, S400, 6 +vcmovf.p C010, C400, 6 +vcmovf.t C010, C400, 6 +vcmovf.q C010, C400, 6 +vwbn.s S010, S400, 0 +vwbn.s S010, S400, 1 +vwbn.s S010, S400, 2 +vwbn.s S010, S400, 3 +vwbn.s S010, S400, 4 +vwbn.s S010, S400, 5 +vwbn.s S010, S400, 6 +vwbn.s S010, S400, 7 +vwbn.s S010, S400, 8 +vwbn.s S010, S400, 9 +vwbn.s S010, S400, 10 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97 +vwbn.s S010, S400, 98 +vwbn.s S010, S400, 99 +vwbn.s S010, S400, 100 +vwbn.s S010, S400, 101 +vwbn.s S010, S400, 102 +vwbn.s S010, S400, 103 +vwbn.s S010, S400, 104 +vwbn.s S010, S400, 105 +vwbn.s S010, S400, 106 +vwbn.s S010, S400, 107 +vwbn.s S010, S400, 108 +vwbn.s S010, S400, 109 +vwbn.s S010, S400, 110 +vwbn.s S010, S400, 111 +vwbn.s S010, S400, 112 +vwbn.s S010, S400, 113 +vwbn.s S010, S400, 114 +vwbn.s S010, S400, 115 +vwbn.s S010, S400, 116 +vwbn.s S010, S400, 117 +vwbn.s S010, S400, 118 +vwbn.s S010, S400, 119 +vwbn.s S010, S400, 120 +vwbn.s S010, S400, 121 +vwbn.s S010, S400, 122 +vwbn.s S010, S400, 123 +vwbn.s S010, S400, 124 +vwbn.s S010, S400, 125 +vwbn.s S010, S400, 126 +vwbn.s S010, S400, 127 +vwbn.s S010, S400, 128 +vwbn.s S010, S400, 129 +vwbn.s S010, S400, 130 +vwbn.s S010, S400, 131 +vwbn.s S010, S400, 132 +vwbn.s S010, S400, 133 +vwbn.s S010, S400, 134 +vwbn.s S010, S400, 135 +vwbn.s S010, S400, 136 +vwbn.s S010, S400, 137 +vwbn.s S010, S400, 138 +vwbn.s S010, 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S400, 222 +vwbn.s S010, S400, 223 +vwbn.s S010, S400, 224 +vwbn.s S010, S400, 225 +vwbn.s S010, S400, 226 +vwbn.s S010, S400, 227 +vwbn.s S010, S400, 228 +vwbn.s S010, S400, 229 +vwbn.s S010, S400, 230 +vwbn.s S010, S400, 231 +vwbn.s S010, S400, 232 +vwbn.s S010, S400, 233 +vwbn.s S010, S400, 234 +vwbn.s S010, S400, 235 +vwbn.s S010, S400, 236 +vwbn.s S010, S400, 237 +vwbn.s S010, S400, 238 +vwbn.s S010, S400, 239 +vwbn.s S010, S400, 240 +vwbn.s S010, S400, 241 +vwbn.s S010, S400, 242 +vwbn.s S010, S400, 243 +vwbn.s S010, S400, 244 +vwbn.s S010, S400, 245 +vwbn.s S010, S400, 246 +vwbn.s S010, S400, 247 +vwbn.s S010, S400, 248 +vwbn.s S010, S400, 249 +vwbn.s S010, S400, 250 +vwbn.s S010, S400, 251 +vwbn.s S010, S400, 252 +vwbn.s S010, S400, 253 +vwbn.s S010, S400, 254 +vwbn.s S010, S400, 255 +vpfxs X, X, X, X +vpfxs Y, X, X, X +vpfxs X, X, Y, X +vpfxs |X|, X, X, X +vpfxs 0, X, X, X +vpfxs -X, X, X, X +vpfxs X, X, X, X +vpfxs X, X, X, X +vpfxs X, X, X, X +vpfxt X, X, X, X +vpfxt Y, X, X, X +vpfxt X, X, Y, X +vpfxt |X|, X, X, X +vpfxt 0, X, X, X +vpfxt -X, X, X, X +vpfxt X, X, X, X +vpfxt X, X, X, X +vpfxt X, X, X, X +vpfxd , , , +vpfxd 0, , , +vpfxd , ,0 , +vpfxd M, , , +vpfxd , , , +vpfxd , , , +vpfxd , , , +vpfxd , , , +vpfxd , , , +viim.s S002, 0 +viim.s S002, 1 +viim.s S002, 16 +viim.s S002, 256 +viim.s S002, 4096 +viim.s S002, -32768 +viim.s S002, -4096 +vfim.s S002, 0.0 +vfim.s S002, 4.8828125e-004 +vfim.s S002, -0.0 +vfim.s S002, -8192.0 +vmmul.p M002, E400, M000 +vmmul.t M100, E400, M000 +vmmul.q M002, E400, M000 +vhtfm2.p C002, M100, C000 +vtfm2.p C002, M400, C000 +vtfm2.p C100, M400, C000 +vtfm3.t C100, M000, C000 +vhtfm3.t C100, M400, C000 +vtfm3.t C100, M400, C000 +vtfm4.q C200, M000, C000 +vhtfm4.q C002, M400, C000 +vtfm4.q C002, M400, C000 +vmscl.p M002, M400, S000 +vmscl.t M001, M400, S000 +vmscl.q M002, M400, S000 +vcrsp.t C100, C400, C000 +vqmul.q C002, C400, C000 +vmmov.p M002, M400 +vmmov.t M001, M400 +vmmov.q M002, M400 +vmidt.p M002 +vmidt.t M001 +vmidt.q M002 +vrot.p C002, S400, [C,S] +vrot.t C001, S400, [C,S,S] +vrot.q C002, S400, [C,S,S,S] +vflush +vnop +vsync +vmmul.p M730, E000, M100 +vmmul.p M730, E001, M100 +vmmul.p M730, E002, M100 +vmmul.p M730, E003, M100 +vmmul.p M730, E100, M100 +vmmul.p M730, E101, M100 +vmmul.p M730, E102, M100 +vmmul.p M730, E103, M100 +vmmul.p M730, E200, M100 +vmmul.p M730, E201, M100 +vmmul.p M730, E202, M100 +vmmul.p M730, E203, M100 +vmmul.p M730, E300, M100 +vmmul.p M730, E301, M100 +vmmul.p M730, E302, M100 +vmmul.p M730, E303, M100 +vmmul.p M730, E400, M100 +vmmul.p M730, E401, M100 +vmmul.p M730, E402, M100 +vmmul.p M730, E403, M100 +vmmul.p M730, E500, M100 +vmmul.p M730, E501, M100 +vmmul.p M730, E502, M100 +vmmul.p M730, E503, M100 +vmmul.p M730, E600, M100 +vmmul.p M730, E601, M100 +vmmul.p M730, E602, M100 +vmmul.p M730, E603, M100 +vmmul.p M200, E700, M100 +vmmul.p M200, E701, M100 +vmmul.p M200, E702, M100 +vmmul.p M200, E703, M100 +vmmul.p M730, M000, M100 +vmmul.p M730, M010, M100 +vmmul.p M730, M020, M100 +vmmul.p M730, M030, M100 +vmmul.p M730, M100, M100 +vmmul.p M730, M110, M100 +vmmul.p M730, M120, M100 +vmmul.p M730, M130, M100 +vmmul.p M730, M200, M100 +vmmul.p M730, M210, M100 +vmmul.p M730, M220, M100 +vmmul.p M730, M230, M100 +vmmul.p M730, M300, M100 +vmmul.p M730, M310, M100 +vmmul.p M730, M320, M100 +vmmul.p M730, M330, M100 +vmmul.p M730, M400, M100 +vmmul.p M730, M410, M100 +vmmul.p M730, M420, M100 +vmmul.p M730, M430, M100 +vmmul.p M730, M500, M100 +vmmul.p M730, M510, M100 +vmmul.p M730, M520, M100 +vmmul.p M730, M530, M100 +vmmul.p M730, M600, M100 +vmmul.p M730, M610, M100 +vmmul.p M730, M620, M100 +vmmul.p M730, M630, M100 +vmmul.p M200, M700, M100 +vmmul.p M200, M710, M100 +vmmul.p M200, M720, M100 +vmmul.p M200, M730, M100 +vmmul.p M730, E020, M100 +vmmul.p M730, E021, M100 +vmmul.p M730, E022, M100 +vmmul.p M730, E023, M100 +vmmul.p M730, E120, M100 +vmmul.p M730, E121, M100 +vmmul.p M730, E122, M100 +vmmul.p M730, E123, M100 +vmmul.p M730, E220, M100 +vmmul.p M730, E221, M100 +vmmul.p M730, E222, M100 +vmmul.p M730, E223, M100 +vmmul.p M730, E320, M100 +vmmul.p M730, E321, M100 +vmmul.p M730, E322, M100 +vmmul.p M730, E323, M100 +vmmul.p M730, E420, M100 +vmmul.p M730, E421, M100 +vmmul.p M730, E422, M100 +vmmul.p M730, E423, M100 +vmmul.p M730, E520, M100 +vmmul.p M730, E521, M100 +vmmul.p M730, E522, M100 +vmmul.p M730, E523, M100 +vmmul.p M730, E620, M100 +vmmul.p M730, E621, M100 +vmmul.p M730, E622, M100 +vmmul.p M730, E623, M100 +vmmul.p M200, E720, M100 +vmmul.p M200, E721, M100 +vmmul.p M200, E722, M100 +vmmul.p M200, E723, M100 +vmmul.p M730, M002, M100 +vmmul.p M730, M012, M100 +vmmul.p M730, M022, M100 +vmmul.p M730, M032, M100 +vmmul.p M730, M102, M100 +vmmul.p M730, M112, M100 +vmmul.p M730, M122, M100 +vmmul.p M730, M132, M100 +vmmul.p M730, M202, M100 +vmmul.p M730, M212, M100 +vmmul.p M730, M222, M100 +vmmul.p M730, M232, M100 +vmmul.p M730, M302, M100 +vmmul.p M730, M312, M100 +vmmul.p M730, M322, M100 +vmmul.p M730, M332, M100 +vmmul.p M730, M402, M100 +vmmul.p M730, M412, M100 +vmmul.p M730, M422, M100 +vmmul.p M730, M432, M100 +vmmul.p M730, M502, M100 +vmmul.p M730, M512, M100 +vmmul.p M730, M522, M100 +vmmul.p M730, M532, M100 +vmmul.p M730, M602, M100 +vmmul.p M730, M612, M100 +vmmul.p M730, M622, M100 +vmmul.p M730, M632, M100 +vmmul.p M200, M702, M100 +vmmul.p M200, M712, M100 +vmmul.p M200, M722, M100 +vmmul.p M200, M732, M100 +vmmul.t M730, E000, M100 +vmmul.t M730, E001, M100 +vmmul.t M730, E002, M100 +vmmul.t M730, E003, M100 +vmmul.t M730, E100, M100 +vmmul.t M730, E101, M100 +vmmul.t M730, E102, M100 +vmmul.t M730, E103, M100 +vmmul.t M730, E200, M100 +vmmul.t M730, E201, M100 +vmmul.t M730, E202, M100 +vmmul.t M730, E203, M100 +vmmul.t M730, E300, M100 +vmmul.t M730, E301, M100 +vmmul.t M730, E302, M100 +vmmul.t M730, E303, M100 +vmmul.t M730, E400, M100 +vmmul.t M730, E401, M100 +vmmul.t M730, E402, M100 +vmmul.t M730, E403, M100 +vmmul.t M730, E500, M100 +vmmul.t M730, E501, M100 +vmmul.t M730, E502, M100 +vmmul.t M730, E503, M100 +vmmul.t M730, E600, M100 +vmmul.t M730, E601, M100 +vmmul.t M730, E602, M100 +vmmul.t M730, E603, M100 +vmmul.t M200, E700, M100 +vmmul.t M200, E701, M100 +vmmul.t M200, E702, M100 +vmmul.t M200, E703, M100 +vmmul.t M730, M000, M100 +vmmul.t M730, M010, M100 +vmmul.t M730, M020, M100 +vmmul.t M730, M030, M100 +vmmul.t M730, M100, M100 +vmmul.t M730, M110, M100 +vmmul.t M730, M120, M100 +vmmul.t M730, M130, M100 +vmmul.t M730, M200, M100 +vmmul.t M730, M210, M100 +vmmul.t M730, M220, M100 +vmmul.t M730, M230, M100 +vmmul.t M730, M300, M100 +vmmul.t M730, M310, M100 +vmmul.t M730, M320, M100 +vmmul.t M730, M330, M100 +vmmul.t M730, M400, M100 +vmmul.t M730, M410, M100 +vmmul.t M730, M420, M100 +vmmul.t M730, M430, M100 +vmmul.t M730, M500, M100 +vmmul.t M730, M510, M100 +vmmul.t M730, M520, M100 +vmmul.t M730, M530, M100 +vmmul.t M730, M600, M100 +vmmul.t M730, M610, M100 +vmmul.t M730, M620, M100 +vmmul.t M730, M630, M100 +vmmul.t M200, M700, M100 +vmmul.t M200, M710, M100 +vmmul.t M200, M720, M100 +vmmul.t M200, M730, M100 +vmmul.t M730, E010, M100 +vmmul.t M730, E011, M100 +vmmul.t M730, E012, M100 +vmmul.t M730, E013, M100 +vmmul.t M730, E110, M100 +vmmul.t M730, E111, M100 +vmmul.t M730, E112, M100 +vmmul.t M730, E113, M100 +vmmul.t M730, E210, M100 +vmmul.t M730, E211, M100 +vmmul.t M730, E212, M100 +vmmul.t M730, E213, M100 +vmmul.t M730, E310, M100 +vmmul.t M730, E311, M100 +vmmul.t M730, E312, M100 +vmmul.t M730, E313, M100 +vmmul.t M730, E410, M100 +vmmul.t M730, E411, M100 +vmmul.t M730, E412, M100 +vmmul.t M730, E413, M100 +vmmul.t M730, E510, M100 +vmmul.t M730, E511, M100 +vmmul.t M730, E512, M100 +vmmul.t M730, E513, M100 +vmmul.t M730, E610, M100 +vmmul.t M730, E611, M100 +vmmul.t M730, E612, M100 +vmmul.t M730, E613, M100 +vmmul.t M200, E710, M100 +vmmul.t M200, E711, M100 +vmmul.t M200, E712, M100 +vmmul.t M200, E713, M100 +vmmul.t M730, M001, M100 +vmmul.t M730, M011, M100 +vmmul.t M730, M021, M100 +vmmul.t M730, M031, M100 +vmmul.t M730, M101, M100 +vmmul.t M730, M111, M100 +vmmul.t M730, M121, M100 +vmmul.t M730, M131, M100 +vmmul.t M730, M201, M100 +vmmul.t M730, M211, M100 +vmmul.t M730, M221, M100 +vmmul.t M730, M231, M100 +vmmul.t M730, M301, M100 +vmmul.t M730, M311, M100 +vmmul.t M730, M321, M100 +vmmul.t M730, M331, M100 +vmmul.t M730, M401, M100 +vmmul.t M730, M411, M100 +vmmul.t M730, M421, M100 +vmmul.t M730, M431, M100 +vmmul.t M730, M501, M100 +vmmul.t M730, M511, M100 +vmmul.t M730, M521, M100 +vmmul.t M730, M531, M100 +vmmul.t M730, M601, M100 +vmmul.t M730, M611, M100 +vmmul.t M730, M621, M100 +vmmul.t M730, M631, M100 +vmmul.t M200, M701, M100 +vmmul.t M200, M711, M100 +vmmul.t M200, M721, M100 +vmmul.t M200, M731, M100 +vmmul.q M730, E000, M100 +vmmul.q M730, E001, M100 +vmmul.q M730, E002, M100 +vmmul.q M730, E003, M100 +vmmul.q M730, E100, M100 +vmmul.q M730, E101, M100 +vmmul.q M730, E102, M100 +vmmul.q M730, E103, M100 +vmmul.q M730, E200, M100 +vmmul.q M730, E201, M100 +vmmul.q M730, E202, M100 +vmmul.q M730, E203, M100 +vmmul.q M730, E300, M100 +vmmul.q M730, E301, M100 +vmmul.q M730, E302, M100 +vmmul.q M730, E303, M100 +vmmul.q M730, E400, M100 +vmmul.q M730, E401, M100 +vmmul.q M730, E402, M100 +vmmul.q M730, E403, M100 +vmmul.q M730, E500, M100 +vmmul.q M730, E501, M100 +vmmul.q M730, E502, M100 +vmmul.q M730, E503, M100 +vmmul.q M730, E600, M100 +vmmul.q M730, E601, M100 +vmmul.q M730, E602, M100 +vmmul.q M730, E603, M100 +vmmul.q M730, E700, M100 +vmmul.q M730, E701, M100 +vmmul.q M730, E702, M100 +vmmul.q M730, E703, M100 +vmmul.q M730, M000, M100 +vmmul.q M730, M010, M100 +vmmul.q M730, M020, M100 +vmmul.q M730, M030, M100 +vmmul.q M730, M100, M100 +vmmul.q M730, M110, M100 +vmmul.q M730, M120, M100 +vmmul.q M730, M130, M100 +vmmul.q M730, M200, M100 +vmmul.q M730, M210, M100 +vmmul.q M730, M220, M100 +vmmul.q M730, M230, M100 +vmmul.q M730, M300, M100 +vmmul.q M730, M310, M100 +vmmul.q M730, M320, M100 +vmmul.q M730, M330, M100 +vmmul.q M730, M400, M100 +vmmul.q M730, M410, M100 +vmmul.q M730, M420, M100 +vmmul.q M730, M430, M100 +vmmul.q M730, M500, M100 +vmmul.q M730, M510, M100 +vmmul.q M730, M520, M100 +vmmul.q M730, M530, M100 +vmmul.q M730, M600, M100 +vmmul.q M730, M610, M100 +vmmul.q M730, M620, M100 +vmmul.q M730, M630, M100 +vmmul.q M730, M700, M100 +vmmul.q M730, M710, M100 +vmmul.q M730, M720, M100 +vmmul.q M730, M730, M100 +vmmul.q M730, E020, M100 +vmmul.q M730, E021, M100 +vmmul.q M730, E022, M100 +vmmul.q M730, E023, M100 +vmmul.q M730, E120, M100 +vmmul.q M730, E121, M100 +vmmul.q M730, E122, M100 +vmmul.q M730, E123, M100 +vmmul.q M730, E220, M100 +vmmul.q M730, E221, M100 +vmmul.q M730, E222, M100 +vmmul.q M730, E223, M100 +vmmul.q M730, E320, M100 +vmmul.q M730, E321, M100 +vmmul.q M730, E322, M100 +vmmul.q M730, E323, M100 +vmmul.q M730, E420, M100 +vmmul.q M730, E421, M100 +vmmul.q M730, E422, M100 +vmmul.q M730, E423, M100 +vmmul.q M730, E520, M100 +vmmul.q M730, E521, M100 +vmmul.q M730, E522, M100 +vmmul.q M730, E523, M100 +vmmul.q M730, E620, M100 +vmmul.q M730, E621, M100 +vmmul.q M730, E622, M100 +vmmul.q M730, E623, M100 +vmmul.q M730, E720, M100 +vmmul.q M730, E721, M100 +vmmul.q M730, E722, M100 +vmmul.q M730, E723, M100 +vmmul.q M730, M002, M100 +vmmul.q M730, M012, M100 +vmmul.q M730, M022, M100 +vmmul.q M730, M032, M100 +vmmul.q M730, M102, M100 +vmmul.q M730, M112, M100 +vmmul.q M730, M122, M100 +vmmul.q M730, M132, M100 +vmmul.q M730, M202, M100 +vmmul.q M730, M212, M100 +vmmul.q M730, M222, M100 +vmmul.q M730, M232, M100 +vmmul.q M730, M302, M100 +vmmul.q M730, M312, M100 +vmmul.q M730, M322, M100 +vmmul.q M730, M332, M100 +vmmul.q M730, M402, M100 +vmmul.q M730, M412, M100 +vmmul.q M730, M422, M100 +vmmul.q M730, M432, M100 +vmmul.q M730, M502, M100 +vmmul.q M730, M512, M100 +vmmul.q M730, M522, M100 +vmmul.q M730, M532, M100 +vmmul.q M730, M602, M100 +vmmul.q M730, M612, M100 +vmmul.q M730, M622, M100 +vmmul.q M730, M632, M100 +vmmul.q M730, M702, M100 +vmmul.q M730, M712, M100 +vmmul.q M730, M722, M100 +vmmul.q M730, M732, M100 +vrot.p C730, S000, [C,S] +vrot.p C730, S000, [S,C] +vrot.p C730, S000, [S,0] +vrot.p C730, S000, [S,0] +vrot.p C730, S000, [C,S] +vrot.p C730, S000, [S,C] +vrot.p C730, S000, [0,S] +vrot.p C730, S000, [0,S] +vrot.p C730, S000, [C,0] +vrot.p C730, S000, [0,C] +vrot.p C730, S000, [S,S] +vrot.p C730, S000, [0,0] +vrot.p C730, S000, [C,0] +vrot.p C730, S000, [0,C] +vrot.p C730, S000, [0,0] +vrot.p C730, S000, [S,S] +vrot.p C730, S000, [C,-S] +vrot.p C730, S000, [-S,C] +vrot.p C730, S000, [-S,0] +vrot.p C730, S000, [-S,0] +vrot.p C730, S000, [C,-S] +vrot.p C730, S000, [-S,C] +vrot.p C730, S000, [0,-S] +vrot.p C730, S000, [0,-S] +vrot.p C730, S000, [C,0] +vrot.p C730, S000, [0,C] +vrot.p C730, S000, [-S,-S] +vrot.p C730, S000, [0,0] +vrot.p C730, S000, [C,0] +vrot.p C730, S000, [0,C] +vrot.p C730, S000, [0,0] +vrot.p C730, S000, [-S,-S] +vrot.t C730, S000, [C,S,S] +vrot.t C730, S000, [S,C,0] +vrot.t C730, S000, [S,0,C] +vrot.t C730, S000, [S,0,0] +vrot.t C730, S000, [C,S,0] +vrot.t C730, S000, [S,C,S] +vrot.t C730, S000, [0,S,C] +vrot.t C730, S000, [0,S,0] +vrot.t C730, S000, [C,0,S] +vrot.t C730, S000, [0,C,S] +vrot.t C730, S000, [S,S,C] +vrot.t C730, S000, [0,0,S] +vrot.t C730, S000, [C,0,0] +vrot.t C730, S000, [0,C,0] +vrot.t C730, S000, [0,0,C] +vrot.t C730, S000, [S,S,S] +vrot.t C730, S000, [C,-S,-S] +vrot.t C730, S000, [-S,C,0] +vrot.t C730, S000, [-S,0,C] +vrot.t C730, S000, [-S,0,0] +vrot.t C730, S000, [C,-S,0] +vrot.t C730, S000, [-S,C,-S] +vrot.t C730, S000, [0,-S,C] +vrot.t C730, S000, [0,-S,0] +vrot.t C730, S000, [C,0,-S] +vrot.t C730, S000, [0,C,-S] +vrot.t C730, S000, [-S,-S,C] +vrot.t C730, S000, [0,0,-S] +vrot.t C730, S000, [C,0,0] +vrot.t C730, S000, [0,C,0] +vrot.t C730, S000, [0,0,C] +vrot.t C730, S000, [-S,-S,-S] +vrot.q C730, S000, [C,S,S,S] +vrot.q C730, S000, [S,C,0,0] +vrot.q C730, S000, [S,0,C,0] +vrot.q C730, S000, [S,0,0,C] +vrot.q C730, S000, [C,S,0,0] +vrot.q C730, S000, [S,C,S,S] +vrot.q C730, S000, [0,S,C,0] +vrot.q C730, S000, [0,S,0,C] +vrot.q C730, S000, [C,0,S,0] +vrot.q C730, S000, [0,C,S,0] +vrot.q C730, S000, [S,S,C,S] +vrot.q C730, S000, [0,0,S,C] +vrot.q C730, S000, [C,0,0,S] +vrot.q C730, S000, [0,C,0,S] +vrot.q C730, S000, [0,0,C,S] +vrot.q C730, S000, [S,S,S,C] +vrot.q C730, S000, [C,-S,-S,-S] +vrot.q C730, S000, [-S,C,0,0] +vrot.q C730, S000, [-S,0,C,0] +vrot.q C730, S000, [-S,0,0,C] +vrot.q C730, S000, [C,-S,0,0] +vrot.q C730, S000, [-S,C,-S,-S] +vrot.q C730, S000, [0,-S,C,0] +vrot.q C730, S000, [0,-S,0,C] +vrot.q C730, S000, [C,0,-S,0] +vrot.q C730, S000, [0,C,-S,0] +vrot.q C730, S000, [-S,-S,C,-S] +vrot.q C730, S000, [0,0,-S,C] +vrot.q C730, S000, [C,0,0,-S] +vrot.q C730, S000, [0,C,0,-S] +vrot.q C730, S000, [0,0,C,-S] +vrot.q C730, S000, [-S,-S,-S,C] +vpfxs X, X, X, X +vpfxs Y, X, X, X +vpfxs Z, X, X, X +vpfxs W, X, X, X +vpfxs |X|, X, X, X +vpfxs |Y|, X, X, X +vpfxs |Z|, X, X, X +vpfxs |W|, X, X, X +vpfxs 0, X, X, X +vpfxs 1, X, X, X +vpfxs 2, X, X, X +vpfxs 1/2, X, X, X +vpfxs 3, X, X, X +vpfxs 1/3, X, X, X +vpfxs 1/4, X, X, X +vpfxs 1/6, X, X, X +vpfxs -X, X, X, X +vpfxs -Y, X, X, X +vpfxs -Z, X, X, X +vpfxs -W, X, X, X +vpfxs -|X|, X, X, X +vpfxs -|Y|, X, X, X +vpfxs -|Z|, X, X, X +vpfxs -|W|, X, X, X +vpfxs -0, X, X, X +vpfxs -1, X, X, X +vpfxs -2, X, X, X +vpfxs -1/2, X, X, X +vpfxs -3, X, X, X +vpfxs -1/3, X, X, X +vpfxs -1/4, X, X, X +vpfxs -1/6, X, X, X +vpfxs X, X, X, X +vpfxs X, Y, X, X +vpfxs X, Z, X, X +vpfxs X, W, X, X +vpfxs X, |X|, X, X +vpfxs X, |Y|, X, X +vpfxs X, |Z|, X, X +vpfxs X, |W|, X, X +vpfxs X, 0, X, X +vpfxs X, 1, X, X +vpfxs X, 2, X, X +vpfxs X, 1/2, X, X +vpfxs X, 3, X, X +vpfxs X, 1/3, X, X +vpfxs X, 1/4, X, X +vpfxs X, 1/6, X, X +vpfxs X, -X, X, X +vpfxs X, -Y, X, X +vpfxs X, -Z, X, X +vpfxs X, -W, X, X +vpfxs X, -|X|, X, X +vpfxs X, -|Y|, X, X +vpfxs X, -|Z|, X, X +vpfxs X, -|W|, X, X +vpfxs X, -0, X, X +vpfxs X, -1, X, X +vpfxs X, -2, X, X +vpfxs X, -1/2, X, X +vpfxs X, -3, X, X +vpfxs X, -1/3, X, X +vpfxs X, -1/4, X, X +vpfxs X, -1/6, X, X +vpfxs X, X, X, X +vpfxs X, X, Y, X +vpfxs X, X, Z, X +vpfxs X, X, W, X +vpfxs X, X, |X|, X +vpfxs X, X, |Y|, X +vpfxs X, X, |Z|, X +vpfxs X, X, |W|, X +vpfxs X, X, 0, X +vpfxs X, X, 1, X +vpfxs X, X, 2, X +vpfxs X, X, 1/2, X +vpfxs X, X, 3, X +vpfxs X, X, 1/3, X +vpfxs X, X, 1/4, X +vpfxs X, X, 1/6, X +vpfxs X, X, -X, X +vpfxs X, X, -Y, X +vpfxs X, X, -Z, X +vpfxs X, X, -W, X +vpfxs X, X, -|X|, X +vpfxs X, X, -|Y|, X +vpfxs X, X, -|Z|, X +vpfxs X, X, -|W|, X +vpfxs X, X, -0, X +vpfxs X, X, -1, X +vpfxs X, X, -2, X +vpfxs X, X, -1/2, X +vpfxs X, X, -3, X +vpfxs X, X, -1/3, X +vpfxs X, X, -1/4, X +vpfxs X, X, -1/6, X +vpfxs X, X, X, X +vpfxs X, X, X, Y +vpfxs X, X, X, Z +vpfxs X, X, X, W +vpfxs X, X, X, |X| +vpfxs X, X, X, |Y| +vpfxs X, X, X, |Z| +vpfxs X, X, X, |W| +vpfxs X, X, X, 0 +vpfxs X, X, X, 1 +vpfxs X, X, X, 2 +vpfxs X, X, X, 1/2 +vpfxs X, X, X, 3 +vpfxs X, X, X, 1/3 +vpfxs X, X, X, 1/4 +vpfxs X, X, X, 1/6 +vpfxs X, X, X, -X +vpfxs X, X, X, -Y +vpfxs X, X, X, -Z +vpfxs X, X, X, -W +vpfxs X, X, X, -|X| +vpfxs X, X, X, -|Y| +vpfxs X, X, X, -|Z| +vpfxs X, X, X, -|W| +vpfxs X, X, X, -0 +vpfxs X, X, X, -1 +vpfxs X, X, X, -2 +vpfxs X, X, X, -1/2 +vpfxs X, X, X, -3 +vpfxs X, X, X, -1/3 +vpfxs X, X, X, -1/4 +vpfxs X, X, X, -1/6 +vpfxt X, X, X, X +vpfxt Y, X, X, X +vpfxt Z, X, X, X +vpfxt W, X, X, X +vpfxt |X|, X, X, X +vpfxt |Y|, X, X, X +vpfxt |Z|, X, X, X +vpfxt |W|, X, X, X +vpfxt 0, X, X, X +vpfxt 1, X, X, X +vpfxt 2, X, X, X +vpfxt 1/2, X, X, X +vpfxt 3, X, X, X +vpfxt 1/3, X, X, X +vpfxt 1/4, X, X, X +vpfxt 1/6, X, X, X +vpfxt -X, X, X, X +vpfxt -Y, X, X, X +vpfxt -Z, X, X, X +vpfxt -W, X, X, X +vpfxt -|X|, X, X, X +vpfxt -|Y|, X, X, X +vpfxt -|Z|, X, X, X +vpfxt -|W|, X, X, X +vpfxt -0, X, X, X +vpfxt -1, X, X, X +vpfxt -2, X, X, X +vpfxt -1/2, X, X, X +vpfxt -3, X, X, X +vpfxt -1/3, X, X, X +vpfxt -1/4, X, X, X +vpfxt -1/6, X, X, X +vpfxt X, X, X, X +vpfxt X, Y, X, X +vpfxt X, Z, X, X +vpfxt X, W, X, X +vpfxt X, |X|, X, X +vpfxt X, |Y|, X, X +vpfxt X, |Z|, X, X +vpfxt X, |W|, X, X +vpfxt X, 0, X, X +vpfxt X, 1, X, X +vpfxt X, 2, X, X +vpfxt X, 1/2, X, X +vpfxt X, 3, X, X +vpfxt X, 1/3, X, X +vpfxt X, 1/4, X, X +vpfxt X, 1/6, X, X +vpfxt X, -X, X, X +vpfxt X, -Y, X, X +vpfxt X, -Z, X, X +vpfxt X, -W, X, X +vpfxt X, -|X|, X, X +vpfxt X, -|Y|, X, X +vpfxt X, -|Z|, X, X +vpfxt X, -|W|, X, X +vpfxt X, -0, X, X +vpfxt X, -1, X, X +vpfxt X, -2, X, X +vpfxt X, -1/2, X, X +vpfxt X, -3, X, X +vpfxt X, -1/3, X, X +vpfxt X, -1/4, X, X +vpfxt X, -1/6, X, X +vpfxt X, X, X, X +vpfxt X, X, Y, X +vpfxt X, X, Z, X +vpfxt X, X, W, X +vpfxt X, X, |X|, X +vpfxt X, X, |Y|, X +vpfxt X, X, |Z|, X +vpfxt X, X, |W|, X +vpfxt X, X, 0, X +vpfxt X, X, 1, X +vpfxt X, X, 2, X +vpfxt X, X, 1/2, X +vpfxt X, X, 3, X +vpfxt X, X, 1/3, X +vpfxt X, X, 1/4, X +vpfxt X, X, 1/6, X +vpfxt X, X, -X, X +vpfxt X, X, -Y, X +vpfxt X, X, -Z, X +vpfxt X, X, -W, X +vpfxt X, X, -|X|, X +vpfxt X, X, -|Y|, X +vpfxt X, X, -|Z|, X +vpfxt X, X, -|W|, X +vpfxt X, X, -0, X +vpfxt X, X, -1, X +vpfxt X, X, -2, X +vpfxt X, X, -1/2, X +vpfxt X, X, -3, X +vpfxt X, X, -1/3, X +vpfxt X, X, -1/4, X +vpfxt X, X, -1/6, X +vpfxt X, X, X, X +vpfxt X, X, X, Y +vpfxt X, X, X, Z +vpfxt X, X, X, W +vpfxt X, X, X, |X| +vpfxt X, X, X, |Y| +vpfxt X, X, X, |Z| +vpfxt X, X, X, |W| +vpfxt X, X, X, 0 +vpfxt X, X, X, 1 +vpfxt X, X, X, 2 +vpfxt X, X, X, 1/2 +vpfxt X, X, X, 3 +vpfxt X, X, X, 1/3 +vpfxt X, X, X, 1/4 +vpfxt X, X, X, 1/6 +vpfxt X, X, X, -X +vpfxt X, X, X, -Y +vpfxt X, X, X, -Z +vpfxt X, X, X, -W +vpfxt X, X, X, -|X| +vpfxt X, X, X, -|Y| +vpfxt X, X, X, -|Z| +vpfxt X, X, X, -|W| +vpfxt X, X, X, -0 +vpfxt X, X, X, -1 +vpfxt X, X, X, -2 +vpfxt X, X, X, -1/2 +vpfxt X, X, X, -3 +vpfxt X, X, X, -1/3 +vpfxt X, X, X, -1/4 +vpfxt X, X, X, -1/6 +vpfxd , , , +vpfxd 0, , , +vpfxd 1, , , +vpfxd M, , , +vpfxd , , , +vpfxd , 0, , +vpfxd , 1, , +vpfxd , M, , +vpfxd , , , +vpfxd , , 0, +vpfxd , , 1, +vpfxd , , M, +vpfxd , , , +vpfxd , , , 0 +vpfxd , , , 1 +vpfxd , , , M + + jr $ra +.size test, . - test diff --git a/tests/asm/r4000allegrex/allegrex_vfpu_expecteds_pspsnc.dump.s b/tests/asm/r4000allegrex/allegrex_vfpu_expecteds_pspsnc.dump.s new file mode 100644 index 00000000..c6105b3a --- /dev/null +++ b/tests/asm/r4000allegrex/allegrex_vfpu_expecteds_pspsnc.dump.s @@ -0,0 +1,4367 @@ +Disassembly of section .text: + +test: +0x00000000: 0xD0060000 vzero.s S000 +0x00000004: 0xD0060001 vzero.s S010 +0x00000008: 0xD0060002 vzero.s S020 +0x0000000C: 0xD0060003 vzero.s S030 +0x00000010: 0xD0060004 vzero.s S100 +0x00000014: 0xD0060005 vzero.s S110 +0x00000018: 0xD0060006 vzero.s S120 +0x0000001C: 0xD0060007 vzero.s S130 +0x00000020: 0xD0060008 vzero.s S200 +0x00000024: 0xD0060009 vzero.s S210 +0x00000028: 0xD006000A vzero.s S220 +0x0000002C: 0xD006000B vzero.s S230 +0x00000030: 0xD006000C vzero.s S300 +0x00000034: 0xD006000D vzero.s S310 +0x00000038: 0xD006000E vzero.s S320 +0x0000003C: 0xD006000F vzero.s S330 +0x00000040: 0xD0060010 vzero.s S400 +0x00000044: 0xD0060011 vzero.s S410 +0x00000048: 0xD0060012 vzero.s S420 +0x0000004C: 0xD0060013 vzero.s S430 +0x00000050: 0xD0060014 vzero.s S500 +0x00000054: 0xD0060015 vzero.s S510 +0x00000058: 0xD0060016 vzero.s S520 +0x0000005C: 0xD0060017 vzero.s S530 +0x00000060: 0xD0060018 vzero.s S600 +0x00000064: 0xD0060019 vzero.s S610 +0x00000068: 0xD006001A vzero.s S620 +0x0000006C: 0xD006001B vzero.s S630 +0x00000070: 0xD006001C vzero.s S700 +0x00000074: 0xD006001D vzero.s S710 +0x00000078: 0xD006001E vzero.s S720 +0x0000007C: 0xD006001F vzero.s S730 +0x00000080: 0xD0060020 vzero.s S001 +0x00000084: 0xD0060021 vzero.s S011 +0x00000088: 0xD0060022 vzero.s S021 +0x0000008C: 0xD0060023 vzero.s S031 +0x00000090: 0xD0060024 vzero.s S101 +0x00000094: 0xD0060025 vzero.s S111 +0x00000098: 0xD0060026 vzero.s S121 +0x0000009C: 0xD0060027 vzero.s S131 +0x000000A0: 0xD0060028 vzero.s S201 +0x000000A4: 0xD0060029 vzero.s S211 +0x000000A8: 0xD006002A vzero.s S221 +0x000000AC: 0xD006002B vzero.s S231 +0x000000B0: 0xD006002C vzero.s S301 +0x000000B4: 0xD006002D vzero.s S311 +0x000000B8: 0xD006002E vzero.s S321 +0x000000BC: 0xD006002F vzero.s S331 +0x000000C0: 0xD0060030 vzero.s S401 +0x000000C4: 0xD0060031 vzero.s S411 +0x000000C8: 0xD0060032 vzero.s S421 +0x000000CC: 0xD0060033 vzero.s S431 +0x000000D0: 0xD0060034 vzero.s S501 +0x000000D4: 0xD0060035 vzero.s S511 +0x000000D8: 0xD0060036 vzero.s S521 +0x000000DC: 0xD0060037 vzero.s S531 +0x000000E0: 0xD0060038 vzero.s S601 +0x000000E4: 0xD0060039 vzero.s S611 +0x000000E8: 0xD006003A vzero.s S621 +0x000000EC: 0xD006003B vzero.s S631 +0x000000F0: 0xD006003C vzero.s S701 +0x000000F4: 0xD006003D vzero.s S711 +0x000000F8: 0xD006003E vzero.s S721 +0x000000FC: 0xD006003F vzero.s S731 +0x00000100: 0xD0060040 vzero.s S002 +0x00000104: 0xD0060041 vzero.s S012 +0x00000108: 0xD0060042 vzero.s S022 +0x0000010C: 0xD0060043 vzero.s S032 +0x00000110: 0xD0060044 vzero.s S102 +0x00000114: 0xD0060045 vzero.s S112 +0x00000118: 0xD0060046 vzero.s S122 +0x0000011C: 0xD0060047 vzero.s S132 +0x00000120: 0xD0060048 vzero.s S202 +0x00000124: 0xD0060049 vzero.s S212 +0x00000128: 0xD006004A vzero.s S222 +0x0000012C: 0xD006004B vzero.s S232 +0x00000130: 0xD006004C vzero.s S302 +0x00000134: 0xD006004D vzero.s S312 +0x00000138: 0xD006004E vzero.s S322 +0x0000013C: 0xD006004F vzero.s S332 +0x00000140: 0xD0060050 vzero.s S402 +0x00000144: 0xD0060051 vzero.s S412 +0x00000148: 0xD0060052 vzero.s S422 +0x0000014C: 0xD0060053 vzero.s S432 +0x00000150: 0xD0060054 vzero.s S502 +0x00000154: 0xD0060055 vzero.s S512 +0x00000158: 0xD0060056 vzero.s S522 +0x0000015C: 0xD0060057 vzero.s S532 +0x00000160: 0xD0060058 vzero.s S602 +0x00000164: 0xD0060059 vzero.s S612 +0x00000168: 0xD006005A vzero.s S622 +0x0000016C: 0xD006005B vzero.s S632 +0x00000170: 0xD006005C vzero.s S702 +0x00000174: 0xD006005D vzero.s S712 +0x00000178: 0xD006005E vzero.s S722 +0x0000017C: 0xD006005F vzero.s S732 +0x00000180: 0xD0060060 vzero.s S003 +0x00000184: 0xD0060061 vzero.s S013 +0x00000188: 0xD0060062 vzero.s S023 +0x0000018C: 0xD0060063 vzero.s S033 +0x00000190: 0xD0060064 vzero.s S103 +0x00000194: 0xD0060065 vzero.s S113 +0x00000198: 0xD0060066 vzero.s S123 +0x0000019C: 0xD0060067 vzero.s S133 +0x000001A0: 0xD0060068 vzero.s S203 +0x000001A4: 0xD0060069 vzero.s S213 +0x000001A8: 0xD006006A vzero.s S223 +0x000001AC: 0xD006006B vzero.s S233 +0x000001B0: 0xD006006C vzero.s S303 +0x000001B4: 0xD006006D vzero.s S313 +0x000001B8: 0xD006006E vzero.s S323 +0x000001BC: 0xD006006F vzero.s S333 +0x000001C0: 0xD0060070 vzero.s S403 +0x000001C4: 0xD0060071 vzero.s S413 +0x000001C8: 0xD0060072 vzero.s S423 +0x000001CC: 0xD0060073 vzero.s S433 +0x000001D0: 0xD0060074 vzero.s S503 +0x000001D4: 0xD0060075 vzero.s S513 +0x000001D8: 0xD0060076 vzero.s S523 +0x000001DC: 0xD0060077 vzero.s S533 +0x000001E0: 0xD0060078 vzero.s S603 +0x000001E4: 0xD0060079 vzero.s S613 +0x000001E8: 0xD006007A vzero.s S623 +0x000001EC: 0xD006007B vzero.s S633 +0x000001F0: 0xD006007C vzero.s S703 +0x000001F4: 0xD006007D vzero.s S713 +0x000001F8: 0xD006007E vzero.s S723 +0x000001FC: 0xD006007F vzero.s S733 +0x00000200: 0xD0060080 vzero.p C000 +0x00000204: 0xD0060081 vzero.p C010 +0x00000208: 0xD0060082 vzero.p C020 +0x0000020C: 0xD0060083 vzero.p C030 +0x00000210: 0xD0060084 vzero.p C100 +0x00000214: 0xD0060085 vzero.p C110 +0x00000218: 0xD0060086 vzero.p C120 +0x0000021C: 0xD0060087 vzero.p C130 +0x00000220: 0xD0060088 vzero.p C200 +0x00000224: 0xD0060089 vzero.p C210 +0x00000228: 0xD006008A vzero.p C220 +0x0000022C: 0xD006008B vzero.p C230 +0x00000230: 0xD006008C vzero.p C300 +0x00000234: 0xD006008D vzero.p C310 +0x00000238: 0xD006008E vzero.p C320 +0x0000023C: 0xD006008F vzero.p C330 +0x00000240: 0xD0060090 vzero.p C400 +0x00000244: 0xD0060091 vzero.p C410 +0x00000248: 0xD0060092 vzero.p C420 +0x0000024C: 0xD0060093 vzero.p C430 +0x00000250: 0xD0060094 vzero.p C500 +0x00000254: 0xD0060095 vzero.p C510 +0x00000258: 0xD0060096 vzero.p C520 +0x0000025C: 0xD0060097 vzero.p C530 +0x00000260: 0xD0060098 vzero.p C600 +0x00000264: 0xD0060099 vzero.p C610 +0x00000268: 0xD006009A vzero.p C620 +0x0000026C: 0xD006009B vzero.p C630 +0x00000270: 0xD006009C vzero.p C700 +0x00000274: 0xD006009D vzero.p C710 +0x00000278: 0xD006009E vzero.p C720 +0x0000027C: 0xD006009F vzero.p C730 +0x00000280: 0xD00600A0 vzero.p R000 +0x00000284: 0xD00600A1 vzero.p R001 +0x00000288: 0xD00600A2 vzero.p R002 +0x0000028C: 0xD00600A3 vzero.p R003 +0x00000290: 0xD00600A4 vzero.p R100 +0x00000294: 0xD00600A5 vzero.p R101 +0x00000298: 0xD00600A6 vzero.p R102 +0x0000029C: 0xD00600A7 vzero.p R103 +0x000002A0: 0xD00600A8 vzero.p R200 +0x000002A4: 0xD00600A9 vzero.p R201 +0x000002A8: 0xD00600AA vzero.p R202 +0x000002AC: 0xD00600AB vzero.p R203 +0x000002B0: 0xD00600AC vzero.p R300 +0x000002B4: 0xD00600AD vzero.p R301 +0x000002B8: 0xD00600AE vzero.p R302 +0x000002BC: 0xD00600AF vzero.p R303 +0x000002C0: 0xD00600B0 vzero.p R400 +0x000002C4: 0xD00600B1 vzero.p R401 +0x000002C8: 0xD00600B2 vzero.p R402 +0x000002CC: 0xD00600B3 vzero.p R403 +0x000002D0: 0xD00600B4 vzero.p R500 +0x000002D4: 0xD00600B5 vzero.p R501 +0x000002D8: 0xD00600B6 vzero.p R502 +0x000002DC: 0xD00600B7 vzero.p R503 +0x000002E0: 0xD00600B8 vzero.p R600 +0x000002E4: 0xD00600B9 vzero.p R601 +0x000002E8: 0xD00600BA vzero.p R602 +0x000002EC: 0xD00600BB vzero.p R603 +0x000002F0: 0xD00600BC vzero.p R700 +0x000002F4: 0xD00600BD vzero.p R701 +0x000002F8: 0xD00600BE vzero.p R702 +0x000002FC: 0xD00600BF vzero.p R703 +0x00000300: 0xD00600C0 vzero.p C002 +0x00000304: 0xD00600C1 vzero.p C012 +0x00000308: 0xD00600C2 vzero.p C022 +0x0000030C: 0xD00600C3 vzero.p C032 +0x00000310: 0xD00600C4 vzero.p C102 +0x00000314: 0xD00600C5 vzero.p C112 +0x00000318: 0xD00600C6 vzero.p C122 +0x0000031C: 0xD00600C7 vzero.p C132 +0x00000320: 0xD00600C8 vzero.p C202 +0x00000324: 0xD00600C9 vzero.p C212 +0x00000328: 0xD00600CA vzero.p C222 +0x0000032C: 0xD00600CB vzero.p C232 +0x00000330: 0xD00600CC vzero.p C302 +0x00000334: 0xD00600CD vzero.p C312 +0x00000338: 0xD00600CE vzero.p C322 +0x0000033C: 0xD00600CF vzero.p C332 +0x00000340: 0xD00600D0 vzero.p C402 +0x00000344: 0xD00600D1 vzero.p C412 +0x00000348: 0xD00600D2 vzero.p C422 +0x0000034C: 0xD00600D3 vzero.p C432 +0x00000350: 0xD00600D4 vzero.p C502 +0x00000354: 0xD00600D5 vzero.p C512 +0x00000358: 0xD00600D6 vzero.p C522 +0x0000035C: 0xD00600D7 vzero.p C532 +0x00000360: 0xD00600D8 vzero.p C602 +0x00000364: 0xD00600D9 vzero.p C612 +0x00000368: 0xD00600DA vzero.p C622 +0x0000036C: 0xD00600DB vzero.p C632 +0x00000370: 0xD00600DC vzero.p C702 +0x00000374: 0xD00600DD vzero.p C712 +0x00000378: 0xD00600DE vzero.p C722 +0x0000037C: 0xD00600DF vzero.p C732 +0x00000380: 0xD00600E0 vzero.p R020 +0x00000384: 0xD00600E1 vzero.p R021 +0x00000388: 0xD00600E2 vzero.p R022 +0x0000038C: 0xD00600E3 vzero.p R023 +0x00000390: 0xD00600E4 vzero.p R120 +0x00000394: 0xD00600E5 vzero.p R121 +0x00000398: 0xD00600E6 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vzero.q R520 +0x000007D4: 0xD00680F5 vzero.q R521 +0x000007D8: 0xD00680F6 vzero.q R522 +0x000007DC: 0xD00680F7 vzero.q R523 +0x000007E0: 0xD00680F8 vzero.q R620 +0x000007E4: 0xD00680F9 vzero.q R621 +0x000007E8: 0xD00680FA vzero.q R622 +0x000007EC: 0xD00680FB vzero.q R623 +0x000007F0: 0xD00680FC vzero.q R720 +0x000007F4: 0xD00680FD vzero.q R721 +0x000007F8: 0xD00680FE vzero.q R722 +0x000007FC: 0xD00680FF vzero.q R723 +0x00000800: 0xF3860080 vmzero.p M000 +0x00000804: 0xF3860081 vmzero.p M010 01 (00000800) PITCH +0x00000808: 0xF3860082 vmzero.p M020 01 (00000804) PITCH +0x0000080C: 0xF3860083 vmzero.p M030 01 (00000808) PITCH +0x00000810: 0xF3860084 vmzero.p M100 01 (0000080C) PITCH +0x00000814: 0xF3860085 vmzero.p M110 01 (00000810) PITCH +0x00000818: 0xF3860086 vmzero.p M120 01 (00000814) PITCH +0x0000081C: 0xF3860087 vmzero.p M130 01 (00000818) PITCH +0x00000820: 0xF3860088 vmzero.p M200 01 (0000081C) PITCH +0x00000824: 0xF3860089 vmzero.p M210 01 (00000820) PITCH +0x00000828: 0xF386008A vmzero.p M220 01 (00000824) PITCH +0x0000082C: 0xF386008B vmzero.p M230 01 (00000828) PITCH +0x00000830: 0xF386008C vmzero.p M300 01 (0000082C) PITCH +0x00000834: 0xF386008D vmzero.p M310 01 (00000830) PITCH +0x00000838: 0xF386008E vmzero.p M320 01 (00000834) PITCH +0x0000083C: 0xF386008F vmzero.p M330 01 (00000838) PITCH +0x00000840: 0xF3860090 vmzero.p M400 01 (0000083C) PITCH +0x00000844: 0xF3860091 vmzero.p M410 01 (00000840) PITCH +0x00000848: 0xF3860092 vmzero.p M420 01 (00000844) PITCH +0x0000084C: 0xF3860093 vmzero.p M430 01 (00000848) PITCH +0x00000850: 0xF3860094 vmzero.p M500 01 (0000084C) PITCH +0x00000854: 0xF3860095 vmzero.p M510 01 (00000850) PITCH +0x00000858: 0xF3860096 vmzero.p M520 01 (00000854) PITCH +0x0000085C: 0xF3860097 vmzero.p M530 01 (00000858) PITCH +0x00000860: 0xF3860098 vmzero.p M600 01 (0000085C) PITCH +0x00000864: 0xF3860099 vmzero.p M610 01 (00000860) PITCH +0x00000868: 0xF386009A vmzero.p M620 01 (00000864) PITCH +0x0000086C: 0xF386009B vmzero.p M630 01 (00000868) PITCH +0x00000870: 0xF386009C vmzero.p M700 01 (0000086C) PITCH +0x00000874: 0xF386009D vmzero.p M710 01 (00000870) PITCH +0x00000878: 0xF386009E vmzero.p M720 01 (00000874) PITCH +0x0000087C: 0xF386009F vmzero.p M730 01 (00000878) PITCH +0x00000880: 0xF38600A0 vmzero.p E000 01 (0000087C) PITCH +0x00000884: 0xF38600A1 vmzero.p E001 01 (00000880) PITCH +0x00000888: 0xF38600A2 vmzero.p E002 01 (00000884) PITCH +0x0000088C: 0xF38600A3 vmzero.p E003 01 (00000888) PITCH +0x00000890: 0xF38600A4 vmzero.p E100 01 (0000088C) PITCH +0x00000894: 0xF38600A5 vmzero.p E101 01 (00000890) PITCH +0x00000898: 0xF38600A6 vmzero.p E102 01 (00000894) PITCH +0x0000089C: 0xF38600A7 vmzero.p E103 01 (00000898) PITCH +0x000008A0: 0xF38600A8 vmzero.p E200 01 (0000089C) PITCH +0x000008A4: 0xF38600A9 vmzero.p E201 01 (000008A0) PITCH +0x000008A8: 0xF38600AA vmzero.p E202 01 (000008A4) PITCH +0x000008AC: 0xF38600AB vmzero.p E203 01 (000008A8) PITCH +0x000008B0: 0xF38600AC vmzero.p E300 01 (000008AC) PITCH +0x000008B4: 0xF38600AD vmzero.p E301 01 (000008B0) PITCH +0x000008B8: 0xF38600AE vmzero.p E302 01 (000008B4) PITCH +0x000008BC: 0xF38600AF vmzero.p E303 01 (000008B8) PITCH +0x000008C0: 0xF38600B0 vmzero.p E400 01 (000008BC) PITCH +0x000008C4: 0xF38600B1 vmzero.p E401 01 (000008C0) PITCH +0x000008C8: 0xF38600B2 vmzero.p E402 01 (000008C4) PITCH +0x000008CC: 0xF38600B3 vmzero.p E403 01 (000008C8) PITCH +0x000008D0: 0xF38600B4 vmzero.p E500 01 (000008CC) PITCH +0x000008D4: 0xF38600B5 vmzero.p E501 01 (000008D0) PITCH +0x000008D8: 0xF38600B6 vmzero.p E502 01 (000008D4) PITCH +0x000008DC: 0xF38600B7 vmzero.p E503 01 (000008D8) PITCH +0x000008E0: 0xF38600B8 vmzero.p E600 01 (000008DC) PITCH +0x000008E4: 0xF38600B9 vmzero.p E601 01 (000008E0) PITCH +0x000008E8: 0xF38600BA vmzero.p E602 01 (000008E4) PITCH +0x000008EC: 0xF38600BB vmzero.p E603 01 (000008E8) PITCH +0x000008F0: 0xF38600BC vmzero.p E700 01 (000008EC) PITCH +0x000008F4: 0xF38600BD vmzero.p E701 01 (000008F0) PITCH +0x000008F8: 0xF38600BE vmzero.p E702 01 (000008F4) PITCH +0x000008FC: 0xF38600BF vmzero.p E703 01 (000008F8) PITCH +0x00000900: 0xF38600C0 vmzero.p M002 01 (000008FC) PITCH +0x00000904: 0xF38600C1 vmzero.p M012 01 (00000900) PITCH +0x00000908: 0xF38600C2 vmzero.p M022 01 (00000904) PITCH +0x0000090C: 0xF38600C3 vmzero.p M032 01 (00000908) PITCH +0x00000910: 0xF38600C4 vmzero.p M102 01 (0000090C) PITCH +0x00000914: 0xF38600C5 vmzero.p M112 01 (00000910) PITCH +0x00000918: 0xF38600C6 vmzero.p M122 01 (00000914) PITCH +0x0000091C: 0xF38600C7 vmzero.p M132 01 (00000918) PITCH +0x00000920: 0xF38600C8 vmzero.p M202 01 (0000091C) PITCH +0x00000924: 0xF38600C9 vmzero.p M212 01 (00000920) PITCH +0x00000928: 0xF38600CA vmzero.p M222 01 (00000924) PITCH +0x0000092C: 0xF38600CB vmzero.p M232 01 (00000928) PITCH +0x00000930: 0xF38600CC vmzero.p M302 01 (0000092C) PITCH +0x00000934: 0xF38600CD vmzero.p M312 01 (00000930) PITCH +0x00000938: 0xF38600CE vmzero.p M322 01 (00000934) PITCH +0x0000093C: 0xF38600CF vmzero.p M332 01 (00000938) PITCH +0x00000940: 0xF38600D0 vmzero.p M402 01 (0000093C) PITCH +0x00000944: 0xF38600D1 vmzero.p M412 01 (00000940) PITCH +0x00000948: 0xF38600D2 vmzero.p M422 01 (00000944) PITCH +0x0000094C: 0xF38600D3 vmzero.p M432 01 (00000948) PITCH +0x00000950: 0xF38600D4 vmzero.p M502 01 (0000094C) PITCH +0x00000954: 0xF38600D5 vmzero.p M512 01 (00000950) PITCH +0x00000958: 0xF38600D6 vmzero.p M522 01 (00000954) PITCH +0x0000095C: 0xF38600D7 vmzero.p M532 01 (00000958) PITCH +0x00000960: 0xF38600D8 vmzero.p M602 01 (0000095C) PITCH +0x00000964: 0xF38600D9 vmzero.p M612 01 (00000960) PITCH +0x00000968: 0xF38600DA vmzero.p M622 01 (00000964) PITCH +0x0000096C: 0xF38600DB vmzero.p M632 01 (00000968) PITCH +0x00000970: 0xF38600DC vmzero.p M702 01 (0000096C) PITCH +0x00000974: 0xF38600DD vmzero.p M712 01 (00000970) PITCH +0x00000978: 0xF38600DE vmzero.p M722 01 (00000974) PITCH +0x0000097C: 0xF38600DF vmzero.p M732 01 (00000978) PITCH +0x00000980: 0xF38600E0 vmzero.p E020 01 (0000097C) PITCH +0x00000984: 0xF38600E1 vmzero.p E021 01 (00000980) PITCH +0x00000988: 0xF38600E2 vmzero.p E022 01 (00000984) PITCH +0x0000098C: 0xF38600E3 vmzero.p E023 01 (00000988) PITCH +0x00000990: 0xF38600E4 vmzero.p E120 01 (0000098C) PITCH +0x00000994: 0xF38600E5 vmzero.p E121 01 (00000990) PITCH +0x00000998: 0xF38600E6 vmzero.p E122 01 (00000994) PITCH +0x0000099C: 0xF38600E7 vmzero.p E123 01 (00000998) PITCH +0x000009A0: 0xF38600E8 vmzero.p E220 01 (0000099C) PITCH +0x000009A4: 0xF38600E9 vmzero.p E221 01 (000009A0) PITCH +0x000009A8: 0xF38600EA vmzero.p E222 01 (000009A4) PITCH +0x000009AC: 0xF38600EB vmzero.p E223 01 (000009A8) PITCH +0x000009B0: 0xF38600EC vmzero.p E320 01 (000009AC) PITCH +0x000009B4: 0xF38600ED vmzero.p E321 01 (000009B0) PITCH +0x000009B8: 0xF38600EE vmzero.p E322 01 (000009B4) PITCH +0x000009BC: 0xF38600EF vmzero.p E323 01 (000009B8) PITCH +0x000009C0: 0xF38600F0 vmzero.p E420 01 (000009BC) PITCH +0x000009C4: 0xF38600F1 vmzero.p E421 01 (000009C0) PITCH +0x000009C8: 0xF38600F2 vmzero.p E422 01 (000009C4) PITCH +0x000009CC: 0xF38600F3 vmzero.p E423 01 (000009C8) PITCH +0x000009D0: 0xF38600F4 vmzero.p E520 01 (000009CC) PITCH +0x000009D4: 0xF38600F5 vmzero.p E521 01 (000009D0) PITCH +0x000009D8: 0xF38600F6 vmzero.p E522 01 (000009D4) PITCH +0x000009DC: 0xF38600F7 vmzero.p E523 01 (000009D8) PITCH +0x000009E0: 0xF38600F8 vmzero.p E620 01 (000009DC) PITCH +0x000009E4: 0xF38600F9 vmzero.p E621 01 (000009E0) PITCH +0x000009E8: 0xF38600FA vmzero.p E622 01 (000009E4) PITCH +0x000009EC: 0xF38600FB vmzero.p E623 01 (000009E8) PITCH +0x000009F0: 0xF38600FC vmzero.p E720 01 (000009EC) PITCH +0x000009F4: 0xF38600FD vmzero.p E721 01 (000009F0) PITCH +0x000009F8: 0xF38600FE vmzero.p E722 01 (000009F4) PITCH +0x000009FC: 0xF38600FF vmzero.p E723 01 (000009F8) PITCH +0x00000A00: 0xF3868000 vmzero.t M000 01 (000009FC) PITCH +0x00000A04: 0xF3868001 vmzero.t M010 02 (00000A00) PITCH +0x00000A08: 0xF3868002 vmzero.t M020 02 (00000A04) PITCH +0x00000A0C: 0xF3868003 vmzero.t M030 02 (00000A08) PITCH +0x00000A10: 0xF3868004 vmzero.t M100 02 (00000A0C) PITCH +0x00000A14: 0xF3868005 vmzero.t M110 02 (00000A10) PITCH +0x00000A18: 0xF3868006 vmzero.t M120 02 (00000A14) PITCH +0x00000A1C: 0xF3868007 vmzero.t M130 02 (00000A18) PITCH +0x00000A20: 0xF3868008 vmzero.t M200 02 (00000A1C) PITCH +0x00000A24: 0xF3868009 vmzero.t M210 02 (00000A20) PITCH +0x00000A28: 0xF386800A vmzero.t M220 02 (00000A24) PITCH +0x00000A2C: 0xF386800B vmzero.t M230 02 (00000A28) PITCH +0x00000A30: 0xF386800C vmzero.t M300 02 (00000A2C) PITCH +0x00000A34: 0xF386800D vmzero.t M310 02 (00000A30) PITCH +0x00000A38: 0xF386800E vmzero.t M320 02 (00000A34) PITCH +0x00000A3C: 0xF386800F vmzero.t M330 02 (00000A38) PITCH +0x00000A40: 0xF3868010 vmzero.t M400 02 (00000A3C) PITCH +0x00000A44: 0xF3868011 vmzero.t M410 02 (00000A40) PITCH +0x00000A48: 0xF3868012 vmzero.t M420 02 (00000A44) PITCH +0x00000A4C: 0xF3868013 vmzero.t M430 02 (00000A48) PITCH +0x00000A50: 0xF3868014 vmzero.t M500 02 (00000A4C) PITCH +0x00000A54: 0xF3868015 vmzero.t M510 02 (00000A50) PITCH +0x00000A58: 0xF3868016 vmzero.t M520 02 (00000A54) PITCH +0x00000A5C: 0xF3868017 vmzero.t M530 02 (00000A58) PITCH +0x00000A60: 0xF3868018 vmzero.t M600 02 (00000A5C) PITCH +0x00000A64: 0xF3868019 vmzero.t M610 02 (00000A60) PITCH +0x00000A68: 0xF386801A vmzero.t M620 02 (00000A64) PITCH +0x00000A6C: 0xF386801B vmzero.t M630 02 (00000A68) PITCH +0x00000A70: 0xF386801C vmzero.t M700 02 (00000A6C) PITCH +0x00000A74: 0xF386801D vmzero.t M710 02 (00000A70) PITCH +0x00000A78: 0xF386801E vmzero.t M720 02 (00000A74) PITCH +0x00000A7C: 0xF386801F vmzero.t M730 02 (00000A78) PITCH +0x00000A80: 0xF3868020 vmzero.t E000 02 (00000A7C) PITCH +0x00000A84: 0xF3868021 vmzero.t E001 02 (00000A80) PITCH +0x00000A88: 0xF3868022 vmzero.t E002 02 (00000A84) PITCH +0x00000A8C: 0xF3868023 vmzero.t E003 02 (00000A88) PITCH +0x00000A90: 0xF3868024 vmzero.t E100 02 (00000A8C) PITCH +0x00000A94: 0xF3868025 vmzero.t E101 02 (00000A90) PITCH +0x00000A98: 0xF3868026 vmzero.t E102 02 (00000A94) PITCH +0x00000A9C: 0xF3868027 vmzero.t E103 02 (00000A98) PITCH +0x00000AA0: 0xF3868028 vmzero.t E200 02 (00000A9C) PITCH +0x00000AA4: 0xF3868029 vmzero.t E201 02 (00000AA0) PITCH +0x00000AA8: 0xF386802A vmzero.t E202 02 (00000AA4) PITCH +0x00000AAC: 0xF386802B vmzero.t E203 02 (00000AA8) PITCH +0x00000AB0: 0xF386802C vmzero.t E300 02 (00000AAC) PITCH +0x00000AB4: 0xF386802D vmzero.t E301 02 (00000AB0) PITCH +0x00000AB8: 0xF386802E vmzero.t E302 02 (00000AB4) PITCH +0x00000ABC: 0xF386802F vmzero.t E303 02 (00000AB8) PITCH +0x00000AC0: 0xF3868030 vmzero.t E400 02 (00000ABC) PITCH +0x00000AC4: 0xF3868031 vmzero.t E401 02 (00000AC0) PITCH +0x00000AC8: 0xF3868032 vmzero.t E402 02 (00000AC4) PITCH +0x00000ACC: 0xF3868033 vmzero.t E403 02 (00000AC8) PITCH +0x00000AD0: 0xF3868034 vmzero.t E500 02 (00000ACC) PITCH +0x00000AD4: 0xF3868035 vmzero.t E501 02 (00000AD0) PITCH +0x00000AD8: 0xF3868036 vmzero.t E502 02 (00000AD4) PITCH +0x00000ADC: 0xF3868037 vmzero.t E503 02 (00000AD8) PITCH +0x00000AE0: 0xF3868038 vmzero.t E600 02 (00000ADC) PITCH +0x00000AE4: 0xF3868039 vmzero.t E601 02 (00000AE0) PITCH +0x00000AE8: 0xF386803A vmzero.t E602 02 (00000AE4) PITCH +0x00000AEC: 0xF386803B vmzero.t E603 02 (00000AE8) PITCH +0x00000AF0: 0xF386803C vmzero.t E700 02 (00000AEC) PITCH +0x00000AF4: 0xF386803D vmzero.t E701 02 (00000AF0) PITCH +0x00000AF8: 0xF386803E vmzero.t E702 02 (00000AF4) PITCH +0x00000AFC: 0xF386803F vmzero.t E703 02 (00000AF8) PITCH +0x00000B00: 0xF3868040 vmzero.t M001 02 (00000AFC) PITCH +0x00000B04: 0xF3868041 vmzero.t M011 02 (00000B00) PITCH +0x00000B08: 0xF3868042 vmzero.t M021 02 (00000B04) PITCH +0x00000B0C: 0xF3868043 vmzero.t M031 02 (00000B08) PITCH +0x00000B10: 0xF3868044 vmzero.t M101 02 (00000B0C) PITCH +0x00000B14: 0xF3868045 vmzero.t M111 02 (00000B10) PITCH +0x00000B18: 0xF3868046 vmzero.t M121 02 (00000B14) PITCH +0x00000B1C: 0xF3868047 vmzero.t M131 02 (00000B18) PITCH +0x00000B20: 0xF3868048 vmzero.t M201 02 (00000B1C) PITCH +0x00000B24: 0xF3868049 vmzero.t M211 02 (00000B20) PITCH +0x00000B28: 0xF386804A vmzero.t M221 02 (00000B24) PITCH +0x00000B2C: 0xF386804B vmzero.t M231 02 (00000B28) PITCH +0x00000B30: 0xF386804C vmzero.t M301 02 (00000B2C) PITCH +0x00000B34: 0xF386804D vmzero.t M311 02 (00000B30) PITCH +0x00000B38: 0xF386804E vmzero.t M321 02 (00000B34) PITCH +0x00000B3C: 0xF386804F vmzero.t M331 02 (00000B38) PITCH +0x00000B40: 0xF3868050 vmzero.t M401 02 (00000B3C) PITCH +0x00000B44: 0xF3868051 vmzero.t M411 02 (00000B40) PITCH +0x00000B48: 0xF3868052 vmzero.t M421 02 (00000B44) PITCH +0x00000B4C: 0xF3868053 vmzero.t M431 02 (00000B48) PITCH +0x00000B50: 0xF3868054 vmzero.t M501 02 (00000B4C) PITCH +0x00000B54: 0xF3868055 vmzero.t M511 02 (00000B50) PITCH +0x00000B58: 0xF3868056 vmzero.t M521 02 (00000B54) PITCH +0x00000B5C: 0xF3868057 vmzero.t M531 02 (00000B58) PITCH +0x00000B60: 0xF3868058 vmzero.t M601 02 (00000B5C) PITCH +0x00000B64: 0xF3868059 vmzero.t M611 02 (00000B60) PITCH +0x00000B68: 0xF386805A vmzero.t M621 02 (00000B64) PITCH +0x00000B6C: 0xF386805B vmzero.t M631 02 (00000B68) PITCH +0x00000B70: 0xF386805C vmzero.t M701 02 (00000B6C) PITCH +0x00000B74: 0xF386805D vmzero.t M711 02 (00000B70) PITCH +0x00000B78: 0xF386805E vmzero.t M721 02 (00000B74) PITCH +0x00000B7C: 0xF386805F vmzero.t M731 02 (00000B78) PITCH +0x00000B80: 0xF3868060 vmzero.t E010 02 (00000B7C) PITCH +0x00000B84: 0xF3868061 vmzero.t E011 02 (00000B80) PITCH +0x00000B88: 0xF3868062 vmzero.t E012 02 (00000B84) PITCH +0x00000B8C: 0xF3868063 vmzero.t E013 02 (00000B88) PITCH +0x00000B90: 0xF3868064 vmzero.t E110 02 (00000B8C) PITCH +0x00000B94: 0xF3868065 vmzero.t E111 02 (00000B90) PITCH +0x00000B98: 0xF3868066 vmzero.t E112 02 (00000B94) PITCH +0x00000B9C: 0xF3868067 vmzero.t E113 02 (00000B98) PITCH +0x00000BA0: 0xF3868068 vmzero.t E210 02 (00000B9C) PITCH +0x00000BA4: 0xF3868069 vmzero.t E211 02 (00000BA0) PITCH +0x00000BA8: 0xF386806A vmzero.t E212 02 (00000BA4) PITCH +0x00000BAC: 0xF386806B vmzero.t E213 02 (00000BA8) PITCH +0x00000BB0: 0xF386806C vmzero.t E310 02 (00000BAC) PITCH +0x00000BB4: 0xF386806D vmzero.t E311 02 (00000BB0) PITCH +0x00000BB8: 0xF386806E vmzero.t E312 02 (00000BB4) PITCH +0x00000BBC: 0xF386806F vmzero.t E313 02 (00000BB8) PITCH +0x00000BC0: 0xF3868070 vmzero.t E410 02 (00000BBC) PITCH +0x00000BC4: 0xF3868071 vmzero.t E411 02 (00000BC0) PITCH +0x00000BC8: 0xF3868072 vmzero.t E412 02 (00000BC4) PITCH +0x00000BCC: 0xF3868073 vmzero.t E413 02 (00000BC8) PITCH +0x00000BD0: 0xF3868074 vmzero.t E510 02 (00000BCC) PITCH +0x00000BD4: 0xF3868075 vmzero.t E511 02 (00000BD0) PITCH +0x00000BD8: 0xF3868076 vmzero.t E512 02 (00000BD4) PITCH +0x00000BDC: 0xF3868077 vmzero.t E513 02 (00000BD8) PITCH +0x00000BE0: 0xF3868078 vmzero.t E610 02 (00000BDC) PITCH +0x00000BE4: 0xF3868079 vmzero.t E611 02 (00000BE0) PITCH +0x00000BE8: 0xF386807A vmzero.t E612 02 (00000BE4) PITCH +0x00000BEC: 0xF386807B vmzero.t E613 02 (00000BE8) PITCH +0x00000BF0: 0xF386807C vmzero.t E710 02 (00000BEC) PITCH +0x00000BF4: 0xF386807D vmzero.t E711 02 (00000BF0) PITCH +0x00000BF8: 0xF386807E vmzero.t E712 02 (00000BF4) PITCH +0x00000BFC: 0xF386807F vmzero.t E713 02 (00000BF8) PITCH +0x00000C00: 0xF3868080 vmzero.q M000 02 (00000BFC) PITCH +0x00000C04: 0xF3868081 vmzero.q M010 03 (00000C00) PITCH +0x00000C08: 0xF3868082 vmzero.q M020 03 (00000C04) PITCH +0x00000C0C: 0xF3868083 vmzero.q M030 03 (00000C08) PITCH +0x00000C10: 0xF3868084 vmzero.q M100 03 (00000C0C) PITCH +0x00000C14: 0xF3868085 vmzero.q M110 03 (00000C10) PITCH +0x00000C18: 0xF3868086 vmzero.q M120 03 (00000C14) PITCH +0x00000C1C: 0xF3868087 vmzero.q M130 03 (00000C18) PITCH +0x00000C20: 0xF3868088 vmzero.q M200 03 (00000C1C) PITCH +0x00000C24: 0xF3868089 vmzero.q M210 03 (00000C20) PITCH +0x00000C28: 0xF386808A vmzero.q M220 03 (00000C24) PITCH +0x00000C2C: 0xF386808B vmzero.q M230 03 (00000C28) PITCH +0x00000C30: 0xF386808C vmzero.q M300 03 (00000C2C) PITCH +0x00000C34: 0xF386808D vmzero.q M310 03 (00000C30) PITCH +0x00000C38: 0xF386808E vmzero.q M320 03 (00000C34) PITCH +0x00000C3C: 0xF386808F vmzero.q M330 03 (00000C38) PITCH +0x00000C40: 0xF3868090 vmzero.q M400 03 (00000C3C) PITCH +0x00000C44: 0xF3868091 vmzero.q M410 03 (00000C40) PITCH +0x00000C48: 0xF3868092 vmzero.q M420 03 (00000C44) PITCH +0x00000C4C: 0xF3868093 vmzero.q M430 03 (00000C48) PITCH +0x00000C50: 0xF3868094 vmzero.q M500 03 (00000C4C) PITCH +0x00000C54: 0xF3868095 vmzero.q M510 03 (00000C50) PITCH +0x00000C58: 0xF3868096 vmzero.q M520 03 (00000C54) PITCH +0x00000C5C: 0xF3868097 vmzero.q M530 03 (00000C58) PITCH +0x00000C60: 0xF3868098 vmzero.q M600 03 (00000C5C) PITCH +0x00000C64: 0xF3868099 vmzero.q M610 03 (00000C60) PITCH +0x00000C68: 0xF386809A vmzero.q M620 03 (00000C64) PITCH +0x00000C6C: 0xF386809B vmzero.q M630 03 (00000C68) PITCH +0x00000C70: 0xF386809C vmzero.q M700 03 (00000C6C) PITCH +0x00000C74: 0xF386809D vmzero.q M710 03 (00000C70) PITCH +0x00000C78: 0xF386809E vmzero.q M720 03 (00000C74) PITCH +0x00000C7C: 0xF386809F vmzero.q M730 03 (00000C78) PITCH +0x00000C80: 0xF38680A0 vmzero.q E000 03 (00000C7C) PITCH +0x00000C84: 0xF38680A1 vmzero.q E001 03 (00000C80) PITCH +0x00000C88: 0xF38680A2 vmzero.q E002 03 (00000C84) PITCH +0x00000C8C: 0xF38680A3 vmzero.q E003 03 (00000C88) PITCH +0x00000C90: 0xF38680A4 vmzero.q E100 03 (00000C8C) PITCH +0x00000C94: 0xF38680A5 vmzero.q E101 03 (00000C90) PITCH +0x00000C98: 0xF38680A6 vmzero.q E102 03 (00000C94) PITCH +0x00000C9C: 0xF38680A7 vmzero.q E103 03 (00000C98) PITCH +0x00000CA0: 0xF38680A8 vmzero.q E200 03 (00000C9C) PITCH +0x00000CA4: 0xF38680A9 vmzero.q E201 03 (00000CA0) PITCH +0x00000CA8: 0xF38680AA vmzero.q E202 03 (00000CA4) PITCH +0x00000CAC: 0xF38680AB vmzero.q E203 03 (00000CA8) PITCH +0x00000CB0: 0xF38680AC vmzero.q E300 03 (00000CAC) PITCH +0x00000CB4: 0xF38680AD vmzero.q E301 03 (00000CB0) PITCH +0x00000CB8: 0xF38680AE vmzero.q E302 03 (00000CB4) PITCH +0x00000CBC: 0xF38680AF vmzero.q E303 03 (00000CB8) PITCH +0x00000CC0: 0xF38680B0 vmzero.q E400 03 (00000CBC) PITCH +0x00000CC4: 0xF38680B1 vmzero.q E401 03 (00000CC0) PITCH +0x00000CC8: 0xF38680B2 vmzero.q E402 03 (00000CC4) PITCH +0x00000CCC: 0xF38680B3 vmzero.q E403 03 (00000CC8) PITCH +0x00000CD0: 0xF38680B4 vmzero.q E500 03 (00000CCC) PITCH +0x00000CD4: 0xF38680B5 vmzero.q E501 03 (00000CD0) PITCH +0x00000CD8: 0xF38680B6 vmzero.q E502 03 (00000CD4) PITCH +0x00000CDC: 0xF38680B7 vmzero.q E503 03 (00000CD8) PITCH +0x00000CE0: 0xF38680B8 vmzero.q E600 03 (00000CDC) PITCH +0x00000CE4: 0xF38680B9 vmzero.q E601 03 (00000CE0) PITCH +0x00000CE8: 0xF38680BA vmzero.q E602 03 (00000CE4) PITCH +0x00000CEC: 0xF38680BB vmzero.q E603 03 (00000CE8) PITCH +0x00000CF0: 0xF38680BC vmzero.q E700 03 (00000CEC) PITCH +0x00000CF4: 0xF38680BD vmzero.q E701 03 (00000CF0) PITCH +0x00000CF8: 0xF38680BE vmzero.q E702 03 (00000CF4) PITCH +0x00000CFC: 0xF38680BF vmzero.q E703 03 (00000CF8) PITCH +0x00000D00: 0xF38680C0 vmzero.q M002 03 (00000CFC) PITCH +0x00000D04: 0xF38680C1 vmzero.q M012 03 (00000D00) PITCH +0x00000D08: 0xF38680C2 vmzero.q M022 03 (00000D04) PITCH +0x00000D0C: 0xF38680C3 vmzero.q M032 03 (00000D08) PITCH +0x00000D10: 0xF38680C4 vmzero.q M102 03 (00000D0C) PITCH +0x00000D14: 0xF38680C5 vmzero.q M112 03 (00000D10) PITCH +0x00000D18: 0xF38680C6 vmzero.q M122 03 (00000D14) PITCH +0x00000D1C: 0xF38680C7 vmzero.q M132 03 (00000D18) PITCH +0x00000D20: 0xF38680C8 vmzero.q M202 03 (00000D1C) PITCH +0x00000D24: 0xF38680C9 vmzero.q M212 03 (00000D20) PITCH +0x00000D28: 0xF38680CA vmzero.q M222 03 (00000D24) PITCH +0x00000D2C: 0xF38680CB vmzero.q M232 03 (00000D28) PITCH +0x00000D30: 0xF38680CC vmzero.q M302 03 (00000D2C) PITCH +0x00000D34: 0xF38680CD vmzero.q M312 03 (00000D30) PITCH +0x00000D38: 0xF38680CE vmzero.q M322 03 (00000D34) PITCH +0x00000D3C: 0xF38680CF vmzero.q M332 03 (00000D38) PITCH +0x00000D40: 0xF38680D0 vmzero.q M402 03 (00000D3C) PITCH +0x00000D44: 0xF38680D1 vmzero.q M412 03 (00000D40) PITCH +0x00000D48: 0xF38680D2 vmzero.q M422 03 (00000D44) PITCH +0x00000D4C: 0xF38680D3 vmzero.q M432 03 (00000D48) PITCH +0x00000D50: 0xF38680D4 vmzero.q M502 03 (00000D4C) PITCH +0x00000D54: 0xF38680D5 vmzero.q M512 03 (00000D50) PITCH +0x00000D58: 0xF38680D6 vmzero.q M522 03 (00000D54) PITCH +0x00000D5C: 0xF38680D7 vmzero.q M532 03 (00000D58) PITCH +0x00000D60: 0xF38680D8 vmzero.q M602 03 (00000D5C) PITCH +0x00000D64: 0xF38680D9 vmzero.q M612 03 (00000D60) PITCH +0x00000D68: 0xF38680DA vmzero.q M622 03 (00000D64) PITCH +0x00000D6C: 0xF38680DB vmzero.q M632 03 (00000D68) PITCH +0x00000D70: 0xF38680DC vmzero.q M702 03 (00000D6C) PITCH +0x00000D74: 0xF38680DD vmzero.q M712 03 (00000D70) PITCH +0x00000D78: 0xF38680DE vmzero.q M722 03 (00000D74) PITCH +0x00000D7C: 0xF38680DF vmzero.q M732 03 (00000D78) PITCH +0x00000D80: 0xF38680E0 vmzero.q E020 03 (00000D7C) PITCH +0x00000D84: 0xF38680E1 vmzero.q E021 03 (00000D80) PITCH +0x00000D88: 0xF38680E2 vmzero.q E022 03 (00000D84) PITCH +0x00000D8C: 0xF38680E3 vmzero.q E023 03 (00000D88) PITCH +0x00000D90: 0xF38680E4 vmzero.q E120 03 (00000D8C) PITCH +0x00000D94: 0xF38680E5 vmzero.q E121 03 (00000D90) PITCH +0x00000D98: 0xF38680E6 vmzero.q E122 03 (00000D94) PITCH +0x00000D9C: 0xF38680E7 vmzero.q E123 03 (00000D98) PITCH +0x00000DA0: 0xF38680E8 vmzero.q E220 03 (00000D9C) PITCH +0x00000DA4: 0xF38680E9 vmzero.q E221 03 (00000DA0) PITCH +0x00000DA8: 0xF38680EA vmzero.q E222 03 (00000DA4) PITCH +0x00000DAC: 0xF38680EB vmzero.q E223 03 (00000DA8) PITCH +0x00000DB0: 0xF38680EC vmzero.q E320 03 (00000DAC) PITCH +0x00000DB4: 0xF38680ED vmzero.q E321 03 (00000DB0) PITCH +0x00000DB8: 0xF38680EE vmzero.q E322 03 (00000DB4) PITCH +0x00000DBC: 0xF38680EF vmzero.q E323 03 (00000DB8) PITCH +0x00000DC0: 0xF38680F0 vmzero.q E420 03 (00000DBC) PITCH +0x00000DC4: 0xF38680F1 vmzero.q E421 03 (00000DC0) PITCH +0x00000DC8: 0xF38680F2 vmzero.q E422 03 (00000DC4) PITCH +0x00000DCC: 0xF38680F3 vmzero.q E423 03 (00000DC8) PITCH +0x00000DD0: 0xF38680F4 vmzero.q E520 03 (00000DCC) PITCH +0x00000DD4: 0xF38680F5 vmzero.q E521 03 (00000DD0) PITCH +0x00000DD8: 0xF38680F6 vmzero.q E522 03 (00000DD4) PITCH +0x00000DDC: 0xF38680F7 vmzero.q E523 03 (00000DD8) PITCH +0x00000DE0: 0xF38680F8 vmzero.q E620 03 (00000DDC) PITCH +0x00000DE4: 0xF38680F9 vmzero.q E621 03 (00000DE0) PITCH +0x00000DE8: 0xF38680FA vmzero.q E622 03 (00000DE4) PITCH +0x00000DEC: 0xF38680FB vmzero.q E623 03 (00000DE8) PITCH +0x00000DF0: 0xF38680FC vmzero.q E720 03 (00000DEC) PITCH +0x00000DF4: 0xF38680FD vmzero.q E721 03 (00000DF0) PITCH +0x00000DF8: 0xF38680FE vmzero.q E722 03 (00000DF4) PITCH +0x00000DFC: 0xF38680FF vmzero.q E723 03 (00000DF8) PITCH +0x00000E00: 0x49000002 bvf 0x00000E0C 03 (00000DFC) PITCH +0x00000E04: 0x00000000 nop +0x00000E08: 0x49050002 bvt cc1,0x00000E14 +0x00000E0C: 0x00000000 nop +0x00000E10: 0x490A0002 bvfl cc2,0x00000E1C +0x00000E14: 0x00000000 nop +0x00000E18: 0x490F0002 bvtl cc3,0x00000E24 +0x00000E1C: 0x00000000 nop +0x00000E20: 0x49100002 bvf cc4,0x00000E2C +0x00000E24: 0x00000000 nop +0x00000E28: 0x49150002 bvt cc5,0x00000E34 +0x00000E2C: 0x00000000 nop +0x00000E30: 0x49000001 bvf branches_end +0x00000E34: 0x00000000 nop +0x00000E38: 0xC8800040 lv.s S000,0x0040(a0) +0x00000E3C: 0xC8810040 lv.s S010,0x0040(a0) +0x00000E40: 0xC8820040 lv.s S020,0x0040(a0) +0x00000E44: 0xC8830040 lv.s S030,0x0040(a0) +0x00000E48: 0xC8840040 lv.s S100,0x0040(a0) +0x00000E4C: 0xC8850040 lv.s S110,0x0040(a0) +0x00000E50: 0xC8860040 lv.s S120,0x0040(a0) +0x00000E54: 0xC8870040 lv.s S130,0x0040(a0) +0x00000E58: 0xC8880040 lv.s S200,0x0040(a0) +0x00000E5C: 0xC8890040 lv.s S210,0x0040(a0) +0x00000E60: 0xC88A0040 lv.s S220,0x0040(a0) +0x00000E64: 0xC88B0040 lv.s S230,0x0040(a0) +0x00000E68: 0xC88C0040 lv.s S300,0x0040(a0) +0x00000E6C: 0xC88D0040 lv.s S310,0x0040(a0) +0x00000E70: 0xC88E0040 lv.s S320,0x0040(a0) +0x00000E74: 0xC88F0040 lv.s S330,0x0040(a0) +0x00000E78: 0xC8900040 lv.s S400,0x0040(a0) +0x00000E7C: 0xC8910040 lv.s S410,0x0040(a0) +0x00000E80: 0xC8920040 lv.s S420,0x0040(a0) +0x00000E84: 0xC8930040 lv.s S430,0x0040(a0) +0x00000E88: 0xC8940040 lv.s S500,0x0040(a0) +0x00000E8C: 0xC8950040 lv.s S510,0x0040(a0) +0x00000E90: 0xC8960040 lv.s S520,0x0040(a0) +0x00000E94: 0xC8970040 lv.s S530,0x0040(a0) +0x00000E98: 0xC8980040 lv.s S600,0x0040(a0) +0x00000E9C: 0xC8990040 lv.s S610,0x0040(a0) +0x00000EA0: 0xC89A0040 lv.s S620,0x0040(a0) +0x00000EA4: 0xC89B0040 lv.s S630,0x0040(a0) +0x00000EA8: 0xC89C0040 lv.s S700,0x0040(a0) +0x00000EAC: 0xC89D0040 lv.s S710,0x0040(a0) +0x00000EB0: 0xC89E0040 lv.s S720,0x0040(a0) +0x00000EB4: 0xC89F0040 lv.s S730,0x0040(a0) +0x00000EB8: 0xC8800041 lv.s S001,0x0040(a0) +0x00000EBC: 0xC8810041 lv.s S011,0x0040(a0) +0x00000EC0: 0xC8820041 lv.s S021,0x0040(a0) +0x00000EC4: 0xC8830041 lv.s S031,0x0040(a0) +0x00000EC8: 0xC8840041 lv.s S101,0x0040(a0) +0x00000ECC: 0xC8850041 lv.s S111,0x0040(a0) +0x00000ED0: 0xC8860041 lv.s S121,0x0040(a0) +0x00000ED4: 0xC8870041 lv.s S131,0x0040(a0) +0x00000ED8: 0xC8880041 lv.s S201,0x0040(a0) +0x00000EDC: 0xC8890041 lv.s S211,0x0040(a0) +0x00000EE0: 0xC88A0041 lv.s S221,0x0040(a0) +0x00000EE4: 0xC88B0041 lv.s S231,0x0040(a0) +0x00000EE8: 0xC88C0041 lv.s S301,0x0040(a0) +0x00000EEC: 0xC88D0041 lv.s S311,0x0040(a0) +0x00000EF0: 0xC88E0041 lv.s S321,0x0040(a0) +0x00000EF4: 0xC88F0041 lv.s S331,0x0040(a0) +0x00000EF8: 0xC8900041 lv.s S401,0x0040(a0) +0x00000EFC: 0xC8910041 lv.s S411,0x0040(a0) +0x00000F00: 0xC8920041 lv.s S421,0x0040(a0) +0x00000F04: 0xC8930041 lv.s S431,0x0040(a0) +0x00000F08: 0xC8940041 lv.s S501,0x0040(a0) +0x00000F0C: 0xC8950041 lv.s S511,0x0040(a0) +0x00000F10: 0xC8960041 lv.s S521,0x0040(a0) +0x00000F14: 0xC8970041 lv.s S531,0x0040(a0) +0x00000F18: 0xC8980041 lv.s S601,0x0040(a0) +0x00000F1C: 0xC8990041 lv.s S611,0x0040(a0) +0x00000F20: 0xC89A0041 lv.s S621,0x0040(a0) +0x00000F24: 0xC89B0041 lv.s S631,0x0040(a0) +0x00000F28: 0xC89C0041 lv.s S701,0x0040(a0) +0x00000F2C: 0xC89D0041 lv.s S711,0x0040(a0) +0x00000F30: 0xC89E0041 lv.s S721,0x0040(a0) +0x00000F34: 0xC89F0041 lv.s S731,0x0040(a0) +0x00000F38: 0xC8800042 lv.s S002,0x0040(a0) +0x00000F3C: 0xC8810042 lv.s S012,0x0040(a0) +0x00000F40: 0xC8820042 lv.s S022,0x0040(a0) +0x00000F44: 0xC8830042 lv.s S032,0x0040(a0) +0x00000F48: 0xC8840042 lv.s S102,0x0040(a0) +0x00000F4C: 0xC8850042 lv.s S112,0x0040(a0) +0x00000F50: 0xC8860042 lv.s S122,0x0040(a0) +0x00000F54: 0xC8870042 lv.s S132,0x0040(a0) +0x00000F58: 0xC8880042 lv.s S202,0x0040(a0) +0x00000F5C: 0xC8890042 lv.s S212,0x0040(a0) +0x00000F60: 0xC88A0042 lv.s S222,0x0040(a0) +0x00000F64: 0xC88B0042 lv.s S232,0x0040(a0) +0x00000F68: 0xC88C0042 lv.s S302,0x0040(a0) +0x00000F6C: 0xC88D0042 lv.s S312,0x0040(a0) +0x00000F70: 0xC88E0042 lv.s S322,0x0040(a0) +0x00000F74: 0xC88F0042 lv.s S332,0x0040(a0) +0x00000F78: 0xC8900042 lv.s S402,0x0040(a0) +0x00000F7C: 0xC8910042 lv.s S412,0x0040(a0) +0x00000F80: 0xC8920042 lv.s S422,0x0040(a0) +0x00000F84: 0xC8930042 lv.s S432,0x0040(a0) +0x00000F88: 0xC8940042 lv.s S502,0x0040(a0) +0x00000F8C: 0xC8950042 lv.s S512,0x0040(a0) +0x00000F90: 0xC8960042 lv.s S522,0x0040(a0) +0x00000F94: 0xC8970042 lv.s S532,0x0040(a0) +0x00000F98: 0xC8980042 lv.s S602,0x0040(a0) +0x00000F9C: 0xC8990042 lv.s S612,0x0040(a0) +0x00000FA0: 0xC89A0042 lv.s S622,0x0040(a0) +0x00000FA4: 0xC89B0042 lv.s S632,0x0040(a0) +0x00000FA8: 0xC89C0042 lv.s S702,0x0040(a0) +0x00000FAC: 0xC89D0042 lv.s S712,0x0040(a0) +0x00000FB0: 0xC89E0042 lv.s S722,0x0040(a0) +0x00000FB4: 0xC89F0042 lv.s S732,0x0040(a0) +0x00000FB8: 0xC8800043 lv.s S003,0x0040(a0) +0x00000FBC: 0xC8810043 lv.s S013,0x0040(a0) +0x00000FC0: 0xC8820043 lv.s S023,0x0040(a0) +0x00000FC4: 0xC8830043 lv.s S033,0x0040(a0) +0x00000FC8: 0xC8840043 lv.s S103,0x0040(a0) +0x00000FCC: 0xC8850043 lv.s S113,0x0040(a0) +0x00000FD0: 0xC8860043 lv.s S123,0x0040(a0) +0x00000FD4: 0xC8870043 lv.s S133,0x0040(a0) +0x00000FD8: 0xC8880043 lv.s S203,0x0040(a0) +0x00000FDC: 0xC8890043 lv.s S213,0x0040(a0) +0x00000FE0: 0xC88A0043 lv.s S223,0x0040(a0) +0x00000FE4: 0xC88B0043 lv.s S233,0x0040(a0) +0x00000FE8: 0xC88C0043 lv.s S303,0x0040(a0) +0x00000FEC: 0xC88D0043 lv.s S313,0x0040(a0) +0x00000FF0: 0xC88E0043 lv.s S323,0x0040(a0) +0x00000FF4: 0xC88F0043 lv.s S333,0x0040(a0) +0x00000FF8: 0xC8900043 lv.s S403,0x0040(a0) +0x00000FFC: 0xC8910043 lv.s S413,0x0040(a0) +0x00001000: 0xC8920043 lv.s S423,0x0040(a0) +0x00001004: 0xC8930043 lv.s S433,0x0040(a0) +0x00001008: 0xC8940043 lv.s S503,0x0040(a0) +0x0000100C: 0xC8950043 lv.s S513,0x0040(a0) +0x00001010: 0xC8960043 lv.s S523,0x0040(a0) +0x00001014: 0xC8970043 lv.s S533,0x0040(a0) +0x00001018: 0xC8980043 lv.s S603,0x0040(a0) +0x0000101C: 0xC8990043 lv.s S613,0x0040(a0) +0x00001020: 0xC89A0043 lv.s S623,0x0040(a0) +0x00001024: 0xC89B0043 lv.s S633,0x0040(a0) +0x00001028: 0xC89C0043 lv.s S703,0x0040(a0) +0x0000102C: 0xC89D0043 lv.s S713,0x0040(a0) +0x00001030: 0xC89E0043 lv.s S723,0x0040(a0) +0x00001034: 0xC89F0043 lv.s S733,0x0040(a0) +0x00001038: 0xD8800040 lv.q C000,0x0040(a0) +0x0000103C: 0xD8810040 lv.q C010,0x0040(a0) +0x00001040: 0xD8820040 lv.q C020,0x0040(a0) +0x00001044: 0xD8830040 lv.q C030,0x0040(a0) +0x00001048: 0xD8840040 lv.q C100,0x0040(a0) +0x0000104C: 0xD8850040 lv.q C110,0x0040(a0) +0x00001050: 0xD8860040 lv.q C120,0x0040(a0) +0x00001054: 0xD8870040 lv.q C130,0x0040(a0) +0x00001058: 0xD8880040 lv.q C200,0x0040(a0) +0x0000105C: 0xD8890040 lv.q C210,0x0040(a0) +0x00001060: 0xD88A0040 lv.q C220,0x0040(a0) +0x00001064: 0xD88B0040 lv.q C230,0x0040(a0) +0x00001068: 0xD88C0040 lv.q C300,0x0040(a0) +0x0000106C: 0xD88D0040 lv.q C310,0x0040(a0) +0x00001070: 0xD88E0040 lv.q C320,0x0040(a0) +0x00001074: 0xD88F0040 lv.q C330,0x0040(a0) +0x00001078: 0xD8900040 lv.q C400,0x0040(a0) +0x0000107C: 0xD8910040 lv.q C410,0x0040(a0) +0x00001080: 0xD8920040 lv.q C420,0x0040(a0) +0x00001084: 0xD8930040 lv.q C430,0x0040(a0) +0x00001088: 0xD8940040 lv.q C500,0x0040(a0) +0x0000108C: 0xD8950040 lv.q C510,0x0040(a0) +0x00001090: 0xD8960040 lv.q C520,0x0040(a0) +0x00001094: 0xD8970040 lv.q C530,0x0040(a0) +0x00001098: 0xD8980040 lv.q C600,0x0040(a0) +0x0000109C: 0xD8990040 lv.q C610,0x0040(a0) +0x000010A0: 0xD89A0040 lv.q C620,0x0040(a0) +0x000010A4: 0xD89B0040 lv.q C630,0x0040(a0) +0x000010A8: 0xD89C0040 lv.q C700,0x0040(a0) +0x000010AC: 0xD89D0040 lv.q C710,0x0040(a0) +0x000010B0: 0xD89E0040 lv.q C720,0x0040(a0) +0x000010B4: 0xD89F0040 lv.q C730,0x0040(a0) +0x000010B8: 0xD8800041 lv.q R000,0x0040(a0) +0x000010BC: 0xD8810041 lv.q R001,0x0040(a0) +0x000010C0: 0xD8820041 lv.q R002,0x0040(a0) +0x000010C4: 0xD8830041 lv.q R003,0x0040(a0) +0x000010C8: 0xD8840041 lv.q R100,0x0040(a0) +0x000010CC: 0xD8850041 lv.q R101,0x0040(a0) +0x000010D0: 0xD8860041 lv.q R102,0x0040(a0) +0x000010D4: 0xD8870041 lv.q R103,0x0040(a0) +0x000010D8: 0xD8880041 lv.q R200,0x0040(a0) +0x000010DC: 0xD8890041 lv.q R201,0x0040(a0) +0x000010E0: 0xD88A0041 lv.q R202,0x0040(a0) +0x000010E4: 0xD88B0041 lv.q R203,0x0040(a0) +0x000010E8: 0xD88C0041 lv.q R300,0x0040(a0) +0x000010EC: 0xD88D0041 lv.q R301,0x0040(a0) +0x000010F0: 0xD88E0041 lv.q R302,0x0040(a0) +0x000010F4: 0xD88F0041 lv.q R303,0x0040(a0) +0x000010F8: 0xD8900041 lv.q R400,0x0040(a0) +0x000010FC: 0xD8910041 lv.q R401,0x0040(a0) +0x00001100: 0xD8920041 lv.q R402,0x0040(a0) +0x00001104: 0xD8930041 lv.q R403,0x0040(a0) +0x00001108: 0xD8940041 lv.q R500,0x0040(a0) +0x0000110C: 0xD8950041 lv.q R501,0x0040(a0) +0x00001110: 0xD8960041 lv.q R502,0x0040(a0) +0x00001114: 0xD8970041 lv.q R503,0x0040(a0) +0x00001118: 0xD8980041 lv.q R600,0x0040(a0) +0x0000111C: 0xD8990041 lv.q R601,0x0040(a0) +0x00001120: 0xD89A0041 lv.q R602,0x0040(a0) +0x00001124: 0xD89B0041 lv.q R603,0x0040(a0) +0x00001128: 0xD89C0041 lv.q R700,0x0040(a0) +0x0000112C: 0xD89D0041 lv.q R701,0x0040(a0) +0x00001130: 0xD89E0041 lv.q R702,0x0040(a0) +0x00001134: 0xD89F0041 lv.q R703,0x0040(a0) +0x00001138: 0x48640004 mfv a0,S100 +0x0000113C: 0x48E40004 mtv a0,S100 06 (00001138) PITCH +0x00001140: 0x48E40084 mtvc a0,VFPU_INF4 +0x00001144: 0xE8800040 sv.s S000,0x0040(a0) +0x00001148: 0xF8800040 sv.q C000,0x0040(a0) 06 (00001144) PITCH +0x0000114C: 0xF8800042 sv.q C000,0x0040(a0),wb 06 (00001148) PITCH +0x00001150: 0xFFFF0000 vnop +0x00001154: 0xF4800040 svl.q C000,0x0040(a0) +0x00001158: 0xF4800042 svr.q C000,0x0040(a0) 06 (00001154) PITCH +0x0000115C: 0xF2008080 vmscl.q M000,M000,S000 06 (00001158) PITCH +0x00001160: 0xF2018080 vmscl.q M000,M000,S010 09 (0000115C) PITCH REG +0x00001164: 0xF2028080 vmscl.q M000,M000,S020 09 (00001160) PITCH REG +0x00001168: 0xF2038080 vmscl.q M000,M000,S030 09 (00001164) PITCH REG +0x0000116C: 0xF2048080 vmscl.q M000,M000,S100 09 (00001168) PITCH REG +0x00001170: 0xF2058080 vmscl.q M000,M000,S110 09 (0000116C) PITCH REG +0x00001174: 0xF2068080 vmscl.q M000,M000,S120 09 (00001170) PITCH REG +0x00001178: 0xF2078080 vmscl.q M000,M000,S130 09 (00001174) PITCH REG +0x0000117C: 0xF2088080 vmscl.q M000,M000,S200 09 (00001178) PITCH REG +0x00001180: 0xF2098080 vmscl.q M000,M000,S210 09 (0000117C) PITCH REG +0x00001184: 0xF20A8080 vmscl.q M000,M000,S220 09 (00001180) PITCH REG +0x00001188: 0xF20B8080 vmscl.q M000,M000,S230 09 (00001184) PITCH REG +0x0000118C: 0xF20C8080 vmscl.q M000,M000,S300 09 (00001188) PITCH REG +0x00001190: 0xF20D8080 vmscl.q M000,M000,S310 09 (0000118C) PITCH REG +0x00001194: 0xF20E8080 vmscl.q M000,M000,S320 09 (00001190) PITCH REG +0x00001198: 0xF20F8080 vmscl.q M000,M000,S330 09 (00001194) PITCH REG +0x0000119C: 0xF2108080 vmscl.q M000,M000,S400 09 (00001198) PITCH REG +0x000011A0: 0xF2118080 vmscl.q M000,M000,S410 09 (0000119C) PITCH REG +0x000011A4: 0xF2128080 vmscl.q M000,M000,S420 09 (000011A0) PITCH REG +0x000011A8: 0xF2138080 vmscl.q M000,M000,S430 09 (000011A4) PITCH REG +0x000011AC: 0xF2148080 vmscl.q M000,M000,S500 09 (000011A8) PITCH REG +0x000011B0: 0xF2158080 vmscl.q M000,M000,S510 09 (000011AC) PITCH REG +0x000011B4: 0xF2168080 vmscl.q M000,M000,S520 09 (000011B0) PITCH REG +0x000011B8: 0xF2178080 vmscl.q M000,M000,S530 09 (000011B4) PITCH REG +0x000011BC: 0xF2188080 vmscl.q M000,M000,S600 09 (000011B8) PITCH REG +0x000011C0: 0xF2198080 vmscl.q M000,M000,S610 09 (000011BC) PITCH REG +0x000011C4: 0xF21A8080 vmscl.q M000,M000,S620 09 (000011C0) PITCH REG +0x000011C8: 0xF21B8080 vmscl.q M000,M000,S630 09 (000011C4) PITCH REG +0x000011CC: 0xF21C8080 vmscl.q M000,M000,S700 09 (000011C8) PITCH REG +0x000011D0: 0xF21D8080 vmscl.q M000,M000,S710 09 (000011CC) PITCH REG +0x000011D4: 0xF21E8080 vmscl.q M000,M000,S720 09 (000011D0) PITCH REG +0x000011D8: 0xF21F8080 vmscl.q M000,M000,S730 09 (000011D4) PITCH REG +0x000011DC: 0xF2208080 vmscl.q M000,M000,S001 09 (000011D8) PITCH REG +0x000011E0: 0xF2218080 vmscl.q M000,M000,S011 09 (000011DC) PITCH REG +0x000011E4: 0xF2228080 vmscl.q M000,M000,S021 09 (000011E0) PITCH REG +0x000011E8: 0xF2238080 vmscl.q M000,M000,S031 09 (000011E4) PITCH REG +0x000011EC: 0xF2248080 vmscl.q M000,M000,S101 09 (000011E8) PITCH REG +0x000011F0: 0xF2258080 vmscl.q M000,M000,S111 09 (000011EC) PITCH REG +0x000011F4: 0xF2268080 vmscl.q M000,M000,S121 09 (000011F0) PITCH REG +0x000011F8: 0xF2278080 vmscl.q M000,M000,S131 09 (000011F4) PITCH REG +0x000011FC: 0xF2288080 vmscl.q M000,M000,S201 09 (000011F8) PITCH REG +0x00001200: 0xF2298080 vmscl.q M000,M000,S211 09 (000011FC) PITCH REG +0x00001204: 0xF22A8080 vmscl.q M000,M000,S221 09 (00001200) PITCH REG +0x00001208: 0xF22B8080 vmscl.q M000,M000,S231 09 (00001204) PITCH REG +0x0000120C: 0xF22C8080 vmscl.q M000,M000,S301 09 (00001208) PITCH REG +0x00001210: 0xF22D8080 vmscl.q M000,M000,S311 09 (0000120C) PITCH REG +0x00001214: 0xF22E8080 vmscl.q M000,M000,S321 09 (00001210) PITCH REG +0x00001218: 0xF22F8080 vmscl.q M000,M000,S331 09 (00001214) PITCH REG +0x0000121C: 0xF2308080 vmscl.q M000,M000,S401 09 (00001218) PITCH REG +0x00001220: 0xF2318080 vmscl.q M000,M000,S411 09 (0000121C) PITCH REG +0x00001224: 0xF2328080 vmscl.q M000,M000,S421 09 (00001220) PITCH REG +0x00001228: 0xF2338080 vmscl.q M000,M000,S431 09 (00001224) PITCH REG +0x0000122C: 0xF2348080 vmscl.q M000,M000,S501 09 (00001228) PITCH REG +0x00001230: 0xF2358080 vmscl.q M000,M000,S511 09 (0000122C) PITCH REG +0x00001234: 0xF2368080 vmscl.q M000,M000,S521 09 (00001230) PITCH REG +0x00001238: 0xF2378080 vmscl.q M000,M000,S531 09 (00001234) PITCH REG +0x0000123C: 0xF2388080 vmscl.q M000,M000,S601 09 (00001238) PITCH REG +0x00001240: 0xF2398080 vmscl.q M000,M000,S611 09 (0000123C) PITCH REG +0x00001244: 0xF23A8080 vmscl.q M000,M000,S621 09 (00001240) PITCH REG +0x00001248: 0xF23B8080 vmscl.q M000,M000,S631 09 (00001244) PITCH REG +0x0000124C: 0xF23C8080 vmscl.q M000,M000,S701 09 (00001248) PITCH REG +0x00001250: 0xF23D8080 vmscl.q M000,M000,S711 09 (0000124C) PITCH REG +0x00001254: 0xF23E8080 vmscl.q M000,M000,S721 09 (00001250) PITCH REG +0x00001258: 0xF23F8080 vmscl.q M000,M000,S731 09 (00001254) PITCH REG +0x0000125C: 0xF2408080 vmscl.q M000,M000,S002 09 (00001258) PITCH REG +0x00001260: 0xF2418080 vmscl.q M000,M000,S012 09 (0000125C) PITCH REG +0x00001264: 0xF2428080 vmscl.q M000,M000,S022 09 (00001260) PITCH REG +0x00001268: 0xF2438080 vmscl.q M000,M000,S032 09 (00001264) PITCH REG +0x0000126C: 0xF2448080 vmscl.q M000,M000,S102 09 (00001268) PITCH REG +0x00001270: 0xF2458080 vmscl.q M000,M000,S112 09 (0000126C) PITCH REG +0x00001274: 0xF2468080 vmscl.q M000,M000,S122 09 (00001270) PITCH REG +0x00001278: 0xF2478080 vmscl.q M000,M000,S132 09 (00001274) PITCH REG +0x0000127C: 0xF2488080 vmscl.q M000,M000,S202 09 (00001278) PITCH REG +0x00001280: 0xF2498080 vmscl.q M000,M000,S212 09 (0000127C) PITCH REG +0x00001284: 0xF24A8080 vmscl.q M000,M000,S222 09 (00001280) PITCH REG +0x00001288: 0xF24B8080 vmscl.q M000,M000,S232 09 (00001284) PITCH REG +0x0000128C: 0xF24C8080 vmscl.q M000,M000,S302 09 (00001288) PITCH REG +0x00001290: 0xF24D8080 vmscl.q M000,M000,S312 09 (0000128C) PITCH REG +0x00001294: 0xF24E8080 vmscl.q M000,M000,S322 09 (00001290) PITCH REG +0x00001298: 0xF24F8080 vmscl.q M000,M000,S332 09 (00001294) PITCH REG +0x0000129C: 0xF2508080 vmscl.q M000,M000,S402 09 (00001298) PITCH REG +0x000012A0: 0xF2518080 vmscl.q M000,M000,S412 09 (0000129C) PITCH REG +0x000012A4: 0xF2528080 vmscl.q M000,M000,S422 09 (000012A0) PITCH REG +0x000012A8: 0xF2538080 vmscl.q M000,M000,S432 09 (000012A4) PITCH REG +0x000012AC: 0xF2548080 vmscl.q M000,M000,S502 09 (000012A8) PITCH REG +0x000012B0: 0xF2558080 vmscl.q M000,M000,S512 09 (000012AC) PITCH REG +0x000012B4: 0xF2568080 vmscl.q M000,M000,S522 09 (000012B0) PITCH REG +0x000012B8: 0xF2578080 vmscl.q M000,M000,S532 09 (000012B4) PITCH REG +0x000012BC: 0xF2588080 vmscl.q M000,M000,S602 09 (000012B8) PITCH REG +0x000012C0: 0xF2598080 vmscl.q M000,M000,S612 09 (000012BC) PITCH REG +0x000012C4: 0xF25A8080 vmscl.q M000,M000,S622 09 (000012C0) PITCH REG +0x000012C8: 0xF25B8080 vmscl.q M000,M000,S632 09 (000012C4) PITCH REG +0x000012CC: 0xF25C8080 vmscl.q M000,M000,S702 09 (000012C8) PITCH REG +0x000012D0: 0xF25D8080 vmscl.q M000,M000,S712 09 (000012CC) PITCH REG +0x000012D4: 0xF25E8080 vmscl.q M000,M000,S722 09 (000012D0) PITCH REG +0x000012D8: 0xF25F8080 vmscl.q M000,M000,S732 09 (000012D4) PITCH REG +0x000012DC: 0xF2608080 vmscl.q M000,M000,S003 09 (000012D8) PITCH REG +0x000012E0: 0xF2618080 vmscl.q M000,M000,S013 09 (000012DC) PITCH REG +0x000012E4: 0xF2628080 vmscl.q M000,M000,S023 09 (000012E0) PITCH REG +0x000012E8: 0xF2638080 vmscl.q M000,M000,S033 09 (000012E4) PITCH REG +0x000012EC: 0xF2648080 vmscl.q M000,M000,S103 09 (000012E8) PITCH REG +0x000012F0: 0xF2658080 vmscl.q M000,M000,S113 09 (000012EC) PITCH REG +0x000012F4: 0xF2668080 vmscl.q M000,M000,S123 09 (000012F0) PITCH REG +0x000012F8: 0xF2678080 vmscl.q M000,M000,S133 09 (000012F4) PITCH REG +0x000012FC: 0xF2688080 vmscl.q M000,M000,S203 09 (000012F8) PITCH REG +0x00001300: 0xF2698080 vmscl.q M000,M000,S213 09 (000012FC) PITCH REG +0x00001304: 0xF26A8080 vmscl.q M000,M000,S223 09 (00001300) PITCH REG +0x00001308: 0xF26B8080 vmscl.q M000,M000,S233 09 (00001304) PITCH REG +0x0000130C: 0xF26C8080 vmscl.q M000,M000,S303 09 (00001308) PITCH REG +0x00001310: 0xF26D8080 vmscl.q M000,M000,S313 09 (0000130C) PITCH REG +0x00001314: 0xF26E8080 vmscl.q M000,M000,S323 09 (00001310) PITCH REG +0x00001318: 0xF26F8080 vmscl.q M000,M000,S333 09 (00001314) PITCH REG +0x0000131C: 0xF2708080 vmscl.q M000,M000,S403 09 (00001318) PITCH REG +0x00001320: 0xF2718080 vmscl.q M000,M000,S413 09 (0000131C) PITCH REG +0x00001324: 0xF2728080 vmscl.q M000,M000,S423 09 (00001320) PITCH REG +0x00001328: 0xF2738080 vmscl.q M000,M000,S433 09 (00001324) PITCH REG +0x0000132C: 0xF2748080 vmscl.q M000,M000,S503 09 (00001328) PITCH REG +0x00001330: 0xF2758080 vmscl.q M000,M000,S513 09 (0000132C) PITCH REG +0x00001334: 0xF2768080 vmscl.q M000,M000,S523 09 (00001330) PITCH REG +0x00001338: 0xF2778080 vmscl.q M000,M000,S533 09 (00001334) PITCH REG +0x0000133C: 0xF2788080 vmscl.q M000,M000,S603 09 (00001338) PITCH REG +0x00001340: 0xF2798080 vmscl.q M000,M000,S613 09 (0000133C) PITCH REG +0x00001344: 0xF27A8080 vmscl.q M000,M000,S623 09 (00001340) PITCH REG +0x00001348: 0xF27B8080 vmscl.q M000,M000,S633 09 (00001344) PITCH REG +0x0000134C: 0xF27C8080 vmscl.q M000,M000,S703 09 (00001348) PITCH REG +0x00001350: 0xF27D8080 vmscl.q M000,M000,S713 09 (0000134C) PITCH REG +0x00001354: 0xF27E8080 vmscl.q M000,M000,S723 09 (00001350) PITCH REG +0x00001358: 0xF27F8080 vmscl.q M000,M000,S733 09 (00001354) PITCH REG +0x0000135C: 0xF2008081 vmscl.q M010,M000,S000 09 (00001358) PITCH REG +0x00001360: 0xF2008082 vmscl.q M020,M000,S000 09 (0000135C) PITCH REG +0x00001364: 0xF2008083 vmscl.q M030,M000,S000 09 (00001360) PITCH REG +0x00001368: 0xF2008084 vmscl.q M100,M000,S000 09 (00001364) PITCH REG +0x0000136C: 0xF2008085 vmscl.q M110,M000,S000 03 (00001368) PITCH +0x00001370: 0xF2008086 vmscl.q M120,M000,S000 03 (0000136C) PITCH +0x00001374: 0xF2008087 vmscl.q M130,M000,S000 03 (00001370) PITCH +0x00001378: 0xF2008088 vmscl.q M200,M000,S000 03 (00001374) PITCH +0x0000137C: 0xF2008089 vmscl.q M210,M000,S000 03 (00001378) PITCH +0x00001380: 0xF200808A vmscl.q M220,M000,S000 03 (0000137C) PITCH +0x00001384: 0xF200808B vmscl.q M230,M000,S000 03 (00001380) PITCH +0x00001388: 0xF200808C vmscl.q M300,M000,S000 03 (00001384) PITCH +0x0000138C: 0xF200808D vmscl.q M310,M000,S000 03 (00001388) PITCH +0x00001390: 0xF200808E vmscl.q M320,M000,S000 03 (0000138C) PITCH +0x00001394: 0xF200808F vmscl.q M330,M000,S000 03 (00001390) PITCH +0x00001398: 0xF2008090 vmscl.q M400,M000,S000 03 (00001394) PITCH +0x0000139C: 0xF2008091 vmscl.q M410,M000,S000 03 (00001398) PITCH +0x000013A0: 0xF2008092 vmscl.q M420,M000,S000 03 (0000139C) PITCH +0x000013A4: 0xF2008093 vmscl.q M430,M000,S000 03 (000013A0) PITCH +0x000013A8: 0xF2008094 vmscl.q M500,M000,S000 03 (000013A4) PITCH +0x000013AC: 0xF2008095 vmscl.q M510,M000,S000 03 (000013A8) PITCH +0x000013B0: 0xF2008096 vmscl.q M520,M000,S000 03 (000013AC) PITCH +0x000013B4: 0xF2008097 vmscl.q M530,M000,S000 03 (000013B0) PITCH +0x000013B8: 0xF2008098 vmscl.q M600,M000,S000 03 (000013B4) PITCH +0x000013BC: 0xF2008099 vmscl.q M610,M000,S000 03 (000013B8) PITCH +0x000013C0: 0xF200809A vmscl.q M620,M000,S000 03 (000013BC) PITCH +0x000013C4: 0xF200809B vmscl.q M630,M000,S000 03 (000013C0) PITCH +0x000013C8: 0xF200809C vmscl.q M700,M000,S000 03 (000013C4) PITCH +0x000013CC: 0xF200809D vmscl.q M710,M000,S000 03 (000013C8) PITCH +0x000013D0: 0xF200809E vmscl.q M720,M000,S000 03 (000013CC) PITCH +0x000013D4: 0xF200809F vmscl.q M730,M000,S000 03 (000013D0) PITCH +0x000013D8: 0xF20080A0 vmscl.q E000,M000,S000 03 (000013D4) PITCH +0x000013DC: 0xF20080A1 vmscl.q E001,M000,S000 09 (000013D8) PITCH REG +0x000013E0: 0xF20080A2 vmscl.q E002,M000,S000 09 (000013DC) PITCH REG +0x000013E4: 0xF20080A3 vmscl.q E003,M000,S000 09 (000013E0) PITCH REG +0x000013E8: 0xF20080A4 vmscl.q E100,M000,S000 09 (000013E4) PITCH REG +0x000013EC: 0xF20080A5 vmscl.q E101,M000,S000 03 (000013E8) PITCH +0x000013F0: 0xF20080A6 vmscl.q E102,M000,S000 03 (000013EC) PITCH +0x000013F4: 0xF20080A7 vmscl.q E103,M000,S000 03 (000013F0) PITCH +0x000013F8: 0xF20080A8 vmscl.q E200,M000,S000 03 (000013F4) PITCH +0x000013FC: 0xF20080A9 vmscl.q E201,M000,S000 03 (000013F8) PITCH +0x00001400: 0xF20080AA vmscl.q E202,M000,S000 03 (000013FC) PITCH +0x00001404: 0xF20080AB vmscl.q E203,M000,S000 03 (00001400) PITCH +0x00001408: 0xF20080AC vmscl.q E300,M000,S000 03 (00001404) PITCH +0x0000140C: 0xF20080AD vmscl.q E301,M000,S000 03 (00001408) PITCH +0x00001410: 0xF20080AE vmscl.q E302,M000,S000 03 (0000140C) PITCH +0x00001414: 0xF20080AF vmscl.q E303,M000,S000 03 (00001410) PITCH +0x00001418: 0xF20080B0 vmscl.q E400,M000,S000 03 (00001414) PITCH +0x0000141C: 0xF20080B1 vmscl.q E401,M000,S000 03 (00001418) PITCH +0x00001420: 0xF20080B2 vmscl.q E402,M000,S000 03 (0000141C) PITCH +0x00001424: 0xF20080B3 vmscl.q E403,M000,S000 03 (00001420) PITCH +0x00001428: 0xF20080B4 vmscl.q E500,M000,S000 03 (00001424) PITCH +0x0000142C: 0xF20080B5 vmscl.q E501,M000,S000 03 (00001428) PITCH +0x00001430: 0xF20080B6 vmscl.q E502,M000,S000 03 (0000142C) PITCH +0x00001434: 0xF20080B7 vmscl.q E503,M000,S000 03 (00001430) PITCH +0x00001438: 0xF20080B8 vmscl.q E600,M000,S000 03 (00001434) PITCH +0x0000143C: 0xF20080B9 vmscl.q E601,M000,S000 03 (00001438) PITCH +0x00001440: 0xF20080BA vmscl.q E602,M000,S000 03 (0000143C) PITCH +0x00001444: 0xF20080BB vmscl.q E603,M000,S000 03 (00001440) PITCH +0x00001448: 0xF20080BC vmscl.q E700,M000,S000 03 (00001444) PITCH +0x0000144C: 0xF20080BD vmscl.q E701,M000,S000 03 (00001448) PITCH +0x00001450: 0xF20080BE vmscl.q E702,M000,S000 03 (0000144C) PITCH +0x00001454: 0xF20080BF vmscl.q E703,M000,S000 03 (00001450) PITCH +0x00001458: 0xF20080C0 vmscl.q M002,M000,S000 03 (00001454) PITCH +0x0000145C: 0xF20080C1 vmscl.q M012,M000,S000 09 (00001458) PITCH REG +0x00001460: 0xF20080C2 vmscl.q M022,M000,S000 09 (0000145C) PITCH REG +0x00001464: 0xF20080C3 vmscl.q M032,M000,S000 09 (00001460) PITCH REG +0x00001468: 0xF20080C4 vmscl.q M102,M000,S000 09 (00001464) PITCH REG +0x0000146C: 0xF20080C5 vmscl.q M112,M000,S000 03 (00001468) PITCH +0x00001470: 0xF20080C6 vmscl.q M122,M000,S000 03 (0000146C) PITCH +0x00001474: 0xF20080C7 vmscl.q M132,M000,S000 03 (00001470) PITCH +0x00001478: 0xF20080C8 vmscl.q M202,M000,S000 03 (00001474) PITCH +0x0000147C: 0xF20080C9 vmscl.q M212,M000,S000 03 (00001478) PITCH +0x00001480: 0xF20080CA vmscl.q M222,M000,S000 03 (0000147C) PITCH +0x00001484: 0xF20080CB vmscl.q M232,M000,S000 03 (00001480) PITCH +0x00001488: 0xF20080CC vmscl.q M302,M000,S000 03 (00001484) PITCH +0x0000148C: 0xF20080CD vmscl.q M312,M000,S000 03 (00001488) PITCH +0x00001490: 0xF20080CE vmscl.q M322,M000,S000 03 (0000148C) PITCH +0x00001494: 0xF20080CF vmscl.q M332,M000,S000 03 (00001490) PITCH +0x00001498: 0xF20080D0 vmscl.q M402,M000,S000 03 (00001494) PITCH +0x0000149C: 0xF20080D1 vmscl.q M412,M000,S000 03 (00001498) PITCH +0x000014A0: 0xF20080D2 vmscl.q M422,M000,S000 03 (0000149C) PITCH +0x000014A4: 0xF20080D3 vmscl.q M432,M000,S000 03 (000014A0) PITCH +0x000014A8: 0xF20080D4 vmscl.q M502,M000,S000 03 (000014A4) PITCH +0x000014AC: 0xF20080D5 vmscl.q M512,M000,S000 03 (000014A8) PITCH +0x000014B0: 0xF20080D6 vmscl.q M522,M000,S000 03 (000014AC) PITCH +0x000014B4: 0xF20080D7 vmscl.q M532,M000,S000 03 (000014B0) PITCH +0x000014B8: 0xF20080D8 vmscl.q M602,M000,S000 03 (000014B4) PITCH +0x000014BC: 0xF20080D9 vmscl.q M612,M000,S000 03 (000014B8) PITCH +0x000014C0: 0xF20080DA vmscl.q M622,M000,S000 03 (000014BC) PITCH +0x000014C4: 0xF20080DB vmscl.q M632,M000,S000 03 (000014C0) PITCH +0x000014C8: 0xF20080DC vmscl.q M702,M000,S000 03 (000014C4) PITCH +0x000014CC: 0xF20080DD vmscl.q M712,M000,S000 03 (000014C8) PITCH +0x000014D0: 0xF20080DE vmscl.q M722,M000,S000 03 (000014CC) PITCH +0x000014D4: 0xF20080DF vmscl.q M732,M000,S000 03 (000014D0) PITCH +0x000014D8: 0xF20080E0 vmscl.q E020,M000,S000 03 (000014D4) PITCH +0x000014DC: 0xF20080E1 vmscl.q E021,M000,S000 09 (000014D8) PITCH REG +0x000014E0: 0xF20080E2 vmscl.q E022,M000,S000 09 (000014DC) PITCH REG +0x000014E4: 0xF20080E3 vmscl.q E023,M000,S000 09 (000014E0) PITCH REG +0x000014E8: 0xF20080E4 vmscl.q E120,M000,S000 09 (000014E4) PITCH REG +0x000014EC: 0xF20080E5 vmscl.q E121,M000,S000 03 (000014E8) PITCH +0x000014F0: 0xF20080E6 vmscl.q E122,M000,S000 03 (000014EC) PITCH +0x000014F4: 0xF20080E7 vmscl.q E123,M000,S000 03 (000014F0) PITCH +0x000014F8: 0xF20080E8 vmscl.q E220,M000,S000 03 (000014F4) PITCH +0x000014FC: 0xF20080E9 vmscl.q E221,M000,S000 03 (000014F8) PITCH +0x00001500: 0xF20080EA vmscl.q E222,M000,S000 03 (000014FC) PITCH +0x00001504: 0xF20080EB vmscl.q E223,M000,S000 03 (00001500) PITCH +0x00001508: 0xF20080EC vmscl.q E320,M000,S000 03 (00001504) PITCH +0x0000150C: 0xF20080ED vmscl.q E321,M000,S000 03 (00001508) PITCH +0x00001510: 0xF20080EE vmscl.q E322,M000,S000 03 (0000150C) PITCH +0x00001514: 0xF20080EF vmscl.q E323,M000,S000 03 (00001510) PITCH +0x00001518: 0xF20080F0 vmscl.q E420,M000,S000 03 (00001514) PITCH +0x0000151C: 0xF20080F1 vmscl.q E421,M000,S000 03 (00001518) PITCH +0x00001520: 0xF20080F2 vmscl.q E422,M000,S000 03 (0000151C) PITCH +0x00001524: 0xF20080F3 vmscl.q E423,M000,S000 03 (00001520) PITCH +0x00001528: 0xF20080F4 vmscl.q E520,M000,S000 03 (00001524) PITCH +0x0000152C: 0xF20080F5 vmscl.q E521,M000,S000 03 (00001528) PITCH +0x00001530: 0xF20080F6 vmscl.q E522,M000,S000 03 (0000152C) PITCH +0x00001534: 0xF20080F7 vmscl.q E523,M000,S000 03 (00001530) PITCH +0x00001538: 0xF20080F8 vmscl.q E620,M000,S000 03 (00001534) PITCH +0x0000153C: 0xF20080F9 vmscl.q E621,M000,S000 03 (00001538) PITCH +0x00001540: 0xF20080FA vmscl.q E622,M000,S000 03 (0000153C) PITCH +0x00001544: 0xF20080FB vmscl.q E623,M000,S000 03 (00001540) PITCH +0x00001548: 0xF20080FC vmscl.q E720,M000,S000 03 (00001544) PITCH +0x0000154C: 0xF20080FD vmscl.q E721,M000,S000 03 (00001548) PITCH +0x00001550: 0xF20080FE vmscl.q E722,M000,S000 03 (0000154C) PITCH +0x00001554: 0xF20080FF vmscl.q E723,M000,S000 03 (00001550) PITCH +0x00001558: 0xD0010000 vabs.s S000,S000 04 (00001554) PITCH WAW +0x0000155C: 0xD0010101 vabs.s S010,S010 +0x00001560: 0xD0010202 vabs.s S020,S020 +0x00001564: 0xD0010303 vabs.s S030,S030 +0x00001568: 0xD0010404 vabs.s S100,S100 +0x0000156C: 0xD0010505 vabs.s S110,S110 +0x00001570: 0xD0010606 vabs.s S120,S120 +0x00001574: 0xD0010707 vabs.s S130,S130 +0x00001578: 0xD0010808 vabs.s S200,S200 +0x0000157C: 0xD0010909 vabs.s S210,S210 +0x00001580: 0xD0010A0A vabs.s S220,S220 +0x00001584: 0xD0010B0B vabs.s S230,S230 +0x00001588: 0xD0010C0C vabs.s S300,S300 +0x0000158C: 0xD0010D0D vabs.s S310,S310 +0x00001590: 0xD0010E0E vabs.s S320,S320 +0x00001594: 0xD0010F0F vabs.s S330,S330 +0x00001598: 0xD0011010 vabs.s S400,S400 +0x0000159C: 0xD0011111 vabs.s S410,S410 +0x000015A0: 0xD0011212 vabs.s S420,S420 +0x000015A4: 0xD0011313 vabs.s S430,S430 +0x000015A8: 0xD0011414 vabs.s S500,S500 +0x000015AC: 0xD0011515 vabs.s S510,S510 +0x000015B0: 0xD0011616 vabs.s S520,S520 +0x000015B4: 0xD0011717 vabs.s S530,S530 +0x000015B8: 0xD0011818 vabs.s S600,S600 +0x000015BC: 0xD0011919 vabs.s S610,S610 +0x000015C0: 0xD0011A1A vabs.s S620,S620 +0x000015C4: 0xD0011B1B vabs.s S630,S630 +0x000015C8: 0xD0011C1C vabs.s S700,S700 +0x000015CC: 0xD0011D1D vabs.s S710,S710 +0x000015D0: 0xD0011E1E vabs.s S720,S720 +0x000015D4: 0xD0011F1F vabs.s S730,S730 +0x000015D8: 0xD0012020 vabs.s S001,S001 +0x000015DC: 0xD0012121 vabs.s S011,S011 +0x000015E0: 0xD0012222 vabs.s S021,S021 +0x000015E4: 0xD0012323 vabs.s S031,S031 +0x000015E8: 0xD0012424 vabs.s S101,S101 +0x000015EC: 0xD0012525 vabs.s S111,S111 +0x000015F0: 0xD0012626 vabs.s S121,S121 +0x000015F4: 0xD0012727 vabs.s S131,S131 +0x000015F8: 0xD0012828 vabs.s S201,S201 +0x000015FC: 0xD0012929 vabs.s S211,S211 +0x00001600: 0xD0012A2A vabs.s S221,S221 +0x00001604: 0xD0012B2B vabs.s S231,S231 +0x00001608: 0xD0012C2C vabs.s S301,S301 +0x0000160C: 0xD0012D2D vabs.s S311,S311 +0x00001610: 0xD0012E2E vabs.s S321,S321 +0x00001614: 0xD0012F2F vabs.s S331,S331 +0x00001618: 0xD0013030 vabs.s S401,S401 +0x0000161C: 0xD0013131 vabs.s S411,S411 +0x00001620: 0xD0013232 vabs.s S421,S421 +0x00001624: 0xD0013333 vabs.s S431,S431 +0x00001628: 0xD0013434 vabs.s S501,S501 +0x0000162C: 0xD0013535 vabs.s S511,S511 +0x00001630: 0xD0013636 vabs.s S521,S521 +0x00001634: 0xD0013737 vabs.s S531,S531 +0x00001638: 0xD0013838 vabs.s S601,S601 +0x0000163C: 0xD0013939 vabs.s S611,S611 +0x00001640: 0xD0013A3A vabs.s S621,S621 +0x00001644: 0xD0013B3B vabs.s S631,S631 +0x00001648: 0xD0013C3C vabs.s S701,S701 +0x0000164C: 0xD0013D3D vabs.s S711,S711 +0x00001650: 0xD0013E3E vabs.s S721,S721 +0x00001654: 0xD0013F3F vabs.s S731,S731 +0x00001658: 0xD0014040 vabs.s S002,S002 +0x0000165C: 0xD0014141 vabs.s S012,S012 +0x00001660: 0xD0014242 vabs.s S022,S022 +0x00001664: 0xD0014343 vabs.s S032,S032 +0x00001668: 0xD0014444 vabs.s S102,S102 +0x0000166C: 0xD0014545 vabs.s S112,S112 +0x00001670: 0xD0014646 vabs.s S122,S122 +0x00001674: 0xD0014747 vabs.s S132,S132 +0x00001678: 0xD0014848 vabs.s S202,S202 +0x0000167C: 0xD0014949 vabs.s S212,S212 +0x00001680: 0xD0014A4A vabs.s S222,S222 +0x00001684: 0xD0014B4B vabs.s S232,S232 +0x00001688: 0xD0014C4C vabs.s S302,S302 +0x0000168C: 0xD0014D4D vabs.s S312,S312 +0x00001690: 0xD0014E4E vabs.s S322,S322 +0x00001694: 0xD0014F4F vabs.s S332,S332 +0x00001698: 0xD0015050 vabs.s S402,S402 +0x0000169C: 0xD0015151 vabs.s S412,S412 +0x000016A0: 0xD0015252 vabs.s S422,S422 +0x000016A4: 0xD0015353 vabs.s S432,S432 +0x000016A8: 0xD0015454 vabs.s S502,S502 +0x000016AC: 0xD0015555 vabs.s S512,S512 +0x000016B0: 0xD0015656 vabs.s S522,S522 +0x000016B4: 0xD0015757 vabs.s S532,S532 +0x000016B8: 0xD0015858 vabs.s S602,S602 +0x000016BC: 0xD0015959 vabs.s S612,S612 +0x000016C0: 0xD0015A5A vabs.s S622,S622 +0x000016C4: 0xD0015B5B vabs.s S632,S632 +0x000016C8: 0xD0015C5C vabs.s S702,S702 +0x000016CC: 0xD0015D5D vabs.s S712,S712 +0x000016D0: 0xD0015E5E vabs.s S722,S722 +0x000016D4: 0xD0015F5F vabs.s S732,S732 +0x000016D8: 0xD0016060 vabs.s S003,S003 +0x000016DC: 0xD0016161 vabs.s S013,S013 +0x000016E0: 0xD0016262 vabs.s S023,S023 +0x000016E4: 0xD0016363 vabs.s S033,S033 +0x000016E8: 0xD0016464 vabs.s S103,S103 +0x000016EC: 0xD0016565 vabs.s S113,S113 +0x000016F0: 0xD0016666 vabs.s S123,S123 +0x000016F4: 0xD0016767 vabs.s S133,S133 +0x000016F8: 0xD0016868 vabs.s S203,S203 +0x000016FC: 0xD0016969 vabs.s S213,S213 +0x00001700: 0xD0016A6A vabs.s S223,S223 +0x00001704: 0xD0016B6B vabs.s S233,S233 +0x00001708: 0xD0016C6C vabs.s S303,S303 +0x0000170C: 0xD0016D6D vabs.s S313,S313 +0x00001710: 0xD0016E6E vabs.s S323,S323 +0x00001714: 0xD0016F6F vabs.s S333,S333 +0x00001718: 0xD0017070 vabs.s S403,S403 +0x0000171C: 0xD0017171 vabs.s S413,S413 +0x00001720: 0xD0017272 vabs.s S423,S423 +0x00001724: 0xD0017373 vabs.s S433,S433 +0x00001728: 0xD0017474 vabs.s S503,S503 +0x0000172C: 0xD0017575 vabs.s S513,S513 +0x00001730: 0xD0017676 vabs.s S523,S523 +0x00001734: 0xD0017777 vabs.s S533,S533 +0x00001738: 0xD0017878 vabs.s S603,S603 +0x0000173C: 0xD0017979 vabs.s S613,S613 +0x00001740: 0xD0017A7A vabs.s S623,S623 +0x00001744: 0xD0017B7B vabs.s S633,S633 +0x00001748: 0xD0017C7C vabs.s S703,S703 +0x0000174C: 0xD0017D7D vabs.s S713,S713 +0x00001750: 0xD0017E7E vabs.s S723,S723 +0x00001754: 0xD0017F7F vabs.s S733,S733 +0x00001758: 0xD0010080 vabs.p C000,C000 +0x0000175C: 0xD0010181 vabs.p C010,C010 +0x00001760: 0xD0010282 vabs.p C020,C020 +0x00001764: 0xD0010383 vabs.p C030,C030 +0x00001768: 0xD0010484 vabs.p C100,C100 +0x0000176C: 0xD0010585 vabs.p C110,C110 +0x00001770: 0xD0010686 vabs.p C120,C120 +0x00001774: 0xD0010787 vabs.p C130,C130 +0x00001778: 0xD0010888 vabs.p C200,C200 +0x0000177C: 0xD0010989 vabs.p C210,C210 +0x00001780: 0xD0010A8A vabs.p C220,C220 +0x00001784: 0xD0010B8B vabs.p C230,C230 +0x00001788: 0xD0010C8C vabs.p C300,C300 +0x0000178C: 0xD0010D8D vabs.p C310,C310 +0x00001790: 0xD0010E8E vabs.p C320,C320 +0x00001794: 0xD0010F8F vabs.p C330,C330 +0x00001798: 0xD0011090 vabs.p C400,C400 +0x0000179C: 0xD0011191 vabs.p C410,C410 +0x000017A0: 0xD0011292 vabs.p C420,C420 +0x000017A4: 0xD0011393 vabs.p C430,C430 +0x000017A8: 0xD0011494 vabs.p C500,C500 +0x000017AC: 0xD0011595 vabs.p C510,C510 +0x000017B0: 0xD0011696 vabs.p C520,C520 +0x000017B4: 0xD0011797 vabs.p C530,C530 +0x000017B8: 0xD0011898 vabs.p C600,C600 +0x000017BC: 0xD0011999 vabs.p C610,C610 +0x000017C0: 0xD0011A9A vabs.p C620,C620 +0x000017C4: 0xD0011B9B vabs.p C630,C630 +0x000017C8: 0xD0011C9C vabs.p C700,C700 +0x000017CC: 0xD0011D9D vabs.p C710,C710 +0x000017D0: 0xD0011E9E vabs.p C720,C720 +0x000017D4: 0xD0011F9F vabs.p C730,C730 +0x000017D8: 0xD00120A0 vabs.p R000,R000 +0x000017DC: 0xD00121A1 vabs.p R001,R001 +0x000017E0: 0xD00122A2 vabs.p R002,R002 +0x000017E4: 0xD00123A3 vabs.p R003,R003 +0x000017E8: 0xD00124A4 vabs.p R100,R100 +0x000017EC: 0xD00125A5 vabs.p R101,R101 +0x000017F0: 0xD00126A6 vabs.p R102,R102 +0x000017F4: 0xD00127A7 vabs.p R103,R103 +0x000017F8: 0xD00128A8 vabs.p R200,R200 +0x000017FC: 0xD00129A9 vabs.p R201,R201 +0x00001800: 0xD0012AAA vabs.p R202,R202 +0x00001804: 0xD0012BAB vabs.p R203,R203 +0x00001808: 0xD0012CAC vabs.p R300,R300 +0x0000180C: 0xD0012DAD vabs.p R301,R301 +0x00001810: 0xD0012EAE vabs.p R302,R302 +0x00001814: 0xD0012FAF vabs.p R303,R303 +0x00001818: 0xD00130B0 vabs.p R400,R400 +0x0000181C: 0xD00131B1 vabs.p R401,R401 +0x00001820: 0xD00132B2 vabs.p R402,R402 +0x00001824: 0xD00133B3 vabs.p R403,R403 +0x00001828: 0xD00134B4 vabs.p R500,R500 +0x0000182C: 0xD00135B5 vabs.p R501,R501 +0x00001830: 0xD00136B6 vabs.p R502,R502 +0x00001834: 0xD00137B7 vabs.p R503,R503 +0x00001838: 0xD00138B8 vabs.p R600,R600 +0x0000183C: 0xD00139B9 vabs.p R601,R601 +0x00001840: 0xD0013ABA vabs.p R602,R602 +0x00001844: 0xD0013BBB vabs.p R603,R603 +0x00001848: 0xD0013CBC vabs.p R700,R700 +0x0000184C: 0xD0013DBD vabs.p R701,R701 +0x00001850: 0xD0013EBE vabs.p R702,R702 +0x00001854: 0xD0013FBF vabs.p R703,R703 +0x00001858: 0xD00140C0 vabs.p C002,C002 +0x0000185C: 0xD00141C1 vabs.p C012,C012 +0x00001860: 0xD00142C2 vabs.p C022,C022 +0x00001864: 0xD00143C3 vabs.p C032,C032 +0x00001868: 0xD00144C4 vabs.p C102,C102 +0x0000186C: 0xD00145C5 vabs.p C112,C112 +0x00001870: 0xD00146C6 vabs.p C122,C122 +0x00001874: 0xD00147C7 vabs.p C132,C132 +0x00001878: 0xD00148C8 vabs.p C202,C202 +0x0000187C: 0xD00149C9 vabs.p C212,C212 +0x00001880: 0xD0014ACA vabs.p C222,C222 +0x00001884: 0xD0014BCB vabs.p C232,C232 +0x00001888: 0xD0014CCC vabs.p C302,C302 +0x0000188C: 0xD0014DCD vabs.p C312,C312 +0x00001890: 0xD0014ECE vabs.p C322,C322 +0x00001894: 0xD0014FCF vabs.p C332,C332 +0x00001898: 0xD00150D0 vabs.p C402,C402 +0x0000189C: 0xD00151D1 vabs.p C412,C412 +0x000018A0: 0xD00152D2 vabs.p C422,C422 +0x000018A4: 0xD00153D3 vabs.p C432,C432 +0x000018A8: 0xD00154D4 vabs.p C502,C502 +0x000018AC: 0xD00155D5 vabs.p C512,C512 +0x000018B0: 0xD00156D6 vabs.p C522,C522 +0x000018B4: 0xD00157D7 vabs.p C532,C532 +0x000018B8: 0xD00158D8 vabs.p C602,C602 +0x000018BC: 0xD00159D9 vabs.p C612,C612 +0x000018C0: 0xD0015ADA vabs.p C622,C622 +0x000018C4: 0xD0015BDB vabs.p C632,C632 +0x000018C8: 0xD0015CDC vabs.p C702,C702 +0x000018CC: 0xD0015DDD vabs.p C712,C712 +0x000018D0: 0xD0015EDE vabs.p C722,C722 +0x000018D4: 0xD0015FDF vabs.p C732,C732 +0x000018D8: 0xD00160E0 vabs.p R020,R020 +0x000018DC: 0xD00161E1 vabs.p R021,R021 +0x000018E0: 0xD00162E2 vabs.p R022,R022 +0x000018E4: 0xD00163E3 vabs.p R023,R023 +0x000018E8: 0xD00164E4 vabs.p R120,R120 +0x000018EC: 0xD00165E5 vabs.p R121,R121 +0x000018F0: 0xD00166E6 vabs.p R122,R122 +0x000018F4: 0xD00167E7 vabs.p R123,R123 +0x000018F8: 0xD00168E8 vabs.p R220,R220 +0x000018FC: 0xD00169E9 vabs.p R221,R221 +0x00001900: 0xD0016AEA vabs.p R222,R222 +0x00001904: 0xD0016BEB vabs.p R223,R223 +0x00001908: 0xD0016CEC vabs.p R320,R320 +0x0000190C: 0xD0016DED vabs.p R321,R321 +0x00001910: 0xD0016EEE vabs.p R322,R322 +0x00001914: 0xD0016FEF vabs.p R323,R323 +0x00001918: 0xD00170F0 vabs.p R420,R420 +0x0000191C: 0xD00171F1 vabs.p R421,R421 +0x00001920: 0xD00172F2 vabs.p R422,R422 +0x00001924: 0xD00173F3 vabs.p R423,R423 +0x00001928: 0xD00174F4 vabs.p R520,R520 +0x0000192C: 0xD00175F5 vabs.p R521,R521 +0x00001930: 0xD00176F6 vabs.p R522,R522 +0x00001934: 0xD00177F7 vabs.p R523,R523 +0x00001938: 0xD00178F8 vabs.p R620,R620 +0x0000193C: 0xD00179F9 vabs.p R621,R621 +0x00001940: 0xD0017AFA vabs.p R622,R622 +0x00001944: 0xD0017BFB vabs.p R623,R623 +0x00001948: 0xD0017CFC vabs.p R720,R720 +0x0000194C: 0xD0017DFD vabs.p R721,R721 +0x00001950: 0xD0017EFE vabs.p R722,R722 +0x00001954: 0xD0017FFF vabs.p R723,R723 +0x00001958: 0xD0018000 vabs.t C000,C000 +0x0000195C: 0xD0018101 vabs.t C010,C010 +0x00001960: 0xD0018202 vabs.t C020,C020 +0x00001964: 0xD0018303 vabs.t C030,C030 +0x00001968: 0xD0018404 vabs.t C100,C100 +0x0000196C: 0xD0018505 vabs.t C110,C110 +0x00001970: 0xD0018606 vabs.t C120,C120 +0x00001974: 0xD0018707 vabs.t C130,C130 +0x00001978: 0xD0018808 vabs.t C200,C200 +0x0000197C: 0xD0018909 vabs.t C210,C210 +0x00001980: 0xD0018A0A vabs.t C220,C220 +0x00001984: 0xD0018B0B vabs.t C230,C230 +0x00001988: 0xD0018C0C vabs.t C300,C300 +0x0000198C: 0xD0018D0D vabs.t C310,C310 +0x00001990: 0xD0018E0E vabs.t C320,C320 +0x00001994: 0xD0018F0F vabs.t C330,C330 +0x00001998: 0xD0019010 vabs.t C400,C400 +0x0000199C: 0xD0019111 vabs.t C410,C410 +0x000019A0: 0xD0019212 vabs.t C420,C420 +0x000019A4: 0xD0019313 vabs.t C430,C430 +0x000019A8: 0xD0019414 vabs.t C500,C500 +0x000019AC: 0xD0019515 vabs.t C510,C510 +0x000019B0: 0xD0019616 vabs.t C520,C520 +0x000019B4: 0xD0019717 vabs.t C530,C530 +0x000019B8: 0xD0019818 vabs.t C600,C600 +0x000019BC: 0xD0019919 vabs.t C610,C610 +0x000019C0: 0xD0019A1A vabs.t C620,C620 +0x000019C4: 0xD0019B1B vabs.t C630,C630 +0x000019C8: 0xD0019C1C vabs.t C700,C700 +0x000019CC: 0xD0019D1D vabs.t C710,C710 +0x000019D0: 0xD0019E1E vabs.t C720,C720 +0x000019D4: 0xD0019F1F vabs.t C730,C730 +0x000019D8: 0xD001A020 vabs.t R000,R000 +0x000019DC: 0xD001A121 vabs.t R001,R001 +0x000019E0: 0xD001A222 vabs.t R002,R002 +0x000019E4: 0xD001A323 vabs.t R003,R003 +0x000019E8: 0xD001A424 vabs.t R100,R100 +0x000019EC: 0xD001A525 vabs.t R101,R101 +0x000019F0: 0xD001A626 vabs.t R102,R102 +0x000019F4: 0xD001A727 vabs.t R103,R103 +0x000019F8: 0xD001A828 vabs.t R200,R200 +0x000019FC: 0xD001A929 vabs.t R201,R201 +0x00001A00: 0xD001AA2A vabs.t R202,R202 +0x00001A04: 0xD001AB2B vabs.t R203,R203 +0x00001A08: 0xD001AC2C vabs.t R300,R300 +0x00001A0C: 0xD001AD2D vabs.t R301,R301 +0x00001A10: 0xD001AE2E vabs.t R302,R302 +0x00001A14: 0xD001AF2F vabs.t R303,R303 +0x00001A18: 0xD001B030 vabs.t R400,R400 +0x00001A1C: 0xD001B131 vabs.t R401,R401 +0x00001A20: 0xD001B232 vabs.t R402,R402 +0x00001A24: 0xD001B333 vabs.t R403,R403 +0x00001A28: 0xD001B434 vabs.t R500,R500 +0x00001A2C: 0xD001B535 vabs.t R501,R501 +0x00001A30: 0xD001B636 vabs.t R502,R502 +0x00001A34: 0xD001B737 vabs.t R503,R503 +0x00001A38: 0xD001B838 vabs.t R600,R600 +0x00001A3C: 0xD001B939 vabs.t R601,R601 +0x00001A40: 0xD001BA3A vabs.t R602,R602 +0x00001A44: 0xD001BB3B vabs.t R603,R603 +0x00001A48: 0xD001BC3C vabs.t R700,R700 +0x00001A4C: 0xD001BD3D vabs.t R701,R701 +0x00001A50: 0xD001BE3E vabs.t R702,R702 +0x00001A54: 0xD001BF3F vabs.t R703,R703 +0x00001A58: 0xD001C040 vabs.t C001,C001 +0x00001A5C: 0xD001C141 vabs.t C011,C011 +0x00001A60: 0xD001C242 vabs.t C021,C021 +0x00001A64: 0xD001C343 vabs.t C031,C031 +0x00001A68: 0xD001C444 vabs.t C101,C101 +0x00001A6C: 0xD001C545 vabs.t C111,C111 +0x00001A70: 0xD001C646 vabs.t C121,C121 +0x00001A74: 0xD001C747 vabs.t C131,C131 +0x00001A78: 0xD001C848 vabs.t C201,C201 +0x00001A7C: 0xD001C949 vabs.t C211,C211 +0x00001A80: 0xD001CA4A vabs.t C221,C221 +0x00001A84: 0xD001CB4B vabs.t C231,C231 +0x00001A88: 0xD001CC4C vabs.t C301,C301 +0x00001A8C: 0xD001CD4D vabs.t C311,C311 +0x00001A90: 0xD001CE4E vabs.t C321,C321 +0x00001A94: 0xD001CF4F vabs.t C331,C331 +0x00001A98: 0xD001D050 vabs.t C401,C401 +0x00001A9C: 0xD001D151 vabs.t C411,C411 +0x00001AA0: 0xD001D252 vabs.t C421,C421 +0x00001AA4: 0xD001D353 vabs.t C431,C431 +0x00001AA8: 0xD001D454 vabs.t C501,C501 +0x00001AAC: 0xD001D555 vabs.t C511,C511 +0x00001AB0: 0xD001D656 vabs.t C521,C521 +0x00001AB4: 0xD001D757 vabs.t C531,C531 +0x00001AB8: 0xD001D858 vabs.t C601,C601 +0x00001ABC: 0xD001D959 vabs.t C611,C611 +0x00001AC0: 0xD001DA5A vabs.t C621,C621 +0x00001AC4: 0xD001DB5B vabs.t C631,C631 +0x00001AC8: 0xD001DC5C vabs.t C701,C701 +0x00001ACC: 0xD001DD5D vabs.t C711,C711 +0x00001AD0: 0xD001DE5E vabs.t C721,C721 +0x00001AD4: 0xD001DF5F vabs.t C731,C731 +0x00001AD8: 0xD001E060 vabs.t R010,R010 +0x00001ADC: 0xD001E161 vabs.t R011,R011 +0x00001AE0: 0xD001E262 vabs.t R012,R012 +0x00001AE4: 0xD001E363 vabs.t R013,R013 +0x00001AE8: 0xD001E464 vabs.t R110,R110 +0x00001AEC: 0xD001E565 vabs.t R111,R111 +0x00001AF0: 0xD001E666 vabs.t R112,R112 +0x00001AF4: 0xD001E767 vabs.t R113,R113 +0x00001AF8: 0xD001E868 vabs.t R210,R210 +0x00001AFC: 0xD001E969 vabs.t R211,R211 +0x00001B00: 0xD001EA6A vabs.t R212,R212 +0x00001B04: 0xD001EB6B vabs.t R213,R213 +0x00001B08: 0xD001EC6C vabs.t R310,R310 +0x00001B0C: 0xD001ED6D vabs.t R311,R311 +0x00001B10: 0xD001EE6E vabs.t R312,R312 +0x00001B14: 0xD001EF6F vabs.t R313,R313 +0x00001B18: 0xD001F070 vabs.t R410,R410 +0x00001B1C: 0xD001F171 vabs.t R411,R411 +0x00001B20: 0xD001F272 vabs.t R412,R412 +0x00001B24: 0xD001F373 vabs.t R413,R413 +0x00001B28: 0xD001F474 vabs.t R510,R510 +0x00001B2C: 0xD001F575 vabs.t R511,R511 +0x00001B30: 0xD001F676 vabs.t R512,R512 +0x00001B34: 0xD001F777 vabs.t R513,R513 +0x00001B38: 0xD001F878 vabs.t R610,R610 +0x00001B3C: 0xD001F979 vabs.t R611,R611 +0x00001B40: 0xD001FA7A vabs.t R612,R612 +0x00001B44: 0xD001FB7B vabs.t R613,R613 +0x00001B48: 0xD001FC7C vabs.t R710,R710 +0x00001B4C: 0xD001FD7D vabs.t R711,R711 +0x00001B50: 0xD001FE7E vabs.t R712,R712 +0x00001B54: 0xD001FF7F vabs.t R713,R713 +0x00001B58: 0xD0018080 vabs.q C000,C000 +0x00001B5C: 0xD0018181 vabs.q C010,C010 +0x00001B60: 0xD0018282 vabs.q C020,C020 +0x00001B64: 0xD0018383 vabs.q C030,C030 +0x00001B68: 0xD0018484 vabs.q C100,C100 +0x00001B6C: 0xD0018585 vabs.q C110,C110 +0x00001B70: 0xD0018686 vabs.q C120,C120 +0x00001B74: 0xD0018787 vabs.q C130,C130 +0x00001B78: 0xD0018888 vabs.q C200,C200 +0x00001B7C: 0xD0018989 vabs.q C210,C210 +0x00001B80: 0xD0018A8A vabs.q C220,C220 +0x00001B84: 0xD0018B8B vabs.q C230,C230 +0x00001B88: 0xD0018C8C vabs.q C300,C300 +0x00001B8C: 0xD0018D8D vabs.q C310,C310 +0x00001B90: 0xD0018E8E vabs.q C320,C320 +0x00001B94: 0xD0018F8F vabs.q C330,C330 +0x00001B98: 0xD0019090 vabs.q C400,C400 +0x00001B9C: 0xD0019191 vabs.q C410,C410 +0x00001BA0: 0xD0019292 vabs.q C420,C420 +0x00001BA4: 0xD0019393 vabs.q C430,C430 +0x00001BA8: 0xD0019494 vabs.q C500,C500 +0x00001BAC: 0xD0019595 vabs.q C510,C510 +0x00001BB0: 0xD0019696 vabs.q C520,C520 +0x00001BB4: 0xD0019797 vabs.q C530,C530 +0x00001BB8: 0xD0019898 vabs.q C600,C600 +0x00001BBC: 0xD0019999 vabs.q C610,C610 +0x00001BC0: 0xD0019A9A vabs.q C620,C620 +0x00001BC4: 0xD0019B9B vabs.q C630,C630 +0x00001BC8: 0xD0019C9C vabs.q C700,C700 +0x00001BCC: 0xD0019D9D vabs.q C710,C710 +0x00001BD0: 0xD0019E9E vabs.q C720,C720 +0x00001BD4: 0xD0019F9F vabs.q C730,C730 +0x00001BD8: 0xD001A0A0 vabs.q R000,R000 +0x00001BDC: 0xD001A1A1 vabs.q R001,R001 +0x00001BE0: 0xD001A2A2 vabs.q R002,R002 +0x00001BE4: 0xD001A3A3 vabs.q R003,R003 +0x00001BE8: 0xD001A4A4 vabs.q R100,R100 +0x00001BEC: 0xD001A5A5 vabs.q R101,R101 +0x00001BF0: 0xD001A6A6 vabs.q R102,R102 +0x00001BF4: 0xD001A7A7 vabs.q R103,R103 +0x00001BF8: 0xD001A8A8 vabs.q R200,R200 +0x00001BFC: 0xD001A9A9 vabs.q R201,R201 +0x00001C00: 0xD001AAAA vabs.q R202,R202 +0x00001C04: 0xD001ABAB vabs.q R203,R203 +0x00001C08: 0xD001ACAC vabs.q R300,R300 +0x00001C0C: 0xD001ADAD vabs.q R301,R301 +0x00001C10: 0xD001AEAE vabs.q R302,R302 +0x00001C14: 0xD001AFAF vabs.q R303,R303 +0x00001C18: 0xD001B0B0 vabs.q R400,R400 +0x00001C1C: 0xD001B1B1 vabs.q R401,R401 +0x00001C20: 0xD001B2B2 vabs.q R402,R402 +0x00001C24: 0xD001B3B3 vabs.q R403,R403 +0x00001C28: 0xD001B4B4 vabs.q R500,R500 +0x00001C2C: 0xD001B5B5 vabs.q R501,R501 +0x00001C30: 0xD001B6B6 vabs.q R502,R502 +0x00001C34: 0xD001B7B7 vabs.q R503,R503 +0x00001C38: 0xD001B8B8 vabs.q R600,R600 +0x00001C3C: 0xD001B9B9 vabs.q R601,R601 +0x00001C40: 0xD001BABA vabs.q R602,R602 +0x00001C44: 0xD001BBBB vabs.q R603,R603 +0x00001C48: 0xD001BCBC vabs.q R700,R700 +0x00001C4C: 0xD001BDBD vabs.q R701,R701 +0x00001C50: 0xD001BEBE vabs.q R702,R702 +0x00001C54: 0xD001BFBF vabs.q R703,R703 +0x00001C58: 0xD001C0C0 vabs.q C002,C002 +0x00001C5C: 0xD001C1C1 vabs.q C012,C012 +0x00001C60: 0xD001C2C2 vabs.q C022,C022 +0x00001C64: 0xD001C3C3 vabs.q C032,C032 +0x00001C68: 0xD001C4C4 vabs.q C102,C102 +0x00001C6C: 0xD001C5C5 vabs.q C112,C112 +0x00001C70: 0xD001C6C6 vabs.q C122,C122 +0x00001C74: 0xD001C7C7 vabs.q C132,C132 +0x00001C78: 0xD001C8C8 vabs.q C202,C202 +0x00001C7C: 0xD001C9C9 vabs.q C212,C212 +0x00001C80: 0xD001CACA vabs.q C222,C222 +0x00001C84: 0xD001CBCB vabs.q C232,C232 +0x00001C88: 0xD001CCCC vabs.q C302,C302 +0x00001C8C: 0xD001CDCD vabs.q C312,C312 +0x00001C90: 0xD001CECE vabs.q C322,C322 +0x00001C94: 0xD001CFCF vabs.q C332,C332 +0x00001C98: 0xD001D0D0 vabs.q C402,C402 +0x00001C9C: 0xD001D1D1 vabs.q C412,C412 +0x00001CA0: 0xD001D2D2 vabs.q C422,C422 +0x00001CA4: 0xD001D3D3 vabs.q C432,C432 +0x00001CA8: 0xD001D4D4 vabs.q C502,C502 +0x00001CAC: 0xD001D5D5 vabs.q C512,C512 +0x00001CB0: 0xD001D6D6 vabs.q C522,C522 +0x00001CB4: 0xD001D7D7 vabs.q C532,C532 +0x00001CB8: 0xD001D8D8 vabs.q C602,C602 +0x00001CBC: 0xD001D9D9 vabs.q C612,C612 +0x00001CC0: 0xD001DADA vabs.q C622,C622 +0x00001CC4: 0xD001DBDB vabs.q C632,C632 +0x00001CC8: 0xD001DCDC vabs.q C702,C702 +0x00001CCC: 0xD001DDDD vabs.q C712,C712 +0x00001CD0: 0xD001DEDE vabs.q C722,C722 +0x00001CD4: 0xD001DFDF vabs.q C732,C732 +0x00001CD8: 0xD001E0E0 vabs.q R020,R020 +0x00001CDC: 0xD001E1E1 vabs.q R021,R021 +0x00001CE0: 0xD001E2E2 vabs.q R022,R022 +0x00001CE4: 0xD001E3E3 vabs.q R023,R023 +0x00001CE8: 0xD001E4E4 vabs.q R120,R120 +0x00001CEC: 0xD001E5E5 vabs.q R121,R121 +0x00001CF0: 0xD001E6E6 vabs.q R122,R122 +0x00001CF4: 0xD001E7E7 vabs.q R123,R123 +0x00001CF8: 0xD001E8E8 vabs.q R220,R220 +0x00001CFC: 0xD001E9E9 vabs.q R221,R221 +0x00001D00: 0xD001EAEA vabs.q R222,R222 +0x00001D04: 0xD001EBEB vabs.q R223,R223 +0x00001D08: 0xD001ECEC vabs.q R320,R320 +0x00001D0C: 0xD001EDED vabs.q R321,R321 +0x00001D10: 0xD001EEEE vabs.q R322,R322 +0x00001D14: 0xD001EFEF vabs.q R323,R323 +0x00001D18: 0xD001F0F0 vabs.q R420,R420 +0x00001D1C: 0xD001F1F1 vabs.q R421,R421 +0x00001D20: 0xD001F2F2 vabs.q R422,R422 +0x00001D24: 0xD001F3F3 vabs.q R423,R423 +0x00001D28: 0xD001F4F4 vabs.q R520,R520 +0x00001D2C: 0xD001F5F5 vabs.q R521,R521 +0x00001D30: 0xD001F6F6 vabs.q R522,R522 +0x00001D34: 0xD001F7F7 vabs.q R523,R523 +0x00001D38: 0xD001F8F8 vabs.q R620,R620 +0x00001D3C: 0xD001F9F9 vabs.q R621,R621 +0x00001D40: 0xD001FAFA vabs.q R622,R622 +0x00001D44: 0xD001FBFB vabs.q R623,R623 +0x00001D48: 0xD001FCFC vabs.q R720,R720 +0x00001D4C: 0xD001FDFD vabs.q R721,R721 +0x00001D50: 0xD001FEFE vabs.q R722,R722 +0x00001D54: 0xD001FFFF vabs.q R723,R723 +0x00001D58: 0x60001040 vadd.s S002,S400,S000 +0x00001D5C: 0x600010C0 vadd.p C002,C400,C000 +0x00001D60: 0x60009040 vadd.t C001,C400,C000 04 (00001D5C) REG +0x00001D64: 0x600090C0 vadd.q C002,C400,C000 04 (00001D60) REG +0x00001D68: 0x60801040 vsub.s S002,S400,S000 04 (00001D64) REG +0x00001D6C: 0x608010C0 vsub.p C002,C400,C000 +0x00001D70: 0x60809040 vsub.t C001,C400,C000 04 (00001D6C) REG +0x00001D74: 0x608090C0 vsub.q C002,C400,C000 04 (00001D70) REG +0x00001D78: 0x61001040 vsbn.s S002,S400,S000 04 (00001D74) REG +0x00001D7C: 0x63801040 vdiv.s S002,S400,S000 +0x00001D80: 0x63801084 vdiv.p C100,C400,C000 13 (00001D7C) PITCH +0x00001D84: 0x63809004 vdiv.t C100,C400,C000 27 (00001D80) PITCH +0x00001D88: 0x63809084 vdiv.q C100,C400,C000 41 (00001D84) PITCH +0x00001D8C: 0x64001040 vmul.s S002,S400,S000 55 (00001D88) PITCH +0x00001D90: 0x640010C0 vmul.p C002,C400,C000 +0x00001D94: 0x64009040 vmul.t C001,C400,C000 04 (00001D90) REG +0x00001D98: 0x640090C0 vmul.q C002,C400,C000 04 (00001D94) REG +0x00001D9C: 0x648010C0 vdot.p S002,C400,C000 04 (00001D98) REG +0x00001DA0: 0x64809040 vdot.t S002,C400,C000 06 (00001D9C) REG +0x00001DA4: 0x648090C0 vdot.q S002,C400,C000 06 (00001DA0) REG +0x00001DA8: 0x650010C0 vscl.p C002,C400,S000 +0x00001DAC: 0x65009040 vscl.t C001,C400,S000 +0x00001DB0: 0x650090C0 vscl.q C002,C400,S000 +0x00001DB4: 0x660010C0 vhdp.p S002,C400,C000 04 (00001DB0) REG +0x00001DB8: 0x66009040 vhdp.t S002,C400,C000 06 (00001DB4) REG +0x00001DBC: 0x660090C0 vhdp.q S002,C400,C000 06 (00001DB8) REG +0x00001DC0: 0x66809040 vcrs.t C001,C400,C000 06 (00001DBC) REG +0x00001DC4: 0x670010C0 vdet.p S002,C400,C000 04 (00001DC0) REG +0x00001DC8: 0x6C401001 vcmp.s eq,S400,S002 06 (00001DC4) REG +0x00001DCC: 0x6C401081 vcmp.p eq,C400,C002 +0x00001DD0: 0x6C409001 vcmp.t eq,C400,C001 +0x00001DD4: 0x6C409081 vcmp.q eq,C400,C002 +0x00001DD8: 0x6D401001 vmin.s S010,S400,S002 +0x00001DDC: 0x6D401081 vmin.p C010,C400,C002 +0x00001DE0: 0x6D409001 vmin.t C010,C400,C001 +0x00001DE4: 0x6D409081 vmin.q C010,C400,C002 +0x00001DE8: 0x6DC01001 vmax.s S010,S400,S002 +0x00001DEC: 0x6DC01081 vmax.p C010,C400,C002 +0x00001DF0: 0x6DC09001 vmax.t C010,C400,C001 +0x00001DF4: 0x6DC09081 vmax.q C010,C400,C002 +0x00001DF8: 0x6EC01001 vscmp.s S010,S400,S002 +0x00001DFC: 0x6EC01081 vscmp.p C010,C400,C002 +0x00001E00: 0x6EC09001 vscmp.t C010,C400,C001 +0x00001E04: 0x6EC09081 vscmp.q C010,C400,C002 +0x00001E08: 0x6F401001 vsge.s S010,S400,S002 +0x00001E0C: 0x6F401081 vsge.p C010,C400,C002 +0x00001E10: 0x6F409001 vsge.t C010,C400,C001 +0x00001E14: 0x6F409081 vsge.q C010,C400,C002 +0x00001E18: 0x6FC01001 vslt.s S010,S400,S002 +0x00001E1C: 0x6FC01081 vslt.p C010,C400,C002 +0x00001E20: 0x6FC09001 vslt.t C010,C400,C001 +0x00001E24: 0x6FC09081 vslt.q C010,C400,C002 +0x00001E28: 0x6C400800 vcmp.s fl +0x00001E2C: 0x6C400880 vcmp.p fl +0x00001E30: 0x6C408800 vcmp.t fl +0x00001E34: 0x6C408880 vcmp.q fl +0x00001E38: 0x6C400801 vcmp.s eq,S200,S002 +0x00001E3C: 0x6C400881 vcmp.p eq,C200,C002 +0x00001E40: 0x6C408801 vcmp.t eq,C200,C001 +0x00001E44: 0x6C408881 vcmp.q eq,C200,C002 +0x00001E48: 0x6C400802 vcmp.s lt,S200,S002 +0x00001E4C: 0x6C400882 vcmp.p lt,C200,C002 +0x00001E50: 0x6C408802 vcmp.t lt,C200,C001 +0x00001E54: 0x6C408882 vcmp.q lt,C200,C002 +0x00001E58: 0x6C400803 vcmp.s le,S200,S002 +0x00001E5C: 0x6C400883 vcmp.p le,C200,C002 +0x00001E60: 0x6C408803 vcmp.t le,C200,C001 +0x00001E64: 0x6C408883 vcmp.q le,C200,C002 +0x00001E68: 0x6C400804 vcmp.s tr +0x00001E6C: 0x6C400884 vcmp.p tr +0x00001E70: 0x6C408804 vcmp.t tr +0x00001E74: 0x6C408884 vcmp.q tr +0x00001E78: 0x6C400805 vcmp.s ne,S200,S002 +0x00001E7C: 0x6C400885 vcmp.p ne,C200,C002 +0x00001E80: 0x6C408805 vcmp.t ne,C200,C001 +0x00001E84: 0x6C408885 vcmp.q ne,C200,C002 +0x00001E88: 0x6C400806 vcmp.s ge,S200,S002 +0x00001E8C: 0x6C400886 vcmp.p ge,C200,C002 +0x00001E90: 0x6C408806 vcmp.t ge,C200,C001 +0x00001E94: 0x6C408886 vcmp.q ge,C200,C002 +0x00001E98: 0x6C400807 vcmp.s gt,S200,S002 +0x00001E9C: 0x6C400887 vcmp.p gt,C200,C002 +0x00001EA0: 0x6C408807 vcmp.t gt,C200,C001 +0x00001EA4: 0x6C408887 vcmp.q gt,C200,C002 +0x00001EA8: 0x6C400808 vcmp.s ez,S200 +0x00001EAC: 0x6C400888 vcmp.p ez,C200 +0x00001EB0: 0x6C408808 vcmp.t ez,C200 +0x00001EB4: 0x6C408888 vcmp.q ez,C200 +0x00001EB8: 0x6C400809 vcmp.s en,S200 +0x00001EBC: 0x6C400889 vcmp.p en,C200 +0x00001EC0: 0x6C408809 vcmp.t en,C200 +0x00001EC4: 0x6C408889 vcmp.q en,C200 +0x00001EC8: 0x6C40080A vcmp.s ei,S200 +0x00001ECC: 0x6C40088A vcmp.p ei,C200 +0x00001ED0: 0x6C40880A vcmp.t ei,C200 +0x00001ED4: 0x6C40888A vcmp.q ei,C200 +0x00001ED8: 0x6C40080B vcmp.s es,S200 +0x00001EDC: 0x6C40088B vcmp.p es,C200 +0x00001EE0: 0x6C40880B vcmp.t es,C200 +0x00001EE4: 0x6C40888B vcmp.q es,C200 +0x00001EE8: 0x6C40080C vcmp.s nz,S200 +0x00001EEC: 0x6C40088C vcmp.p nz,C200 +0x00001EF0: 0x6C40880C vcmp.t nz,C200 +0x00001EF4: 0x6C40888C vcmp.q nz,C200 +0x00001EF8: 0x6C40080D vcmp.s nn,S200 +0x00001EFC: 0x6C40088D vcmp.p nn,C200 +0x00001F00: 0x6C40880D vcmp.t nn,C200 +0x00001F04: 0x6C40888D vcmp.q nn,C200 +0x00001F08: 0x6C40080E vcmp.s ni,S200 +0x00001F0C: 0x6C40088E vcmp.p ni,C200 +0x00001F10: 0x6C40880E vcmp.t ni,C200 +0x00001F14: 0x6C40888E vcmp.q ni,C200 +0x00001F18: 0x6C40080F vcmp.s ns,S200 +0x00001F1C: 0x6C40088F vcmp.p ns,C200 +0x00001F20: 0x6C40880F vcmp.t ns,C200 +0x00001F24: 0x6C40888F vcmp.q ns,C200 +0x00001F28: 0x6C000000 vcmp.s fl +0x00001F2C: 0x6C000080 vcmp.p fl +0x00001F30: 0x6C008000 vcmp.t fl +0x00001F34: 0x6C008080 vcmp.q fl +0x00001F38: 0x6C000001 vcmp.s eq,S000,S000 +0x00001F3C: 0x6C000081 vcmp.p eq,C000,C000 +0x00001F40: 0x6C008001 vcmp.t eq,C000,C000 +0x00001F44: 0x6C008081 vcmp.q eq,C000,C000 +0x00001F48: 0x6C000002 vcmp.s lt,S000,S000 +0x00001F4C: 0x6C000082 vcmp.p lt,C000,C000 +0x00001F50: 0x6C008002 vcmp.t lt,C000,C000 +0x00001F54: 0x6C008082 vcmp.q lt,C000,C000 +0x00001F58: 0x6C000003 vcmp.s le,S000,S000 +0x00001F5C: 0x6C000083 vcmp.p le,C000,C000 +0x00001F60: 0x6C008003 vcmp.t le,C000,C000 +0x00001F64: 0x6C008083 vcmp.q le,C000,C000 +0x00001F68: 0x6C000004 vcmp.s tr +0x00001F6C: 0x6C000084 vcmp.p tr +0x00001F70: 0x6C008004 vcmp.t tr +0x00001F74: 0x6C008084 vcmp.q tr +0x00001F78: 0x6C000005 vcmp.s ne,S000,S000 +0x00001F7C: 0x6C000085 vcmp.p ne,C000,C000 +0x00001F80: 0x6C008005 vcmp.t ne,C000,C000 +0x00001F84: 0x6C008085 vcmp.q ne,C000,C000 +0x00001F88: 0x6C000006 vcmp.s ge,S000,S000 +0x00001F8C: 0x6C000086 vcmp.p ge,C000,C000 +0x00001F90: 0x6C008006 vcmp.t ge,C000,C000 +0x00001F94: 0x6C008086 vcmp.q ge,C000,C000 +0x00001F98: 0x6C000007 vcmp.s gt,S000,S000 +0x00001F9C: 0x6C000087 vcmp.p gt,C000,C000 +0x00001FA0: 0x6C008007 vcmp.t gt,C000,C000 +0x00001FA4: 0x6C008087 vcmp.q gt,C000,C000 +0x00001FA8: 0x6C000008 vcmp.s ez,S000 +0x00001FAC: 0x6C000088 vcmp.p ez,C000 +0x00001FB0: 0x6C008008 vcmp.t ez,C000 +0x00001FB4: 0x6C008088 vcmp.q ez,C000 +0x00001FB8: 0x6C000009 vcmp.s en,S000 +0x00001FBC: 0x6C000089 vcmp.p en,C000 +0x00001FC0: 0x6C008009 vcmp.t en,C000 +0x00001FC4: 0x6C008089 vcmp.q en,C000 +0x00001FC8: 0x6C00000A vcmp.s ei,S000 +0x00001FCC: 0x6C00008A vcmp.p ei,C000 +0x00001FD0: 0x6C00800A vcmp.t ei,C000 +0x00001FD4: 0x6C00808A vcmp.q ei,C000 +0x00001FD8: 0x6C00000B vcmp.s es,S000 +0x00001FDC: 0x6C00008B vcmp.p es,C000 +0x00001FE0: 0x6C00800B vcmp.t es,C000 +0x00001FE4: 0x6C00808B vcmp.q es,C000 +0x00001FE8: 0x6C00000C vcmp.s nz,S000 +0x00001FEC: 0x6C00008C vcmp.p nz,C000 +0x00001FF0: 0x6C00800C vcmp.t nz,C000 +0x00001FF4: 0x6C00808C vcmp.q nz,C000 +0x00001FF8: 0x6C00000D vcmp.s nn,S000 +0x00001FFC: 0x6C00008D vcmp.p nn,C000 +0x00002000: 0x6C00800D vcmp.t nn,C000 +0x00002004: 0x6C00808D vcmp.q nn,C000 +0x00002008: 0x6C00000E vcmp.s ni,S000 +0x0000200C: 0x6C00008E vcmp.p ni,C000 +0x00002010: 0x6C00800E vcmp.t ni,C000 +0x00002014: 0x6C00808E vcmp.q ni,C000 +0x00002018: 0x6C00000F vcmp.s ns,S000 +0x0000201C: 0x6C00008F vcmp.p ns,C000 +0x00002020: 0x6C00800F vcmp.t ns,C000 +0x00002024: 0x6C00808F vcmp.q ns,C000 +0x00002028: 0x48640080 mfvc a0,VFPU_PFXS +0x0000202C: 0x48640081 mfvc a0,VFPU_PFXT 06 (00002028) PITCH +0x00002030: 0x48640082 mfvc a0,VFPU_PFXD 06 (0000202C) PITCH +0x00002034: 0x48640083 mfvc a0,VFPU_CC 06 (00002030) PITCH +0x00002038: 0x48640084 mfvc a0,VFPU_INF4 06 (00002034) PITCH +0x0000203C: 0x48640085 mfvc a0,VFPU_RSV5 06 (00002038) PITCH +0x00002040: 0x48640086 mfvc a0,VFPU_RSV6 06 (0000203C) PITCH +0x00002044: 0x48640087 mfvc a0,VFPU_REV 06 (00002040) PITCH +0x00002048: 0x48640088 mfvc a0,VFPU_RCX0 06 (00002044) PITCH +0x0000204C: 0x48640089 mfvc a0,VFPU_RCX1 06 (00002048) PITCH +0x00002050: 0x4864008A mfvc a0,VFPU_RCX2 06 (0000204C) PITCH +0x00002054: 0x4864008B mfvc a0,VFPU_RCX3 06 (00002050) PITCH +0x00002058: 0x4864008C mfvc a0,VFPU_RCX4 06 (00002054) PITCH +0x0000205C: 0x4864008D mfvc a0,VFPU_RCX5 06 (00002058) PITCH +0x00002060: 0x4864008E mfvc a0,VFPU_RCX6 06 (0000205C) PITCH +0x00002064: 0x4864008F mfvc a0,VFPU_RCX7 06 (00002060) PITCH +0x00002068: 0x486000FF vsync2 06 (00002064) PITCH +0x0000206C: 0x48650000 mfv a1,S000 06 (00002068) PITCH +0x00002070: 0x48650081 mfvc a1,VFPU_PFXT 06 (0000206C) PITCH +0x00002074: 0x48E50000 mtv a1,S000 06 (00002070) PITCH +0x00002078: 0x48E50081 mtvc a1,VFPU_PFXT +0x0000207C: 0xD0001001 vmov.s S010,S400 +0x00002080: 0xD0001081 vmov.p C010,C400 +0x00002084: 0xD0009001 vmov.t C010,C400 +0x00002088: 0xD0009081 vmov.q C010,C400 +0x0000208C: 0xD0011001 vabs.s S010,S400 +0x00002090: 0xD0011081 vabs.p C010,C400 +0x00002094: 0xD0019001 vabs.t C010,C400 +0x00002098: 0xD0019081 vabs.q C010,C400 +0x0000209C: 0xD0021001 vneg.s S010,S400 +0x000020A0: 0xD0021081 vneg.p C010,C400 +0x000020A4: 0xD0029001 vneg.t C010,C400 +0x000020A8: 0xD0029081 vneg.q C010,C400 +0x000020AC: 0xD0030081 vidt.p C010 +0x000020B0: 0xD0038081 vidt.q C010 +0x000020B4: 0xD0041001 vsat0.s S010,S400 +0x000020B8: 0xD0041081 vsat0.p C010,C400 +0x000020BC: 0xD0049001 vsat0.t C010,C400 +0x000020C0: 0xD0049081 vsat0.q C010,C400 +0x000020C4: 0xD0051001 vsat1.s S010,S400 +0x000020C8: 0xD0051081 vsat1.p C010,C400 +0x000020CC: 0xD0059001 vsat1.t C010,C400 +0x000020D0: 0xD0059081 vsat1.q C010,C400 +0x000020D4: 0xD0070001 vone.s S010 +0x000020D8: 0xD0070081 vone.p C010 +0x000020DC: 0xD0078001 vone.t C010 +0x000020E0: 0xD0078081 vone.q C010 +0x000020E4: 0xD0101001 vrcp.s S010,S400 +0x000020E8: 0xD0101081 vrcp.p C010,C400 +0x000020EC: 0xD0109001 vrcp.t C010,C400 01 (000020E8) PITCH +0x000020F0: 0xD0109081 vrcp.q C010,C400 02 (000020EC) PITCH +0x000020F4: 0xD0111001 vrsq.s S010,S400 03 (000020F0) PITCH +0x000020F8: 0xD0111081 vrsq.p C010,C400 +0x000020FC: 0xD0119001 vrsq.t C010,C400 01 (000020F8) PITCH +0x00002100: 0xD0119081 vrsq.q C010,C400 02 (000020FC) PITCH +0x00002104: 0xD0121001 vsin.s S010,S400 03 (00002100) PITCH +0x00002108: 0xD0121081 vsin.p C010,C400 +0x0000210C: 0xD0129001 vsin.t C010,C400 01 (00002108) PITCH +0x00002110: 0xD0129081 vsin.q C010,C400 02 (0000210C) PITCH +0x00002114: 0xD0131001 vcos.s S010,S400 03 (00002110) PITCH +0x00002118: 0xD0131081 vcos.p C010,C400 +0x0000211C: 0xD0139001 vcos.t C010,C400 01 (00002118) PITCH +0x00002120: 0xD0139081 vcos.q C010,C400 02 (0000211C) PITCH +0x00002124: 0xD0141001 vexp2.s S010,S400 03 (00002120) PITCH +0x00002128: 0xD0141081 vexp2.p C010,C400 +0x0000212C: 0xD0149001 vexp2.t C010,C400 01 (00002128) PITCH +0x00002130: 0xD0149081 vexp2.q C010,C400 02 (0000212C) PITCH +0x00002134: 0xD0151001 vlog2.s S010,S400 03 (00002130) PITCH +0x00002138: 0xD0151081 vlog2.p C010,C400 +0x0000213C: 0xD0159001 vlog2.t C010,C400 01 (00002138) PITCH +0x00002140: 0xD0159081 vlog2.q C010,C400 02 (0000213C) PITCH +0x00002144: 0xD0161001 vsqrt.s S010,S400 03 (00002140) PITCH +0x00002148: 0xD0161081 vsqrt.p C010,C400 +0x0000214C: 0xD0169001 vsqrt.t C010,C400 01 (00002148) PITCH +0x00002150: 0xD0169081 vsqrt.q C010,C400 02 (0000214C) PITCH +0x00002154: 0xD0171001 vasin.s S010,S400 03 (00002150) PITCH +0x00002158: 0xD0171081 vasin.p C010,C400 +0x0000215C: 0xD0179001 vasin.t C010,C400 01 (00002158) PITCH +0x00002160: 0xD0179081 vasin.q C010,C400 02 (0000215C) PITCH +0x00002164: 0xD0181001 vnrcp.s S010,S400 03 (00002160) PITCH +0x00002168: 0xD0181081 vnrcp.p C010,C400 +0x0000216C: 0xD0189001 vnrcp.t C010,C400 01 (00002168) PITCH +0x00002170: 0xD0189081 vnrcp.q C010,C400 02 (0000216C) PITCH +0x00002174: 0xD01A1001 vnsin.s S010,S400 03 (00002170) PITCH +0x00002178: 0xD01A1081 vnsin.p C010,C400 +0x0000217C: 0xD01A9001 vnsin.t C010,C400 01 (00002178) PITCH +0x00002180: 0xD01A9081 vnsin.q C010,C400 02 (0000217C) PITCH +0x00002184: 0xD01C1001 vrexp2.s S010,S400 03 (00002180) PITCH +0x00002188: 0xD01C1081 vrexp2.p C010,C400 +0x0000218C: 0xD01C9001 vrexp2.t C010,C400 01 (00002188) PITCH +0x00002190: 0xD01C9081 vrexp2.q C010,C400 02 (0000218C) PITCH +0x00002194: 0xD0201000 vrnds.s S400 03 (00002190) PITCH +0x00002198: 0xD0210001 vrndi.s S010 02 (00002194) PITCH +0x0000219C: 0xD0210081 vrndi.p C010 02 (00002198) PITCH +0x000021A0: 0xD0218001 vrndi.t C010 05 (0000219C) PITCH +0x000021A4: 0xD0218081 vrndi.q C010 08 (000021A0) PITCH +0x000021A8: 0xD0220001 vrndf1.s S010 11 (000021A4) PITCH +0x000021AC: 0xD0220081 vrndf1.p C010 02 (000021A8) PITCH +0x000021B0: 0xD0228001 vrndf1.t C010 05 (000021AC) PITCH +0x000021B4: 0xD0228081 vrndf1.q C010 08 (000021B0) PITCH +0x000021B8: 0xD0230001 vrndf2.s S010 11 (000021B4) PITCH +0x000021BC: 0xD0230081 vrndf2.p C010 02 (000021B8) PITCH +0x000021C0: 0xD0238001 vrndf2.t C010 05 (000021BC) PITCH +0x000021C4: 0xD0238081 vrndf2.q C010 08 (000021C0) PITCH +0x000021C8: 0xD0321081 vf2h.p S010,C400 11 (000021C4) PITCH +0x000021CC: 0xD0329081 vf2h.q C010,C400 +0x000021D0: 0xD0331001 vh2f.s C010,S400 +0x000021D4: 0xD0331081 vh2f.p C010,C400 +0x000021D8: 0xD0361001 vsbz.s S010,S400 +0x000021DC: 0xD0371001 vlgb.s S010,S400 +0x000021E0: 0xD0381001 vuc2ifs.s C010,S400 02 (000021DC) WAW +0x000021E4: 0xD0391001 vc2i.s C010,S400 +0x000021E8: 0xD03A1001 vus2i.s C010,S400 +0x000021EC: 0xD03A1081 vus2i.p C010,C400 +0x000021F0: 0xD03B1001 vs2i.s C010,S400 +0x000021F4: 0xD03B1081 vs2i.p C010,C400 +0x000021F8: 0xD03C9081 vi2uc.q S010,C400 +0x000021FC: 0xD03D9081 vi2c.q S010,C400 +0x00002200: 0xD03E1081 vi2us.p S010,C400 +0x00002204: 0xD03E9081 vi2us.q C010,C400 +0x00002208: 0xD03F1081 vi2s.p S010,C400 +0x0000220C: 0xD03F9081 vi2s.q C010,C400 +0x00002210: 0xD0409081 vsrt1.q C010,C400 +0x00002214: 0xD0419081 vsrt2.q C010,C400 +0x00002218: 0xD0421081 vbfy1.pq C010,C400 +0x0000221C: 0xD0429081 vbfy1.pq C010,C400 +0x00002220: 0xD0439081 vbfy2.q C010,C400 +0x00002224: 0xD0441001 vocp.s S010,S400 +0x00002228: 0xD0441081 vocp.p C010,C400 +0x0000222C: 0xD0449001 vocp.t C010,C400 +0x00002230: 0xD0449081 vocp.q C010,C400 +0x00002234: 0xD0451001 vsocp.s C010,S400 +0x00002238: 0xD0451081 vsocp.p C010,C400 +0x0000223C: 0xD0461081 vfad.p S010,C400 +0x00002240: 0xD0469001 vfad.t S010,C400 +0x00002244: 0xD0469081 vfad.q S010,C400 +0x00002248: 0xD0471081 vavg.p S010,C400 +0x0000224C: 0xD0479001 vavg.t S010,C400 +0x00002250: 0xD0479081 vavg.q S010,C400 +0x00002254: 0xD0489081 vsrt3.q C010,C400 02 (00002250) WAW +0x00002258: 0xD0499081 vsrt4.q C010,C400 +0x0000225C: 0xD04A1001 vsgn.s S010,S400 02 (00002258) WAW +0x00002260: 0xD04A1081 vsgn.p C010,C400 +0x00002264: 0xD04A9001 vsgn.t C010,C400 +0x00002268: 0xD04A9081 vsgn.q C010,C400 +0x0000226C: 0xD0508001 vmfvc S010,VFPU_PFXS +0x00002270: 0xD0508101 vmfvc S010,VFPU_PFXT +0x00002274: 0xD0508201 vmfvc S010,VFPU_PFXD +0x00002278: 0xD0508301 vmfvc S010,VFPU_CC +0x0000227C: 0xD0508401 vmfvc S010,VFPU_INF4 +0x00002280: 0xD0508501 vmfvc S010,VFPU_RSV5 +0x00002284: 0xD0508601 vmfvc S010,VFPU_RSV6 +0x00002288: 0xD0508701 vmfvc S010,VFPU_REV +0x0000228C: 0xD0508801 vmfvc S010,VFPU_RCX0 +0x00002290: 0xD0508901 vmfvc S010,VFPU_RCX1 +0x00002294: 0xD0508A01 vmfvc S010,VFPU_RCX2 +0x00002298: 0xD0508B01 vmfvc S010,VFPU_RCX3 +0x0000229C: 0xD0508C01 vmfvc S010,VFPU_RCX4 +0x000022A0: 0xD0508D01 vmfvc S010,VFPU_RCX5 +0x000022A4: 0xD0508E01 vmfvc S010,VFPU_RCX6 +0x000022A8: 0xD0508F01 vmfvc S010,VFPU_RCX7 +0x000022AC: 0xD0509001 vmfvc S010,0x90 +0x000022B0: 0xD0509101 vmfvc S010,0x91 +0x000022B4: 0xD0509201 vmfvc S010,0x92 +0x000022B8: 0xD0509301 vmfvc S010,0x93 +0x000022BC: 0xD0509401 vmfvc S010,0x94 +0x000022C0: 0xD0509501 vmfvc S010,0x95 +0x000022C4: 0xD0509601 vmfvc S010,0x96 +0x000022C8: 0xD0509701 vmfvc S010,0x97 +0x000022CC: 0xD0509801 vmfvc S010,0x98 +0x000022D0: 0xD0509901 vmfvc S010,0x99 +0x000022D4: 0xD0509A01 vmfvc S010,0x9A +0x000022D8: 0xD0509B01 vmfvc S010,0x9B +0x000022DC: 0xD0509C01 vmfvc S010,0x9C +0x000022E0: 0xD0509D01 vmfvc S010,0x9D +0x000022E4: 0xD0509E01 vmfvc S010,0x9E +0x000022E8: 0xD0509F01 vmfvc S010,0x9F +0x000022EC: 0xD050A001 vmfvc S010,0xA0 +0x000022F0: 0xD050A101 vmfvc S010,0xA1 +0x000022F4: 0xD050A201 vmfvc S010,0xA2 +0x000022F8: 0xD050A301 vmfvc S010,0xA3 +0x000022FC: 0xD050A401 vmfvc S010,0xA4 +0x00002300: 0xD050A501 vmfvc S010,0xA5 +0x00002304: 0xD050A601 vmfvc S010,0xA6 +0x00002308: 0xD050A701 vmfvc S010,0xA7 +0x0000230C: 0xD050A801 vmfvc S010,0xA8 +0x00002310: 0xD050A901 vmfvc S010,0xA9 +0x00002314: 0xD050AA01 vmfvc S010,0xAA +0x00002318: 0xD050AB01 vmfvc S010,0xAB +0x0000231C: 0xD050AC01 vmfvc S010,0xAC +0x00002320: 0xD050AD01 vmfvc S010,0xAD +0x00002324: 0xD050AE01 vmfvc S010,0xAE +0x00002328: 0xD050AF01 vmfvc S010,0xAF +0x0000232C: 0xD050B001 vmfvc S010,0xB0 +0x00002330: 0xD050B101 vmfvc S010,0xB1 +0x00002334: 0xD050B201 vmfvc S010,0xB2 +0x00002338: 0xD050B301 vmfvc S010,0xB3 +0x0000233C: 0xD050B401 vmfvc S010,0xB4 +0x00002340: 0xD050B501 vmfvc S010,0xB5 +0x00002344: 0xD050B601 vmfvc S010,0xB6 +0x00002348: 0xD050B701 vmfvc S010,0xB7 +0x0000234C: 0xD050B801 vmfvc S010,0xB8 +0x00002350: 0xD050B901 vmfvc S010,0xB9 +0x00002354: 0xD050BA01 vmfvc S010,0xBA +0x00002358: 0xD050BB01 vmfvc S010,0xBB +0x0000235C: 0xD050BC01 vmfvc S010,0xBC +0x00002360: 0xD050BD01 vmfvc S010,0xBD +0x00002364: 0xD050BE01 vmfvc S010,0xBE +0x00002368: 0xD050BF01 vmfvc S010,0xBF +0x0000236C: 0xD050C001 vmfvc S010,0xC0 +0x00002370: 0xD050C101 vmfvc S010,0xC1 +0x00002374: 0xD050C201 vmfvc S010,0xC2 +0x00002378: 0xD050C301 vmfvc S010,0xC3 +0x0000237C: 0xD050C401 vmfvc S010,0xC4 +0x00002380: 0xD050C501 vmfvc S010,0xC5 +0x00002384: 0xD050C601 vmfvc S010,0xC6 +0x00002388: 0xD050C701 vmfvc S010,0xC7 +0x0000238C: 0xD050C801 vmfvc S010,0xC8 +0x00002390: 0xD050C901 vmfvc S010,0xC9 +0x00002394: 0xD050CA01 vmfvc S010,0xCA +0x00002398: 0xD050CB01 vmfvc S010,0xCB +0x0000239C: 0xD050CC01 vmfvc S010,0xCC +0x000023A0: 0xD050CD01 vmfvc S010,0xCD +0x000023A4: 0xD050CE01 vmfvc S010,0xCE +0x000023A8: 0xD050CF01 vmfvc S010,0xCF +0x000023AC: 0xD050D001 vmfvc S010,0xD0 +0x000023B0: 0xD050D101 vmfvc S010,0xD1 +0x000023B4: 0xD050D201 vmfvc S010,0xD2 +0x000023B8: 0xD050D301 vmfvc S010,0xD3 +0x000023BC: 0xD050D401 vmfvc S010,0xD4 +0x000023C0: 0xD050D501 vmfvc S010,0xD5 +0x000023C4: 0xD050D601 vmfvc S010,0xD6 +0x000023C8: 0xD050D701 vmfvc S010,0xD7 +0x000023CC: 0xD050D801 vmfvc S010,0xD8 +0x000023D0: 0xD050D901 vmfvc S010,0xD9 +0x000023D4: 0xD050DA01 vmfvc S010,0xDA +0x000023D8: 0xD050DB01 vmfvc S010,0xDB +0x000023DC: 0xD050DC01 vmfvc S010,0xDC +0x000023E0: 0xD050DD01 vmfvc S010,0xDD +0x000023E4: 0xD050DE01 vmfvc S010,0xDE +0x000023E8: 0xD050DF01 vmfvc S010,0xDF +0x000023EC: 0xD050E001 vmfvc S010,0xE0 +0x000023F0: 0xD050E101 vmfvc S010,0xE1 +0x000023F4: 0xD050E201 vmfvc S010,0xE2 +0x000023F8: 0xD050E301 vmfvc S010,0xE3 +0x000023FC: 0xD050E401 vmfvc S010,0xE4 +0x00002400: 0xD050E501 vmfvc S010,0xE5 +0x00002404: 0xD050E601 vmfvc S010,0xE6 +0x00002408: 0xD050E701 vmfvc S010,0xE7 +0x0000240C: 0xD050E801 vmfvc S010,0xE8 +0x00002410: 0xD050E901 vmfvc S010,0xE9 +0x00002414: 0xD050EA01 vmfvc S010,0xEA +0x00002418: 0xD050EB01 vmfvc S010,0xEB +0x0000241C: 0xD050EC01 vmfvc S010,0xEC +0x00002420: 0xD050ED01 vmfvc S010,0xED +0x00002424: 0xD050EE01 vmfvc S010,0xEE +0x00002428: 0xD050EF01 vmfvc S010,0xEF +0x0000242C: 0xD050F001 vmfvc S010,0xF0 +0x00002430: 0xD050F101 vmfvc S010,0xF1 +0x00002434: 0xD050F201 vmfvc S010,0xF2 +0x00002438: 0xD050F301 vmfvc S010,0xF3 +0x0000243C: 0xD050F401 vmfvc S010,0xF4 +0x00002440: 0xD050F501 vmfvc S010,0xF5 +0x00002444: 0xD050F601 vmfvc S010,0xF6 +0x00002448: 0xD050F701 vmfvc S010,0xF7 +0x0000244C: 0xD050F801 vmfvc S010,0xF8 +0x00002450: 0xD050F901 vmfvc S010,0xF9 +0x00002454: 0xD050FA01 vmfvc S010,0xFA +0x00002458: 0xD050FB01 vmfvc S010,0xFB +0x0000245C: 0xD050FC01 vmfvc S010,0xFC +0x00002460: 0xD050FD01 vmfvc S010,0xFD +0x00002464: 0xD050FE01 vmfvc S010,0xFE +0x00002468: 0xD050FF01 vmfvc S010,0xFF +0x0000246C: 0xD0510180 vmtvc VFPU_PFXS,S010 02 (00002468) REG +0x00002470: 0xD0510181 vmtvc VFPU_PFXT,S010 +0x00002474: 0xD0510182 vmtvc VFPU_PFXD,S010 +0x00002478: 0xD0510183 vmtvc VFPU_CC,S010 +0x0000247C: 0xD0510184 vmtvc VFPU_INF4,S010 +0x00002480: 0xD0510185 vmtvc VFPU_RSV5,S010 +0x00002484: 0xD0510186 vmtvc VFPU_RSV6,S010 +0x00002488: 0xD0510187 vmtvc VFPU_REV,S010 +0x0000248C: 0xD0510188 vmtvc VFPU_RCX0,S010 +0x00002490: 0xD0510189 vmtvc VFPU_RCX1,S010 +0x00002494: 0xD051018A vmtvc VFPU_RCX2,S010 +0x00002498: 0xD051018B vmtvc VFPU_RCX3,S010 +0x0000249C: 0xD051018C vmtvc VFPU_RCX4,S010 +0x000024A0: 0xD051018D vmtvc VFPU_RCX5,S010 +0x000024A4: 0xD051018E vmtvc VFPU_RCX6,S010 +0x000024A8: 0xD051018F vmtvc VFPU_RCX7,S010 +0x000024AC: 0xD0510190 vmtvc 0x90,S010 +0x000024B0: 0xD0510191 vmtvc 0x91,S010 +0x000024B4: 0xD0510192 vmtvc 0x92,S010 +0x000024B8: 0xD0510193 vmtvc 0x93,S010 +0x000024BC: 0xD0510194 vmtvc 0x94,S010 +0x000024C0: 0xD0510195 vmtvc 0x95,S010 +0x000024C4: 0xD0510196 vmtvc 0x96,S010 +0x000024C8: 0xD0510197 vmtvc 0x97,S010 +0x000024CC: 0xD0510198 vmtvc 0x98,S010 +0x000024D0: 0xD0510199 vmtvc 0x99,S010 +0x000024D4: 0xD051019A vmtvc 0x9A,S010 +0x000024D8: 0xD051019B vmtvc 0x9B,S010 +0x000024DC: 0xD051019C vmtvc 0x9C,S010 +0x000024E0: 0xD051019D vmtvc 0x9D,S010 +0x000024E4: 0xD051019E vmtvc 0x9E,S010 +0x000024E8: 0xD051019F vmtvc 0x9F,S010 +0x000024EC: 0xD05101A0 vmtvc 0xA0,S010 +0x000024F0: 0xD05101A1 vmtvc 0xA1,S010 +0x000024F4: 0xD05101A2 vmtvc 0xA2,S010 +0x000024F8: 0xD05101A3 vmtvc 0xA3,S010 +0x000024FC: 0xD05101A4 vmtvc 0xA4,S010 +0x00002500: 0xD05101A5 vmtvc 0xA5,S010 +0x00002504: 0xD05101A6 vmtvc 0xA6,S010 +0x00002508: 0xD05101A7 vmtvc 0xA7,S010 +0x0000250C: 0xD05101A8 vmtvc 0xA8,S010 +0x00002510: 0xD05101A9 vmtvc 0xA9,S010 +0x00002514: 0xD05101AA vmtvc 0xAA,S010 +0x00002518: 0xD05101AB vmtvc 0xAB,S010 +0x0000251C: 0xD05101AC vmtvc 0xAC,S010 +0x00002520: 0xD05101AD vmtvc 0xAD,S010 +0x00002524: 0xD05101AE vmtvc 0xAE,S010 +0x00002528: 0xD05101AF vmtvc 0xAF,S010 +0x0000252C: 0xD05101B0 vmtvc 0xB0,S010 +0x00002530: 0xD05101B1 vmtvc 0xB1,S010 +0x00002534: 0xD05101B2 vmtvc 0xB2,S010 +0x00002538: 0xD05101B3 vmtvc 0xB3,S010 +0x0000253C: 0xD05101B4 vmtvc 0xB4,S010 +0x00002540: 0xD05101B5 vmtvc 0xB5,S010 +0x00002544: 0xD05101B6 vmtvc 0xB6,S010 +0x00002548: 0xD05101B7 vmtvc 0xB7,S010 +0x0000254C: 0xD05101B8 vmtvc 0xB8,S010 +0x00002550: 0xD05101B9 vmtvc 0xB9,S010 +0x00002554: 0xD05101BA vmtvc 0xBA,S010 +0x00002558: 0xD05101BB vmtvc 0xBB,S010 +0x0000255C: 0xD05101BC vmtvc 0xBC,S010 +0x00002560: 0xD05101BD vmtvc 0xBD,S010 +0x00002564: 0xD05101BE vmtvc 0xBE,S010 +0x00002568: 0xD05101BF vmtvc 0xBF,S010 +0x0000256C: 0xD05101C0 vmtvc 0xC0,S010 +0x00002570: 0xD05101C1 vmtvc 0xC1,S010 +0x00002574: 0xD05101C2 vmtvc 0xC2,S010 +0x00002578: 0xD05101C3 vmtvc 0xC3,S010 +0x0000257C: 0xD05101C4 vmtvc 0xC4,S010 +0x00002580: 0xD05101C5 vmtvc 0xC5,S010 +0x00002584: 0xD05101C6 vmtvc 0xC6,S010 +0x00002588: 0xD05101C7 vmtvc 0xC7,S010 +0x0000258C: 0xD05101C8 vmtvc 0xC8,S010 +0x00002590: 0xD05101C9 vmtvc 0xC9,S010 +0x00002594: 0xD05101CA vmtvc 0xCA,S010 +0x00002598: 0xD05101CB vmtvc 0xCB,S010 +0x0000259C: 0xD05101CC vmtvc 0xCC,S010 +0x000025A0: 0xD05101CD vmtvc 0xCD,S010 +0x000025A4: 0xD05101CE vmtvc 0xCE,S010 +0x000025A8: 0xD05101CF vmtvc 0xCF,S010 +0x000025AC: 0xD05101D0 vmtvc 0xD0,S010 +0x000025B0: 0xD05101D1 vmtvc 0xD1,S010 +0x000025B4: 0xD05101D2 vmtvc 0xD2,S010 +0x000025B8: 0xD05101D3 vmtvc 0xD3,S010 +0x000025BC: 0xD05101D4 vmtvc 0xD4,S010 +0x000025C0: 0xD05101D5 vmtvc 0xD5,S010 +0x000025C4: 0xD05101D6 vmtvc 0xD6,S010 +0x000025C8: 0xD05101D7 vmtvc 0xD7,S010 +0x000025CC: 0xD05101D8 vmtvc 0xD8,S010 +0x000025D0: 0xD05101D9 vmtvc 0xD9,S010 +0x000025D4: 0xD05101DA vmtvc 0xDA,S010 +0x000025D8: 0xD05101DB vmtvc 0xDB,S010 +0x000025DC: 0xD05101DC vmtvc 0xDC,S010 +0x000025E0: 0xD05101DD vmtvc 0xDD,S010 +0x000025E4: 0xD05101DE vmtvc 0xDE,S010 +0x000025E8: 0xD05101DF vmtvc 0xDF,S010 +0x000025EC: 0xD05101E0 vmtvc 0xE0,S010 +0x000025F0: 0xD05101E1 vmtvc 0xE1,S010 +0x000025F4: 0xD05101E2 vmtvc 0xE2,S010 +0x000025F8: 0xD05101E3 vmtvc 0xE3,S010 +0x000025FC: 0xD05101E4 vmtvc 0xE4,S010 +0x00002600: 0xD05101E5 vmtvc 0xE5,S010 +0x00002604: 0xD05101E6 vmtvc 0xE6,S010 +0x00002608: 0xD05101E7 vmtvc 0xE7,S010 +0x0000260C: 0xD05101E8 vmtvc 0xE8,S010 +0x00002610: 0xD05101E9 vmtvc 0xE9,S010 +0x00002614: 0xD05101EA vmtvc 0xEA,S010 +0x00002618: 0xD05101EB vmtvc 0xEB,S010 +0x0000261C: 0xD05101EC vmtvc 0xEC,S010 +0x00002620: 0xD05101ED vmtvc 0xED,S010 +0x00002624: 0xD05101EE vmtvc 0xEE,S010 +0x00002628: 0xD05101EF vmtvc 0xEF,S010 +0x0000262C: 0xD05101F0 vmtvc 0xF0,S010 +0x00002630: 0xD05101F1 vmtvc 0xF1,S010 +0x00002634: 0xD05101F2 vmtvc 0xF2,S010 +0x00002638: 0xD05101F3 vmtvc 0xF3,S010 +0x0000263C: 0xD05101F4 vmtvc 0xF4,S010 +0x00002640: 0xD05101F5 vmtvc 0xF5,S010 +0x00002644: 0xD05101F6 vmtvc 0xF6,S010 +0x00002648: 0xD05101F7 vmtvc 0xF7,S010 +0x0000264C: 0xD05101F8 vmtvc 0xF8,S010 +0x00002650: 0xD05101F9 vmtvc 0xF9,S010 +0x00002654: 0xD05101FA vmtvc 0xFA,S010 +0x00002658: 0xD05101FB vmtvc 0xFB,S010 +0x0000265C: 0xD05101FC vmtvc 0xFC,S010 +0x00002660: 0xD05101FD vmtvc 0xFD,S010 +0x00002664: 0xD05101FE vmtvc 0xFE,S010 +0x00002668: 0xD05101FF vmtvc 0xFF,S010 +0x0000266C: 0xD0599081 vt4444.q C010,C400 +0x00002670: 0xD05A9081 vt5551.q C010,C400 +0x00002674: 0xD05B9081 vt5650.q C010,C400 +0x00002678: 0x00000000 nop +0x0000267C: 0x00000000 nop +0x00002680: 0x00000000 nop +0x00002684: 0x00000000 nop +0x00002688: 0xD0610001 vcst.s S010,VFPU_HUGE +0x0000268C: 0xD0610081 vcst.p C010,VFPU_HUGE +0x00002690: 0xD0618001 vcst.t C010,VFPU_HUGE +0x00002694: 0xD0618081 vcst.q C010,VFPU_HUGE +0x00002698: 0xD0620001 vcst.s S010,VFPU_SQRT2 +0x0000269C: 0xD0620081 vcst.p C010,VFPU_SQRT2 +0x000026A0: 0xD0628001 vcst.t C010,VFPU_SQRT2 +0x000026A4: 0xD0628081 vcst.q C010,VFPU_SQRT2 +0x000026A8: 0xD0630001 vcst.s S010,VFPU_SQRT1/2 +0x000026AC: 0xD0630081 vcst.p C010,VFPU_SQRT1/2 +0x000026B0: 0xD0638001 vcst.t C010,VFPU_SQRT1/2 +0x000026B4: 0xD0638081 vcst.q C010,VFPU_SQRT1/2 +0x000026B8: 0xD0640001 vcst.s S010,VFPU_2/SQRTPI +0x000026BC: 0xD0640081 vcst.p C010,VFPU_2/SQRTPI +0x000026C0: 0xD0648001 vcst.t C010,VFPU_2/SQRTPI +0x000026C4: 0xD0648081 vcst.q C010,VFPU_2/SQRTPI +0x000026C8: 0xD0650001 vcst.s S010,VFPU_2/PI +0x000026CC: 0xD0650081 vcst.p C010,VFPU_2/PI +0x000026D0: 0xD0658001 vcst.t C010,VFPU_2/PI +0x000026D4: 0xD0658081 vcst.q C010,VFPU_2/PI +0x000026D8: 0xD0660001 vcst.s S010,VFPU_1/PI +0x000026DC: 0xD0660081 vcst.p C010,VFPU_1/PI +0x000026E0: 0xD0668001 vcst.t C010,VFPU_1/PI +0x000026E4: 0xD0668081 vcst.q C010,VFPU_1/PI +0x000026E8: 0xD0670001 vcst.s S010,VFPU_PI/4 +0x000026EC: 0xD0670081 vcst.p C010,VFPU_PI/4 +0x000026F0: 0xD0678001 vcst.t C010,VFPU_PI/4 +0x000026F4: 0xD0678081 vcst.q C010,VFPU_PI/4 +0x000026F8: 0xD0680001 vcst.s S010,VFPU_PI/2 +0x000026FC: 0xD0680081 vcst.p C010,VFPU_PI/2 +0x00002700: 0xD0688001 vcst.t C010,VFPU_PI/2 +0x00002704: 0xD0688081 vcst.q C010,VFPU_PI/2 +0x00002708: 0xD0690001 vcst.s S010,VFPU_PI +0x0000270C: 0xD0690081 vcst.p C010,VFPU_PI +0x00002710: 0xD0698001 vcst.t C010,VFPU_PI +0x00002714: 0xD0698081 vcst.q C010,VFPU_PI +0x00002718: 0xD06A0001 vcst.s S010,VFPU_E +0x0000271C: 0xD06A0081 vcst.p C010,VFPU_E +0x00002720: 0xD06A8001 vcst.t C010,VFPU_E +0x00002724: 0xD06A8081 vcst.q C010,VFPU_E +0x00002728: 0xD06B0001 vcst.s S010,VFPU_LOG2E +0x0000272C: 0xD06B0081 vcst.p C010,VFPU_LOG2E +0x00002730: 0xD06B8001 vcst.t C010,VFPU_LOG2E +0x00002734: 0xD06B8081 vcst.q C010,VFPU_LOG2E +0x00002738: 0xD06C0001 vcst.s S010,VFPU_LOG10E +0x0000273C: 0xD06C0081 vcst.p C010,VFPU_LOG10E +0x00002740: 0xD06C8001 vcst.t C010,VFPU_LOG10E +0x00002744: 0xD06C8081 vcst.q C010,VFPU_LOG10E +0x00002748: 0xD06D0001 vcst.s S010,VFPU_LN2 +0x0000274C: 0xD06D0081 vcst.p C010,VFPU_LN2 +0x00002750: 0xD06D8001 vcst.t C010,VFPU_LN2 +0x00002754: 0xD06D8081 vcst.q C010,VFPU_LN2 +0x00002758: 0xD06E0001 vcst.s S010,VFPU_LN10 +0x0000275C: 0xD06E0081 vcst.p C010,VFPU_LN10 +0x00002760: 0xD06E8001 vcst.t C010,VFPU_LN10 +0x00002764: 0xD06E8081 vcst.q C010,VFPU_LN10 +0x00002768: 0xD06F0001 vcst.s S010,VFPU_2PI +0x0000276C: 0xD06F0081 vcst.p C010,VFPU_2PI +0x00002770: 0xD06F8001 vcst.t C010,VFPU_2PI +0x00002774: 0xD06F8081 vcst.q C010,VFPU_2PI +0x00002778: 0xD0700001 vcst.s S010,VFPU_PI/6 +0x0000277C: 0xD0700081 vcst.p C010,VFPU_PI/6 +0x00002780: 0xD0708001 vcst.t C010,VFPU_PI/6 +0x00002784: 0xD0708081 vcst.q C010,VFPU_PI/6 +0x00002788: 0xD0710001 vcst.s S010,VFPU_LOG10TWO +0x0000278C: 0xD0710081 vcst.p C010,VFPU_LOG10TWO +0x00002790: 0xD0718001 vcst.t C010,VFPU_LOG10TWO +0x00002794: 0xD0718081 vcst.q C010,VFPU_LOG10TWO +0x00002798: 0xD0720001 vcst.s S010,VFPU_LOG2TEN +0x0000279C: 0xD0720081 vcst.p C010,VFPU_LOG2TEN +0x000027A0: 0xD0728001 vcst.t C010,VFPU_LOG2TEN +0x000027A4: 0xD0728081 vcst.q C010,VFPU_LOG2TEN +0x000027A8: 0xD0730001 vcst.s S010,VFPU_SQRT3/2 +0x000027AC: 0xD0730081 vcst.p C010,VFPU_SQRT3/2 +0x000027B0: 0xD0738001 vcst.t C010,VFPU_SQRT3/2 +0x000027B4: 0xD0738081 vcst.q C010,VFPU_SQRT3/2 +0x000027B8: 0x00000000 nop +0x000027BC: 0x00000000 nop +0x000027C0: 0x00000000 nop +0x000027C4: 0x00000000 nop +0x000027C8: 0x00000000 nop +0x000027CC: 0x00000000 nop +0x000027D0: 0x00000000 nop +0x000027D4: 0x00000000 nop +0x000027D8: 0x00000000 nop +0x000027DC: 0x00000000 nop +0x000027E0: 0x00000000 nop +0x000027E4: 0x00000000 nop +0x000027E8: 0x00000000 nop +0x000027EC: 0x00000000 nop +0x000027F0: 0x00000000 nop +0x000027F4: 0x00000000 nop +0x000027F8: 0x00000000 nop +0x000027FC: 0x00000000 nop +0x00002800: 0x00000000 nop +0x00002804: 0x00000000 nop +0x00002808: 0x00000000 nop +0x0000280C: 0x00000000 nop +0x00002810: 0x00000000 nop +0x00002814: 0x00000000 nop +0x00002818: 0x00000000 nop +0x0000281C: 0x00000000 nop +0x00002820: 0x00000000 nop +0x00002824: 0x00000000 nop +0x00002828: 0x00000000 nop +0x0000282C: 0x00000000 nop +0x00002830: 0x00000000 nop +0x00002834: 0x00000000 nop +0x00002838: 0x00000000 nop +0x0000283C: 0x00000000 nop +0x00002840: 0x00000000 nop +0x00002844: 0x00000000 nop +0x00002848: 0x00000000 nop +0x0000284C: 0x00000000 nop +0x00002850: 0x00000000 nop +0x00002854: 0x00000000 nop +0x00002858: 0x00000000 nop +0x0000285C: 0x00000000 nop +0x00002860: 0x00000000 nop +0x00002864: 0x00000000 nop +0x00002868: 0x00000000 nop +0x0000286C: 0x00000000 nop +0x00002870: 0x00000000 nop +0x00002874: 0x00000000 nop +0x00002878: 0xD2001001 vf2in.s S010,S400,0 +0x0000287C: 0xD2001081 vf2in.p C010,C400,0 +0x00002880: 0xD2009001 vf2in.t C010,C400,0 +0x00002884: 0xD2009081 vf2in.q C010,C400,0 +0x00002888: 0xD2011001 vf2in.s S010,S400,1 +0x0000288C: 0xD2011081 vf2in.p C010,C400,1 +0x00002890: 0xD2019001 vf2in.t C010,C400,1 +0x00002894: 0xD2019081 vf2in.q C010,C400,1 +0x00002898: 0xD2021001 vf2in.s S010,S400,2 +0x0000289C: 0xD2021081 vf2in.p C010,C400,2 +0x000028A0: 0xD2029001 vf2in.t C010,C400,2 +0x000028A4: 0xD2029081 vf2in.q C010,C400,2 +0x000028A8: 0xD2031001 vf2in.s S010,S400,3 +0x000028AC: 0xD2031081 vf2in.p C010,C400,3 +0x000028B0: 0xD2039001 vf2in.t C010,C400,3 +0x000028B4: 0xD2039081 vf2in.q C010,C400,3 +0x000028B8: 0xD2041001 vf2in.s S010,S400,4 +0x000028BC: 0xD2041081 vf2in.p C010,C400,4 +0x000028C0: 0xD2049001 vf2in.t C010,C400,4 +0x000028C4: 0xD2049081 vf2in.q C010,C400,4 +0x000028C8: 0xD2051001 vf2in.s S010,S400,5 +0x000028CC: 0xD2051081 vf2in.p C010,C400,5 +0x000028D0: 0xD2059001 vf2in.t C010,C400,5 +0x000028D4: 0xD2059081 vf2in.q C010,C400,5 +0x000028D8: 0xD2061001 vf2in.s S010,S400,6 +0x000028DC: 0xD2061081 vf2in.p C010,C400,6 +0x000028E0: 0xD2069001 vf2in.t C010,C400,6 +0x000028E4: 0xD2069081 vf2in.q C010,C400,6 +0x000028E8: 0xD2071001 vf2in.s S010,S400,7 +0x000028EC: 0xD2071081 vf2in.p C010,C400,7 +0x000028F0: 0xD2079001 vf2in.t C010,C400,7 +0x000028F4: 0xD2079081 vf2in.q C010,C400,7 +0x000028F8: 0xD2081001 vf2in.s S010,S400,8 +0x000028FC: 0xD2081081 vf2in.p C010,C400,8 +0x00002900: 0xD2089001 vf2in.t C010,C400,8 +0x00002904: 0xD2089081 vf2in.q C010,C400,8 +0x00002908: 0xD2091001 vf2in.s S010,S400,9 +0x0000290C: 0xD2091081 vf2in.p C010,C400,9 +0x00002910: 0xD2099001 vf2in.t C010,C400,9 +0x00002914: 0xD2099081 vf2in.q C010,C400,9 +0x00002918: 0xD20A1001 vf2in.s S010,S400,10 +0x0000291C: 0xD20A1081 vf2in.p C010,C400,10 +0x00002920: 0xD20A9001 vf2in.t C010,C400,10 +0x00002924: 0xD20A9081 vf2in.q C010,C400,10 +0x00002928: 0xD20B1001 vf2in.s S010,S400,11 +0x0000292C: 0xD20B1081 vf2in.p C010,C400,11 +0x00002930: 0xD20B9001 vf2in.t C010,C400,11 +0x00002934: 0xD20B9081 vf2in.q C010,C400,11 +0x00002938: 0xD20C1001 vf2in.s S010,S400,12 +0x0000293C: 0xD20C1081 vf2in.p C010,C400,12 +0x00002940: 0xD20C9001 vf2in.t C010,C400,12 +0x00002944: 0xD20C9081 vf2in.q C010,C400,12 +0x00002948: 0xD20D1001 vf2in.s S010,S400,13 +0x0000294C: 0xD20D1081 vf2in.p C010,C400,13 +0x00002950: 0xD20D9001 vf2in.t C010,C400,13 +0x00002954: 0xD20D9081 vf2in.q C010,C400,13 +0x00002958: 0xD20E1001 vf2in.s S010,S400,14 +0x0000295C: 0xD20E1081 vf2in.p C010,C400,14 +0x00002960: 0xD20E9001 vf2in.t C010,C400,14 +0x00002964: 0xD20E9081 vf2in.q C010,C400,14 +0x00002968: 0xD20F1001 vf2in.s S010,S400,15 +0x0000296C: 0xD20F1081 vf2in.p C010,C400,15 +0x00002970: 0xD20F9001 vf2in.t C010,C400,15 +0x00002974: 0xD20F9081 vf2in.q C010,C400,15 +0x00002978: 0xD2101001 vf2in.s S010,S400,16 +0x0000297C: 0xD2101081 vf2in.p C010,C400,16 +0x00002980: 0xD2109001 vf2in.t C010,C400,16 +0x00002984: 0xD2109081 vf2in.q C010,C400,16 +0x00002988: 0xD2111001 vf2in.s S010,S400,17 +0x0000298C: 0xD2111081 vf2in.p C010,C400,17 +0x00002990: 0xD2119001 vf2in.t C010,C400,17 +0x00002994: 0xD2119081 vf2in.q C010,C400,17 +0x00002998: 0xD2121001 vf2in.s S010,S400,18 +0x0000299C: 0xD2121081 vf2in.p C010,C400,18 +0x000029A0: 0xD2129001 vf2in.t C010,C400,18 +0x000029A4: 0xD2129081 vf2in.q C010,C400,18 +0x000029A8: 0xD2131001 vf2in.s S010,S400,19 +0x000029AC: 0xD2131081 vf2in.p C010,C400,19 +0x000029B0: 0xD2139001 vf2in.t C010,C400,19 +0x000029B4: 0xD2139081 vf2in.q C010,C400,19 +0x000029B8: 0xD2141001 vf2in.s S010,S400,20 +0x000029BC: 0xD2141081 vf2in.p C010,C400,20 +0x000029C0: 0xD2149001 vf2in.t C010,C400,20 +0x000029C4: 0xD2149081 vf2in.q C010,C400,20 +0x000029C8: 0xD2151001 vf2in.s S010,S400,21 +0x000029CC: 0xD2151081 vf2in.p C010,C400,21 +0x000029D0: 0xD2159001 vf2in.t C010,C400,21 +0x000029D4: 0xD2159081 vf2in.q C010,C400,21 +0x000029D8: 0xD2161001 vf2in.s S010,S400,22 +0x000029DC: 0xD2161081 vf2in.p C010,C400,22 +0x000029E0: 0xD2169001 vf2in.t C010,C400,22 +0x000029E4: 0xD2169081 vf2in.q C010,C400,22 +0x000029E8: 0xD2171001 vf2in.s S010,S400,23 +0x000029EC: 0xD2171081 vf2in.p C010,C400,23 +0x000029F0: 0xD2179001 vf2in.t C010,C400,23 +0x000029F4: 0xD2179081 vf2in.q C010,C400,23 +0x000029F8: 0xD2181001 vf2in.s S010,S400,24 +0x000029FC: 0xD2181081 vf2in.p C010,C400,24 +0x00002A00: 0xD2189001 vf2in.t C010,C400,24 +0x00002A04: 0xD2189081 vf2in.q C010,C400,24 +0x00002A08: 0xD2191001 vf2in.s S010,S400,25 +0x00002A0C: 0xD2191081 vf2in.p C010,C400,25 +0x00002A10: 0xD2199001 vf2in.t C010,C400,25 +0x00002A14: 0xD2199081 vf2in.q C010,C400,25 +0x00002A18: 0xD21A1001 vf2in.s S010,S400,26 +0x00002A1C: 0xD21A1081 vf2in.p C010,C400,26 +0x00002A20: 0xD21A9001 vf2in.t C010,C400,26 +0x00002A24: 0xD21A9081 vf2in.q C010,C400,26 +0x00002A28: 0xD21B1001 vf2in.s S010,S400,27 +0x00002A2C: 0xD21B1081 vf2in.p C010,C400,27 +0x00002A30: 0xD21B9001 vf2in.t C010,C400,27 +0x00002A34: 0xD21B9081 vf2in.q C010,C400,27 +0x00002A38: 0xD21C1001 vf2in.s S010,S400,28 +0x00002A3C: 0xD21C1081 vf2in.p C010,C400,28 +0x00002A40: 0xD21C9001 vf2in.t C010,C400,28 +0x00002A44: 0xD21C9081 vf2in.q C010,C400,28 +0x00002A48: 0xD21D1001 vf2in.s S010,S400,29 +0x00002A4C: 0xD21D1081 vf2in.p C010,C400,29 +0x00002A50: 0xD21D9001 vf2in.t C010,C400,29 +0x00002A54: 0xD21D9081 vf2in.q C010,C400,29 +0x00002A58: 0xD21E1001 vf2in.s S010,S400,30 +0x00002A5C: 0xD21E1081 vf2in.p C010,C400,30 +0x00002A60: 0xD21E9001 vf2in.t C010,C400,30 +0x00002A64: 0xD21E9081 vf2in.q C010,C400,30 +0x00002A68: 0xD21F1001 vf2in.s S010,S400,31 +0x00002A6C: 0xD21F1081 vf2in.p C010,C400,31 +0x00002A70: 0xD21F9001 vf2in.t C010,C400,31 +0x00002A74: 0xD21F9081 vf2in.q C010,C400,31 +0x00002A78: 0xD2201001 vf2iz.s S010,S400,0 +0x00002A7C: 0xD2201081 vf2iz.p C010,C400,0 +0x00002A80: 0xD2209001 vf2iz.t C010,C400,0 +0x00002A84: 0xD2209081 vf2iz.q C010,C400,0 +0x00002A88: 0xD2211001 vf2iz.s S010,S400,1 +0x00002A8C: 0xD2211081 vf2iz.p C010,C400,1 +0x00002A90: 0xD2219001 vf2iz.t C010,C400,1 +0x00002A94: 0xD2219081 vf2iz.q C010,C400,1 +0x00002A98: 0xD2221001 vf2iz.s S010,S400,2 +0x00002A9C: 0xD2221081 vf2iz.p C010,C400,2 +0x00002AA0: 0xD2229001 vf2iz.t C010,C400,2 +0x00002AA4: 0xD2229081 vf2iz.q C010,C400,2 +0x00002AA8: 0xD2231001 vf2iz.s S010,S400,3 +0x00002AAC: 0xD2231081 vf2iz.p C010,C400,3 +0x00002AB0: 0xD2239001 vf2iz.t C010,C400,3 +0x00002AB4: 0xD2239081 vf2iz.q C010,C400,3 +0x00002AB8: 0xD2241001 vf2iz.s S010,S400,4 +0x00002ABC: 0xD2241081 vf2iz.p C010,C400,4 +0x00002AC0: 0xD2249001 vf2iz.t C010,C400,4 +0x00002AC4: 0xD2249081 vf2iz.q C010,C400,4 +0x00002AC8: 0xD2251001 vf2iz.s S010,S400,5 +0x00002ACC: 0xD2251081 vf2iz.p C010,C400,5 +0x00002AD0: 0xD2259001 vf2iz.t C010,C400,5 +0x00002AD4: 0xD2259081 vf2iz.q C010,C400,5 +0x00002AD8: 0xD2261001 vf2iz.s S010,S400,6 +0x00002ADC: 0xD2261081 vf2iz.p C010,C400,6 +0x00002AE0: 0xD2269001 vf2iz.t C010,C400,6 +0x00002AE4: 0xD2269081 vf2iz.q C010,C400,6 +0x00002AE8: 0xD2271001 vf2iz.s S010,S400,7 +0x00002AEC: 0xD2271081 vf2iz.p C010,C400,7 +0x00002AF0: 0xD2279001 vf2iz.t C010,C400,7 +0x00002AF4: 0xD2279081 vf2iz.q C010,C400,7 +0x00002AF8: 0xD2281001 vf2iz.s S010,S400,8 +0x00002AFC: 0xD2281081 vf2iz.p C010,C400,8 +0x00002B00: 0xD2289001 vf2iz.t C010,C400,8 +0x00002B04: 0xD2289081 vf2iz.q C010,C400,8 +0x00002B08: 0xD2291001 vf2iz.s S010,S400,9 +0x00002B0C: 0xD2291081 vf2iz.p C010,C400,9 +0x00002B10: 0xD2299001 vf2iz.t C010,C400,9 +0x00002B14: 0xD2299081 vf2iz.q C010,C400,9 +0x00002B18: 0xD22A1001 vf2iz.s S010,S400,10 +0x00002B1C: 0xD22A1081 vf2iz.p C010,C400,10 +0x00002B20: 0xD22A9001 vf2iz.t C010,C400,10 +0x00002B24: 0xD22A9081 vf2iz.q C010,C400,10 +0x00002B28: 0xD22B1001 vf2iz.s S010,S400,11 +0x00002B2C: 0xD22B1081 vf2iz.p C010,C400,11 +0x00002B30: 0xD22B9001 vf2iz.t C010,C400,11 +0x00002B34: 0xD22B9081 vf2iz.q C010,C400,11 +0x00002B38: 0xD22C1001 vf2iz.s S010,S400,12 +0x00002B3C: 0xD22C1081 vf2iz.p C010,C400,12 +0x00002B40: 0xD22C9001 vf2iz.t C010,C400,12 +0x00002B44: 0xD22C9081 vf2iz.q C010,C400,12 +0x00002B48: 0xD22D1001 vf2iz.s S010,S400,13 +0x00002B4C: 0xD22D1081 vf2iz.p C010,C400,13 +0x00002B50: 0xD22D9001 vf2iz.t C010,C400,13 +0x00002B54: 0xD22D9081 vf2iz.q C010,C400,13 +0x00002B58: 0xD22E1001 vf2iz.s S010,S400,14 +0x00002B5C: 0xD22E1081 vf2iz.p C010,C400,14 +0x00002B60: 0xD22E9001 vf2iz.t C010,C400,14 +0x00002B64: 0xD22E9081 vf2iz.q C010,C400,14 +0x00002B68: 0xD22F1001 vf2iz.s S010,S400,15 +0x00002B6C: 0xD22F1081 vf2iz.p C010,C400,15 +0x00002B70: 0xD22F9001 vf2iz.t C010,C400,15 +0x00002B74: 0xD22F9081 vf2iz.q C010,C400,15 +0x00002B78: 0xD2301001 vf2iz.s S010,S400,16 +0x00002B7C: 0xD2301081 vf2iz.p C010,C400,16 +0x00002B80: 0xD2309001 vf2iz.t C010,C400,16 +0x00002B84: 0xD2309081 vf2iz.q C010,C400,16 +0x00002B88: 0xD2311001 vf2iz.s S010,S400,17 +0x00002B8C: 0xD2311081 vf2iz.p C010,C400,17 +0x00002B90: 0xD2319001 vf2iz.t C010,C400,17 +0x00002B94: 0xD2319081 vf2iz.q C010,C400,17 +0x00002B98: 0xD2321001 vf2iz.s S010,S400,18 +0x00002B9C: 0xD2321081 vf2iz.p C010,C400,18 +0x00002BA0: 0xD2329001 vf2iz.t C010,C400,18 +0x00002BA4: 0xD2329081 vf2iz.q C010,C400,18 +0x00002BA8: 0xD2331001 vf2iz.s S010,S400,19 +0x00002BAC: 0xD2331081 vf2iz.p C010,C400,19 +0x00002BB0: 0xD2339001 vf2iz.t C010,C400,19 +0x00002BB4: 0xD2339081 vf2iz.q C010,C400,19 +0x00002BB8: 0xD2341001 vf2iz.s S010,S400,20 +0x00002BBC: 0xD2341081 vf2iz.p C010,C400,20 +0x00002BC0: 0xD2349001 vf2iz.t C010,C400,20 +0x00002BC4: 0xD2349081 vf2iz.q C010,C400,20 +0x00002BC8: 0xD2351001 vf2iz.s S010,S400,21 +0x00002BCC: 0xD2351081 vf2iz.p C010,C400,21 +0x00002BD0: 0xD2359001 vf2iz.t C010,C400,21 +0x00002BD4: 0xD2359081 vf2iz.q C010,C400,21 +0x00002BD8: 0xD2361001 vf2iz.s S010,S400,22 +0x00002BDC: 0xD2361081 vf2iz.p C010,C400,22 +0x00002BE0: 0xD2369001 vf2iz.t C010,C400,22 +0x00002BE4: 0xD2369081 vf2iz.q C010,C400,22 +0x00002BE8: 0xD2371001 vf2iz.s S010,S400,23 +0x00002BEC: 0xD2371081 vf2iz.p C010,C400,23 +0x00002BF0: 0xD2379001 vf2iz.t C010,C400,23 +0x00002BF4: 0xD2379081 vf2iz.q C010,C400,23 +0x00002BF8: 0xD2381001 vf2iz.s S010,S400,24 +0x00002BFC: 0xD2381081 vf2iz.p C010,C400,24 +0x00002C00: 0xD2389001 vf2iz.t C010,C400,24 +0x00002C04: 0xD2389081 vf2iz.q C010,C400,24 +0x00002C08: 0xD2391001 vf2iz.s S010,S400,25 +0x00002C0C: 0xD2391081 vf2iz.p C010,C400,25 +0x00002C10: 0xD2399001 vf2iz.t C010,C400,25 +0x00002C14: 0xD2399081 vf2iz.q C010,C400,25 +0x00002C18: 0xD23A1001 vf2iz.s S010,S400,26 +0x00002C1C: 0xD23A1081 vf2iz.p C010,C400,26 +0x00002C20: 0xD23A9001 vf2iz.t C010,C400,26 +0x00002C24: 0xD23A9081 vf2iz.q C010,C400,26 +0x00002C28: 0xD23B1001 vf2iz.s S010,S400,27 +0x00002C2C: 0xD23B1081 vf2iz.p C010,C400,27 +0x00002C30: 0xD23B9001 vf2iz.t C010,C400,27 +0x00002C34: 0xD23B9081 vf2iz.q C010,C400,27 +0x00002C38: 0xD23C1001 vf2iz.s S010,S400,28 +0x00002C3C: 0xD23C1081 vf2iz.p C010,C400,28 +0x00002C40: 0xD23C9001 vf2iz.t C010,C400,28 +0x00002C44: 0xD23C9081 vf2iz.q C010,C400,28 +0x00002C48: 0xD23D1001 vf2iz.s S010,S400,29 +0x00002C4C: 0xD23D1081 vf2iz.p C010,C400,29 +0x00002C50: 0xD23D9001 vf2iz.t C010,C400,29 +0x00002C54: 0xD23D9081 vf2iz.q C010,C400,29 +0x00002C58: 0xD23E1001 vf2iz.s S010,S400,30 +0x00002C5C: 0xD23E1081 vf2iz.p C010,C400,30 +0x00002C60: 0xD23E9001 vf2iz.t C010,C400,30 +0x00002C64: 0xD23E9081 vf2iz.q C010,C400,30 +0x00002C68: 0xD23F1001 vf2iz.s S010,S400,31 +0x00002C6C: 0xD23F1081 vf2iz.p C010,C400,31 +0x00002C70: 0xD23F9001 vf2iz.t C010,C400,31 +0x00002C74: 0xD23F9081 vf2iz.q C010,C400,31 +0x00002C78: 0xD2401001 vf2iu.s S010,S400,0 +0x00002C7C: 0xD2401081 vf2iu.p C010,C400,0 +0x00002C80: 0xD2409001 vf2iu.t C010,C400,0 +0x00002C84: 0xD2409081 vf2iu.q C010,C400,0 +0x00002C88: 0xD2411001 vf2iu.s S010,S400,1 +0x00002C8C: 0xD2411081 vf2iu.p C010,C400,1 +0x00002C90: 0xD2419001 vf2iu.t C010,C400,1 +0x00002C94: 0xD2419081 vf2iu.q C010,C400,1 +0x00002C98: 0xD2421001 vf2iu.s S010,S400,2 +0x00002C9C: 0xD2421081 vf2iu.p C010,C400,2 +0x00002CA0: 0xD2429001 vf2iu.t C010,C400,2 +0x00002CA4: 0xD2429081 vf2iu.q C010,C400,2 +0x00002CA8: 0xD2431001 vf2iu.s S010,S400,3 +0x00002CAC: 0xD2431081 vf2iu.p C010,C400,3 +0x00002CB0: 0xD2439001 vf2iu.t C010,C400,3 +0x00002CB4: 0xD2439081 vf2iu.q C010,C400,3 +0x00002CB8: 0xD2441001 vf2iu.s S010,S400,4 +0x00002CBC: 0xD2441081 vf2iu.p C010,C400,4 +0x00002CC0: 0xD2449001 vf2iu.t C010,C400,4 +0x00002CC4: 0xD2449081 vf2iu.q C010,C400,4 +0x00002CC8: 0xD2451001 vf2iu.s S010,S400,5 +0x00002CCC: 0xD2451081 vf2iu.p C010,C400,5 +0x00002CD0: 0xD2459001 vf2iu.t C010,C400,5 +0x00002CD4: 0xD2459081 vf2iu.q C010,C400,5 +0x00002CD8: 0xD2461001 vf2iu.s S010,S400,6 +0x00002CDC: 0xD2461081 vf2iu.p C010,C400,6 +0x00002CE0: 0xD2469001 vf2iu.t C010,C400,6 +0x00002CE4: 0xD2469081 vf2iu.q C010,C400,6 +0x00002CE8: 0xD2471001 vf2iu.s S010,S400,7 +0x00002CEC: 0xD2471081 vf2iu.p C010,C400,7 +0x00002CF0: 0xD2479001 vf2iu.t C010,C400,7 +0x00002CF4: 0xD2479081 vf2iu.q C010,C400,7 +0x00002CF8: 0xD2481001 vf2iu.s S010,S400,8 +0x00002CFC: 0xD2481081 vf2iu.p C010,C400,8 +0x00002D00: 0xD2489001 vf2iu.t C010,C400,8 +0x00002D04: 0xD2489081 vf2iu.q C010,C400,8 +0x00002D08: 0xD2491001 vf2iu.s S010,S400,9 +0x00002D0C: 0xD2491081 vf2iu.p C010,C400,9 +0x00002D10: 0xD2499001 vf2iu.t C010,C400,9 +0x00002D14: 0xD2499081 vf2iu.q C010,C400,9 +0x00002D18: 0xD24A1001 vf2iu.s S010,S400,10 +0x00002D1C: 0xD24A1081 vf2iu.p C010,C400,10 +0x00002D20: 0xD24A9001 vf2iu.t C010,C400,10 +0x00002D24: 0xD24A9081 vf2iu.q C010,C400,10 +0x00002D28: 0xD24B1001 vf2iu.s S010,S400,11 +0x00002D2C: 0xD24B1081 vf2iu.p C010,C400,11 +0x00002D30: 0xD24B9001 vf2iu.t C010,C400,11 +0x00002D34: 0xD24B9081 vf2iu.q C010,C400,11 +0x00002D38: 0xD24C1001 vf2iu.s S010,S400,12 +0x00002D3C: 0xD24C1081 vf2iu.p C010,C400,12 +0x00002D40: 0xD24C9001 vf2iu.t C010,C400,12 +0x00002D44: 0xD24C9081 vf2iu.q C010,C400,12 +0x00002D48: 0xD24D1001 vf2iu.s S010,S400,13 +0x00002D4C: 0xD24D1081 vf2iu.p C010,C400,13 +0x00002D50: 0xD24D9001 vf2iu.t C010,C400,13 +0x00002D54: 0xD24D9081 vf2iu.q C010,C400,13 +0x00002D58: 0xD24E1001 vf2iu.s S010,S400,14 +0x00002D5C: 0xD24E1081 vf2iu.p C010,C400,14 +0x00002D60: 0xD24E9001 vf2iu.t C010,C400,14 +0x00002D64: 0xD24E9081 vf2iu.q C010,C400,14 +0x00002D68: 0xD24F1001 vf2iu.s S010,S400,15 +0x00002D6C: 0xD24F1081 vf2iu.p C010,C400,15 +0x00002D70: 0xD24F9001 vf2iu.t C010,C400,15 +0x00002D74: 0xD24F9081 vf2iu.q C010,C400,15 +0x00002D78: 0xD2501001 vf2iu.s S010,S400,16 +0x00002D7C: 0xD2501081 vf2iu.p C010,C400,16 +0x00002D80: 0xD2509001 vf2iu.t C010,C400,16 +0x00002D84: 0xD2509081 vf2iu.q C010,C400,16 +0x00002D88: 0xD2511001 vf2iu.s S010,S400,17 +0x00002D8C: 0xD2511081 vf2iu.p C010,C400,17 +0x00002D90: 0xD2519001 vf2iu.t C010,C400,17 +0x00002D94: 0xD2519081 vf2iu.q C010,C400,17 +0x00002D98: 0xD2521001 vf2iu.s S010,S400,18 +0x00002D9C: 0xD2521081 vf2iu.p C010,C400,18 +0x00002DA0: 0xD2529001 vf2iu.t C010,C400,18 +0x00002DA4: 0xD2529081 vf2iu.q C010,C400,18 +0x00002DA8: 0xD2531001 vf2iu.s S010,S400,19 +0x00002DAC: 0xD2531081 vf2iu.p C010,C400,19 +0x00002DB0: 0xD2539001 vf2iu.t C010,C400,19 +0x00002DB4: 0xD2539081 vf2iu.q C010,C400,19 +0x00002DB8: 0xD2541001 vf2iu.s S010,S400,20 +0x00002DBC: 0xD2541081 vf2iu.p C010,C400,20 +0x00002DC0: 0xD2549001 vf2iu.t C010,C400,20 +0x00002DC4: 0xD2549081 vf2iu.q C010,C400,20 +0x00002DC8: 0xD2551001 vf2iu.s S010,S400,21 +0x00002DCC: 0xD2551081 vf2iu.p C010,C400,21 +0x00002DD0: 0xD2559001 vf2iu.t C010,C400,21 +0x00002DD4: 0xD2559081 vf2iu.q C010,C400,21 +0x00002DD8: 0xD2561001 vf2iu.s S010,S400,22 +0x00002DDC: 0xD2561081 vf2iu.p C010,C400,22 +0x00002DE0: 0xD2569001 vf2iu.t C010,C400,22 +0x00002DE4: 0xD2569081 vf2iu.q C010,C400,22 +0x00002DE8: 0xD2571001 vf2iu.s S010,S400,23 +0x00002DEC: 0xD2571081 vf2iu.p C010,C400,23 +0x00002DF0: 0xD2579001 vf2iu.t C010,C400,23 +0x00002DF4: 0xD2579081 vf2iu.q C010,C400,23 +0x00002DF8: 0xD2581001 vf2iu.s S010,S400,24 +0x00002DFC: 0xD2581081 vf2iu.p C010,C400,24 +0x00002E00: 0xD2589001 vf2iu.t C010,C400,24 +0x00002E04: 0xD2589081 vf2iu.q C010,C400,24 +0x00002E08: 0xD2591001 vf2iu.s S010,S400,25 +0x00002E0C: 0xD2591081 vf2iu.p C010,C400,25 +0x00002E10: 0xD2599001 vf2iu.t C010,C400,25 +0x00002E14: 0xD2599081 vf2iu.q C010,C400,25 +0x00002E18: 0xD25A1001 vf2iu.s S010,S400,26 +0x00002E1C: 0xD25A1081 vf2iu.p C010,C400,26 +0x00002E20: 0xD25A9001 vf2iu.t C010,C400,26 +0x00002E24: 0xD25A9081 vf2iu.q C010,C400,26 +0x00002E28: 0xD25B1001 vf2iu.s S010,S400,27 +0x00002E2C: 0xD25B1081 vf2iu.p C010,C400,27 +0x00002E30: 0xD25B9001 vf2iu.t C010,C400,27 +0x00002E34: 0xD25B9081 vf2iu.q C010,C400,27 +0x00002E38: 0xD25C1001 vf2iu.s S010,S400,28 +0x00002E3C: 0xD25C1081 vf2iu.p C010,C400,28 +0x00002E40: 0xD25C9001 vf2iu.t C010,C400,28 +0x00002E44: 0xD25C9081 vf2iu.q C010,C400,28 +0x00002E48: 0xD25D1001 vf2iu.s S010,S400,29 +0x00002E4C: 0xD25D1081 vf2iu.p C010,C400,29 +0x00002E50: 0xD25D9001 vf2iu.t C010,C400,29 +0x00002E54: 0xD25D9081 vf2iu.q C010,C400,29 +0x00002E58: 0xD25E1001 vf2iu.s S010,S400,30 +0x00002E5C: 0xD25E1081 vf2iu.p C010,C400,30 +0x00002E60: 0xD25E9001 vf2iu.t C010,C400,30 +0x00002E64: 0xD25E9081 vf2iu.q C010,C400,30 +0x00002E68: 0xD25F1001 vf2iu.s S010,S400,31 +0x00002E6C: 0xD25F1081 vf2iu.p C010,C400,31 +0x00002E70: 0xD25F9001 vf2iu.t C010,C400,31 +0x00002E74: 0xD25F9081 vf2iu.q C010,C400,31 +0x00002E78: 0xD2601001 vf2id.s S010,S400,0 +0x00002E7C: 0xD2601081 vf2id.p C010,C400,0 +0x00002E80: 0xD2609001 vf2id.t C010,C400,0 +0x00002E84: 0xD2609081 vf2id.q C010,C400,0 +0x00002E88: 0xD2611001 vf2id.s S010,S400,1 +0x00002E8C: 0xD2611081 vf2id.p C010,C400,1 +0x00002E90: 0xD2619001 vf2id.t C010,C400,1 +0x00002E94: 0xD2619081 vf2id.q C010,C400,1 +0x00002E98: 0xD2621001 vf2id.s S010,S400,2 +0x00002E9C: 0xD2621081 vf2id.p C010,C400,2 +0x00002EA0: 0xD2629001 vf2id.t C010,C400,2 +0x00002EA4: 0xD2629081 vf2id.q C010,C400,2 +0x00002EA8: 0xD2631001 vf2id.s S010,S400,3 +0x00002EAC: 0xD2631081 vf2id.p C010,C400,3 +0x00002EB0: 0xD2639001 vf2id.t C010,C400,3 +0x00002EB4: 0xD2639081 vf2id.q C010,C400,3 +0x00002EB8: 0xD2641001 vf2id.s S010,S400,4 +0x00002EBC: 0xD2641081 vf2id.p C010,C400,4 +0x00002EC0: 0xD2649001 vf2id.t C010,C400,4 +0x00002EC4: 0xD2649081 vf2id.q C010,C400,4 +0x00002EC8: 0xD2651001 vf2id.s S010,S400,5 +0x00002ECC: 0xD2651081 vf2id.p C010,C400,5 +0x00002ED0: 0xD2659001 vf2id.t C010,C400,5 +0x00002ED4: 0xD2659081 vf2id.q C010,C400,5 +0x00002ED8: 0xD2661001 vf2id.s S010,S400,6 +0x00002EDC: 0xD2661081 vf2id.p C010,C400,6 +0x00002EE0: 0xD2669001 vf2id.t C010,C400,6 +0x00002EE4: 0xD2669081 vf2id.q C010,C400,6 +0x00002EE8: 0xD2671001 vf2id.s S010,S400,7 +0x00002EEC: 0xD2671081 vf2id.p C010,C400,7 +0x00002EF0: 0xD2679001 vf2id.t C010,C400,7 +0x00002EF4: 0xD2679081 vf2id.q C010,C400,7 +0x00002EF8: 0xD2681001 vf2id.s S010,S400,8 +0x00002EFC: 0xD2681081 vf2id.p C010,C400,8 +0x00002F00: 0xD2689001 vf2id.t C010,C400,8 +0x00002F04: 0xD2689081 vf2id.q C010,C400,8 +0x00002F08: 0xD2691001 vf2id.s S010,S400,9 +0x00002F0C: 0xD2691081 vf2id.p C010,C400,9 +0x00002F10: 0xD2699001 vf2id.t C010,C400,9 +0x00002F14: 0xD2699081 vf2id.q C010,C400,9 +0x00002F18: 0xD26A1001 vf2id.s S010,S400,10 +0x00002F1C: 0xD26A1081 vf2id.p C010,C400,10 +0x00002F20: 0xD26A9001 vf2id.t C010,C400,10 +0x00002F24: 0xD26A9081 vf2id.q C010,C400,10 +0x00002F28: 0xD26B1001 vf2id.s S010,S400,11 +0x00002F2C: 0xD26B1081 vf2id.p C010,C400,11 +0x00002F30: 0xD26B9001 vf2id.t C010,C400,11 +0x00002F34: 0xD26B9081 vf2id.q C010,C400,11 +0x00002F38: 0xD26C1001 vf2id.s S010,S400,12 +0x00002F3C: 0xD26C1081 vf2id.p C010,C400,12 +0x00002F40: 0xD26C9001 vf2id.t C010,C400,12 +0x00002F44: 0xD26C9081 vf2id.q C010,C400,12 +0x00002F48: 0xD26D1001 vf2id.s S010,S400,13 +0x00002F4C: 0xD26D1081 vf2id.p C010,C400,13 +0x00002F50: 0xD26D9001 vf2id.t C010,C400,13 +0x00002F54: 0xD26D9081 vf2id.q C010,C400,13 +0x00002F58: 0xD26E1001 vf2id.s S010,S400,14 +0x00002F5C: 0xD26E1081 vf2id.p C010,C400,14 +0x00002F60: 0xD26E9001 vf2id.t C010,C400,14 +0x00002F64: 0xD26E9081 vf2id.q C010,C400,14 +0x00002F68: 0xD26F1001 vf2id.s S010,S400,15 +0x00002F6C: 0xD26F1081 vf2id.p C010,C400,15 +0x00002F70: 0xD26F9001 vf2id.t C010,C400,15 +0x00002F74: 0xD26F9081 vf2id.q C010,C400,15 +0x00002F78: 0xD2701001 vf2id.s S010,S400,16 +0x00002F7C: 0xD2701081 vf2id.p C010,C400,16 +0x00002F80: 0xD2709001 vf2id.t C010,C400,16 +0x00002F84: 0xD2709081 vf2id.q C010,C400,16 +0x00002F88: 0xD2711001 vf2id.s S010,S400,17 +0x00002F8C: 0xD2711081 vf2id.p C010,C400,17 +0x00002F90: 0xD2719001 vf2id.t C010,C400,17 +0x00002F94: 0xD2719081 vf2id.q C010,C400,17 +0x00002F98: 0xD2721001 vf2id.s S010,S400,18 +0x00002F9C: 0xD2721081 vf2id.p C010,C400,18 +0x00002FA0: 0xD2729001 vf2id.t C010,C400,18 +0x00002FA4: 0xD2729081 vf2id.q C010,C400,18 +0x00002FA8: 0xD2731001 vf2id.s S010,S400,19 +0x00002FAC: 0xD2731081 vf2id.p C010,C400,19 +0x00002FB0: 0xD2739001 vf2id.t C010,C400,19 +0x00002FB4: 0xD2739081 vf2id.q C010,C400,19 +0x00002FB8: 0xD2741001 vf2id.s S010,S400,20 +0x00002FBC: 0xD2741081 vf2id.p C010,C400,20 +0x00002FC0: 0xD2749001 vf2id.t C010,C400,20 +0x00002FC4: 0xD2749081 vf2id.q C010,C400,20 +0x00002FC8: 0xD2751001 vf2id.s S010,S400,21 +0x00002FCC: 0xD2751081 vf2id.p C010,C400,21 +0x00002FD0: 0xD2759001 vf2id.t C010,C400,21 +0x00002FD4: 0xD2759081 vf2id.q C010,C400,21 +0x00002FD8: 0xD2761001 vf2id.s S010,S400,22 +0x00002FDC: 0xD2761081 vf2id.p C010,C400,22 +0x00002FE0: 0xD2769001 vf2id.t C010,C400,22 +0x00002FE4: 0xD2769081 vf2id.q C010,C400,22 +0x00002FE8: 0xD2771001 vf2id.s S010,S400,23 +0x00002FEC: 0xD2771081 vf2id.p C010,C400,23 +0x00002FF0: 0xD2779001 vf2id.t C010,C400,23 +0x00002FF4: 0xD2779081 vf2id.q C010,C400,23 +0x00002FF8: 0xD2781001 vf2id.s S010,S400,24 +0x00002FFC: 0xD2781081 vf2id.p C010,C400,24 +0x00003000: 0xD2789001 vf2id.t C010,C400,24 +0x00003004: 0xD2789081 vf2id.q C010,C400,24 +0x00003008: 0xD2791001 vf2id.s S010,S400,25 +0x0000300C: 0xD2791081 vf2id.p C010,C400,25 +0x00003010: 0xD2799001 vf2id.t C010,C400,25 +0x00003014: 0xD2799081 vf2id.q C010,C400,25 +0x00003018: 0xD27A1001 vf2id.s S010,S400,26 +0x0000301C: 0xD27A1081 vf2id.p C010,C400,26 +0x00003020: 0xD27A9001 vf2id.t C010,C400,26 +0x00003024: 0xD27A9081 vf2id.q C010,C400,26 +0x00003028: 0xD27B1001 vf2id.s S010,S400,27 +0x0000302C: 0xD27B1081 vf2id.p C010,C400,27 +0x00003030: 0xD27B9001 vf2id.t C010,C400,27 +0x00003034: 0xD27B9081 vf2id.q C010,C400,27 +0x00003038: 0xD27C1001 vf2id.s S010,S400,28 +0x0000303C: 0xD27C1081 vf2id.p C010,C400,28 +0x00003040: 0xD27C9001 vf2id.t C010,C400,28 +0x00003044: 0xD27C9081 vf2id.q C010,C400,28 +0x00003048: 0xD27D1001 vf2id.s S010,S400,29 +0x0000304C: 0xD27D1081 vf2id.p C010,C400,29 +0x00003050: 0xD27D9001 vf2id.t C010,C400,29 +0x00003054: 0xD27D9081 vf2id.q C010,C400,29 +0x00003058: 0xD27E1001 vf2id.s S010,S400,30 +0x0000305C: 0xD27E1081 vf2id.p C010,C400,30 +0x00003060: 0xD27E9001 vf2id.t C010,C400,30 +0x00003064: 0xD27E9081 vf2id.q C010,C400,30 +0x00003068: 0xD27F1001 vf2id.s S010,S400,31 +0x0000306C: 0xD27F1081 vf2id.p C010,C400,31 +0x00003070: 0xD27F9001 vf2id.t C010,C400,31 +0x00003074: 0xD27F9081 vf2id.q C010,C400,31 +0x00003078: 0xD2801001 vi2f.s S010,S400,0 +0x0000307C: 0xD2801081 vi2f.p C010,C400,0 +0x00003080: 0xD2809001 vi2f.t C010,C400,0 +0x00003084: 0xD2809081 vi2f.q C010,C400,0 +0x00003088: 0xD2811001 vi2f.s S010,S400,1 +0x0000308C: 0xD2811081 vi2f.p C010,C400,1 +0x00003090: 0xD2819001 vi2f.t C010,C400,1 +0x00003094: 0xD2819081 vi2f.q C010,C400,1 +0x00003098: 0xD2821001 vi2f.s S010,S400,2 +0x0000309C: 0xD2821081 vi2f.p C010,C400,2 +0x000030A0: 0xD2829001 vi2f.t C010,C400,2 +0x000030A4: 0xD2829081 vi2f.q C010,C400,2 +0x000030A8: 0xD2831001 vi2f.s S010,S400,3 +0x000030AC: 0xD2831081 vi2f.p C010,C400,3 +0x000030B0: 0xD2839001 vi2f.t C010,C400,3 +0x000030B4: 0xD2839081 vi2f.q C010,C400,3 +0x000030B8: 0xD2841001 vi2f.s S010,S400,4 +0x000030BC: 0xD2841081 vi2f.p C010,C400,4 +0x000030C0: 0xD2849001 vi2f.t C010,C400,4 +0x000030C4: 0xD2849081 vi2f.q C010,C400,4 +0x000030C8: 0xD2851001 vi2f.s S010,S400,5 +0x000030CC: 0xD2851081 vi2f.p C010,C400,5 +0x000030D0: 0xD2859001 vi2f.t C010,C400,5 +0x000030D4: 0xD2859081 vi2f.q C010,C400,5 +0x000030D8: 0xD2861001 vi2f.s S010,S400,6 +0x000030DC: 0xD2861081 vi2f.p C010,C400,6 +0x000030E0: 0xD2869001 vi2f.t C010,C400,6 +0x000030E4: 0xD2869081 vi2f.q C010,C400,6 +0x000030E8: 0xD2871001 vi2f.s S010,S400,7 +0x000030EC: 0xD2871081 vi2f.p C010,C400,7 +0x000030F0: 0xD2879001 vi2f.t C010,C400,7 +0x000030F4: 0xD2879081 vi2f.q C010,C400,7 +0x000030F8: 0xD2881001 vi2f.s S010,S400,8 +0x000030FC: 0xD2881081 vi2f.p C010,C400,8 +0x00003100: 0xD2889001 vi2f.t C010,C400,8 +0x00003104: 0xD2889081 vi2f.q C010,C400,8 +0x00003108: 0xD2891001 vi2f.s S010,S400,9 +0x0000310C: 0xD2891081 vi2f.p C010,C400,9 +0x00003110: 0xD2899001 vi2f.t C010,C400,9 +0x00003114: 0xD2899081 vi2f.q C010,C400,9 +0x00003118: 0xD28A1001 vi2f.s S010,S400,10 +0x0000311C: 0xD28A1081 vi2f.p C010,C400,10 +0x00003120: 0xD28A9001 vi2f.t C010,C400,10 +0x00003124: 0xD28A9081 vi2f.q C010,C400,10 +0x00003128: 0xD28B1001 vi2f.s S010,S400,11 +0x0000312C: 0xD28B1081 vi2f.p C010,C400,11 +0x00003130: 0xD28B9001 vi2f.t C010,C400,11 +0x00003134: 0xD28B9081 vi2f.q C010,C400,11 +0x00003138: 0xD28C1001 vi2f.s S010,S400,12 +0x0000313C: 0xD28C1081 vi2f.p C010,C400,12 +0x00003140: 0xD28C9001 vi2f.t C010,C400,12 +0x00003144: 0xD28C9081 vi2f.q C010,C400,12 +0x00003148: 0xD28D1001 vi2f.s S010,S400,13 +0x0000314C: 0xD28D1081 vi2f.p C010,C400,13 +0x00003150: 0xD28D9001 vi2f.t C010,C400,13 +0x00003154: 0xD28D9081 vi2f.q C010,C400,13 +0x00003158: 0xD28E1001 vi2f.s S010,S400,14 +0x0000315C: 0xD28E1081 vi2f.p C010,C400,14 +0x00003160: 0xD28E9001 vi2f.t C010,C400,14 +0x00003164: 0xD28E9081 vi2f.q C010,C400,14 +0x00003168: 0xD28F1001 vi2f.s S010,S400,15 +0x0000316C: 0xD28F1081 vi2f.p C010,C400,15 +0x00003170: 0xD28F9001 vi2f.t C010,C400,15 +0x00003174: 0xD28F9081 vi2f.q C010,C400,15 +0x00003178: 0xD2901001 vi2f.s S010,S400,16 +0x0000317C: 0xD2901081 vi2f.p C010,C400,16 +0x00003180: 0xD2909001 vi2f.t C010,C400,16 +0x00003184: 0xD2909081 vi2f.q C010,C400,16 +0x00003188: 0xD2911001 vi2f.s S010,S400,17 +0x0000318C: 0xD2911081 vi2f.p C010,C400,17 +0x00003190: 0xD2919001 vi2f.t C010,C400,17 +0x00003194: 0xD2919081 vi2f.q C010,C400,17 +0x00003198: 0xD2921001 vi2f.s S010,S400,18 +0x0000319C: 0xD2921081 vi2f.p C010,C400,18 +0x000031A0: 0xD2929001 vi2f.t C010,C400,18 +0x000031A4: 0xD2929081 vi2f.q C010,C400,18 +0x000031A8: 0xD2931001 vi2f.s S010,S400,19 +0x000031AC: 0xD2931081 vi2f.p C010,C400,19 +0x000031B0: 0xD2939001 vi2f.t C010,C400,19 +0x000031B4: 0xD2939081 vi2f.q C010,C400,19 +0x000031B8: 0xD2941001 vi2f.s S010,S400,20 +0x000031BC: 0xD2941081 vi2f.p C010,C400,20 +0x000031C0: 0xD2949001 vi2f.t C010,C400,20 +0x000031C4: 0xD2949081 vi2f.q C010,C400,20 +0x000031C8: 0xD2951001 vi2f.s S010,S400,21 +0x000031CC: 0xD2951081 vi2f.p C010,C400,21 +0x000031D0: 0xD2959001 vi2f.t C010,C400,21 +0x000031D4: 0xD2959081 vi2f.q C010,C400,21 +0x000031D8: 0xD2961001 vi2f.s S010,S400,22 +0x000031DC: 0xD2961081 vi2f.p C010,C400,22 +0x000031E0: 0xD2969001 vi2f.t C010,C400,22 +0x000031E4: 0xD2969081 vi2f.q C010,C400,22 +0x000031E8: 0xD2971001 vi2f.s S010,S400,23 +0x000031EC: 0xD2971081 vi2f.p C010,C400,23 +0x000031F0: 0xD2979001 vi2f.t C010,C400,23 +0x000031F4: 0xD2979081 vi2f.q C010,C400,23 +0x000031F8: 0xD2981001 vi2f.s S010,S400,24 +0x000031FC: 0xD2981081 vi2f.p C010,C400,24 +0x00003200: 0xD2989001 vi2f.t C010,C400,24 +0x00003204: 0xD2989081 vi2f.q C010,C400,24 +0x00003208: 0xD2991001 vi2f.s S010,S400,25 +0x0000320C: 0xD2991081 vi2f.p C010,C400,25 +0x00003210: 0xD2999001 vi2f.t C010,C400,25 +0x00003214: 0xD2999081 vi2f.q C010,C400,25 +0x00003218: 0xD29A1001 vi2f.s S010,S400,26 +0x0000321C: 0xD29A1081 vi2f.p C010,C400,26 +0x00003220: 0xD29A9001 vi2f.t C010,C400,26 +0x00003224: 0xD29A9081 vi2f.q C010,C400,26 +0x00003228: 0xD29B1001 vi2f.s S010,S400,27 +0x0000322C: 0xD29B1081 vi2f.p C010,C400,27 +0x00003230: 0xD29B9001 vi2f.t C010,C400,27 +0x00003234: 0xD29B9081 vi2f.q C010,C400,27 +0x00003238: 0xD29C1001 vi2f.s S010,S400,28 +0x0000323C: 0xD29C1081 vi2f.p C010,C400,28 +0x00003240: 0xD29C9001 vi2f.t C010,C400,28 +0x00003244: 0xD29C9081 vi2f.q C010,C400,28 +0x00003248: 0xD29D1001 vi2f.s S010,S400,29 +0x0000324C: 0xD29D1081 vi2f.p C010,C400,29 +0x00003250: 0xD29D9001 vi2f.t C010,C400,29 +0x00003254: 0xD29D9081 vi2f.q C010,C400,29 +0x00003258: 0xD29E1001 vi2f.s S010,S400,30 +0x0000325C: 0xD29E1081 vi2f.p C010,C400,30 +0x00003260: 0xD29E9001 vi2f.t C010,C400,30 +0x00003264: 0xD29E9081 vi2f.q C010,C400,30 +0x00003268: 0xD29F1001 vi2f.s S010,S400,31 +0x0000326C: 0xD29F1081 vi2f.p C010,C400,31 +0x00003270: 0xD29F9001 vi2f.t C010,C400,31 +0x00003274: 0xD29F9081 vi2f.q C010,C400,31 +0x00003278: 0xD2A01001 vcmovt.s S010,S400,cc0 +0x0000327C: 0xD2A01081 vcmovt.p C010,C400,cc0 +0x00003280: 0xD2A09001 vcmovt.t C010,C400,cc0 +0x00003284: 0xD2A09081 vcmovt.q C010,C400,cc0 +0x00003288: 0xD2A11001 vcmovt.s S010,S400,cc1 +0x0000328C: 0xD2A11081 vcmovt.p C010,C400,cc1 +0x00003290: 0xD2A19001 vcmovt.t C010,C400,cc1 +0x00003294: 0xD2A19081 vcmovt.q C010,C400,cc1 +0x00003298: 0xD2A21001 vcmovt.s S010,S400,cc2 +0x0000329C: 0xD2A21081 vcmovt.p C010,C400,cc2 +0x000032A0: 0xD2A29001 vcmovt.t C010,C400,cc2 +0x000032A4: 0xD2A29081 vcmovt.q C010,C400,cc2 +0x000032A8: 0xD2A31001 vcmovt.s S010,S400,cc3 +0x000032AC: 0xD2A31081 vcmovt.p C010,C400,cc3 +0x000032B0: 0xD2A39001 vcmovt.t C010,C400,cc3 +0x000032B4: 0xD2A39081 vcmovt.q C010,C400,cc3 +0x000032B8: 0xD2A41001 vcmovt.s S010,S400,cc4 +0x000032BC: 0xD2A41081 vcmovt.p C010,C400,cc4 +0x000032C0: 0xD2A49001 vcmovt.t C010,C400,cc4 +0x000032C4: 0xD2A49081 vcmovt.q C010,C400,cc4 +0x000032C8: 0xD2A51001 vcmovt.s S010,S400,cc5 +0x000032CC: 0xD2A51081 vcmovt.p C010,C400,cc5 +0x000032D0: 0xD2A59001 vcmovt.t C010,C400,cc5 +0x000032D4: 0xD2A59081 vcmovt.q C010,C400,cc5 +0x000032D8: 0xD2A61001 vcmovt.s S010,S400,cc6 +0x000032DC: 0xD2A61081 vcmovt.p C010,C400,cc6 +0x000032E0: 0xD2A69001 vcmovt.t C010,C400,cc6 +0x000032E4: 0xD2A69081 vcmovt.q C010,C400,cc6 +0x000032E8: 0xD2A81001 vcmovf.s S010,S400,cc0 +0x000032EC: 0xD2A81081 vcmovf.p C010,C400,cc0 +0x000032F0: 0xD2A89001 vcmovf.t C010,C400,cc0 +0x000032F4: 0xD2A89081 vcmovf.q C010,C400,cc0 +0x000032F8: 0xD2A91001 vcmovf.s S010,S400,cc1 +0x000032FC: 0xD2A91081 vcmovf.p C010,C400,cc1 +0x00003300: 0xD2A99001 vcmovf.t C010,C400,cc1 +0x00003304: 0xD2A99081 vcmovf.q C010,C400,cc1 +0x00003308: 0xD2AA1001 vcmovf.s S010,S400,cc2 +0x0000330C: 0xD2AA1081 vcmovf.p C010,C400,cc2 +0x00003310: 0xD2AA9001 vcmovf.t C010,C400,cc2 +0x00003314: 0xD2AA9081 vcmovf.q C010,C400,cc2 +0x00003318: 0xD2AB1001 vcmovf.s S010,S400,cc3 +0x0000331C: 0xD2AB1081 vcmovf.p C010,C400,cc3 +0x00003320: 0xD2AB9001 vcmovf.t C010,C400,cc3 +0x00003324: 0xD2AB9081 vcmovf.q C010,C400,cc3 +0x00003328: 0xD2AC1001 vcmovf.s S010,S400,cc4 +0x0000332C: 0xD2AC1081 vcmovf.p C010,C400,cc4 +0x00003330: 0xD2AC9001 vcmovf.t C010,C400,cc4 +0x00003334: 0xD2AC9081 vcmovf.q C010,C400,cc4 +0x00003338: 0xD2AD1001 vcmovf.s S010,S400,cc5 +0x0000333C: 0xD2AD1081 vcmovf.p C010,C400,cc5 +0x00003340: 0xD2AD9001 vcmovf.t C010,C400,cc5 +0x00003344: 0xD2AD9081 vcmovf.q C010,C400,cc5 +0x00003348: 0xD2AE1001 vcmovf.s S010,S400,cc6 +0x0000334C: 0xD2AE1081 vcmovf.p C010,C400,cc6 +0x00003350: 0xD2AE9001 vcmovf.t C010,C400,cc6 +0x00003354: 0xD2AE9081 vcmovf.q C010,C400,cc6 +0x00003358: 0xD3001001 vwbn.s S010,S400,0 +0x0000335C: 0xD3011001 vwbn.s S010,S400,1 +0x00003360: 0xD3021001 vwbn.s S010,S400,2 +0x00003364: 0xD3031001 vwbn.s S010,S400,3 +0x00003368: 0xD3041001 vwbn.s S010,S400,4 +0x0000336C: 0xD3051001 vwbn.s S010,S400,5 +0x00003370: 0xD3061001 vwbn.s S010,S400,6 +0x00003374: 0xD3071001 vwbn.s S010,S400,7 +0x00003378: 0xD3081001 vwbn.s S010,S400,8 +0x0000337C: 0xD3091001 vwbn.s S010,S400,9 +0x00003380: 0xD30A1001 vwbn.s S010,S400,10 +0x00003384: 0xD30B1001 vwbn.s S010,S400,11 +0x00003388: 0xD30C1001 vwbn.s S010,S400,12 +0x0000338C: 0xD30D1001 vwbn.s S010,S400,13 +0x00003390: 0xD30E1001 vwbn.s S010,S400,14 +0x00003394: 0xD30F1001 vwbn.s S010,S400,15 +0x00003398: 0xD3101001 vwbn.s S010,S400,16 +0x0000339C: 0xD3111001 vwbn.s S010,S400,17 +0x000033A0: 0xD3121001 vwbn.s S010,S400,18 +0x000033A4: 0xD3131001 vwbn.s S010,S400,19 +0x000033A8: 0xD3141001 vwbn.s S010,S400,20 +0x000033AC: 0xD3151001 vwbn.s S010,S400,21 +0x000033B0: 0xD3161001 vwbn.s S010,S400,22 +0x000033B4: 0xD3171001 vwbn.s S010,S400,23 +0x000033B8: 0xD3181001 vwbn.s S010,S400,24 +0x000033BC: 0xD3191001 vwbn.s S010,S400,25 +0x000033C0: 0xD31A1001 vwbn.s S010,S400,26 +0x000033C4: 0xD31B1001 vwbn.s S010,S400,27 +0x000033C8: 0xD31C1001 vwbn.s S010,S400,28 +0x000033CC: 0xD31D1001 vwbn.s S010,S400,29 +0x000033D0: 0xD31E1001 vwbn.s S010,S400,30 +0x000033D4: 0xD31F1001 vwbn.s S010,S400,31 +0x000033D8: 0xD3201001 vwbn.s S010,S400,32 +0x000033DC: 0xD3211001 vwbn.s S010,S400,33 +0x000033E0: 0xD3221001 vwbn.s S010,S400,34 +0x000033E4: 0xD3231001 vwbn.s S010,S400,35 +0x000033E8: 0xD3241001 vwbn.s S010,S400,36 +0x000033EC: 0xD3251001 vwbn.s S010,S400,37 +0x000033F0: 0xD3261001 vwbn.s S010,S400,38 +0x000033F4: 0xD3271001 vwbn.s S010,S400,39 +0x000033F8: 0xD3281001 vwbn.s S010,S400,40 +0x000033FC: 0xD3291001 vwbn.s S010,S400,41 +0x00003400: 0xD32A1001 vwbn.s S010,S400,42 +0x00003404: 0xD32B1001 vwbn.s S010,S400,43 +0x00003408: 0xD32C1001 vwbn.s S010,S400,44 +0x0000340C: 0xD32D1001 vwbn.s S010,S400,45 +0x00003410: 0xD32E1001 vwbn.s S010,S400,46 +0x00003414: 0xD32F1001 vwbn.s S010,S400,47 +0x00003418: 0xD3301001 vwbn.s S010,S400,48 +0x0000341C: 0xD3311001 vwbn.s S010,S400,49 +0x00003420: 0xD3321001 vwbn.s S010,S400,50 +0x00003424: 0xD3331001 vwbn.s S010,S400,51 +0x00003428: 0xD3341001 vwbn.s S010,S400,52 +0x0000342C: 0xD3351001 vwbn.s S010,S400,53 +0x00003430: 0xD3361001 vwbn.s S010,S400,54 +0x00003434: 0xD3371001 vwbn.s S010,S400,55 +0x00003438: 0xD3381001 vwbn.s S010,S400,56 +0x0000343C: 0xD3391001 vwbn.s S010,S400,57 +0x00003440: 0xD33A1001 vwbn.s S010,S400,58 +0x00003444: 0xD33B1001 vwbn.s S010,S400,59 +0x00003448: 0xD33C1001 vwbn.s S010,S400,60 +0x0000344C: 0xD33D1001 vwbn.s S010,S400,61 +0x00003450: 0xD33E1001 vwbn.s S010,S400,62 +0x00003454: 0xD33F1001 vwbn.s S010,S400,63 +0x00003458: 0xD3401001 vwbn.s S010,S400,64 +0x0000345C: 0xD3411001 vwbn.s S010,S400,65 +0x00003460: 0xD3421001 vwbn.s S010,S400,66 +0x00003464: 0xD3431001 vwbn.s S010,S400,67 +0x00003468: 0xD3441001 vwbn.s S010,S400,68 +0x0000346C: 0xD3451001 vwbn.s S010,S400,69 +0x00003470: 0xD3461001 vwbn.s S010,S400,70 +0x00003474: 0xD3471001 vwbn.s S010,S400,71 +0x00003478: 0xD3481001 vwbn.s S010,S400,72 +0x0000347C: 0xD3491001 vwbn.s S010,S400,73 +0x00003480: 0xD34A1001 vwbn.s S010,S400,74 +0x00003484: 0xD34B1001 vwbn.s S010,S400,75 +0x00003488: 0xD34C1001 vwbn.s S010,S400,76 +0x0000348C: 0xD34D1001 vwbn.s S010,S400,77 +0x00003490: 0xD34E1001 vwbn.s S010,S400,78 +0x00003494: 0xD34F1001 vwbn.s S010,S400,79 +0x00003498: 0xD3501001 vwbn.s S010,S400,80 +0x0000349C: 0xD3511001 vwbn.s S010,S400,81 +0x000034A0: 0xD3521001 vwbn.s S010,S400,82 +0x000034A4: 0xD3531001 vwbn.s S010,S400,83 +0x000034A8: 0xD3541001 vwbn.s S010,S400,84 +0x000034AC: 0xD3551001 vwbn.s S010,S400,85 +0x000034B0: 0xD3561001 vwbn.s S010,S400,86 +0x000034B4: 0xD3571001 vwbn.s S010,S400,87 +0x000034B8: 0xD3581001 vwbn.s S010,S400,88 +0x000034BC: 0xD3591001 vwbn.s S010,S400,89 +0x000034C0: 0xD35A1001 vwbn.s S010,S400,90 +0x000034C4: 0xD35B1001 vwbn.s S010,S400,91 +0x000034C8: 0xD35C1001 vwbn.s S010,S400,92 +0x000034CC: 0xD35D1001 vwbn.s S010,S400,93 +0x000034D0: 0xD35E1001 vwbn.s S010,S400,94 +0x000034D4: 0xD35F1001 vwbn.s S010,S400,95 +0x000034D8: 0xD3601001 vwbn.s S010,S400,96 +0x000034DC: 0xD3611001 vwbn.s S010,S400,97 +0x000034E0: 0xD3621001 vwbn.s S010,S400,98 +0x000034E4: 0xD3631001 vwbn.s S010,S400,99 +0x000034E8: 0xD3641001 vwbn.s S010,S400,100 +0x000034EC: 0xD3651001 vwbn.s S010,S400,101 +0x000034F0: 0xD3661001 vwbn.s S010,S400,102 +0x000034F4: 0xD3671001 vwbn.s S010,S400,103 +0x000034F8: 0xD3681001 vwbn.s S010,S400,104 +0x000034FC: 0xD3691001 vwbn.s S010,S400,105 +0x00003500: 0xD36A1001 vwbn.s S010,S400,106 +0x00003504: 0xD36B1001 vwbn.s S010,S400,107 +0x00003508: 0xD36C1001 vwbn.s S010,S400,108 +0x0000350C: 0xD36D1001 vwbn.s S010,S400,109 +0x00003510: 0xD36E1001 vwbn.s S010,S400,110 +0x00003514: 0xD36F1001 vwbn.s S010,S400,111 +0x00003518: 0xD3701001 vwbn.s S010,S400,112 +0x0000351C: 0xD3711001 vwbn.s S010,S400,113 +0x00003520: 0xD3721001 vwbn.s S010,S400,114 +0x00003524: 0xD3731001 vwbn.s S010,S400,115 +0x00003528: 0xD3741001 vwbn.s S010,S400,116 +0x0000352C: 0xD3751001 vwbn.s S010,S400,117 +0x00003530: 0xD3761001 vwbn.s S010,S400,118 +0x00003534: 0xD3771001 vwbn.s S010,S400,119 +0x00003538: 0xD3781001 vwbn.s S010,S400,120 +0x0000353C: 0xD3791001 vwbn.s S010,S400,121 +0x00003540: 0xD37A1001 vwbn.s S010,S400,122 +0x00003544: 0xD37B1001 vwbn.s S010,S400,123 +0x00003548: 0xD37C1001 vwbn.s S010,S400,124 +0x0000354C: 0xD37D1001 vwbn.s S010,S400,125 +0x00003550: 0xD37E1001 vwbn.s S010,S400,126 +0x00003554: 0xD37F1001 vwbn.s S010,S400,127 +0x00003558: 0xD3801001 vwbn.s S010,S400,128 +0x0000355C: 0xD3811001 vwbn.s S010,S400,129 +0x00003560: 0xD3821001 vwbn.s S010,S400,130 +0x00003564: 0xD3831001 vwbn.s S010,S400,131 +0x00003568: 0xD3841001 vwbn.s S010,S400,132 +0x0000356C: 0xD3851001 vwbn.s S010,S400,133 +0x00003570: 0xD3861001 vwbn.s S010,S400,134 +0x00003574: 0xD3871001 vwbn.s S010,S400,135 +0x00003578: 0xD3881001 vwbn.s S010,S400,136 +0x0000357C: 0xD3891001 vwbn.s S010,S400,137 +0x00003580: 0xD38A1001 vwbn.s S010,S400,138 +0x00003584: 0xD38B1001 vwbn.s S010,S400,139 +0x00003588: 0xD38C1001 vwbn.s S010,S400,140 +0x0000358C: 0xD38D1001 vwbn.s S010,S400,141 +0x00003590: 0xD38E1001 vwbn.s S010,S400,142 +0x00003594: 0xD38F1001 vwbn.s S010,S400,143 +0x00003598: 0xD3901001 vwbn.s S010,S400,144 +0x0000359C: 0xD3911001 vwbn.s S010,S400,145 +0x000035A0: 0xD3921001 vwbn.s S010,S400,146 +0x000035A4: 0xD3931001 vwbn.s S010,S400,147 +0x000035A8: 0xD3941001 vwbn.s S010,S400,148 +0x000035AC: 0xD3951001 vwbn.s S010,S400,149 +0x000035B0: 0xD3961001 vwbn.s S010,S400,150 +0x000035B4: 0xD3971001 vwbn.s S010,S400,151 +0x000035B8: 0xD3981001 vwbn.s S010,S400,152 +0x000035BC: 0xD3991001 vwbn.s S010,S400,153 +0x000035C0: 0xD39A1001 vwbn.s S010,S400,154 +0x000035C4: 0xD39B1001 vwbn.s S010,S400,155 +0x000035C8: 0xD39C1001 vwbn.s S010,S400,156 +0x000035CC: 0xD39D1001 vwbn.s S010,S400,157 +0x000035D0: 0xD39E1001 vwbn.s S010,S400,158 +0x000035D4: 0xD39F1001 vwbn.s S010,S400,159 +0x000035D8: 0xD3A01001 vwbn.s S010,S400,160 +0x000035DC: 0xD3A11001 vwbn.s S010,S400,161 +0x000035E0: 0xD3A21001 vwbn.s S010,S400,162 +0x000035E4: 0xD3A31001 vwbn.s S010,S400,163 +0x000035E8: 0xD3A41001 vwbn.s S010,S400,164 +0x000035EC: 0xD3A51001 vwbn.s S010,S400,165 +0x000035F0: 0xD3A61001 vwbn.s S010,S400,166 +0x000035F4: 0xD3A71001 vwbn.s S010,S400,167 +0x000035F8: 0xD3A81001 vwbn.s S010,S400,168 +0x000035FC: 0xD3A91001 vwbn.s S010,S400,169 +0x00003600: 0xD3AA1001 vwbn.s S010,S400,170 +0x00003604: 0xD3AB1001 vwbn.s S010,S400,171 +0x00003608: 0xD3AC1001 vwbn.s S010,S400,172 +0x0000360C: 0xD3AD1001 vwbn.s S010,S400,173 +0x00003610: 0xD3AE1001 vwbn.s S010,S400,174 +0x00003614: 0xD3AF1001 vwbn.s S010,S400,175 +0x00003618: 0xD3B01001 vwbn.s S010,S400,176 +0x0000361C: 0xD3B11001 vwbn.s S010,S400,177 +0x00003620: 0xD3B21001 vwbn.s S010,S400,178 +0x00003624: 0xD3B31001 vwbn.s S010,S400,179 +0x00003628: 0xD3B41001 vwbn.s S010,S400,180 +0x0000362C: 0xD3B51001 vwbn.s S010,S400,181 +0x00003630: 0xD3B61001 vwbn.s S010,S400,182 +0x00003634: 0xD3B71001 vwbn.s S010,S400,183 +0x00003638: 0xD3B81001 vwbn.s S010,S400,184 +0x0000363C: 0xD3B91001 vwbn.s S010,S400,185 +0x00003640: 0xD3BA1001 vwbn.s S010,S400,186 +0x00003644: 0xD3BB1001 vwbn.s S010,S400,187 +0x00003648: 0xD3BC1001 vwbn.s S010,S400,188 +0x0000364C: 0xD3BD1001 vwbn.s S010,S400,189 +0x00003650: 0xD3BE1001 vwbn.s S010,S400,190 +0x00003654: 0xD3BF1001 vwbn.s S010,S400,191 +0x00003658: 0xD3C01001 vwbn.s S010,S400,192 +0x0000365C: 0xD3C11001 vwbn.s S010,S400,193 +0x00003660: 0xD3C21001 vwbn.s S010,S400,194 +0x00003664: 0xD3C31001 vwbn.s S010,S400,195 +0x00003668: 0xD3C41001 vwbn.s S010,S400,196 +0x0000366C: 0xD3C51001 vwbn.s S010,S400,197 +0x00003670: 0xD3C61001 vwbn.s S010,S400,198 +0x00003674: 0xD3C71001 vwbn.s S010,S400,199 +0x00003678: 0xD3C81001 vwbn.s S010,S400,200 +0x0000367C: 0xD3C91001 vwbn.s S010,S400,201 +0x00003680: 0xD3CA1001 vwbn.s S010,S400,202 +0x00003684: 0xD3CB1001 vwbn.s S010,S400,203 +0x00003688: 0xD3CC1001 vwbn.s S010,S400,204 +0x0000368C: 0xD3CD1001 vwbn.s S010,S400,205 +0x00003690: 0xD3CE1001 vwbn.s S010,S400,206 +0x00003694: 0xD3CF1001 vwbn.s S010,S400,207 +0x00003698: 0xD3D01001 vwbn.s S010,S400,208 +0x0000369C: 0xD3D11001 vwbn.s S010,S400,209 +0x000036A0: 0xD3D21001 vwbn.s S010,S400,210 +0x000036A4: 0xD3D31001 vwbn.s S010,S400,211 +0x000036A8: 0xD3D41001 vwbn.s S010,S400,212 +0x000036AC: 0xD3D51001 vwbn.s S010,S400,213 +0x000036B0: 0xD3D61001 vwbn.s S010,S400,214 +0x000036B4: 0xD3D71001 vwbn.s S010,S400,215 +0x000036B8: 0xD3D81001 vwbn.s S010,S400,216 +0x000036BC: 0xD3D91001 vwbn.s S010,S400,217 +0x000036C0: 0xD3DA1001 vwbn.s S010,S400,218 +0x000036C4: 0xD3DB1001 vwbn.s S010,S400,219 +0x000036C8: 0xD3DC1001 vwbn.s S010,S400,220 +0x000036CC: 0xD3DD1001 vwbn.s S010,S400,221 +0x000036D0: 0xD3DE1001 vwbn.s S010,S400,222 +0x000036D4: 0xD3DF1001 vwbn.s S010,S400,223 +0x000036D8: 0xD3E01001 vwbn.s S010,S400,224 +0x000036DC: 0xD3E11001 vwbn.s S010,S400,225 +0x000036E0: 0xD3E21001 vwbn.s S010,S400,226 +0x000036E4: 0xD3E31001 vwbn.s S010,S400,227 +0x000036E8: 0xD3E41001 vwbn.s S010,S400,228 +0x000036EC: 0xD3E51001 vwbn.s S010,S400,229 +0x000036F0: 0xD3E61001 vwbn.s S010,S400,230 +0x000036F4: 0xD3E71001 vwbn.s S010,S400,231 +0x000036F8: 0xD3E81001 vwbn.s S010,S400,232 +0x000036FC: 0xD3E91001 vwbn.s S010,S400,233 +0x00003700: 0xD3EA1001 vwbn.s S010,S400,234 +0x00003704: 0xD3EB1001 vwbn.s S010,S400,235 +0x00003708: 0xD3EC1001 vwbn.s S010,S400,236 +0x0000370C: 0xD3ED1001 vwbn.s S010,S400,237 +0x00003710: 0xD3EE1001 vwbn.s S010,S400,238 +0x00003714: 0xD3EF1001 vwbn.s S010,S400,239 +0x00003718: 0xD3F01001 vwbn.s S010,S400,240 +0x0000371C: 0xD3F11001 vwbn.s S010,S400,241 +0x00003720: 0xD3F21001 vwbn.s S010,S400,242 +0x00003724: 0xD3F31001 vwbn.s S010,S400,243 +0x00003728: 0xD3F41001 vwbn.s S010,S400,244 +0x0000372C: 0xD3F51001 vwbn.s S010,S400,245 +0x00003730: 0xD3F61001 vwbn.s S010,S400,246 +0x00003734: 0xD3F71001 vwbn.s S010,S400,247 +0x00003738: 0xD3F81001 vwbn.s S010,S400,248 +0x0000373C: 0xD3F91001 vwbn.s S010,S400,249 +0x00003740: 0xD3FA1001 vwbn.s S010,S400,250 +0x00003744: 0xD3FB1001 vwbn.s S010,S400,251 +0x00003748: 0xD3FC1001 vwbn.s S010,S400,252 +0x0000374C: 0xD3FD1001 vwbn.s S010,S400,253 +0x00003750: 0xD3FE1001 vwbn.s S010,S400,254 +0x00003754: 0xD3FF1001 vwbn.s S010,S400,255 +0x00003758: 0xDC000000 vpfxs X,X,X,X +0x0000375C: 0xDC000001 vpfxs Y,X,X,X +0x00003760: 0xDC000010 vpfxs X,X,Y,X +0x00003764: 0xDC000100 vpfxs |X|,X,X,X +0x00003768: 0xDC001000 vpfxs 0,X,X,X +0x0000376C: 0xDC010000 vpfxs -X,X,X,X +0x00003770: 0xDC000000 vpfxs X,X,X,X +0x00003774: 0xDC000000 vpfxs X,X,X,X +0x00003778: 0xDC000000 vpfxs X,X,X,X +0x0000377C: 0xDD000000 vpfxt X,X,X,X +0x00003780: 0xDD000001 vpfxt Y,X,X,X +0x00003784: 0xDD000010 vpfxt X,X,Y,X +0x00003788: 0xDD000100 vpfxt |X|,X,X,X +0x0000378C: 0xDD001000 vpfxt 0,X,X,X +0x00003790: 0xDD010000 vpfxt -X,X,X,X +0x00003794: 0xDD000000 vpfxt X,X,X,X +0x00003798: 0xDD000000 vpfxt X,X,X,X +0x0000379C: 0xDD000000 vpfxt X,X,X,X +0x000037A0: 0xDE000000 vpfxd ,,, +0x000037A4: 0xDE000001 vpfxd 0,,, +0x000037A8: 0xDE000010 vpfxd ,,0, +0x000037AC: 0xDE000100 vpfxd M,,, +0x000037B0: 0xDE000000 vpfxd ,,, +0x000037B4: 0xDE000000 vpfxd ,,, +0x000037B8: 0xDE000000 vpfxd ,,, +0x000037BC: 0xDE000000 vpfxd ,,, +0x000037C0: 0xDE000000 vpfxd ,,, +0x000037C4: 0xDF400000 viim.s S002,0 +0x000037C8: 0xDF400001 viim.s S002,1 +0x000037CC: 0xDF400010 viim.s S002,16 +0x000037D0: 0xDF400100 viim.s S002,256 +0x000037D4: 0xDF401000 viim.s S002,4096 +0x000037D8: 0xDF408000 viim.s S002,32768 +0x000037DC: 0xDF40F000 viim.s S002,61440 +0x000037E0: 0xDFC00000 vfim.s S002,0.0 +0x000037E4: 0xDFC01000 vfim.s S002,4.8828125e-004 +0x000037E8: 0xDFC08000 vfim.s S002,-0.0 +0x000037EC: 0xDFC0F000 vfim.s S002,-8192.0 +0x000037F0: 0xF00010C0 vmmul.p M002,E400,M000 +0x000037F4: 0xF0009004 vmmul.t M100,E400,M000 09 (000037F0) PITCH REG +0x000037F8: 0xF00090C0 vmmul.q M002,E400,M000 08 (000037F4) PITCH +0x000037FC: 0xF0800440 vhtfm2.p C002,M???,C000 21 (000037F8) PITCH REG +0x00003800: 0xF08010C0 vtfm2.p C002,M400,C000 01 (000037FC) PITCH +0x00003804: 0xF0801084 vtfm2.p C100,M400,C000 01 (00003800) PITCH +0x00003808: 0xF1008004 vtfm3.t C100,M000,C000 05 (00003800) PITCH REG +0x0000380C: 0xF1001084 vhtfm3.t C100,M400,C000 02 (00003808) PITCH +0x00003810: 0xF1009004 vtfm3.t C100,M400,C000 02 (0000380C) PITCH +0x00003814: 0xF1808088 vtfm4.q C200,M000,C000 02 (00003810) PITCH +0x00003818: 0xF1809040 vhtfm4.q C002,M400,C000 03 (00003814) PITCH +0x0000381C: 0xF18090C0 vtfm4.q C002,M400,C000 09 (00003818) PITCH REG +0x00003820: 0xF20010C0 vmscl.p M002,M400,S000 09 (0000381C) PITCH REG +0x00003824: 0xF2009040 vmscl.t M001,M400,S000 01 (00003820) PITCH +0x00003828: 0xF20090C0 vmscl.q M002,M400,S000 02 (00003824) PITCH +0x0000382C: 0xF2809004 vcrsp.t C100,C400,C000 09 (00003828) PITCH REG +0x00003830: 0xF28090C0 vqmul.q C002,C400,C000 02 (0000382C) PITCH +0x00003834: 0xF38010C0 vmmov.p M002,M400 04 (00003830) PITCH WAW +0x00003838: 0xF3809040 vmmov.t M001,M400 01 (00003834) PITCH +0x0000383C: 0xF38090C0 vmmov.q M002,M400 02 (00003838) PITCH +0x00003840: 0xF38300C0 vmidt.p M002 03 (0000383C) PITCH +0x00003844: 0xF3838040 vmidt.t M001 01 (00003840) PITCH +0x00003848: 0xF38380C0 vmidt.q M002 02 (00003844) PITCH +0x0000384C: 0xF3A410C0 vrot.p C002,S400,[C,S] 03 (00003848) PITCH +0x00003850: 0xF3A09040 vrot.t C001,S400,[C,S,S] 01 (0000384C) PITCH +0x00003854: 0xF3A090C0 vrot.q C002,S400,[C,S,S,S] 01 (00003850) PITCH +0x00003858: 0xFFFF040D vflush 01 (00003854) PITCH +0x0000385C: 0xFFFF0000 vnop 02 (00003858) PITCH +0x00003860: 0xFFFF0320 vsync +0x00003864: 0xF004009F vmmul.p M730,E000,M100 02 (00003860) PITCH +0x00003868: 0xF004019F vmmul.p M730,E001,M100 03 (00003864) PITCH +0x0000386C: 0xF004029F vmmul.p M730,E002,M100 03 (00003868) PITCH +0x00003870: 0xF004039F vmmul.p M730,E003,M100 03 (0000386C) PITCH +0x00003874: 0xF004049F vmmul.p M730,E100,M100 03 (00003870) PITCH +0x00003878: 0xF004059F vmmul.p M730,E101,M100 03 (00003874) PITCH +0x0000387C: 0xF004069F vmmul.p M730,E102,M100 03 (00003878) PITCH +0x00003880: 0xF004079F vmmul.p M730,E103,M100 03 (0000387C) PITCH +0x00003884: 0xF004089F vmmul.p M730,E200,M100 03 (00003880) PITCH +0x00003888: 0xF004099F vmmul.p M730,E201,M100 03 (00003884) PITCH +0x0000388C: 0xF0040A9F vmmul.p M730,E202,M100 03 (00003888) PITCH +0x00003890: 0xF0040B9F vmmul.p M730,E203,M100 03 (0000388C) PITCH +0x00003894: 0xF0040C9F vmmul.p M730,E300,M100 03 (00003890) PITCH +0x00003898: 0xF0040D9F vmmul.p M730,E301,M100 03 (00003894) PITCH +0x0000389C: 0xF0040E9F vmmul.p M730,E302,M100 03 (00003898) PITCH +0x000038A0: 0xF0040F9F vmmul.p M730,E303,M100 03 (0000389C) PITCH +0x000038A4: 0xF004109F vmmul.p M730,E400,M100 03 (000038A0) PITCH +0x000038A8: 0xF004119F vmmul.p M730,E401,M100 03 (000038A4) PITCH +0x000038AC: 0xF004129F vmmul.p M730,E402,M100 03 (000038A8) PITCH +0x000038B0: 0xF004139F vmmul.p M730,E403,M100 03 (000038AC) PITCH +0x000038B4: 0xF004149F vmmul.p M730,E500,M100 03 (000038B0) PITCH +0x000038B8: 0xF004159F vmmul.p M730,E501,M100 03 (000038B4) PITCH +0x000038BC: 0xF004169F vmmul.p M730,E502,M100 03 (000038B8) PITCH +0x000038C0: 0xF004179F vmmul.p M730,E503,M100 03 (000038BC) PITCH +0x000038C4: 0xF004189F vmmul.p M730,E600,M100 03 (000038C0) PITCH +0x000038C8: 0xF004199F vmmul.p M730,E601,M100 03 (000038C4) PITCH +0x000038CC: 0xF0041A9F vmmul.p M730,E602,M100 03 (000038C8) PITCH +0x000038D0: 0xF0041B9F vmmul.p M730,E603,M100 03 (000038CC) PITCH +0x000038D4: 0xF0041C88 vmmul.p M200,E700,M100 09 (000038D0) PITCH REG +0x000038D8: 0xF0041D88 vmmul.p M200,E701,M100 03 (000038D4) PITCH +0x000038DC: 0xF0041E88 vmmul.p M200,E702,M100 03 (000038D8) PITCH +0x000038E0: 0xF0041F88 vmmul.p M200,E703,M100 03 (000038DC) PITCH +0x000038E4: 0xF004209F vmmul.p M730,M000,M100 03 (000038E0) PITCH +0x000038E8: 0xF004219F vmmul.p M730,M010,M100 03 (000038E4) PITCH +0x000038EC: 0xF004229F vmmul.p M730,M020,M100 03 (000038E8) PITCH +0x000038F0: 0xF004239F vmmul.p M730,M030,M100 03 (000038EC) PITCH +0x000038F4: 0xF004249F vmmul.p M730,M100,M100 03 (000038F0) PITCH +0x000038F8: 0xF004259F vmmul.p M730,M110,M100 03 (000038F4) PITCH +0x000038FC: 0xF004269F vmmul.p M730,M120,M100 03 (000038F8) PITCH +0x00003900: 0xF004279F vmmul.p M730,M130,M100 03 (000038FC) PITCH +0x00003904: 0xF004289F vmmul.p M730,M200,M100 03 (00003900) PITCH +0x00003908: 0xF004299F vmmul.p M730,M210,M100 03 (00003904) PITCH +0x0000390C: 0xF0042A9F vmmul.p M730,M220,M100 03 (00003908) PITCH +0x00003910: 0xF0042B9F vmmul.p M730,M230,M100 03 (0000390C) PITCH +0x00003914: 0xF0042C9F vmmul.p M730,M300,M100 03 (00003910) PITCH +0x00003918: 0xF0042D9F vmmul.p M730,M310,M100 03 (00003914) PITCH +0x0000391C: 0xF0042E9F vmmul.p M730,M320,M100 03 (00003918) PITCH +0x00003920: 0xF0042F9F vmmul.p M730,M330,M100 03 (0000391C) PITCH +0x00003924: 0xF004309F vmmul.p M730,M400,M100 03 (00003920) PITCH +0x00003928: 0xF004319F vmmul.p M730,M410,M100 03 (00003924) PITCH +0x0000392C: 0xF004329F vmmul.p M730,M420,M100 03 (00003928) PITCH +0x00003930: 0xF004339F vmmul.p M730,M430,M100 03 (0000392C) PITCH +0x00003934: 0xF004349F vmmul.p M730,M500,M100 03 (00003930) PITCH +0x00003938: 0xF004359F vmmul.p M730,M510,M100 03 (00003934) PITCH +0x0000393C: 0xF004369F vmmul.p M730,M520,M100 03 (00003938) PITCH +0x00003940: 0xF004379F vmmul.p M730,M530,M100 03 (0000393C) PITCH +0x00003944: 0xF004389F vmmul.p M730,M600,M100 03 (00003940) PITCH +0x00003948: 0xF004399F vmmul.p M730,M610,M100 03 (00003944) PITCH +0x0000394C: 0xF0043A9F vmmul.p M730,M620,M100 03 (00003948) PITCH +0x00003950: 0xF0043B9F vmmul.p M730,M630,M100 03 (0000394C) PITCH +0x00003954: 0xF0043C88 vmmul.p M200,M700,M100 09 (00003950) PITCH REG +0x00003958: 0xF0043D88 vmmul.p M200,M710,M100 03 (00003954) PITCH +0x0000395C: 0xF0043E88 vmmul.p M200,M720,M100 03 (00003958) PITCH +0x00003960: 0xF0043F88 vmmul.p M200,M730,M100 03 (0000395C) PITCH +0x00003964: 0xF004409F vmmul.p M730,E020,M100 03 (00003960) PITCH +0x00003968: 0xF004419F vmmul.p M730,E021,M100 03 (00003964) PITCH +0x0000396C: 0xF004429F vmmul.p M730,E022,M100 03 (00003968) PITCH +0x00003970: 0xF004439F vmmul.p M730,E023,M100 03 (0000396C) PITCH +0x00003974: 0xF004449F vmmul.p M730,E120,M100 03 (00003970) PITCH +0x00003978: 0xF004459F vmmul.p M730,E121,M100 03 (00003974) PITCH +0x0000397C: 0xF004469F vmmul.p M730,E122,M100 03 (00003978) PITCH +0x00003980: 0xF004479F vmmul.p M730,E123,M100 03 (0000397C) PITCH +0x00003984: 0xF004489F vmmul.p M730,E220,M100 03 (00003980) PITCH +0x00003988: 0xF004499F vmmul.p M730,E221,M100 03 (00003984) PITCH +0x0000398C: 0xF0044A9F vmmul.p M730,E222,M100 03 (00003988) PITCH +0x00003990: 0xF0044B9F vmmul.p M730,E223,M100 03 (0000398C) PITCH +0x00003994: 0xF0044C9F vmmul.p M730,E320,M100 03 (00003990) PITCH +0x00003998: 0xF0044D9F vmmul.p M730,E321,M100 03 (00003994) PITCH +0x0000399C: 0xF0044E9F vmmul.p M730,E322,M100 03 (00003998) PITCH +0x000039A0: 0xF0044F9F vmmul.p M730,E323,M100 03 (0000399C) PITCH +0x000039A4: 0xF004509F vmmul.p M730,E420,M100 03 (000039A0) PITCH +0x000039A8: 0xF004519F vmmul.p M730,E421,M100 03 (000039A4) PITCH +0x000039AC: 0xF004529F vmmul.p M730,E422,M100 03 (000039A8) PITCH +0x000039B0: 0xF004539F vmmul.p M730,E423,M100 03 (000039AC) PITCH +0x000039B4: 0xF004549F vmmul.p M730,E520,M100 03 (000039B0) PITCH +0x000039B8: 0xF004559F vmmul.p M730,E521,M100 03 (000039B4) PITCH +0x000039BC: 0xF004569F vmmul.p M730,E522,M100 03 (000039B8) PITCH +0x000039C0: 0xF004579F vmmul.p M730,E523,M100 03 (000039BC) PITCH +0x000039C4: 0xF004589F vmmul.p M730,E620,M100 03 (000039C0) PITCH +0x000039C8: 0xF004599F vmmul.p M730,E621,M100 03 (000039C4) PITCH +0x000039CC: 0xF0045A9F vmmul.p M730,E622,M100 03 (000039C8) PITCH +0x000039D0: 0xF0045B9F vmmul.p M730,E623,M100 03 (000039CC) PITCH +0x000039D4: 0xF0045C88 vmmul.p M200,E720,M100 09 (000039D0) PITCH REG +0x000039D8: 0xF0045D88 vmmul.p M200,E721,M100 03 (000039D4) PITCH +0x000039DC: 0xF0045E88 vmmul.p M200,E722,M100 03 (000039D8) PITCH +0x000039E0: 0xF0045F88 vmmul.p M200,E723,M100 03 (000039DC) PITCH +0x000039E4: 0xF004609F vmmul.p M730,M002,M100 03 (000039E0) PITCH +0x000039E8: 0xF004619F vmmul.p M730,M012,M100 03 (000039E4) PITCH +0x000039EC: 0xF004629F vmmul.p M730,M022,M100 03 (000039E8) PITCH +0x000039F0: 0xF004639F vmmul.p M730,M032,M100 03 (000039EC) PITCH +0x000039F4: 0xF004649F vmmul.p M730,M102,M100 03 (000039F0) PITCH +0x000039F8: 0xF004659F vmmul.p M730,M112,M100 03 (000039F4) PITCH +0x000039FC: 0xF004669F vmmul.p M730,M122,M100 03 (000039F8) PITCH +0x00003A00: 0xF004679F vmmul.p M730,M132,M100 03 (000039FC) PITCH +0x00003A04: 0xF004689F vmmul.p M730,M202,M100 03 (00003A00) PITCH +0x00003A08: 0xF004699F vmmul.p M730,M212,M100 03 (00003A04) PITCH +0x00003A0C: 0xF0046A9F vmmul.p M730,M222,M100 03 (00003A08) PITCH +0x00003A10: 0xF0046B9F vmmul.p M730,M232,M100 03 (00003A0C) PITCH +0x00003A14: 0xF0046C9F vmmul.p M730,M302,M100 03 (00003A10) PITCH +0x00003A18: 0xF0046D9F vmmul.p M730,M312,M100 03 (00003A14) PITCH +0x00003A1C: 0xF0046E9F vmmul.p M730,M322,M100 03 (00003A18) PITCH +0x00003A20: 0xF0046F9F vmmul.p M730,M332,M100 03 (00003A1C) PITCH +0x00003A24: 0xF004709F vmmul.p M730,M402,M100 03 (00003A20) PITCH +0x00003A28: 0xF004719F vmmul.p M730,M412,M100 03 (00003A24) PITCH +0x00003A2C: 0xF004729F vmmul.p M730,M422,M100 03 (00003A28) PITCH +0x00003A30: 0xF004739F vmmul.p M730,M432,M100 03 (00003A2C) PITCH +0x00003A34: 0xF004749F vmmul.p M730,M502,M100 03 (00003A30) PITCH +0x00003A38: 0xF004759F vmmul.p M730,M512,M100 03 (00003A34) PITCH +0x00003A3C: 0xF004769F vmmul.p M730,M522,M100 03 (00003A38) PITCH +0x00003A40: 0xF004779F vmmul.p M730,M532,M100 03 (00003A3C) PITCH +0x00003A44: 0xF004789F vmmul.p M730,M602,M100 03 (00003A40) PITCH +0x00003A48: 0xF004799F vmmul.p M730,M612,M100 03 (00003A44) PITCH +0x00003A4C: 0xF0047A9F vmmul.p M730,M622,M100 03 (00003A48) PITCH +0x00003A50: 0xF0047B9F vmmul.p M730,M632,M100 03 (00003A4C) PITCH +0x00003A54: 0xF0047C88 vmmul.p M200,M702,M100 03 (00003A50) PITCH +0x00003A58: 0xF0047D88 vmmul.p M200,M712,M100 03 (00003A54) PITCH +0x00003A5C: 0xF0047E88 vmmul.p M200,M722,M100 03 (00003A58) PITCH +0x00003A60: 0xF0047F88 vmmul.p M200,M732,M100 03 (00003A5C) PITCH +0x00003A64: 0xF004801F vmmul.t M730,E000,M100 03 (00003A60) PITCH +0x00003A68: 0xF004811F vmmul.t M730,E001,M100 08 (00003A64) PITCH +0x00003A6C: 0xF004821F vmmul.t M730,E002,M100 08 (00003A68) PITCH +0x00003A70: 0xF004831F vmmul.t M730,E003,M100 08 (00003A6C) PITCH +0x00003A74: 0xF004841F vmmul.t M730,E100,M100 08 (00003A70) PITCH +0x00003A78: 0xF004851F vmmul.t M730,E101,M100 08 (00003A74) PITCH +0x00003A7C: 0xF004861F vmmul.t M730,E102,M100 08 (00003A78) PITCH +0x00003A80: 0xF004871F vmmul.t M730,E103,M100 08 (00003A7C) PITCH +0x00003A84: 0xF004881F vmmul.t M730,E200,M100 08 (00003A80) PITCH +0x00003A88: 0xF004891F vmmul.t M730,E201,M100 08 (00003A84) PITCH +0x00003A8C: 0xF0048A1F vmmul.t M730,E202,M100 08 (00003A88) PITCH +0x00003A90: 0xF0048B1F vmmul.t M730,E203,M100 08 (00003A8C) PITCH +0x00003A94: 0xF0048C1F vmmul.t M730,E300,M100 08 (00003A90) PITCH +0x00003A98: 0xF0048D1F vmmul.t M730,E301,M100 08 (00003A94) PITCH +0x00003A9C: 0xF0048E1F vmmul.t M730,E302,M100 08 (00003A98) PITCH +0x00003AA0: 0xF0048F1F vmmul.t M730,E303,M100 08 (00003A9C) PITCH +0x00003AA4: 0xF004901F vmmul.t M730,E400,M100 08 (00003AA0) PITCH +0x00003AA8: 0xF004911F vmmul.t M730,E401,M100 08 (00003AA4) PITCH +0x00003AAC: 0xF004921F vmmul.t M730,E402,M100 08 (00003AA8) PITCH +0x00003AB0: 0xF004931F vmmul.t M730,E403,M100 08 (00003AAC) PITCH +0x00003AB4: 0xF004941F vmmul.t M730,E500,M100 08 (00003AB0) PITCH +0x00003AB8: 0xF004951F vmmul.t M730,E501,M100 08 (00003AB4) PITCH +0x00003ABC: 0xF004961F vmmul.t M730,E502,M100 08 (00003AB8) PITCH +0x00003AC0: 0xF004971F vmmul.t M730,E503,M100 08 (00003ABC) PITCH +0x00003AC4: 0xF004981F vmmul.t M730,E600,M100 08 (00003AC0) PITCH +0x00003AC8: 0xF004991F vmmul.t M730,E601,M100 08 (00003AC4) PITCH +0x00003ACC: 0xF0049A1F vmmul.t M730,E602,M100 08 (00003AC8) PITCH +0x00003AD0: 0xF0049B1F vmmul.t M730,E603,M100 08 (00003ACC) PITCH +0x00003AD4: 0xF0049C08 vmmul.t M200,E700,M100 14 (00003AD0) PITCH REG +0x00003AD8: 0xF0049D08 vmmul.t M200,E701,M100 08 (00003AD4) PITCH +0x00003ADC: 0xF0049E08 vmmul.t M200,E702,M100 08 (00003AD8) PITCH +0x00003AE0: 0xF0049F08 vmmul.t M200,E703,M100 08 (00003ADC) PITCH +0x00003AE4: 0xF004A01F vmmul.t M730,M000,M100 08 (00003AE0) PITCH +0x00003AE8: 0xF004A11F vmmul.t M730,M010,M100 08 (00003AE4) PITCH +0x00003AEC: 0xF004A21F vmmul.t M730,M020,M100 08 (00003AE8) PITCH +0x00003AF0: 0xF004A31F vmmul.t M730,M030,M100 08 (00003AEC) PITCH +0x00003AF4: 0xF004A41F vmmul.t M730,M100,M100 08 (00003AF0) PITCH +0x00003AF8: 0xF004A51F vmmul.t M730,M110,M100 08 (00003AF4) PITCH +0x00003AFC: 0xF004A61F vmmul.t M730,M120,M100 08 (00003AF8) PITCH +0x00003B00: 0xF004A71F vmmul.t M730,M130,M100 08 (00003AFC) PITCH +0x00003B04: 0xF004A81F vmmul.t M730,M200,M100 08 (00003B00) PITCH +0x00003B08: 0xF004A91F vmmul.t M730,M210,M100 08 (00003B04) PITCH +0x00003B0C: 0xF004AA1F vmmul.t M730,M220,M100 08 (00003B08) PITCH +0x00003B10: 0xF004AB1F vmmul.t M730,M230,M100 08 (00003B0C) PITCH +0x00003B14: 0xF004AC1F vmmul.t M730,M300,M100 08 (00003B10) PITCH +0x00003B18: 0xF004AD1F vmmul.t M730,M310,M100 08 (00003B14) PITCH +0x00003B1C: 0xF004AE1F vmmul.t M730,M320,M100 08 (00003B18) PITCH +0x00003B20: 0xF004AF1F vmmul.t M730,M330,M100 08 (00003B1C) PITCH +0x00003B24: 0xF004B01F vmmul.t M730,M400,M100 08 (00003B20) PITCH +0x00003B28: 0xF004B11F vmmul.t M730,M410,M100 08 (00003B24) PITCH +0x00003B2C: 0xF004B21F vmmul.t M730,M420,M100 08 (00003B28) PITCH +0x00003B30: 0xF004B31F vmmul.t M730,M430,M100 08 (00003B2C) PITCH +0x00003B34: 0xF004B41F vmmul.t M730,M500,M100 08 (00003B30) PITCH +0x00003B38: 0xF004B51F vmmul.t M730,M510,M100 08 (00003B34) PITCH +0x00003B3C: 0xF004B61F vmmul.t M730,M520,M100 08 (00003B38) PITCH +0x00003B40: 0xF004B71F vmmul.t M730,M530,M100 08 (00003B3C) PITCH +0x00003B44: 0xF004B81F vmmul.t M730,M600,M100 08 (00003B40) PITCH +0x00003B48: 0xF004B91F vmmul.t M730,M610,M100 08 (00003B44) PITCH +0x00003B4C: 0xF004BA1F vmmul.t M730,M620,M100 08 (00003B48) PITCH +0x00003B50: 0xF004BB1F vmmul.t M730,M630,M100 08 (00003B4C) PITCH +0x00003B54: 0xF004BC08 vmmul.t M200,M700,M100 14 (00003B50) PITCH REG +0x00003B58: 0xF004BD08 vmmul.t M200,M710,M100 08 (00003B54) PITCH +0x00003B5C: 0xF004BE08 vmmul.t M200,M720,M100 08 (00003B58) PITCH +0x00003B60: 0xF004BF08 vmmul.t M200,M730,M100 08 (00003B5C) PITCH +0x00003B64: 0xF004C01F vmmul.t M730,E010,M100 08 (00003B60) PITCH +0x00003B68: 0xF004C11F vmmul.t M730,E011,M100 08 (00003B64) PITCH +0x00003B6C: 0xF004C21F vmmul.t M730,E012,M100 08 (00003B68) PITCH +0x00003B70: 0xF004C31F vmmul.t M730,E013,M100 08 (00003B6C) PITCH +0x00003B74: 0xF004C41F vmmul.t M730,E110,M100 08 (00003B70) PITCH +0x00003B78: 0xF004C51F vmmul.t M730,E111,M100 08 (00003B74) PITCH +0x00003B7C: 0xF004C61F vmmul.t M730,E112,M100 08 (00003B78) PITCH +0x00003B80: 0xF004C71F vmmul.t M730,E113,M100 08 (00003B7C) PITCH +0x00003B84: 0xF004C81F vmmul.t M730,E210,M100 08 (00003B80) PITCH +0x00003B88: 0xF004C91F vmmul.t M730,E211,M100 08 (00003B84) PITCH +0x00003B8C: 0xF004CA1F vmmul.t M730,E212,M100 08 (00003B88) PITCH +0x00003B90: 0xF004CB1F vmmul.t M730,E213,M100 08 (00003B8C) PITCH +0x00003B94: 0xF004CC1F vmmul.t M730,E310,M100 08 (00003B90) PITCH +0x00003B98: 0xF004CD1F vmmul.t M730,E311,M100 08 (00003B94) PITCH +0x00003B9C: 0xF004CE1F vmmul.t M730,E312,M100 08 (00003B98) PITCH +0x00003BA0: 0xF004CF1F vmmul.t M730,E313,M100 08 (00003B9C) PITCH +0x00003BA4: 0xF004D01F vmmul.t M730,E410,M100 08 (00003BA0) PITCH +0x00003BA8: 0xF004D11F vmmul.t M730,E411,M100 08 (00003BA4) PITCH +0x00003BAC: 0xF004D21F vmmul.t M730,E412,M100 08 (00003BA8) PITCH +0x00003BB0: 0xF004D31F vmmul.t M730,E413,M100 08 (00003BAC) PITCH +0x00003BB4: 0xF004D41F vmmul.t M730,E510,M100 08 (00003BB0) PITCH +0x00003BB8: 0xF004D51F vmmul.t M730,E511,M100 08 (00003BB4) PITCH +0x00003BBC: 0xF004D61F vmmul.t M730,E512,M100 08 (00003BB8) PITCH +0x00003BC0: 0xF004D71F vmmul.t M730,E513,M100 08 (00003BBC) PITCH +0x00003BC4: 0xF004D81F vmmul.t M730,E610,M100 08 (00003BC0) PITCH +0x00003BC8: 0xF004D91F vmmul.t M730,E611,M100 08 (00003BC4) PITCH +0x00003BCC: 0xF004DA1F vmmul.t M730,E612,M100 08 (00003BC8) PITCH +0x00003BD0: 0xF004DB1F vmmul.t M730,E613,M100 08 (00003BCC) PITCH +0x00003BD4: 0xF004DC08 vmmul.t M200,E710,M100 14 (00003BD0) PITCH REG +0x00003BD8: 0xF004DD08 vmmul.t M200,E711,M100 08 (00003BD4) PITCH +0x00003BDC: 0xF004DE08 vmmul.t M200,E712,M100 08 (00003BD8) PITCH +0x00003BE0: 0xF004DF08 vmmul.t M200,E713,M100 08 (00003BDC) PITCH +0x00003BE4: 0xF004E01F vmmul.t M730,M001,M100 08 (00003BE0) PITCH +0x00003BE8: 0xF004E11F vmmul.t M730,M011,M100 08 (00003BE4) PITCH +0x00003BEC: 0xF004E21F vmmul.t M730,M021,M100 08 (00003BE8) PITCH +0x00003BF0: 0xF004E31F vmmul.t M730,M031,M100 08 (00003BEC) PITCH +0x00003BF4: 0xF004E41F vmmul.t M730,M101,M100 08 (00003BF0) PITCH +0x00003BF8: 0xF004E51F vmmul.t M730,M111,M100 08 (00003BF4) PITCH +0x00003BFC: 0xF004E61F vmmul.t M730,M121,M100 08 (00003BF8) PITCH +0x00003C00: 0xF004E71F vmmul.t M730,M131,M100 08 (00003BFC) PITCH +0x00003C04: 0xF004E81F vmmul.t M730,M201,M100 08 (00003C00) PITCH +0x00003C08: 0xF004E91F vmmul.t M730,M211,M100 08 (00003C04) PITCH +0x00003C0C: 0xF004EA1F vmmul.t M730,M221,M100 08 (00003C08) PITCH +0x00003C10: 0xF004EB1F vmmul.t M730,M231,M100 08 (00003C0C) PITCH +0x00003C14: 0xF004EC1F vmmul.t M730,M301,M100 08 (00003C10) PITCH +0x00003C18: 0xF004ED1F vmmul.t M730,M311,M100 08 (00003C14) PITCH +0x00003C1C: 0xF004EE1F vmmul.t M730,M321,M100 08 (00003C18) PITCH +0x00003C20: 0xF004EF1F vmmul.t M730,M331,M100 08 (00003C1C) PITCH +0x00003C24: 0xF004F01F vmmul.t M730,M401,M100 08 (00003C20) PITCH +0x00003C28: 0xF004F11F vmmul.t M730,M411,M100 08 (00003C24) PITCH +0x00003C2C: 0xF004F21F vmmul.t M730,M421,M100 08 (00003C28) PITCH +0x00003C30: 0xF004F31F vmmul.t M730,M431,M100 08 (00003C2C) PITCH +0x00003C34: 0xF004F41F vmmul.t M730,M501,M100 08 (00003C30) PITCH +0x00003C38: 0xF004F51F vmmul.t M730,M511,M100 08 (00003C34) PITCH +0x00003C3C: 0xF004F61F vmmul.t M730,M521,M100 08 (00003C38) PITCH +0x00003C40: 0xF004F71F vmmul.t M730,M531,M100 08 (00003C3C) PITCH +0x00003C44: 0xF004F81F vmmul.t M730,M601,M100 08 (00003C40) PITCH +0x00003C48: 0xF004F91F vmmul.t M730,M611,M100 08 (00003C44) PITCH +0x00003C4C: 0xF004FA1F vmmul.t M730,M621,M100 08 (00003C48) PITCH +0x00003C50: 0xF004FB1F vmmul.t M730,M631,M100 08 (00003C4C) PITCH +0x00003C54: 0xF004FC08 vmmul.t M200,M701,M100 14 (00003C50) PITCH REG +0x00003C58: 0xF004FD08 vmmul.t M200,M711,M100 08 (00003C54) PITCH +0x00003C5C: 0xF004FE08 vmmul.t M200,M721,M100 08 (00003C58) PITCH +0x00003C60: 0xF004FF08 vmmul.t M200,M731,M100 08 (00003C5C) PITCH +0x00003C64: 0xF004809F vmmul.q M730,E000,M100 08 (00003C60) PITCH +0x00003C68: 0xF004819F vmmul.q M730,E001,M100 15 (00003C64) PITCH +0x00003C6C: 0xF004829F vmmul.q M730,E002,M100 15 (00003C68) PITCH +0x00003C70: 0xF004839F vmmul.q M730,E003,M100 15 (00003C6C) PITCH +0x00003C74: 0xF004849F vmmul.q M730,E100,M100 15 (00003C70) PITCH +0x00003C78: 0xF004859F vmmul.q M730,E101,M100 15 (00003C74) PITCH +0x00003C7C: 0xF004869F vmmul.q M730,E102,M100 15 (00003C78) PITCH +0x00003C80: 0xF004879F vmmul.q M730,E103,M100 15 (00003C7C) PITCH +0x00003C84: 0xF004889F vmmul.q M730,E200,M100 15 (00003C80) PITCH +0x00003C88: 0xF004899F vmmul.q M730,E201,M100 15 (00003C84) PITCH +0x00003C8C: 0xF0048A9F vmmul.q M730,E202,M100 15 (00003C88) PITCH +0x00003C90: 0xF0048B9F vmmul.q M730,E203,M100 15 (00003C8C) PITCH +0x00003C94: 0xF0048C9F vmmul.q M730,E300,M100 15 (00003C90) PITCH +0x00003C98: 0xF0048D9F vmmul.q M730,E301,M100 15 (00003C94) PITCH +0x00003C9C: 0xF0048E9F vmmul.q M730,E302,M100 15 (00003C98) PITCH +0x00003CA0: 0xF0048F9F vmmul.q M730,E303,M100 15 (00003C9C) PITCH +0x00003CA4: 0xF004909F vmmul.q M730,E400,M100 15 (00003CA0) PITCH +0x00003CA8: 0xF004919F vmmul.q M730,E401,M100 15 (00003CA4) PITCH +0x00003CAC: 0xF004929F vmmul.q M730,E402,M100 15 (00003CA8) PITCH +0x00003CB0: 0xF004939F vmmul.q M730,E403,M100 15 (00003CAC) PITCH +0x00003CB4: 0xF004949F vmmul.q M730,E500,M100 15 (00003CB0) PITCH +0x00003CB8: 0xF004959F vmmul.q M730,E501,M100 15 (00003CB4) PITCH +0x00003CBC: 0xF004969F vmmul.q M730,E502,M100 15 (00003CB8) PITCH +0x00003CC0: 0xF004979F vmmul.q M730,E503,M100 15 (00003CBC) PITCH +0x00003CC4: 0xF004989F vmmul.q M730,E600,M100 15 (00003CC0) PITCH +0x00003CC8: 0xF004999F vmmul.q M730,E601,M100 15 (00003CC4) PITCH +0x00003CCC: 0xF0049A9F vmmul.q M730,E602,M100 15 (00003CC8) PITCH +0x00003CD0: 0xF0049B9F vmmul.q M730,E603,M100 15 (00003CCC) PITCH +0x00003CD4: 0xF0049C9F vmmul.q M730,E700,M100 21 (00003CD0) PITCH REG +0x00003CD8: 0xF0049D9F vmmul.q M730,E701,M100 21 (00003CD4) PITCH REG +0x00003CDC: 0xF0049E9F vmmul.q M730,E702,M100 21 (00003CD8) PITCH REG +0x00003CE0: 0xF0049F9F vmmul.q M730,E703,M100 21 (00003CDC) PITCH REG +0x00003CE4: 0xF004A09F vmmul.q M730,M000,M100 15 (00003CE0) PITCH +0x00003CE8: 0xF004A19F vmmul.q M730,M010,M100 15 (00003CE4) PITCH +0x00003CEC: 0xF004A29F vmmul.q M730,M020,M100 15 (00003CE8) PITCH +0x00003CF0: 0xF004A39F vmmul.q M730,M030,M100 15 (00003CEC) PITCH +0x00003CF4: 0xF004A49F vmmul.q M730,M100,M100 15 (00003CF0) PITCH +0x00003CF8: 0xF004A59F vmmul.q M730,M110,M100 15 (00003CF4) PITCH +0x00003CFC: 0xF004A69F vmmul.q M730,M120,M100 15 (00003CF8) PITCH +0x00003D00: 0xF004A79F vmmul.q M730,M130,M100 15 (00003CFC) PITCH +0x00003D04: 0xF004A89F vmmul.q M730,M200,M100 15 (00003D00) PITCH +0x00003D08: 0xF004A99F vmmul.q M730,M210,M100 15 (00003D04) PITCH +0x00003D0C: 0xF004AA9F vmmul.q M730,M220,M100 15 (00003D08) PITCH +0x00003D10: 0xF004AB9F vmmul.q M730,M230,M100 15 (00003D0C) PITCH +0x00003D14: 0xF004AC9F vmmul.q M730,M300,M100 15 (00003D10) PITCH +0x00003D18: 0xF004AD9F vmmul.q M730,M310,M100 15 (00003D14) PITCH +0x00003D1C: 0xF004AE9F vmmul.q M730,M320,M100 15 (00003D18) PITCH +0x00003D20: 0xF004AF9F vmmul.q M730,M330,M100 15 (00003D1C) PITCH +0x00003D24: 0xF004B09F vmmul.q M730,M400,M100 15 (00003D20) PITCH +0x00003D28: 0xF004B19F vmmul.q M730,M410,M100 15 (00003D24) PITCH +0x00003D2C: 0xF004B29F vmmul.q M730,M420,M100 15 (00003D28) PITCH +0x00003D30: 0xF004B39F vmmul.q M730,M430,M100 15 (00003D2C) PITCH +0x00003D34: 0xF004B49F vmmul.q M730,M500,M100 15 (00003D30) PITCH +0x00003D38: 0xF004B59F vmmul.q M730,M510,M100 15 (00003D34) PITCH +0x00003D3C: 0xF004B69F vmmul.q M730,M520,M100 15 (00003D38) PITCH +0x00003D40: 0xF004B79F vmmul.q M730,M530,M100 15 (00003D3C) PITCH +0x00003D44: 0xF004B89F vmmul.q M730,M600,M100 15 (00003D40) PITCH +0x00003D48: 0xF004B99F vmmul.q M730,M610,M100 15 (00003D44) PITCH +0x00003D4C: 0xF004BA9F vmmul.q M730,M620,M100 15 (00003D48) PITCH +0x00003D50: 0xF004BB9F vmmul.q M730,M630,M100 15 (00003D4C) PITCH +0x00003D54: 0xF004BC9F vmmul.q M730,M700,M100 21 (00003D50) PITCH REG +0x00003D58: 0xF004BD9F vmmul.q M730,M710,M100 21 (00003D54) PITCH REG +0x00003D5C: 0xF004BE9F vmmul.q M730,M720,M100 21 (00003D58) PITCH REG +0x00003D60: 0xF004BF9F vmmul.q M730,M730,M100 21 (00003D5C) PITCH REG +0x00003D64: 0xF004C09F vmmul.q M730,E020,M100 15 (00003D60) PITCH +0x00003D68: 0xF004C19F vmmul.q M730,E021,M100 15 (00003D64) PITCH +0x00003D6C: 0xF004C29F vmmul.q M730,E022,M100 15 (00003D68) PITCH +0x00003D70: 0xF004C39F vmmul.q M730,E023,M100 15 (00003D6C) PITCH +0x00003D74: 0xF004C49F vmmul.q M730,E120,M100 15 (00003D70) PITCH +0x00003D78: 0xF004C59F vmmul.q M730,E121,M100 15 (00003D74) PITCH +0x00003D7C: 0xF004C69F vmmul.q M730,E122,M100 15 (00003D78) PITCH +0x00003D80: 0xF004C79F vmmul.q M730,E123,M100 15 (00003D7C) PITCH +0x00003D84: 0xF004C89F vmmul.q M730,E220,M100 15 (00003D80) PITCH +0x00003D88: 0xF004C99F vmmul.q M730,E221,M100 15 (00003D84) PITCH +0x00003D8C: 0xF004CA9F vmmul.q M730,E222,M100 15 (00003D88) PITCH +0x00003D90: 0xF004CB9F vmmul.q M730,E223,M100 15 (00003D8C) PITCH +0x00003D94: 0xF004CC9F vmmul.q M730,E320,M100 15 (00003D90) PITCH +0x00003D98: 0xF004CD9F vmmul.q M730,E321,M100 15 (00003D94) PITCH +0x00003D9C: 0xF004CE9F vmmul.q M730,E322,M100 15 (00003D98) PITCH +0x00003DA0: 0xF004CF9F vmmul.q M730,E323,M100 15 (00003D9C) PITCH +0x00003DA4: 0xF004D09F vmmul.q M730,E420,M100 15 (00003DA0) PITCH +0x00003DA8: 0xF004D19F vmmul.q M730,E421,M100 15 (00003DA4) PITCH +0x00003DAC: 0xF004D29F vmmul.q M730,E422,M100 15 (00003DA8) PITCH +0x00003DB0: 0xF004D39F vmmul.q M730,E423,M100 15 (00003DAC) PITCH +0x00003DB4: 0xF004D49F vmmul.q M730,E520,M100 15 (00003DB0) PITCH +0x00003DB8: 0xF004D59F vmmul.q M730,E521,M100 15 (00003DB4) PITCH +0x00003DBC: 0xF004D69F vmmul.q M730,E522,M100 15 (00003DB8) PITCH +0x00003DC0: 0xF004D79F vmmul.q M730,E523,M100 15 (00003DBC) PITCH +0x00003DC4: 0xF004D89F vmmul.q M730,E620,M100 15 (00003DC0) PITCH +0x00003DC8: 0xF004D99F vmmul.q M730,E621,M100 15 (00003DC4) PITCH +0x00003DCC: 0xF004DA9F vmmul.q M730,E622,M100 15 (00003DC8) PITCH +0x00003DD0: 0xF004DB9F vmmul.q M730,E623,M100 15 (00003DCC) PITCH +0x00003DD4: 0xF004DC9F vmmul.q M730,E720,M100 21 (00003DD0) PITCH REG +0x00003DD8: 0xF004DD9F vmmul.q M730,E721,M100 21 (00003DD4) PITCH REG +0x00003DDC: 0xF004DE9F vmmul.q M730,E722,M100 21 (00003DD8) PITCH REG +0x00003DE0: 0xF004DF9F vmmul.q M730,E723,M100 21 (00003DDC) PITCH REG +0x00003DE4: 0xF004E09F vmmul.q M730,M002,M100 15 (00003DE0) PITCH +0x00003DE8: 0xF004E19F vmmul.q M730,M012,M100 15 (00003DE4) PITCH +0x00003DEC: 0xF004E29F vmmul.q M730,M022,M100 15 (00003DE8) PITCH +0x00003DF0: 0xF004E39F vmmul.q M730,M032,M100 15 (00003DEC) PITCH +0x00003DF4: 0xF004E49F vmmul.q M730,M102,M100 15 (00003DF0) PITCH +0x00003DF8: 0xF004E59F vmmul.q M730,M112,M100 15 (00003DF4) PITCH +0x00003DFC: 0xF004E69F vmmul.q M730,M122,M100 15 (00003DF8) PITCH +0x00003E00: 0xF004E79F vmmul.q M730,M132,M100 15 (00003DFC) PITCH +0x00003E04: 0xF004E89F vmmul.q M730,M202,M100 15 (00003E00) PITCH +0x00003E08: 0xF004E99F vmmul.q M730,M212,M100 15 (00003E04) PITCH +0x00003E0C: 0xF004EA9F vmmul.q M730,M222,M100 15 (00003E08) PITCH +0x00003E10: 0xF004EB9F vmmul.q M730,M232,M100 15 (00003E0C) PITCH +0x00003E14: 0xF004EC9F vmmul.q M730,M302,M100 15 (00003E10) PITCH +0x00003E18: 0xF004ED9F vmmul.q M730,M312,M100 15 (00003E14) PITCH +0x00003E1C: 0xF004EE9F vmmul.q M730,M322,M100 15 (00003E18) PITCH +0x00003E20: 0xF004EF9F vmmul.q M730,M332,M100 15 (00003E1C) PITCH +0x00003E24: 0xF004F09F vmmul.q M730,M402,M100 15 (00003E20) PITCH +0x00003E28: 0xF004F19F vmmul.q M730,M412,M100 15 (00003E24) PITCH +0x00003E2C: 0xF004F29F vmmul.q M730,M422,M100 15 (00003E28) PITCH +0x00003E30: 0xF004F39F vmmul.q M730,M432,M100 15 (00003E2C) PITCH +0x00003E34: 0xF004F49F vmmul.q M730,M502,M100 15 (00003E30) PITCH +0x00003E38: 0xF004F59F vmmul.q M730,M512,M100 15 (00003E34) PITCH +0x00003E3C: 0xF004F69F vmmul.q M730,M522,M100 15 (00003E38) PITCH +0x00003E40: 0xF004F79F vmmul.q M730,M532,M100 15 (00003E3C) PITCH +0x00003E44: 0xF004F89F vmmul.q M730,M602,M100 15 (00003E40) PITCH +0x00003E48: 0xF004F99F vmmul.q M730,M612,M100 15 (00003E44) PITCH +0x00003E4C: 0xF004FA9F vmmul.q M730,M622,M100 15 (00003E48) PITCH +0x00003E50: 0xF004FB9F vmmul.q M730,M632,M100 15 (00003E4C) PITCH +0x00003E54: 0xF004FC9F vmmul.q M730,M702,M100 21 (00003E50) PITCH REG +0x00003E58: 0xF004FD9F vmmul.q M730,M712,M100 21 (00003E54) PITCH REG +0x00003E5C: 0xF004FE9F vmmul.q M730,M722,M100 21 (00003E58) PITCH REG +0x00003E60: 0xF004FF9F vmmul.q M730,M732,M100 21 (00003E5C) PITCH REG +0x00003E64: 0xF3A4009F vrot.p C730,S000,[C,S] 15 (00003E60) PITCH +0x00003E68: 0xF3A1009F vrot.p C730,S000,[S,C] 01 (00003E64) PITCH +0x00003E6C: 0xF3A3009F vrot.p C730,S000,[S,0] 01 (00003E68) PITCH +0x00003E70: 0xF3A3009F vrot.p C730,S000,[S,0] 01 (00003E6C) PITCH +0x00003E74: 0xF3A4009F vrot.p C730,S000,[C,S] 01 (00003E70) PITCH +0x00003E78: 0xF3A1009F vrot.p C730,S000,[S,C] 01 (00003E74) PITCH +0x00003E7C: 0xF3A7009F vrot.p C730,S000,[0,S] 01 (00003E78) PITCH +0x00003E80: 0xF3A7009F vrot.p C730,S000,[0,S] 01 (00003E7C) PITCH +0x00003E84: 0xF3AC009F vrot.p C730,S000,[C,0] 01 (00003E80) PITCH +0x00003E88: 0xF3AD009F vrot.p C730,S000,[0,C] 01 (00003E84) PITCH +0x00003E8C: 0xF3AF009F vrot.p C730,S000,[S,S] 01 (00003E88) PITCH +0x00003E90: 0xF3AE009F vrot.p C730,S000,[0,0] 01 (00003E8C) PITCH +0x00003E94: 0xF3AC009F vrot.p C730,S000,[C,0] 01 (00003E90) PITCH +0x00003E98: 0xF3AD009F vrot.p C730,S000,[0,C] 01 (00003E94) PITCH +0x00003E9C: 0xF3AE009F vrot.p C730,S000,[0,0] 01 (00003E98) PITCH +0x00003EA0: 0xF3AF009F vrot.p C730,S000,[S,S] 01 (00003E9C) PITCH +0x00003EA4: 0xF3B4009F vrot.p C730,S000,[C,-S] 01 (00003EA0) PITCH +0x00003EA8: 0xF3B1009F vrot.p C730,S000,[-S,C] 01 (00003EA4) PITCH +0x00003EAC: 0xF3B3009F vrot.p C730,S000,[-S,0] 01 (00003EA8) PITCH +0x00003EB0: 0xF3B3009F vrot.p C730,S000,[-S,0] 01 (00003EAC) PITCH +0x00003EB4: 0xF3B4009F vrot.p C730,S000,[C,-S] 01 (00003EB0) PITCH +0x00003EB8: 0xF3B1009F vrot.p C730,S000,[-S,C] 01 (00003EB4) PITCH +0x00003EBC: 0xF3B7009F vrot.p C730,S000,[0,-S] 01 (00003EB8) PITCH +0x00003EC0: 0xF3B7009F vrot.p C730,S000,[0,-S] 01 (00003EBC) PITCH +0x00003EC4: 0xF3AC009F vrot.p C730,S000,[C,0] 01 (00003EC0) PITCH +0x00003EC8: 0xF3AD009F vrot.p C730,S000,[0,C] 01 (00003EC4) PITCH +0x00003ECC: 0xF3BF009F vrot.p C730,S000,[-S,-S] 01 (00003EC8) PITCH +0x00003ED0: 0xF3AE009F vrot.p C730,S000,[0,0] 01 (00003ECC) PITCH +0x00003ED4: 0xF3AC009F vrot.p C730,S000,[C,0] 01 (00003ED0) PITCH +0x00003ED8: 0xF3AD009F vrot.p C730,S000,[0,C] 01 (00003ED4) PITCH +0x00003EDC: 0xF3AE009F vrot.p C730,S000,[0,0] 01 (00003ED8) PITCH +0x00003EE0: 0xF3BF009F vrot.p C730,S000,[-S,-S] 01 (00003EDC) PITCH +0x00003EE4: 0xF3A0801F vrot.t C730,S000,[C,S,S] 01 (00003EE0) PITCH +0x00003EE8: 0xF3A1801F vrot.t C730,S000,[S,C,0] 01 (00003EE4) PITCH +0x00003EEC: 0xF3A2801F vrot.t C730,S000,[S,0,C] 01 (00003EE8) PITCH +0x00003EF0: 0xF3A3801F vrot.t C730,S000,[S,0,0] 01 (00003EEC) PITCH +0x00003EF4: 0xF3A4801F vrot.t C730,S000,[C,S,0] 01 (00003EF0) PITCH +0x00003EF8: 0xF3A5801F vrot.t C730,S000,[S,C,S] 01 (00003EF4) PITCH +0x00003EFC: 0xF3A6801F vrot.t C730,S000,[0,S,C] 01 (00003EF8) PITCH +0x00003F00: 0xF3A7801F vrot.t C730,S000,[0,S,0] 01 (00003EFC) PITCH +0x00003F04: 0xF3A8801F vrot.t C730,S000,[C,0,S] 01 (00003F00) PITCH +0x00003F08: 0xF3A9801F vrot.t C730,S000,[0,C,S] 01 (00003F04) PITCH +0x00003F0C: 0xF3AA801F vrot.t C730,S000,[S,S,C] 01 (00003F08) PITCH +0x00003F10: 0xF3AB801F vrot.t C730,S000,[0,0,S] 01 (00003F0C) PITCH +0x00003F14: 0xF3AC801F vrot.t C730,S000,[C,0,0] 01 (00003F10) PITCH +0x00003F18: 0xF3AD801F vrot.t C730,S000,[0,C,0] 01 (00003F14) PITCH +0x00003F1C: 0xF3AE801F vrot.t C730,S000,[0,0,C] 01 (00003F18) PITCH +0x00003F20: 0xF3AF801F vrot.t C730,S000,[S,S,S] 01 (00003F1C) PITCH +0x00003F24: 0xF3B0801F vrot.t C730,S000,[C,-S,-S] 01 (00003F20) PITCH +0x00003F28: 0xF3B1801F vrot.t C730,S000,[-S,C,0] 01 (00003F24) PITCH +0x00003F2C: 0xF3B2801F vrot.t C730,S000,[-S,0,C] 01 (00003F28) PITCH +0x00003F30: 0xF3B3801F vrot.t C730,S000,[-S,0,0] 01 (00003F2C) PITCH +0x00003F34: 0xF3B4801F vrot.t C730,S000,[C,-S,0] 01 (00003F30) PITCH +0x00003F38: 0xF3B5801F vrot.t C730,S000,[-S,C,-S] 01 (00003F34) PITCH +0x00003F3C: 0xF3B6801F vrot.t C730,S000,[0,-S,C] 01 (00003F38) PITCH +0x00003F40: 0xF3B7801F vrot.t C730,S000,[0,-S,0] 01 (00003F3C) PITCH +0x00003F44: 0xF3B8801F vrot.t C730,S000,[C,0,-S] 01 (00003F40) PITCH +0x00003F48: 0xF3B9801F vrot.t C730,S000,[0,C,-S] 01 (00003F44) PITCH +0x00003F4C: 0xF3BA801F vrot.t C730,S000,[-S,-S,C] 01 (00003F48) PITCH +0x00003F50: 0xF3BB801F vrot.t C730,S000,[0,0,-S] 01 (00003F4C) PITCH +0x00003F54: 0xF3AC801F vrot.t C730,S000,[C,0,0] 01 (00003F50) PITCH +0x00003F58: 0xF3AD801F vrot.t C730,S000,[0,C,0] 01 (00003F54) PITCH +0x00003F5C: 0xF3AE801F vrot.t C730,S000,[0,0,C] 01 (00003F58) PITCH +0x00003F60: 0xF3BF801F vrot.t C730,S000,[-S,-S,-S] 01 (00003F5C) PITCH +0x00003F64: 0xF3A0809F vrot.q C730,S000,[C,S,S,S] 01 (00003F60) PITCH +0x00003F68: 0xF3A1809F vrot.q C730,S000,[S,C,0,0] 01 (00003F64) PITCH +0x00003F6C: 0xF3A2809F vrot.q C730,S000,[S,0,C,0] 01 (00003F68) PITCH +0x00003F70: 0xF3A3809F vrot.q C730,S000,[S,0,0,C] 01 (00003F6C) PITCH +0x00003F74: 0xF3A4809F vrot.q C730,S000,[C,S,0,0] 01 (00003F70) PITCH +0x00003F78: 0xF3A5809F vrot.q C730,S000,[S,C,S,S] 01 (00003F74) PITCH +0x00003F7C: 0xF3A6809F vrot.q C730,S000,[0,S,C,0] 01 (00003F78) PITCH +0x00003F80: 0xF3A7809F vrot.q C730,S000,[0,S,0,C] 01 (00003F7C) PITCH +0x00003F84: 0xF3A8809F vrot.q C730,S000,[C,0,S,0] 01 (00003F80) PITCH +0x00003F88: 0xF3A9809F vrot.q C730,S000,[0,C,S,0] 01 (00003F84) PITCH +0x00003F8C: 0xF3AA809F vrot.q C730,S000,[S,S,C,S] 01 (00003F88) PITCH +0x00003F90: 0xF3AB809F vrot.q C730,S000,[0,0,S,C] 01 (00003F8C) PITCH +0x00003F94: 0xF3AC809F vrot.q C730,S000,[C,0,0,S] 01 (00003F90) PITCH +0x00003F98: 0xF3AD809F vrot.q C730,S000,[0,C,0,S] 01 (00003F94) PITCH +0x00003F9C: 0xF3AE809F vrot.q C730,S000,[0,0,C,S] 01 (00003F98) PITCH +0x00003FA0: 0xF3AF809F vrot.q C730,S000,[S,S,S,C] 01 (00003F9C) PITCH +0x00003FA4: 0xF3B0809F vrot.q C730,S000,[C,-S,-S,-S] 01 (00003FA0) PITCH +0x00003FA8: 0xF3B1809F vrot.q C730,S000,[-S,C,0,0] 01 (00003FA4) PITCH +0x00003FAC: 0xF3B2809F vrot.q C730,S000,[-S,0,C,0] 01 (00003FA8) PITCH +0x00003FB0: 0xF3B3809F vrot.q C730,S000,[-S,0,0,C] 01 (00003FAC) PITCH +0x00003FB4: 0xF3B4809F vrot.q C730,S000,[C,-S,0,0] 01 (00003FB0) PITCH +0x00003FB8: 0xF3B5809F vrot.q C730,S000,[-S,C,-S,-S] 01 (00003FB4) PITCH +0x00003FBC: 0xF3B6809F vrot.q C730,S000,[0,-S,C,0] 01 (00003FB8) PITCH +0x00003FC0: 0xF3B7809F vrot.q C730,S000,[0,-S,0,C] 01 (00003FBC) PITCH +0x00003FC4: 0xF3B8809F vrot.q C730,S000,[C,0,-S,0] 01 (00003FC0) PITCH +0x00003FC8: 0xF3B9809F vrot.q C730,S000,[0,C,-S,0] 01 (00003FC4) PITCH +0x00003FCC: 0xF3BA809F vrot.q C730,S000,[-S,-S,C,-S] 01 (00003FC8) PITCH +0x00003FD0: 0xF3BB809F vrot.q C730,S000,[0,0,-S,C] 01 (00003FCC) PITCH +0x00003FD4: 0xF3BC809F vrot.q C730,S000,[C,0,0,-S] 01 (00003FD0) PITCH +0x00003FD8: 0xF3BD809F vrot.q C730,S000,[0,C,0,-S] 01 (00003FD4) PITCH +0x00003FDC: 0xF3BE809F vrot.q C730,S000,[0,0,C,-S] 01 (00003FD8) PITCH +0x00003FE0: 0xF3BF809F vrot.q C730,S000,[-S,-S,-S,C] 01 (00003FDC) PITCH +0x00003FE4: 0xDC000000 vpfxs X,X,X,X +0x00003FE8: 0xDC000001 vpfxs Y,X,X,X +0x00003FEC: 0xDC000002 vpfxs Z,X,X,X +0x00003FF0: 0xDC000003 vpfxs W,X,X,X +0x00003FF4: 0xDC000100 vpfxs |X|,X,X,X +0x00003FF8: 0xDC000101 vpfxs |Y|,X,X,X +0x00003FFC: 0xDC000102 vpfxs |Z|,X,X,X +0x00004000: 0xDC000103 vpfxs |W|,X,X,X +0x00004004: 0xDC001000 vpfxs 0,X,X,X +0x00004008: 0xDC001001 vpfxs 1,X,X,X +0x0000400C: 0xDC001002 vpfxs 2,X,X,X +0x00004010: 0xDC001003 vpfxs 1/2,X,X,X +0x00004014: 0xDC001100 vpfxs 3,X,X,X +0x00004018: 0xDC001101 vpfxs 1/3,X,X,X +0x0000401C: 0xDC001102 vpfxs 1/4,X,X,X +0x00004020: 0xDC001103 vpfxs 1/6,X,X,X +0x00004024: 0xDC010000 vpfxs -X,X,X,X +0x00004028: 0xDC010001 vpfxs -Y,X,X,X +0x0000402C: 0xDC010002 vpfxs -Z,X,X,X +0x00004030: 0xDC010003 vpfxs -W,X,X,X +0x00004034: 0xDC010100 vpfxs -|X|,X,X,X +0x00004038: 0xDC010101 vpfxs -|Y|,X,X,X +0x0000403C: 0xDC010102 vpfxs -|Z|,X,X,X +0x00004040: 0xDC010103 vpfxs -|W|,X,X,X +0x00004044: 0xDC011000 vpfxs -0,X,X,X +0x00004048: 0xDC011001 vpfxs -1,X,X,X +0x0000404C: 0xDC011002 vpfxs -2,X,X,X +0x00004050: 0xDC011003 vpfxs -1/2,X,X,X +0x00004054: 0xDC011100 vpfxs -3,X,X,X +0x00004058: 0xDC011101 vpfxs -1/3,X,X,X +0x0000405C: 0xDC011102 vpfxs -1/4,X,X,X +0x00004060: 0xDC011103 vpfxs -1/6,X,X,X +0x00004064: 0xDC000000 vpfxs X,X,X,X +0x00004068: 0xDC000004 vpfxs X,Y,X,X +0x0000406C: 0xDC000008 vpfxs X,Z,X,X +0x00004070: 0xDC00000C vpfxs X,W,X,X +0x00004074: 0xDC000200 vpfxs X,|X|,X,X +0x00004078: 0xDC000204 vpfxs X,|Y|,X,X +0x0000407C: 0xDC000208 vpfxs X,|Z|,X,X +0x00004080: 0xDC00020C vpfxs X,|W|,X,X +0x00004084: 0xDC002000 vpfxs X,0,X,X +0x00004088: 0xDC002004 vpfxs X,1,X,X +0x0000408C: 0xDC002008 vpfxs X,2,X,X +0x00004090: 0xDC00200C vpfxs X,1/2,X,X +0x00004094: 0xDC002200 vpfxs X,3,X,X +0x00004098: 0xDC002204 vpfxs X,1/3,X,X +0x0000409C: 0xDC002208 vpfxs X,1/4,X,X +0x000040A0: 0xDC00220C vpfxs X,1/6,X,X +0x000040A4: 0xDC020000 vpfxs X,-X,X,X +0x000040A8: 0xDC020004 vpfxs X,-Y,X,X +0x000040AC: 0xDC020008 vpfxs X,-Z,X,X +0x000040B0: 0xDC02000C vpfxs X,-W,X,X +0x000040B4: 0xDC020200 vpfxs X,-|X|,X,X +0x000040B8: 0xDC020204 vpfxs X,-|Y|,X,X +0x000040BC: 0xDC020208 vpfxs X,-|Z|,X,X +0x000040C0: 0xDC02020C vpfxs X,-|W|,X,X +0x000040C4: 0xDC022000 vpfxs X,-0,X,X +0x000040C8: 0xDC022004 vpfxs X,-1,X,X +0x000040CC: 0xDC022008 vpfxs X,-2,X,X +0x000040D0: 0xDC02200C vpfxs X,-1/2,X,X +0x000040D4: 0xDC022200 vpfxs X,-3,X,X +0x000040D8: 0xDC022204 vpfxs X,-1/3,X,X +0x000040DC: 0xDC022208 vpfxs X,-1/4,X,X +0x000040E0: 0xDC02220C vpfxs X,-1/6,X,X +0x000040E4: 0xDC000000 vpfxs X,X,X,X +0x000040E8: 0xDC000010 vpfxs X,X,Y,X +0x000040EC: 0xDC000020 vpfxs X,X,Z,X +0x000040F0: 0xDC000030 vpfxs X,X,W,X +0x000040F4: 0xDC000400 vpfxs X,X,|X|,X +0x000040F8: 0xDC000410 vpfxs X,X,|Y|,X +0x000040FC: 0xDC000420 vpfxs X,X,|Z|,X +0x00004100: 0xDC000430 vpfxs X,X,|W|,X +0x00004104: 0xDC004000 vpfxs X,X,0,X +0x00004108: 0xDC004010 vpfxs X,X,1,X +0x0000410C: 0xDC004020 vpfxs X,X,2,X +0x00004110: 0xDC004030 vpfxs X,X,1/2,X +0x00004114: 0xDC004400 vpfxs X,X,3,X +0x00004118: 0xDC004410 vpfxs X,X,1/3,X +0x0000411C: 0xDC004420 vpfxs X,X,1/4,X +0x00004120: 0xDC004430 vpfxs X,X,1/6,X +0x00004124: 0xDC040000 vpfxs X,X,-X,X +0x00004128: 0xDC040010 vpfxs X,X,-Y,X +0x0000412C: 0xDC040020 vpfxs X,X,-Z,X +0x00004130: 0xDC040030 vpfxs X,X,-W,X +0x00004134: 0xDC040400 vpfxs X,X,-|X|,X +0x00004138: 0xDC040410 vpfxs X,X,-|Y|,X +0x0000413C: 0xDC040420 vpfxs X,X,-|Z|,X +0x00004140: 0xDC040430 vpfxs X,X,-|W|,X +0x00004144: 0xDC044000 vpfxs X,X,-0,X +0x00004148: 0xDC044010 vpfxs X,X,-1,X +0x0000414C: 0xDC044020 vpfxs X,X,-2,X +0x00004150: 0xDC044030 vpfxs X,X,-1/2,X +0x00004154: 0xDC044400 vpfxs X,X,-3,X +0x00004158: 0xDC044410 vpfxs X,X,-1/3,X +0x0000415C: 0xDC044420 vpfxs X,X,-1/4,X +0x00004160: 0xDC044430 vpfxs X,X,-1/6,X +0x00004164: 0xDC000000 vpfxs X,X,X,X +0x00004168: 0xDC000040 vpfxs X,X,X,Y +0x0000416C: 0xDC000080 vpfxs X,X,X,Z +0x00004170: 0xDC0000C0 vpfxs X,X,X,W +0x00004174: 0xDC000800 vpfxs X,X,X,|X| +0x00004178: 0xDC000840 vpfxs X,X,X,|Y| +0x0000417C: 0xDC000880 vpfxs X,X,X,|Z| +0x00004180: 0xDC0008C0 vpfxs X,X,X,|W| +0x00004184: 0xDC008000 vpfxs X,X,X,0 +0x00004188: 0xDC008040 vpfxs X,X,X,1 +0x0000418C: 0xDC008080 vpfxs X,X,X,2 +0x00004190: 0xDC0080C0 vpfxs X,X,X,1/2 +0x00004194: 0xDC008800 vpfxs X,X,X,3 +0x00004198: 0xDC008840 vpfxs X,X,X,1/3 +0x0000419C: 0xDC008880 vpfxs X,X,X,1/4 +0x000041A0: 0xDC0088C0 vpfxs X,X,X,1/6 +0x000041A4: 0xDC080000 vpfxs X,X,X,-X +0x000041A8: 0xDC080040 vpfxs X,X,X,-Y +0x000041AC: 0xDC080080 vpfxs X,X,X,-Z +0x000041B0: 0xDC0800C0 vpfxs X,X,X,-W +0x000041B4: 0xDC080800 vpfxs X,X,X,-|X| +0x000041B8: 0xDC080840 vpfxs X,X,X,-|Y| +0x000041BC: 0xDC080880 vpfxs X,X,X,-|Z| +0x000041C0: 0xDC0808C0 vpfxs X,X,X,-|W| +0x000041C4: 0xDC088000 vpfxs X,X,X,-0 +0x000041C8: 0xDC088040 vpfxs X,X,X,-1 +0x000041CC: 0xDC088080 vpfxs X,X,X,-2 +0x000041D0: 0xDC0880C0 vpfxs X,X,X,-1/2 +0x000041D4: 0xDC088800 vpfxs X,X,X,-3 +0x000041D8: 0xDC088840 vpfxs X,X,X,-1/3 +0x000041DC: 0xDC088880 vpfxs X,X,X,-1/4 +0x000041E0: 0xDC0888C0 vpfxs X,X,X,-1/6 +0x000041E4: 0xDD000000 vpfxt X,X,X,X +0x000041E8: 0xDD000001 vpfxt Y,X,X,X +0x000041EC: 0xDD000002 vpfxt Z,X,X,X +0x000041F0: 0xDD000003 vpfxt W,X,X,X +0x000041F4: 0xDD000100 vpfxt |X|,X,X,X +0x000041F8: 0xDD000101 vpfxt |Y|,X,X,X +0x000041FC: 0xDD000102 vpfxt |Z|,X,X,X +0x00004200: 0xDD000103 vpfxt |W|,X,X,X +0x00004204: 0xDD001000 vpfxt 0,X,X,X +0x00004208: 0xDD001001 vpfxt 1,X,X,X +0x0000420C: 0xDD001002 vpfxt 2,X,X,X +0x00004210: 0xDD001003 vpfxt 1/2,X,X,X +0x00004214: 0xDD001100 vpfxt 3,X,X,X +0x00004218: 0xDD001101 vpfxt 1/3,X,X,X +0x0000421C: 0xDD001102 vpfxt 1/4,X,X,X +0x00004220: 0xDD001103 vpfxt 1/6,X,X,X +0x00004224: 0xDD010000 vpfxt -X,X,X,X +0x00004228: 0xDD010001 vpfxt -Y,X,X,X +0x0000422C: 0xDD010002 vpfxt -Z,X,X,X +0x00004230: 0xDD010003 vpfxt -W,X,X,X +0x00004234: 0xDD010100 vpfxt -|X|,X,X,X +0x00004238: 0xDD010101 vpfxt -|Y|,X,X,X +0x0000423C: 0xDD010102 vpfxt -|Z|,X,X,X +0x00004240: 0xDD010103 vpfxt -|W|,X,X,X +0x00004244: 0xDD011000 vpfxt -0,X,X,X +0x00004248: 0xDD011001 vpfxt -1,X,X,X +0x0000424C: 0xDD011002 vpfxt -2,X,X,X +0x00004250: 0xDD011003 vpfxt -1/2,X,X,X +0x00004254: 0xDD011100 vpfxt -3,X,X,X +0x00004258: 0xDD011101 vpfxt -1/3,X,X,X +0x0000425C: 0xDD011102 vpfxt -1/4,X,X,X +0x00004260: 0xDD011103 vpfxt -1/6,X,X,X +0x00004264: 0xDD000000 vpfxt X,X,X,X +0x00004268: 0xDD000004 vpfxt X,Y,X,X +0x0000426C: 0xDD000008 vpfxt X,Z,X,X +0x00004270: 0xDD00000C vpfxt X,W,X,X +0x00004274: 0xDD000200 vpfxt X,|X|,X,X +0x00004278: 0xDD000204 vpfxt X,|Y|,X,X +0x0000427C: 0xDD000208 vpfxt X,|Z|,X,X +0x00004280: 0xDD00020C vpfxt X,|W|,X,X +0x00004284: 0xDD002000 vpfxt X,0,X,X +0x00004288: 0xDD002004 vpfxt X,1,X,X +0x0000428C: 0xDD002008 vpfxt X,2,X,X +0x00004290: 0xDD00200C vpfxt X,1/2,X,X +0x00004294: 0xDD002200 vpfxt X,3,X,X +0x00004298: 0xDD002204 vpfxt X,1/3,X,X +0x0000429C: 0xDD002208 vpfxt X,1/4,X,X +0x000042A0: 0xDD00220C vpfxt X,1/6,X,X +0x000042A4: 0xDD020000 vpfxt X,-X,X,X +0x000042A8: 0xDD020004 vpfxt X,-Y,X,X +0x000042AC: 0xDD020008 vpfxt X,-Z,X,X +0x000042B0: 0xDD02000C vpfxt X,-W,X,X +0x000042B4: 0xDD020200 vpfxt X,-|X|,X,X +0x000042B8: 0xDD020204 vpfxt X,-|Y|,X,X +0x000042BC: 0xDD020208 vpfxt X,-|Z|,X,X +0x000042C0: 0xDD02020C vpfxt X,-|W|,X,X +0x000042C4: 0xDD022000 vpfxt X,-0,X,X +0x000042C8: 0xDD022004 vpfxt X,-1,X,X +0x000042CC: 0xDD022008 vpfxt X,-2,X,X +0x000042D0: 0xDD02200C vpfxt X,-1/2,X,X +0x000042D4: 0xDD022200 vpfxt X,-3,X,X +0x000042D8: 0xDD022204 vpfxt X,-1/3,X,X +0x000042DC: 0xDD022208 vpfxt X,-1/4,X,X +0x000042E0: 0xDD02220C vpfxt X,-1/6,X,X +0x000042E4: 0xDD000000 vpfxt X,X,X,X +0x000042E8: 0xDD000010 vpfxt X,X,Y,X +0x000042EC: 0xDD000020 vpfxt X,X,Z,X +0x000042F0: 0xDD000030 vpfxt X,X,W,X +0x000042F4: 0xDD000400 vpfxt X,X,|X|,X +0x000042F8: 0xDD000410 vpfxt X,X,|Y|,X +0x000042FC: 0xDD000420 vpfxt X,X,|Z|,X +0x00004300: 0xDD000430 vpfxt X,X,|W|,X +0x00004304: 0xDD004000 vpfxt X,X,0,X +0x00004308: 0xDD004010 vpfxt X,X,1,X +0x0000430C: 0xDD004020 vpfxt X,X,2,X +0x00004310: 0xDD004030 vpfxt X,X,1/2,X +0x00004314: 0xDD004400 vpfxt X,X,3,X +0x00004318: 0xDD004410 vpfxt X,X,1/3,X +0x0000431C: 0xDD004420 vpfxt X,X,1/4,X +0x00004320: 0xDD004430 vpfxt X,X,1/6,X +0x00004324: 0xDD040000 vpfxt X,X,-X,X +0x00004328: 0xDD040010 vpfxt X,X,-Y,X +0x0000432C: 0xDD040020 vpfxt X,X,-Z,X +0x00004330: 0xDD040030 vpfxt X,X,-W,X +0x00004334: 0xDD040400 vpfxt X,X,-|X|,X +0x00004338: 0xDD040410 vpfxt X,X,-|Y|,X +0x0000433C: 0xDD040420 vpfxt X,X,-|Z|,X +0x00004340: 0xDD040430 vpfxt X,X,-|W|,X +0x00004344: 0xDD044000 vpfxt X,X,-0,X +0x00004348: 0xDD044010 vpfxt X,X,-1,X +0x0000434C: 0xDD044020 vpfxt X,X,-2,X +0x00004350: 0xDD044030 vpfxt X,X,-1/2,X +0x00004354: 0xDD044400 vpfxt X,X,-3,X +0x00004358: 0xDD044410 vpfxt X,X,-1/3,X +0x0000435C: 0xDD044420 vpfxt X,X,-1/4,X +0x00004360: 0xDD044430 vpfxt X,X,-1/6,X +0x00004364: 0xDD000000 vpfxt X,X,X,X +0x00004368: 0xDD000040 vpfxt X,X,X,Y +0x0000436C: 0xDD000080 vpfxt X,X,X,Z +0x00004370: 0xDD0000C0 vpfxt X,X,X,W +0x00004374: 0xDD000800 vpfxt X,X,X,|X| +0x00004378: 0xDD000840 vpfxt X,X,X,|Y| +0x0000437C: 0xDD000880 vpfxt X,X,X,|Z| +0x00004380: 0xDD0008C0 vpfxt X,X,X,|W| +0x00004384: 0xDD008000 vpfxt X,X,X,0 +0x00004388: 0xDD008040 vpfxt X,X,X,1 +0x0000438C: 0xDD008080 vpfxt X,X,X,2 +0x00004390: 0xDD0080C0 vpfxt X,X,X,1/2 +0x00004394: 0xDD008800 vpfxt X,X,X,3 +0x00004398: 0xDD008840 vpfxt X,X,X,1/3 +0x0000439C: 0xDD008880 vpfxt X,X,X,1/4 +0x000043A0: 0xDD0088C0 vpfxt X,X,X,1/6 +0x000043A4: 0xDD080000 vpfxt X,X,X,-X +0x000043A8: 0xDD080040 vpfxt X,X,X,-Y +0x000043AC: 0xDD080080 vpfxt X,X,X,-Z +0x000043B0: 0xDD0800C0 vpfxt X,X,X,-W +0x000043B4: 0xDD080800 vpfxt X,X,X,-|X| +0x000043B8: 0xDD080840 vpfxt X,X,X,-|Y| +0x000043BC: 0xDD080880 vpfxt X,X,X,-|Z| +0x000043C0: 0xDD0808C0 vpfxt X,X,X,-|W| +0x000043C4: 0xDD088000 vpfxt X,X,X,-0 +0x000043C8: 0xDD088040 vpfxt X,X,X,-1 +0x000043CC: 0xDD088080 vpfxt X,X,X,-2 +0x000043D0: 0xDD0880C0 vpfxt X,X,X,-1/2 +0x000043D4: 0xDD088800 vpfxt X,X,X,-3 +0x000043D8: 0xDD088840 vpfxt X,X,X,-1/3 +0x000043DC: 0xDD088880 vpfxt X,X,X,-1/4 +0x000043E0: 0xDD0888C0 vpfxt X,X,X,-1/6 +0x000043E4: 0xDE000000 vpfxd ,,, +0x000043E8: 0xDE000001 vpfxd 0,,, +0x000043EC: 0xDE000003 vpfxd 1,,, +0x000043F0: 0xDE000100 vpfxd M,,, +0x000043F4: 0xDE000000 vpfxd ,,, +0x000043F8: 0xDE000004 vpfxd ,0,, +0x000043FC: 0xDE00000C vpfxd ,1,, +0x00004400: 0xDE000200 vpfxd ,M,, +0x00004404: 0xDE000000 vpfxd ,,, +0x00004408: 0xDE000010 vpfxd ,,0, +0x0000440C: 0xDE000030 vpfxd ,,1, +0x00004410: 0xDE000400 vpfxd ,,M, +0x00004414: 0xDE000000 vpfxd ,,, +0x00004418: 0xDE000040 vpfxd ,,,0 +0x0000441C: 0xDE0000C0 vpfxd ,,,1 +0x00004420: 0xDE000800 vpfxd ,,,M +0x00004424: 0x03E00008 jr ra +0x00004428: 0x00000000 nop + diff --git a/tests/asm/r4000allegrex/allegrex_vfpu_pspsnc.dump.s b/tests/asm/r4000allegrex/allegrex_vfpu_pspsnc.dump.s new file mode 100644 index 00000000..28a8e6f6 --- /dev/null +++ b/tests/asm/r4000allegrex/allegrex_vfpu_pspsnc.dump.s @@ -0,0 +1,5206 @@ +Disassembly of section .text: + +scale_quad_x_quad_matrix: +0x00000000: 0xF2008080 vmscl.q M000,M000,S000 +0x00000004: 0xF2018080 vmscl.q M000,M000,S010 09 (00000000) PITCH REG +0x00000008: 0xF2028080 vmscl.q M000,M000,S020 09 (00000004) PITCH REG +0x0000000C: 0xF2038080 vmscl.q M000,M000,S030 09 (00000008) PITCH REG +0x00000010: 0xF2048080 vmscl.q M000,M000,S100 09 (0000000C) PITCH REG +0x00000014: 0xF2058080 vmscl.q M000,M000,S110 09 (00000010) PITCH REG +0x00000018: 0xF2068080 vmscl.q M000,M000,S120 09 (00000014) PITCH REG +0x0000001C: 0xF2078080 vmscl.q M000,M000,S130 09 (00000018) PITCH REG +0x00000020: 0xF2088080 vmscl.q M000,M000,S200 09 (0000001C) PITCH REG +0x00000024: 0xF2098080 vmscl.q M000,M000,S210 09 (00000020) PITCH REG +0x00000028: 0xF20A8080 vmscl.q M000,M000,S220 09 (00000024) PITCH REG +0x0000002C: 0xF20B8080 vmscl.q M000,M000,S230 09 (00000028) PITCH REG +0x00000030: 0xF20C8080 vmscl.q M000,M000,S300 09 (0000002C) PITCH REG +0x00000034: 0xF20D8080 vmscl.q M000,M000,S310 09 (00000030) PITCH REG +0x00000038: 0xF20E8080 vmscl.q M000,M000,S320 09 (00000034) PITCH REG +0x0000003C: 0xF20F8080 vmscl.q M000,M000,S330 09 (00000038) PITCH REG +0x00000040: 0xF2108080 vmscl.q M000,M000,S400 09 (0000003C) PITCH REG +0x00000044: 0xF2118080 vmscl.q M000,M000,S410 09 (00000040) PITCH REG +0x00000048: 0xF2128080 vmscl.q M000,M000,S420 09 (00000044) PITCH REG +0x0000004C: 0xF2138080 vmscl.q M000,M000,S430 09 (00000048) PITCH REG +0x00000050: 0xF2148080 vmscl.q M000,M000,S500 09 (0000004C) PITCH REG +0x00000054: 0xF2158080 vmscl.q M000,M000,S510 09 (00000050) PITCH REG +0x00000058: 0xF2168080 vmscl.q M000,M000,S520 09 (00000054) PITCH REG +0x0000005C: 0xF2178080 vmscl.q M000,M000,S530 09 (00000058) PITCH REG +0x00000060: 0xF2188080 vmscl.q M000,M000,S600 09 (0000005C) PITCH REG +0x00000064: 0xF2198080 vmscl.q M000,M000,S610 09 (00000060) PITCH REG +0x00000068: 0xF21A8080 vmscl.q M000,M000,S620 09 (00000064) PITCH REG +0x0000006C: 0xF21B8080 vmscl.q M000,M000,S630 09 (00000068) PITCH REG +0x00000070: 0xF21C8080 vmscl.q M000,M000,S700 09 (0000006C) PITCH REG +0x00000074: 0xF21D8080 vmscl.q M000,M000,S710 09 (00000070) PITCH REG +0x00000078: 0xF21E8080 vmscl.q M000,M000,S720 09 (00000074) PITCH REG +0x0000007C: 0xF21F8080 vmscl.q M000,M000,S730 09 (00000078) PITCH REG +0x00000080: 0xF2208080 vmscl.q M000,M000,S001 09 (0000007C) PITCH REG +0x00000084: 0xF2218080 vmscl.q M000,M000,S011 09 (00000080) PITCH REG +0x00000088: 0xF2228080 vmscl.q M000,M000,S021 09 (00000084) PITCH REG +0x0000008C: 0xF2238080 vmscl.q M000,M000,S031 09 (00000088) PITCH REG +0x00000090: 0xF2248080 vmscl.q M000,M000,S101 09 (0000008C) PITCH REG +0x00000094: 0xF2258080 vmscl.q M000,M000,S111 09 (00000090) PITCH REG +0x00000098: 0xF2268080 vmscl.q M000,M000,S121 09 (00000094) PITCH REG +0x0000009C: 0xF2278080 vmscl.q M000,M000,S131 09 (00000098) PITCH REG +0x000000A0: 0xF2288080 vmscl.q M000,M000,S201 09 (0000009C) PITCH REG +0x000000A4: 0xF2298080 vmscl.q M000,M000,S211 09 (000000A0) PITCH REG +0x000000A8: 0xF22A8080 vmscl.q M000,M000,S221 09 (000000A4) PITCH REG +0x000000AC: 0xF22B8080 vmscl.q M000,M000,S231 09 (000000A8) PITCH REG +0x000000B0: 0xF22C8080 vmscl.q M000,M000,S301 09 (000000AC) PITCH REG +0x000000B4: 0xF22D8080 vmscl.q M000,M000,S311 09 (000000B0) PITCH REG +0x000000B8: 0xF22E8080 vmscl.q M000,M000,S321 09 (000000B4) PITCH REG +0x000000BC: 0xF22F8080 vmscl.q M000,M000,S331 09 (000000B8) PITCH REG +0x000000C0: 0xF2308080 vmscl.q M000,M000,S401 09 (000000BC) PITCH REG +0x000000C4: 0xF2318080 vmscl.q M000,M000,S411 09 (000000C0) PITCH REG +0x000000C8: 0xF2328080 vmscl.q M000,M000,S421 09 (000000C4) PITCH REG +0x000000CC: 0xF2338080 vmscl.q M000,M000,S431 09 (000000C8) PITCH REG +0x000000D0: 0xF2348080 vmscl.q M000,M000,S501 09 (000000CC) PITCH REG +0x000000D4: 0xF2358080 vmscl.q M000,M000,S511 09 (000000D0) PITCH REG +0x000000D8: 0xF2368080 vmscl.q M000,M000,S521 09 (000000D4) PITCH REG +0x000000DC: 0xF2378080 vmscl.q M000,M000,S531 09 (000000D8) PITCH REG +0x000000E0: 0xF2388080 vmscl.q M000,M000,S601 09 (000000DC) PITCH REG +0x000000E4: 0xF2398080 vmscl.q M000,M000,S611 09 (000000E0) PITCH REG +0x000000E8: 0xF23A8080 vmscl.q M000,M000,S621 09 (000000E4) PITCH REG +0x000000EC: 0xF23B8080 vmscl.q M000,M000,S631 09 (000000E8) PITCH REG +0x000000F0: 0xF23C8080 vmscl.q M000,M000,S701 09 (000000EC) PITCH REG +0x000000F4: 0xF23D8080 vmscl.q M000,M000,S711 09 (000000F0) PITCH REG +0x000000F8: 0xF23E8080 vmscl.q M000,M000,S721 09 (000000F4) PITCH REG +0x000000FC: 0xF23F8080 vmscl.q M000,M000,S731 09 (000000F8) PITCH REG +0x00000100: 0xF2408080 vmscl.q M000,M000,S002 09 (000000FC) PITCH REG +0x00000104: 0xF2418080 vmscl.q M000,M000,S012 09 (00000100) PITCH REG +0x00000108: 0xF2428080 vmscl.q M000,M000,S022 09 (00000104) PITCH REG +0x0000010C: 0xF2438080 vmscl.q M000,M000,S032 09 (00000108) PITCH REG +0x00000110: 0xF2448080 vmscl.q M000,M000,S102 09 (0000010C) PITCH REG +0x00000114: 0xF2458080 vmscl.q M000,M000,S112 09 (00000110) PITCH REG +0x00000118: 0xF2468080 vmscl.q M000,M000,S122 09 (00000114) PITCH REG +0x0000011C: 0xF2478080 vmscl.q M000,M000,S132 09 (00000118) PITCH REG +0x00000120: 0xF2488080 vmscl.q M000,M000,S202 09 (0000011C) PITCH REG +0x00000124: 0xF2498080 vmscl.q M000,M000,S212 09 (00000120) PITCH REG +0x00000128: 0xF24A8080 vmscl.q M000,M000,S222 09 (00000124) PITCH REG +0x0000012C: 0xF24B8080 vmscl.q M000,M000,S232 09 (00000128) PITCH REG +0x00000130: 0xF24C8080 vmscl.q M000,M000,S302 09 (0000012C) PITCH REG +0x00000134: 0xF24D8080 vmscl.q M000,M000,S312 09 (00000130) PITCH REG +0x00000138: 0xF24E8080 vmscl.q M000,M000,S322 09 (00000134) PITCH REG +0x0000013C: 0xF24F8080 vmscl.q M000,M000,S332 09 (00000138) PITCH REG +0x00000140: 0xF2508080 vmscl.q M000,M000,S402 09 (0000013C) PITCH REG +0x00000144: 0xF2518080 vmscl.q M000,M000,S412 09 (00000140) PITCH REG +0x00000148: 0xF2528080 vmscl.q M000,M000,S422 09 (00000144) PITCH REG +0x0000014C: 0xF2538080 vmscl.q M000,M000,S432 09 (00000148) PITCH REG +0x00000150: 0xF2548080 vmscl.q M000,M000,S502 09 (0000014C) PITCH REG +0x00000154: 0xF2558080 vmscl.q M000,M000,S512 09 (00000150) PITCH REG +0x00000158: 0xF2568080 vmscl.q M000,M000,S522 09 (00000154) PITCH REG +0x0000015C: 0xF2578080 vmscl.q M000,M000,S532 09 (00000158) PITCH REG +0x00000160: 0xF2588080 vmscl.q M000,M000,S602 09 (0000015C) PITCH REG +0x00000164: 0xF2598080 vmscl.q M000,M000,S612 09 (00000160) PITCH REG +0x00000168: 0xF25A8080 vmscl.q M000,M000,S622 09 (00000164) PITCH REG +0x0000016C: 0xF25B8080 vmscl.q M000,M000,S632 09 (00000168) PITCH REG +0x00000170: 0xF25C8080 vmscl.q M000,M000,S702 09 (0000016C) PITCH REG +0x00000174: 0xF25D8080 vmscl.q M000,M000,S712 09 (00000170) PITCH REG +0x00000178: 0xF25E8080 vmscl.q M000,M000,S722 09 (00000174) PITCH REG +0x0000017C: 0xF25F8080 vmscl.q M000,M000,S732 09 (00000178) PITCH REG +0x00000180: 0xF2608080 vmscl.q M000,M000,S003 09 (0000017C) PITCH REG +0x00000184: 0xF2618080 vmscl.q M000,M000,S013 09 (00000180) PITCH REG +0x00000188: 0xF2628080 vmscl.q M000,M000,S023 09 (00000184) PITCH REG +0x0000018C: 0xF2638080 vmscl.q M000,M000,S033 09 (00000188) PITCH REG +0x00000190: 0xF2648080 vmscl.q M000,M000,S103 09 (0000018C) PITCH REG +0x00000194: 0xF2658080 vmscl.q M000,M000,S113 09 (00000190) PITCH REG +0x00000198: 0xF2668080 vmscl.q M000,M000,S123 09 (00000194) PITCH REG +0x0000019C: 0xF2678080 vmscl.q M000,M000,S133 09 (00000198) PITCH REG +0x000001A0: 0xF2688080 vmscl.q M000,M000,S203 09 (0000019C) PITCH REG +0x000001A4: 0xF2698080 vmscl.q M000,M000,S213 09 (000001A0) PITCH REG +0x000001A8: 0xF26A8080 vmscl.q M000,M000,S223 09 (000001A4) PITCH REG +0x000001AC: 0xF26B8080 vmscl.q M000,M000,S233 09 (000001A8) PITCH REG +0x000001B0: 0xF26C8080 vmscl.q M000,M000,S303 09 (000001AC) PITCH REG +0x000001B4: 0xF26D8080 vmscl.q M000,M000,S313 09 (000001B0) PITCH REG +0x000001B8: 0xF26E8080 vmscl.q M000,M000,S323 09 (000001B4) PITCH REG +0x000001BC: 0xF26F8080 vmscl.q M000,M000,S333 09 (000001B8) PITCH REG +0x000001C0: 0xF2708080 vmscl.q M000,M000,S403 09 (000001BC) PITCH REG +0x000001C4: 0xF2718080 vmscl.q M000,M000,S413 09 (000001C0) PITCH REG +0x000001C8: 0xF2728080 vmscl.q M000,M000,S423 09 (000001C4) PITCH REG +0x000001CC: 0xF2738080 vmscl.q M000,M000,S433 09 (000001C8) PITCH REG +0x000001D0: 0xF2748080 vmscl.q M000,M000,S503 09 (000001CC) PITCH REG +0x000001D4: 0xF2758080 vmscl.q M000,M000,S513 09 (000001D0) PITCH REG +0x000001D8: 0xF2768080 vmscl.q M000,M000,S523 09 (000001D4) PITCH REG +0x000001DC: 0xF2778080 vmscl.q M000,M000,S533 09 (000001D8) PITCH REG +0x000001E0: 0xF2788080 vmscl.q M000,M000,S603 09 (000001DC) PITCH REG +0x000001E4: 0xF2798080 vmscl.q M000,M000,S613 09 (000001E0) PITCH REG +0x000001E8: 0xF27A8080 vmscl.q M000,M000,S623 09 (000001E4) PITCH REG +0x000001EC: 0xF27B8080 vmscl.q M000,M000,S633 09 (000001E8) PITCH REG +0x000001F0: 0xF27C8080 vmscl.q M000,M000,S703 09 (000001EC) PITCH REG +0x000001F4: 0xF27D8080 vmscl.q M000,M000,S713 09 (000001F0) PITCH REG +0x000001F8: 0xF27E8080 vmscl.q M000,M000,S723 09 (000001F4) PITCH REG +0x000001FC: 0xF27F8080 vmscl.q M000,M000,S733 09 (000001F8) PITCH REG +0x00000200: 0x00000000 nop +0x00000204: 0xF2008080 vmscl.q M000,M000,S000 08 (000001FC) PITCH REG +0x00000208: 0xF2008081 vmscl.q M010,M000,S000 09 (00000204) PITCH REG +0x0000020C: 0xF2008082 vmscl.q M020,M000,S000 09 (00000208) PITCH REG +0x00000210: 0xF2008083 vmscl.q M030,M000,S000 09 (0000020C) PITCH REG +0x00000214: 0xF2008084 vmscl.q M100,M000,S000 09 (00000210) PITCH REG +0x00000218: 0xF2008085 vmscl.q M110,M000,S000 03 (00000214) PITCH +0x0000021C: 0xF2008086 vmscl.q M120,M000,S000 03 (00000218) PITCH +0x00000220: 0xF2008087 vmscl.q M130,M000,S000 03 (0000021C) PITCH +0x00000224: 0xF2008088 vmscl.q M200,M000,S000 03 (00000220) PITCH +0x00000228: 0xF2008089 vmscl.q M210,M000,S000 03 (00000224) PITCH +0x0000022C: 0xF200808A vmscl.q M220,M000,S000 03 (00000228) PITCH +0x00000230: 0xF200808B vmscl.q M230,M000,S000 03 (0000022C) PITCH +0x00000234: 0xF200808C vmscl.q M300,M000,S000 03 (00000230) PITCH +0x00000238: 0xF200808D vmscl.q M310,M000,S000 03 (00000234) PITCH +0x0000023C: 0xF200808E vmscl.q M320,M000,S000 03 (00000238) PITCH +0x00000240: 0xF200808F vmscl.q M330,M000,S000 03 (0000023C) PITCH +0x00000244: 0xF2008090 vmscl.q M400,M000,S000 03 (00000240) PITCH +0x00000248: 0xF2008091 vmscl.q M410,M000,S000 03 (00000244) PITCH +0x0000024C: 0xF2008092 vmscl.q M420,M000,S000 03 (00000248) PITCH +0x00000250: 0xF2008093 vmscl.q M430,M000,S000 03 (0000024C) PITCH +0x00000254: 0xF2008094 vmscl.q M500,M000,S000 03 (00000250) PITCH +0x00000258: 0xF2008095 vmscl.q M510,M000,S000 03 (00000254) PITCH +0x0000025C: 0xF2008096 vmscl.q M520,M000,S000 03 (00000258) PITCH +0x00000260: 0xF2008097 vmscl.q M530,M000,S000 03 (0000025C) PITCH +0x00000264: 0xF2008098 vmscl.q M600,M000,S000 03 (00000260) PITCH +0x00000268: 0xF2008099 vmscl.q M610,M000,S000 03 (00000264) PITCH +0x0000026C: 0xF200809A vmscl.q M620,M000,S000 03 (00000268) PITCH +0x00000270: 0xF200809B vmscl.q M630,M000,S000 03 (0000026C) PITCH +0x00000274: 0xF200809C vmscl.q M700,M000,S000 03 (00000270) PITCH +0x00000278: 0xF200809D vmscl.q M710,M000,S000 03 (00000274) PITCH +0x0000027C: 0xF200809E vmscl.q M720,M000,S000 03 (00000278) PITCH +0x00000280: 0xF200809F vmscl.q M730,M000,S000 03 (0000027C) PITCH +0x00000284: 0xF20080A0 vmscl.q E000,M000,S000 03 (00000280) PITCH +0x00000288: 0xF20080A1 vmscl.q E001,M000,S000 09 (00000284) PITCH REG +0x0000028C: 0xF20080A2 vmscl.q E002,M000,S000 09 (00000288) PITCH REG +0x00000290: 0xF20080A3 vmscl.q E003,M000,S000 09 (0000028C) PITCH REG +0x00000294: 0xF20080A4 vmscl.q E100,M000,S000 09 (00000290) PITCH REG +0x00000298: 0xF20080A5 vmscl.q E101,M000,S000 03 (00000294) PITCH +0x0000029C: 0xF20080A6 vmscl.q E102,M000,S000 03 (00000298) PITCH +0x000002A0: 0xF20080A7 vmscl.q E103,M000,S000 03 (0000029C) PITCH +0x000002A4: 0xF20080A8 vmscl.q E200,M000,S000 03 (000002A0) PITCH +0x000002A8: 0xF20080A9 vmscl.q E201,M000,S000 03 (000002A4) PITCH +0x000002AC: 0xF20080AA vmscl.q E202,M000,S000 03 (000002A8) PITCH +0x000002B0: 0xF20080AB vmscl.q E203,M000,S000 03 (000002AC) PITCH +0x000002B4: 0xF20080AC vmscl.q E300,M000,S000 03 (000002B0) PITCH +0x000002B8: 0xF20080AD vmscl.q E301,M000,S000 03 (000002B4) PITCH +0x000002BC: 0xF20080AE vmscl.q E302,M000,S000 03 (000002B8) PITCH +0x000002C0: 0xF20080AF vmscl.q E303,M000,S000 03 (000002BC) PITCH +0x000002C4: 0xF20080B0 vmscl.q E400,M000,S000 03 (000002C0) PITCH +0x000002C8: 0xF20080B1 vmscl.q E401,M000,S000 03 (000002C4) PITCH +0x000002CC: 0xF20080B2 vmscl.q E402,M000,S000 03 (000002C8) PITCH +0x000002D0: 0xF20080B3 vmscl.q E403,M000,S000 03 (000002CC) PITCH +0x000002D4: 0xF20080B4 vmscl.q E500,M000,S000 03 (000002D0) PITCH +0x000002D8: 0xF20080B5 vmscl.q E501,M000,S000 03 (000002D4) PITCH +0x000002DC: 0xF20080B6 vmscl.q E502,M000,S000 03 (000002D8) PITCH +0x000002E0: 0xF20080B7 vmscl.q E503,M000,S000 03 (000002DC) PITCH +0x000002E4: 0xF20080B8 vmscl.q E600,M000,S000 03 (000002E0) PITCH +0x000002E8: 0xF20080B9 vmscl.q E601,M000,S000 03 (000002E4) PITCH +0x000002EC: 0xF20080BA vmscl.q E602,M000,S000 03 (000002E8) PITCH +0x000002F0: 0xF20080BB vmscl.q E603,M000,S000 03 (000002EC) PITCH +0x000002F4: 0xF20080BC vmscl.q E700,M000,S000 03 (000002F0) PITCH +0x000002F8: 0xF20080BD vmscl.q E701,M000,S000 03 (000002F4) PITCH +0x000002FC: 0xF20080BE vmscl.q E702,M000,S000 03 (000002F8) PITCH +0x00000300: 0xF20080BF vmscl.q E703,M000,S000 03 (000002FC) PITCH +0x00000304: 0xF20080C0 vmscl.q M002,M000,S000 03 (00000300) PITCH +0x00000308: 0xF20080C1 vmscl.q M012,M000,S000 09 (00000304) PITCH REG +0x0000030C: 0xF20080C2 vmscl.q M022,M000,S000 09 (00000308) PITCH REG +0x00000310: 0xF20080C3 vmscl.q M032,M000,S000 09 (0000030C) PITCH REG +0x00000314: 0xF20080C4 vmscl.q M102,M000,S000 09 (00000310) PITCH REG +0x00000318: 0xF20080C5 vmscl.q M112,M000,S000 03 (00000314) PITCH +0x0000031C: 0xF20080C6 vmscl.q M122,M000,S000 03 (00000318) PITCH +0x00000320: 0xF20080C7 vmscl.q M132,M000,S000 03 (0000031C) PITCH +0x00000324: 0xF20080C8 vmscl.q M202,M000,S000 03 (00000320) PITCH +0x00000328: 0xF20080C9 vmscl.q M212,M000,S000 03 (00000324) PITCH +0x0000032C: 0xF20080CA vmscl.q M222,M000,S000 03 (00000328) PITCH +0x00000330: 0xF20080CB vmscl.q M232,M000,S000 03 (0000032C) PITCH +0x00000334: 0xF20080CC vmscl.q M302,M000,S000 03 (00000330) PITCH +0x00000338: 0xF20080CD vmscl.q M312,M000,S000 03 (00000334) PITCH +0x0000033C: 0xF20080CE vmscl.q M322,M000,S000 03 (00000338) PITCH +0x00000340: 0xF20080CF vmscl.q M332,M000,S000 03 (0000033C) PITCH +0x00000344: 0xF20080D0 vmscl.q M402,M000,S000 03 (00000340) PITCH +0x00000348: 0xF20080D1 vmscl.q M412,M000,S000 03 (00000344) PITCH +0x0000034C: 0xF20080D2 vmscl.q M422,M000,S000 03 (00000348) PITCH +0x00000350: 0xF20080D3 vmscl.q M432,M000,S000 03 (0000034C) PITCH +0x00000354: 0xF20080D4 vmscl.q M502,M000,S000 03 (00000350) PITCH +0x00000358: 0xF20080D5 vmscl.q M512,M000,S000 03 (00000354) PITCH +0x0000035C: 0xF20080D6 vmscl.q M522,M000,S000 03 (00000358) PITCH +0x00000360: 0xF20080D7 vmscl.q M532,M000,S000 03 (0000035C) PITCH +0x00000364: 0xF20080D8 vmscl.q M602,M000,S000 03 (00000360) PITCH +0x00000368: 0xF20080D9 vmscl.q M612,M000,S000 03 (00000364) PITCH +0x0000036C: 0xF20080DA vmscl.q M622,M000,S000 03 (00000368) PITCH +0x00000370: 0xF20080DB vmscl.q M632,M000,S000 03 (0000036C) PITCH +0x00000374: 0xF20080DC vmscl.q M702,M000,S000 03 (00000370) PITCH +0x00000378: 0xF20080DD vmscl.q M712,M000,S000 03 (00000374) PITCH +0x0000037C: 0xF20080DE vmscl.q M722,M000,S000 03 (00000378) PITCH +0x00000380: 0xF20080DF vmscl.q M732,M000,S000 03 (0000037C) PITCH +0x00000384: 0xF20080E0 vmscl.q E020,M000,S000 03 (00000380) PITCH +0x00000388: 0xF20080E1 vmscl.q E021,M000,S000 09 (00000384) PITCH REG +0x0000038C: 0xF20080E2 vmscl.q E022,M000,S000 09 (00000388) PITCH REG +0x00000390: 0xF20080E3 vmscl.q E023,M000,S000 09 (0000038C) PITCH REG +0x00000394: 0xF20080E4 vmscl.q E120,M000,S000 09 (00000390) PITCH REG +0x00000398: 0xF20080E5 vmscl.q E121,M000,S000 03 (00000394) PITCH +0x0000039C: 0xF20080E6 vmscl.q E122,M000,S000 03 (00000398) PITCH +0x000003A0: 0xF20080E7 vmscl.q E123,M000,S000 03 (0000039C) PITCH +0x000003A4: 0xF20080E8 vmscl.q E220,M000,S000 03 (000003A0) PITCH +0x000003A8: 0xF20080E9 vmscl.q E221,M000,S000 03 (000003A4) PITCH +0x000003AC: 0xF20080EA vmscl.q E222,M000,S000 03 (000003A8) PITCH +0x000003B0: 0xF20080EB vmscl.q E223,M000,S000 03 (000003AC) PITCH +0x000003B4: 0xF20080EC vmscl.q E320,M000,S000 03 (000003B0) PITCH +0x000003B8: 0xF20080ED vmscl.q E321,M000,S000 03 (000003B4) PITCH +0x000003BC: 0xF20080EE vmscl.q E322,M000,S000 03 (000003B8) PITCH +0x000003C0: 0xF20080EF vmscl.q E323,M000,S000 03 (000003BC) PITCH +0x000003C4: 0xF20080F0 vmscl.q E420,M000,S000 03 (000003C0) PITCH +0x000003C8: 0xF20080F1 vmscl.q E421,M000,S000 03 (000003C4) PITCH +0x000003CC: 0xF20080F2 vmscl.q E422,M000,S000 03 (000003C8) PITCH +0x000003D0: 0xF20080F3 vmscl.q E423,M000,S000 03 (000003CC) PITCH +0x000003D4: 0xF20080F4 vmscl.q E520,M000,S000 03 (000003D0) PITCH +0x000003D8: 0xF20080F5 vmscl.q E521,M000,S000 03 (000003D4) PITCH +0x000003DC: 0xF20080F6 vmscl.q E522,M000,S000 03 (000003D8) PITCH +0x000003E0: 0xF20080F7 vmscl.q E523,M000,S000 03 (000003DC) PITCH +0x000003E4: 0xF20080F8 vmscl.q E620,M000,S000 03 (000003E0) PITCH +0x000003E8: 0xF20080F9 vmscl.q E621,M000,S000 03 (000003E4) PITCH +0x000003EC: 0xF20080FA vmscl.q E622,M000,S000 03 (000003E8) PITCH +0x000003F0: 0xF20080FB vmscl.q E623,M000,S000 03 (000003EC) PITCH +0x000003F4: 0xF20080FC vmscl.q E720,M000,S000 03 (000003F0) PITCH +0x000003F8: 0xF20080FD vmscl.q E721,M000,S000 03 (000003F4) PITCH +0x000003FC: 0xF20080FE vmscl.q E722,M000,S000 03 (000003F8) PITCH +0x00000400: 0xF20080FF vmscl.q E723,M000,S000 03 (000003FC) PITCH +0x00000404: 0x03E00008 jr ra +0x00000408: 0x00000000 nop +0x0000040C: 0xF2008080 vmscl.q M000,M000,S000 +0x00000410: 0xF2008081 vmscl.q M010,M000,S000 09 (0000040C) PITCH REG +0x00000414: 0xF2008082 vmscl.q M020,M000,S000 09 (00000410) PITCH REG +0x00000418: 0xF2008083 vmscl.q M030,M000,S000 09 (00000414) PITCH REG +0x0000041C: 0xF2008084 vmscl.q M100,M000,S000 09 (00000418) PITCH REG +0x00000420: 0xF2008085 vmscl.q M110,M000,S000 03 (0000041C) PITCH +0x00000424: 0xF2008086 vmscl.q M120,M000,S000 03 (00000420) PITCH + +vector_zero: +0x00000428: 0xD0060000 vzero.s S000 04 (00000424) PITCH WAW +0x0000042C: 0xD0060001 vzero.s S010 +0x00000430: 0xD0060002 vzero.s S020 +0x00000434: 0xD0060003 vzero.s S030 +0x00000438: 0xD0060004 vzero.s S100 +0x0000043C: 0xD0060005 vzero.s S110 +0x00000440: 0xD0060006 vzero.s S120 +0x00000444: 0xD0060007 vzero.s S130 +0x00000448: 0xD0060008 vzero.s S200 +0x0000044C: 0xD0060009 vzero.s S210 +0x00000450: 0xD006000A vzero.s S220 +0x00000454: 0xD006000B vzero.s S230 +0x00000458: 0xD006000C vzero.s S300 +0x0000045C: 0xD006000D vzero.s S310 +0x00000460: 0xD006000E vzero.s S320 +0x00000464: 0xD006000F vzero.s S330 +0x00000468: 0xD0060010 vzero.s S400 +0x0000046C: 0xD0060011 vzero.s S410 +0x00000470: 0xD0060012 vzero.s S420 +0x00000474: 0xD0060013 vzero.s S430 +0x00000478: 0xD0060014 vzero.s S500 +0x0000047C: 0xD0060015 vzero.s S510 +0x00000480: 0xD0060016 vzero.s S520 +0x00000484: 0xD0060017 vzero.s S530 +0x00000488: 0xD0060018 vzero.s S600 +0x0000048C: 0xD0060019 vzero.s S610 +0x00000490: 0xD006001A vzero.s S620 +0x00000494: 0xD006001B vzero.s S630 +0x00000498: 0xD006001C vzero.s S700 +0x0000049C: 0xD006001D vzero.s S710 +0x000004A0: 0xD006001E vzero.s S720 +0x000004A4: 0xD006001F vzero.s S730 +0x000004A8: 0xD0060020 vzero.s S001 +0x000004AC: 0xD0060021 vzero.s S011 +0x000004B0: 0xD0060022 vzero.s S021 +0x000004B4: 0xD0060023 vzero.s S031 +0x000004B8: 0xD0060024 vzero.s S101 +0x000004BC: 0xD0060025 vzero.s S111 +0x000004C0: 0xD0060026 vzero.s S121 +0x000004C4: 0xD0060027 vzero.s S131 +0x000004C8: 0xD0060028 vzero.s S201 +0x000004CC: 0xD0060029 vzero.s S211 +0x000004D0: 0xD006002A vzero.s S221 +0x000004D4: 0xD006002B vzero.s S231 +0x000004D8: 0xD006002C vzero.s S301 +0x000004DC: 0xD006002D vzero.s S311 +0x000004E0: 0xD006002E vzero.s S321 +0x000004E4: 0xD006002F vzero.s S331 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+0x00000BA8: 0xD00680E0 vzero.q R020 +0x00000BAC: 0xD00680E1 vzero.q R021 +0x00000BB0: 0xD00680E2 vzero.q R022 +0x00000BB4: 0xD00680E3 vzero.q R023 +0x00000BB8: 0xD00680E4 vzero.q R120 +0x00000BBC: 0xD00680E5 vzero.q R121 +0x00000BC0: 0xD00680E6 vzero.q R122 +0x00000BC4: 0xD00680E7 vzero.q R123 +0x00000BC8: 0xD00680E8 vzero.q R220 +0x00000BCC: 0xD00680E9 vzero.q R221 +0x00000BD0: 0xD00680EA vzero.q R222 +0x00000BD4: 0xD00680EB vzero.q R223 +0x00000BD8: 0xD00680EC vzero.q R320 +0x00000BDC: 0xD00680ED vzero.q R321 +0x00000BE0: 0xD00680EE vzero.q R322 +0x00000BE4: 0xD00680EF vzero.q R323 +0x00000BE8: 0xD00680F0 vzero.q R420 +0x00000BEC: 0xD00680F1 vzero.q R421 +0x00000BF0: 0xD00680F2 vzero.q R422 +0x00000BF4: 0xD00680F3 vzero.q R423 +0x00000BF8: 0xD00680F4 vzero.q R520 +0x00000BFC: 0xD00680F5 vzero.q R521 +0x00000C00: 0xD00680F6 vzero.q R522 +0x00000C04: 0xD00680F7 vzero.q R523 +0x00000C08: 0xD00680F8 vzero.q R620 +0x00000C0C: 0xD00680F9 vzero.q R621 +0x00000C10: 0xD00680FA vzero.q R622 +0x00000C14: 0xD00680FB vzero.q R623 +0x00000C18: 0xD00680FC vzero.q R720 +0x00000C1C: 0xD00680FD vzero.q R721 +0x00000C20: 0xD00680FE vzero.q R722 +0x00000C24: 0xD00680FF vzero.q R723 +0x00000C28: 0x03E00008 jr ra +0x00000C2C: 0x00000000 nop + +matrix_zero: +0x00000C30: 0xF3860080 vmzero.p M000 +0x00000C34: 0xF3860081 vmzero.p M010 01 (00000C30) PITCH +0x00000C38: 0xF3860082 vmzero.p M020 01 (00000C34) PITCH +0x00000C3C: 0xF3860083 vmzero.p M030 01 (00000C38) PITCH +0x00000C40: 0xF3860084 vmzero.p M100 01 (00000C3C) PITCH +0x00000C44: 0xF3860085 vmzero.p M110 01 (00000C40) PITCH +0x00000C48: 0xF3860086 vmzero.p M120 01 (00000C44) PITCH +0x00000C4C: 0xF3860087 vmzero.p M130 01 (00000C48) PITCH +0x00000C50: 0xF3860088 vmzero.p M200 01 (00000C4C) PITCH +0x00000C54: 0xF3860089 vmzero.p M210 01 (00000C50) PITCH +0x00000C58: 0xF386008A vmzero.p M220 01 (00000C54) PITCH +0x00000C5C: 0xF386008B vmzero.p M230 01 (00000C58) PITCH +0x00000C60: 0xF386008C vmzero.p M300 01 (00000C5C) PITCH +0x00000C64: 0xF386008D vmzero.p M310 01 (00000C60) PITCH +0x00000C68: 0xF386008E vmzero.p M320 01 (00000C64) PITCH +0x00000C6C: 0xF386008F vmzero.p M330 01 (00000C68) PITCH +0x00000C70: 0xF3860090 vmzero.p M400 01 (00000C6C) PITCH +0x00000C74: 0xF3860091 vmzero.p M410 01 (00000C70) PITCH +0x00000C78: 0xF3860092 vmzero.p M420 01 (00000C74) PITCH +0x00000C7C: 0xF3860093 vmzero.p M430 01 (00000C78) PITCH +0x00000C80: 0xF3860094 vmzero.p M500 01 (00000C7C) PITCH +0x00000C84: 0xF3860095 vmzero.p M510 01 (00000C80) PITCH +0x00000C88: 0xF3860096 vmzero.p M520 01 (00000C84) PITCH +0x00000C8C: 0xF3860097 vmzero.p M530 01 (00000C88) PITCH +0x00000C90: 0xF3860098 vmzero.p M600 01 (00000C8C) PITCH +0x00000C94: 0xF3860099 vmzero.p M610 01 (00000C90) PITCH +0x00000C98: 0xF386009A vmzero.p M620 01 (00000C94) PITCH +0x00000C9C: 0xF386009B vmzero.p M630 01 (00000C98) PITCH +0x00000CA0: 0xF386009C vmzero.p M700 01 (00000C9C) PITCH +0x00000CA4: 0xF386009D vmzero.p M710 01 (00000CA0) PITCH +0x00000CA8: 0xF386009E vmzero.p M720 01 (00000CA4) PITCH +0x00000CAC: 0xF386009F vmzero.p M730 01 (00000CA8) PITCH +0x00000CB0: 0xF38600A0 vmzero.p E000 01 (00000CAC) PITCH +0x00000CB4: 0xF38600A1 vmzero.p E001 01 (00000CB0) PITCH +0x00000CB8: 0xF38600A2 vmzero.p E002 01 (00000CB4) PITCH +0x00000CBC: 0xF38600A3 vmzero.p E003 01 (00000CB8) PITCH +0x00000CC0: 0xF38600A4 vmzero.p E100 01 (00000CBC) PITCH +0x00000CC4: 0xF38600A5 vmzero.p E101 01 (00000CC0) PITCH +0x00000CC8: 0xF38600A6 vmzero.p E102 01 (00000CC4) PITCH +0x00000CCC: 0xF38600A7 vmzero.p E103 01 (00000CC8) PITCH +0x00000CD0: 0xF38600A8 vmzero.p E200 01 (00000CCC) PITCH +0x00000CD4: 0xF38600A9 vmzero.p E201 01 (00000CD0) PITCH +0x00000CD8: 0xF38600AA vmzero.p E202 01 (00000CD4) PITCH +0x00000CDC: 0xF38600AB vmzero.p E203 01 (00000CD8) PITCH +0x00000CE0: 0xF38600AC vmzero.p E300 01 (00000CDC) PITCH +0x00000CE4: 0xF38600AD vmzero.p E301 01 (00000CE0) PITCH +0x00000CE8: 0xF38600AE vmzero.p E302 01 (00000CE4) PITCH +0x00000CEC: 0xF38600AF vmzero.p E303 01 (00000CE8) PITCH +0x00000CF0: 0xF38600B0 vmzero.p E400 01 (00000CEC) PITCH +0x00000CF4: 0xF38600B1 vmzero.p E401 01 (00000CF0) PITCH +0x00000CF8: 0xF38600B2 vmzero.p E402 01 (00000CF4) PITCH +0x00000CFC: 0xF38600B3 vmzero.p E403 01 (00000CF8) PITCH +0x00000D00: 0xF38600B4 vmzero.p E500 01 (00000CFC) PITCH +0x00000D04: 0xF38600B5 vmzero.p E501 01 (00000D00) PITCH +0x00000D08: 0xF38600B6 vmzero.p E502 01 (00000D04) PITCH +0x00000D0C: 0xF38600B7 vmzero.p E503 01 (00000D08) PITCH +0x00000D10: 0xF38600B8 vmzero.p E600 01 (00000D0C) PITCH +0x00000D14: 0xF38600B9 vmzero.p E601 01 (00000D10) PITCH +0x00000D18: 0xF38600BA vmzero.p E602 01 (00000D14) PITCH +0x00000D1C: 0xF38600BB vmzero.p E603 01 (00000D18) PITCH +0x00000D20: 0xF38600BC vmzero.p E700 01 (00000D1C) PITCH +0x00000D24: 0xF38600BD vmzero.p E701 01 (00000D20) PITCH +0x00000D28: 0xF38600BE vmzero.p E702 01 (00000D24) PITCH +0x00000D2C: 0xF38600BF vmzero.p E703 01 (00000D28) PITCH +0x00000D30: 0xF38600C0 vmzero.p M002 01 (00000D2C) PITCH +0x00000D34: 0xF38600C1 vmzero.p M012 01 (00000D30) PITCH +0x00000D38: 0xF38600C2 vmzero.p M022 01 (00000D34) PITCH +0x00000D3C: 0xF38600C3 vmzero.p M032 01 (00000D38) PITCH +0x00000D40: 0xF38600C4 vmzero.p M102 01 (00000D3C) PITCH +0x00000D44: 0xF38600C5 vmzero.p M112 01 (00000D40) PITCH +0x00000D48: 0xF38600C6 vmzero.p M122 01 (00000D44) PITCH +0x00000D4C: 0xF38600C7 vmzero.p M132 01 (00000D48) PITCH +0x00000D50: 0xF38600C8 vmzero.p M202 01 (00000D4C) PITCH +0x00000D54: 0xF38600C9 vmzero.p M212 01 (00000D50) PITCH +0x00000D58: 0xF38600CA vmzero.p M222 01 (00000D54) PITCH +0x00000D5C: 0xF38600CB vmzero.p M232 01 (00000D58) PITCH +0x00000D60: 0xF38600CC vmzero.p M302 01 (00000D5C) PITCH +0x00000D64: 0xF38600CD vmzero.p M312 01 (00000D60) PITCH +0x00000D68: 0xF38600CE vmzero.p M322 01 (00000D64) PITCH +0x00000D6C: 0xF38600CF vmzero.p M332 01 (00000D68) PITCH +0x00000D70: 0xF38600D0 vmzero.p M402 01 (00000D6C) PITCH +0x00000D74: 0xF38600D1 vmzero.p M412 01 (00000D70) PITCH +0x00000D78: 0xF38600D2 vmzero.p M422 01 (00000D74) PITCH +0x00000D7C: 0xF38600D3 vmzero.p M432 01 (00000D78) PITCH +0x00000D80: 0xF38600D4 vmzero.p M502 01 (00000D7C) PITCH +0x00000D84: 0xF38600D5 vmzero.p M512 01 (00000D80) PITCH +0x00000D88: 0xF38600D6 vmzero.p M522 01 (00000D84) PITCH +0x00000D8C: 0xF38600D7 vmzero.p M532 01 (00000D88) PITCH +0x00000D90: 0xF38600D8 vmzero.p M602 01 (00000D8C) PITCH +0x00000D94: 0xF38600D9 vmzero.p M612 01 (00000D90) PITCH +0x00000D98: 0xF38600DA vmzero.p M622 01 (00000D94) PITCH +0x00000D9C: 0xF38600DB vmzero.p M632 01 (00000D98) PITCH +0x00000DA0: 0xF38600DC vmzero.p M702 01 (00000D9C) PITCH +0x00000DA4: 0xF38600DD vmzero.p M712 01 (00000DA0) PITCH +0x00000DA8: 0xF38600DE vmzero.p M722 01 (00000DA4) PITCH +0x00000DAC: 0xF38600DF vmzero.p M732 01 (00000DA8) PITCH +0x00000DB0: 0xF38600E0 vmzero.p E020 01 (00000DAC) PITCH +0x00000DB4: 0xF38600E1 vmzero.p E021 01 (00000DB0) PITCH +0x00000DB8: 0xF38600E2 vmzero.p E022 01 (00000DB4) PITCH +0x00000DBC: 0xF38600E3 vmzero.p E023 01 (00000DB8) PITCH +0x00000DC0: 0xF38600E4 vmzero.p E120 01 (00000DBC) PITCH +0x00000DC4: 0xF38600E5 vmzero.p E121 01 (00000DC0) PITCH +0x00000DC8: 0xF38600E6 vmzero.p E122 01 (00000DC4) PITCH +0x00000DCC: 0xF38600E7 vmzero.p E123 01 (00000DC8) PITCH +0x00000DD0: 0xF38600E8 vmzero.p E220 01 (00000DCC) PITCH +0x00000DD4: 0xF38600E9 vmzero.p E221 01 (00000DD0) PITCH +0x00000DD8: 0xF38600EA vmzero.p E222 01 (00000DD4) PITCH +0x00000DDC: 0xF38600EB vmzero.p E223 01 (00000DD8) PITCH +0x00000DE0: 0xF38600EC vmzero.p E320 01 (00000DDC) PITCH +0x00000DE4: 0xF38600ED vmzero.p E321 01 (00000DE0) PITCH +0x00000DE8: 0xF38600EE vmzero.p E322 01 (00000DE4) PITCH +0x00000DEC: 0xF38600EF vmzero.p E323 01 (00000DE8) PITCH +0x00000DF0: 0xF38600F0 vmzero.p E420 01 (00000DEC) PITCH +0x00000DF4: 0xF38600F1 vmzero.p E421 01 (00000DF0) PITCH +0x00000DF8: 0xF38600F2 vmzero.p E422 01 (00000DF4) PITCH +0x00000DFC: 0xF38600F3 vmzero.p E423 01 (00000DF8) PITCH +0x00000E00: 0xF38600F4 vmzero.p E520 01 (00000DFC) PITCH +0x00000E04: 0xF38600F5 vmzero.p E521 01 (00000E00) PITCH +0x00000E08: 0xF38600F6 vmzero.p E522 01 (00000E04) PITCH +0x00000E0C: 0xF38600F7 vmzero.p E523 01 (00000E08) PITCH +0x00000E10: 0xF38600F8 vmzero.p E620 01 (00000E0C) PITCH +0x00000E14: 0xF38600F9 vmzero.p E621 01 (00000E10) PITCH +0x00000E18: 0xF38600FA vmzero.p E622 01 (00000E14) PITCH +0x00000E1C: 0xF38600FB vmzero.p E623 01 (00000E18) PITCH +0x00000E20: 0xF38600FC vmzero.p E720 01 (00000E1C) PITCH +0x00000E24: 0xF38600FD vmzero.p E721 01 (00000E20) PITCH +0x00000E28: 0xF38600FE vmzero.p E722 01 (00000E24) PITCH +0x00000E2C: 0xF38600FF vmzero.p E723 01 (00000E28) PITCH +0x00000E30: 0xF3868000 vmzero.t M000 01 (00000E2C) PITCH +0x00000E34: 0xF3868001 vmzero.t M010 02 (00000E30) PITCH +0x00000E38: 0xF3868002 vmzero.t M020 02 (00000E34) PITCH +0x00000E3C: 0xF3868003 vmzero.t M030 02 (00000E38) PITCH +0x00000E40: 0xF3868004 vmzero.t M100 02 (00000E3C) PITCH +0x00000E44: 0xF3868005 vmzero.t M110 02 (00000E40) PITCH +0x00000E48: 0xF3868006 vmzero.t M120 02 (00000E44) PITCH +0x00000E4C: 0xF3868007 vmzero.t M130 02 (00000E48) PITCH +0x00000E50: 0xF3868008 vmzero.t M200 02 (00000E4C) PITCH +0x00000E54: 0xF3868009 vmzero.t M210 02 (00000E50) PITCH +0x00000E58: 0xF386800A vmzero.t M220 02 (00000E54) PITCH +0x00000E5C: 0xF386800B vmzero.t M230 02 (00000E58) PITCH +0x00000E60: 0xF386800C vmzero.t M300 02 (00000E5C) PITCH +0x00000E64: 0xF386800D vmzero.t M310 02 (00000E60) PITCH +0x00000E68: 0xF386800E vmzero.t M320 02 (00000E64) PITCH +0x00000E6C: 0xF386800F vmzero.t M330 02 (00000E68) PITCH +0x00000E70: 0xF3868010 vmzero.t M400 02 (00000E6C) PITCH +0x00000E74: 0xF3868011 vmzero.t M410 02 (00000E70) PITCH +0x00000E78: 0xF3868012 vmzero.t M420 02 (00000E74) PITCH +0x00000E7C: 0xF3868013 vmzero.t M430 02 (00000E78) PITCH +0x00000E80: 0xF3868014 vmzero.t M500 02 (00000E7C) PITCH +0x00000E84: 0xF3868015 vmzero.t M510 02 (00000E80) PITCH +0x00000E88: 0xF3868016 vmzero.t M520 02 (00000E84) PITCH +0x00000E8C: 0xF3868017 vmzero.t M530 02 (00000E88) PITCH +0x00000E90: 0xF3868018 vmzero.t M600 02 (00000E8C) PITCH +0x00000E94: 0xF3868019 vmzero.t M610 02 (00000E90) PITCH +0x00000E98: 0xF386801A vmzero.t M620 02 (00000E94) PITCH +0x00000E9C: 0xF386801B vmzero.t M630 02 (00000E98) PITCH +0x00000EA0: 0xF386801C vmzero.t M700 02 (00000E9C) PITCH +0x00000EA4: 0xF386801D vmzero.t M710 02 (00000EA0) PITCH +0x00000EA8: 0xF386801E vmzero.t M720 02 (00000EA4) PITCH +0x00000EAC: 0xF386801F vmzero.t M730 02 (00000EA8) PITCH +0x00000EB0: 0xF3868020 vmzero.t E000 02 (00000EAC) PITCH +0x00000EB4: 0xF3868021 vmzero.t E001 02 (00000EB0) PITCH +0x00000EB8: 0xF3868022 vmzero.t E002 02 (00000EB4) PITCH +0x00000EBC: 0xF3868023 vmzero.t E003 02 (00000EB8) PITCH +0x00000EC0: 0xF3868024 vmzero.t E100 02 (00000EBC) PITCH +0x00000EC4: 0xF3868025 vmzero.t E101 02 (00000EC0) PITCH +0x00000EC8: 0xF3868026 vmzero.t E102 02 (00000EC4) PITCH +0x00000ECC: 0xF3868027 vmzero.t E103 02 (00000EC8) PITCH +0x00000ED0: 0xF3868028 vmzero.t E200 02 (00000ECC) PITCH +0x00000ED4: 0xF3868029 vmzero.t E201 02 (00000ED0) PITCH +0x00000ED8: 0xF386802A vmzero.t E202 02 (00000ED4) PITCH +0x00000EDC: 0xF386802B vmzero.t E203 02 (00000ED8) PITCH +0x00000EE0: 0xF386802C vmzero.t E300 02 (00000EDC) PITCH +0x00000EE4: 0xF386802D vmzero.t E301 02 (00000EE0) PITCH +0x00000EE8: 0xF386802E vmzero.t E302 02 (00000EE4) PITCH +0x00000EEC: 0xF386802F vmzero.t E303 02 (00000EE8) PITCH +0x00000EF0: 0xF3868030 vmzero.t E400 02 (00000EEC) PITCH +0x00000EF4: 0xF3868031 vmzero.t E401 02 (00000EF0) PITCH +0x00000EF8: 0xF3868032 vmzero.t E402 02 (00000EF4) PITCH +0x00000EFC: 0xF3868033 vmzero.t E403 02 (00000EF8) PITCH +0x00000F00: 0xF3868034 vmzero.t E500 02 (00000EFC) PITCH +0x00000F04: 0xF3868035 vmzero.t E501 02 (00000F00) PITCH +0x00000F08: 0xF3868036 vmzero.t E502 02 (00000F04) PITCH +0x00000F0C: 0xF3868037 vmzero.t E503 02 (00000F08) PITCH +0x00000F10: 0xF3868038 vmzero.t E600 02 (00000F0C) PITCH +0x00000F14: 0xF3868039 vmzero.t E601 02 (00000F10) PITCH +0x00000F18: 0xF386803A vmzero.t E602 02 (00000F14) PITCH +0x00000F1C: 0xF386803B vmzero.t E603 02 (00000F18) PITCH +0x00000F20: 0xF386803C vmzero.t E700 02 (00000F1C) PITCH +0x00000F24: 0xF386803D vmzero.t E701 02 (00000F20) PITCH +0x00000F28: 0xF386803E vmzero.t E702 02 (00000F24) PITCH +0x00000F2C: 0xF386803F vmzero.t E703 02 (00000F28) PITCH +0x00000F30: 0xF3868040 vmzero.t M001 02 (00000F2C) PITCH +0x00000F34: 0xF3868041 vmzero.t M011 02 (00000F30) PITCH +0x00000F38: 0xF3868042 vmzero.t M021 02 (00000F34) PITCH +0x00000F3C: 0xF3868043 vmzero.t M031 02 (00000F38) PITCH +0x00000F40: 0xF3868044 vmzero.t M101 02 (00000F3C) PITCH +0x00000F44: 0xF3868045 vmzero.t M111 02 (00000F40) PITCH +0x00000F48: 0xF3868046 vmzero.t M121 02 (00000F44) PITCH +0x00000F4C: 0xF3868047 vmzero.t M131 02 (00000F48) PITCH +0x00000F50: 0xF3868048 vmzero.t M201 02 (00000F4C) PITCH +0x00000F54: 0xF3868049 vmzero.t M211 02 (00000F50) PITCH +0x00000F58: 0xF386804A vmzero.t M221 02 (00000F54) PITCH +0x00000F5C: 0xF386804B vmzero.t M231 02 (00000F58) PITCH +0x00000F60: 0xF386804C vmzero.t M301 02 (00000F5C) PITCH +0x00000F64: 0xF386804D vmzero.t M311 02 (00000F60) PITCH +0x00000F68: 0xF386804E vmzero.t M321 02 (00000F64) PITCH +0x00000F6C: 0xF386804F vmzero.t M331 02 (00000F68) PITCH +0x00000F70: 0xF3868050 vmzero.t M401 02 (00000F6C) PITCH +0x00000F74: 0xF3868051 vmzero.t M411 02 (00000F70) PITCH +0x00000F78: 0xF3868052 vmzero.t M421 02 (00000F74) PITCH +0x00000F7C: 0xF3868053 vmzero.t M431 02 (00000F78) PITCH +0x00000F80: 0xF3868054 vmzero.t M501 02 (00000F7C) PITCH +0x00000F84: 0xF3868055 vmzero.t M511 02 (00000F80) PITCH +0x00000F88: 0xF3868056 vmzero.t M521 02 (00000F84) PITCH +0x00000F8C: 0xF3868057 vmzero.t M531 02 (00000F88) PITCH +0x00000F90: 0xF3868058 vmzero.t M601 02 (00000F8C) PITCH +0x00000F94: 0xF3868059 vmzero.t M611 02 (00000F90) PITCH +0x00000F98: 0xF386805A vmzero.t M621 02 (00000F94) PITCH +0x00000F9C: 0xF386805B vmzero.t M631 02 (00000F98) PITCH +0x00000FA0: 0xF386805C vmzero.t M701 02 (00000F9C) PITCH +0x00000FA4: 0xF386805D vmzero.t M711 02 (00000FA0) PITCH +0x00000FA8: 0xF386805E vmzero.t M721 02 (00000FA4) PITCH +0x00000FAC: 0xF386805F vmzero.t M731 02 (00000FA8) PITCH +0x00000FB0: 0xF3868060 vmzero.t E010 02 (00000FAC) PITCH +0x00000FB4: 0xF3868061 vmzero.t E011 02 (00000FB0) PITCH +0x00000FB8: 0xF3868062 vmzero.t E012 02 (00000FB4) PITCH +0x00000FBC: 0xF3868063 vmzero.t E013 02 (00000FB8) PITCH +0x00000FC0: 0xF3868064 vmzero.t E110 02 (00000FBC) PITCH +0x00000FC4: 0xF3868065 vmzero.t E111 02 (00000FC0) PITCH +0x00000FC8: 0xF3868066 vmzero.t E112 02 (00000FC4) PITCH +0x00000FCC: 0xF3868067 vmzero.t E113 02 (00000FC8) PITCH +0x00000FD0: 0xF3868068 vmzero.t E210 02 (00000FCC) PITCH +0x00000FD4: 0xF3868069 vmzero.t E211 02 (00000FD0) PITCH +0x00000FD8: 0xF386806A vmzero.t E212 02 (00000FD4) PITCH +0x00000FDC: 0xF386806B vmzero.t E213 02 (00000FD8) PITCH +0x00000FE0: 0xF386806C vmzero.t E310 02 (00000FDC) PITCH +0x00000FE4: 0xF386806D vmzero.t E311 02 (00000FE0) PITCH +0x00000FE8: 0xF386806E vmzero.t E312 02 (00000FE4) PITCH +0x00000FEC: 0xF386806F vmzero.t E313 02 (00000FE8) PITCH +0x00000FF0: 0xF3868070 vmzero.t E410 02 (00000FEC) PITCH +0x00000FF4: 0xF3868071 vmzero.t E411 02 (00000FF0) PITCH +0x00000FF8: 0xF3868072 vmzero.t E412 02 (00000FF4) PITCH +0x00000FFC: 0xF3868073 vmzero.t E413 02 (00000FF8) PITCH +0x00001000: 0xF3868074 vmzero.t E510 02 (00000FFC) PITCH +0x00001004: 0xF3868075 vmzero.t E511 02 (00001000) PITCH +0x00001008: 0xF3868076 vmzero.t E512 02 (00001004) PITCH +0x0000100C: 0xF3868077 vmzero.t E513 02 (00001008) PITCH +0x00001010: 0xF3868078 vmzero.t E610 02 (0000100C) PITCH +0x00001014: 0xF3868079 vmzero.t E611 02 (00001010) PITCH +0x00001018: 0xF386807A vmzero.t E612 02 (00001014) PITCH +0x0000101C: 0xF386807B vmzero.t E613 02 (00001018) PITCH +0x00001020: 0xF386807C vmzero.t E710 02 (0000101C) PITCH +0x00001024: 0xF386807D vmzero.t E711 02 (00001020) PITCH +0x00001028: 0xF386807E vmzero.t E712 02 (00001024) PITCH +0x0000102C: 0xF386807F vmzero.t E713 02 (00001028) PITCH +0x00001030: 0xF3868080 vmzero.q M000 02 (0000102C) PITCH +0x00001034: 0xF3868081 vmzero.q M010 03 (00001030) PITCH +0x00001038: 0xF3868082 vmzero.q M020 03 (00001034) PITCH +0x0000103C: 0xF3868083 vmzero.q M030 03 (00001038) PITCH +0x00001040: 0xF3868084 vmzero.q M100 03 (0000103C) PITCH +0x00001044: 0xF3868085 vmzero.q M110 03 (00001040) PITCH +0x00001048: 0xF3868086 vmzero.q M120 03 (00001044) PITCH +0x0000104C: 0xF3868087 vmzero.q M130 03 (00001048) PITCH +0x00001050: 0xF3868088 vmzero.q M200 03 (0000104C) PITCH +0x00001054: 0xF3868089 vmzero.q M210 03 (00001050) PITCH +0x00001058: 0xF386808A vmzero.q M220 03 (00001054) PITCH +0x0000105C: 0xF386808B vmzero.q M230 03 (00001058) PITCH +0x00001060: 0xF386808C vmzero.q M300 03 (0000105C) PITCH +0x00001064: 0xF386808D vmzero.q M310 03 (00001060) PITCH +0x00001068: 0xF386808E vmzero.q M320 03 (00001064) PITCH +0x0000106C: 0xF386808F vmzero.q M330 03 (00001068) PITCH +0x00001070: 0xF3868090 vmzero.q M400 03 (0000106C) PITCH +0x00001074: 0xF3868091 vmzero.q M410 03 (00001070) PITCH +0x00001078: 0xF3868092 vmzero.q M420 03 (00001074) PITCH +0x0000107C: 0xF3868093 vmzero.q M430 03 (00001078) PITCH +0x00001080: 0xF3868094 vmzero.q M500 03 (0000107C) PITCH +0x00001084: 0xF3868095 vmzero.q M510 03 (00001080) PITCH +0x00001088: 0xF3868096 vmzero.q M520 03 (00001084) PITCH +0x0000108C: 0xF3868097 vmzero.q M530 03 (00001088) PITCH +0x00001090: 0xF3868098 vmzero.q M600 03 (0000108C) PITCH +0x00001094: 0xF3868099 vmzero.q M610 03 (00001090) PITCH +0x00001098: 0xF386809A vmzero.q M620 03 (00001094) PITCH +0x0000109C: 0xF386809B vmzero.q M630 03 (00001098) PITCH +0x000010A0: 0xF386809C vmzero.q M700 03 (0000109C) PITCH +0x000010A4: 0xF386809D vmzero.q M710 03 (000010A0) PITCH +0x000010A8: 0xF386809E vmzero.q M720 03 (000010A4) PITCH +0x000010AC: 0xF386809F vmzero.q M730 03 (000010A8) PITCH +0x000010B0: 0xF38680A0 vmzero.q E000 03 (000010AC) PITCH +0x000010B4: 0xF38680A1 vmzero.q E001 03 (000010B0) PITCH +0x000010B8: 0xF38680A2 vmzero.q E002 03 (000010B4) PITCH +0x000010BC: 0xF38680A3 vmzero.q E003 03 (000010B8) PITCH +0x000010C0: 0xF38680A4 vmzero.q E100 03 (000010BC) PITCH +0x000010C4: 0xF38680A5 vmzero.q E101 03 (000010C0) PITCH +0x000010C8: 0xF38680A6 vmzero.q E102 03 (000010C4) PITCH +0x000010CC: 0xF38680A7 vmzero.q E103 03 (000010C8) PITCH +0x000010D0: 0xF38680A8 vmzero.q E200 03 (000010CC) PITCH +0x000010D4: 0xF38680A9 vmzero.q E201 03 (000010D0) PITCH +0x000010D8: 0xF38680AA vmzero.q E202 03 (000010D4) PITCH +0x000010DC: 0xF38680AB vmzero.q E203 03 (000010D8) PITCH +0x000010E0: 0xF38680AC vmzero.q E300 03 (000010DC) PITCH +0x000010E4: 0xF38680AD vmzero.q E301 03 (000010E0) PITCH +0x000010E8: 0xF38680AE vmzero.q E302 03 (000010E4) PITCH +0x000010EC: 0xF38680AF vmzero.q E303 03 (000010E8) PITCH +0x000010F0: 0xF38680B0 vmzero.q E400 03 (000010EC) PITCH +0x000010F4: 0xF38680B1 vmzero.q E401 03 (000010F0) PITCH +0x000010F8: 0xF38680B2 vmzero.q E402 03 (000010F4) PITCH +0x000010FC: 0xF38680B3 vmzero.q E403 03 (000010F8) PITCH +0x00001100: 0xF38680B4 vmzero.q E500 03 (000010FC) PITCH +0x00001104: 0xF38680B5 vmzero.q E501 03 (00001100) PITCH +0x00001108: 0xF38680B6 vmzero.q E502 03 (00001104) PITCH +0x0000110C: 0xF38680B7 vmzero.q E503 03 (00001108) PITCH +0x00001110: 0xF38680B8 vmzero.q E600 03 (0000110C) PITCH +0x00001114: 0xF38680B9 vmzero.q E601 03 (00001110) PITCH +0x00001118: 0xF38680BA vmzero.q E602 03 (00001114) PITCH +0x0000111C: 0xF38680BB vmzero.q E603 03 (00001118) PITCH +0x00001120: 0xF38680BC vmzero.q E700 03 (0000111C) PITCH +0x00001124: 0xF38680BD vmzero.q E701 03 (00001120) PITCH +0x00001128: 0xF38680BE vmzero.q E702 03 (00001124) PITCH +0x0000112C: 0xF38680BF vmzero.q E703 03 (00001128) PITCH +0x00001130: 0xF38680C0 vmzero.q M002 03 (0000112C) PITCH +0x00001134: 0xF38680C1 vmzero.q M012 03 (00001130) PITCH +0x00001138: 0xF38680C2 vmzero.q M022 03 (00001134) PITCH +0x0000113C: 0xF38680C3 vmzero.q M032 03 (00001138) PITCH +0x00001140: 0xF38680C4 vmzero.q M102 03 (0000113C) PITCH +0x00001144: 0xF38680C5 vmzero.q M112 03 (00001140) PITCH +0x00001148: 0xF38680C6 vmzero.q M122 03 (00001144) PITCH +0x0000114C: 0xF38680C7 vmzero.q M132 03 (00001148) PITCH +0x00001150: 0xF38680C8 vmzero.q M202 03 (0000114C) PITCH +0x00001154: 0xF38680C9 vmzero.q M212 03 (00001150) PITCH +0x00001158: 0xF38680CA vmzero.q M222 03 (00001154) PITCH +0x0000115C: 0xF38680CB vmzero.q M232 03 (00001158) PITCH +0x00001160: 0xF38680CC vmzero.q M302 03 (0000115C) PITCH +0x00001164: 0xF38680CD vmzero.q M312 03 (00001160) PITCH +0x00001168: 0xF38680CE vmzero.q M322 03 (00001164) PITCH +0x0000116C: 0xF38680CF vmzero.q M332 03 (00001168) PITCH +0x00001170: 0xF38680D0 vmzero.q M402 03 (0000116C) PITCH +0x00001174: 0xF38680D1 vmzero.q M412 03 (00001170) PITCH +0x00001178: 0xF38680D2 vmzero.q M422 03 (00001174) PITCH +0x0000117C: 0xF38680D3 vmzero.q M432 03 (00001178) PITCH +0x00001180: 0xF38680D4 vmzero.q M502 03 (0000117C) PITCH +0x00001184: 0xF38680D5 vmzero.q M512 03 (00001180) PITCH +0x00001188: 0xF38680D6 vmzero.q M522 03 (00001184) PITCH +0x0000118C: 0xF38680D7 vmzero.q M532 03 (00001188) PITCH +0x00001190: 0xF38680D8 vmzero.q M602 03 (0000118C) PITCH +0x00001194: 0xF38680D9 vmzero.q M612 03 (00001190) PITCH +0x00001198: 0xF38680DA vmzero.q M622 03 (00001194) PITCH +0x0000119C: 0xF38680DB vmzero.q M632 03 (00001198) PITCH +0x000011A0: 0xF38680DC vmzero.q M702 03 (0000119C) PITCH +0x000011A4: 0xF38680DD vmzero.q M712 03 (000011A0) PITCH +0x000011A8: 0xF38680DE vmzero.q M722 03 (000011A4) PITCH +0x000011AC: 0xF38680DF vmzero.q M732 03 (000011A8) PITCH +0x000011B0: 0xF38680E0 vmzero.q E020 03 (000011AC) PITCH +0x000011B4: 0xF38680E1 vmzero.q E021 03 (000011B0) PITCH +0x000011B8: 0xF38680E2 vmzero.q E022 03 (000011B4) PITCH +0x000011BC: 0xF38680E3 vmzero.q E023 03 (000011B8) PITCH +0x000011C0: 0xF38680E4 vmzero.q E120 03 (000011BC) PITCH +0x000011C4: 0xF38680E5 vmzero.q E121 03 (000011C0) PITCH +0x000011C8: 0xF38680E6 vmzero.q E122 03 (000011C4) PITCH +0x000011CC: 0xF38680E7 vmzero.q E123 03 (000011C8) PITCH +0x000011D0: 0xF38680E8 vmzero.q E220 03 (000011CC) PITCH +0x000011D4: 0xF38680E9 vmzero.q E221 03 (000011D0) PITCH +0x000011D8: 0xF38680EA vmzero.q E222 03 (000011D4) PITCH +0x000011DC: 0xF38680EB vmzero.q E223 03 (000011D8) PITCH +0x000011E0: 0xF38680EC vmzero.q E320 03 (000011DC) PITCH +0x000011E4: 0xF38680ED vmzero.q E321 03 (000011E0) PITCH +0x000011E8: 0xF38680EE vmzero.q E322 03 (000011E4) PITCH +0x000011EC: 0xF38680EF vmzero.q E323 03 (000011E8) PITCH +0x000011F0: 0xF38680F0 vmzero.q E420 03 (000011EC) PITCH +0x000011F4: 0xF38680F1 vmzero.q E421 03 (000011F0) PITCH +0x000011F8: 0xF38680F2 vmzero.q E422 03 (000011F4) PITCH +0x000011FC: 0xF38680F3 vmzero.q E423 03 (000011F8) PITCH +0x00001200: 0xF38680F4 vmzero.q E520 03 (000011FC) PITCH +0x00001204: 0xF38680F5 vmzero.q E521 03 (00001200) PITCH +0x00001208: 0xF38680F6 vmzero.q E522 03 (00001204) PITCH +0x0000120C: 0xF38680F7 vmzero.q E523 03 (00001208) PITCH +0x00001210: 0xF38680F8 vmzero.q E620 03 (0000120C) PITCH +0x00001214: 0xF38680F9 vmzero.q E621 03 (00001210) PITCH +0x00001218: 0xF38680FA vmzero.q E622 03 (00001214) PITCH +0x0000121C: 0xF38680FB vmzero.q E623 03 (00001218) PITCH +0x00001220: 0xF38680FC vmzero.q E720 03 (0000121C) PITCH +0x00001224: 0xF38680FD vmzero.q E721 03 (00001220) PITCH +0x00001228: 0xF38680FE vmzero.q E722 03 (00001224) PITCH +0x0000122C: 0xF38680FF vmzero.q E723 03 (00001228) PITCH +0x00001230: 0x03E00008 jr ra +0x00001234: 0x00000000 nop + +branches: +0x00001238: 0x49000002 bvf 0x00001244 +0x0000123C: 0x00000000 nop +0x00001240: 0x49050002 bvt cc1,0x0000124C +0x00001244: 0x00000000 nop +0x00001248: 0x490A0002 bvfl cc2,0x00001254 +0x0000124C: 0x00000000 nop +0x00001250: 0x490F0002 bvtl cc3,0x0000125C +0x00001254: 0x00000000 nop +0x00001258: 0x49100002 bvf cc4,0x00001264 +0x0000125C: 0x00000000 nop +0x00001260: 0x49150002 bvt cc5,0x0000126C +0x00001264: 0x00000000 nop +0x00001268: 0x491A0002 bvfl cc6,0x00001274 +0x0000126C: 0x00000000 nop +0x00001270: 0x491F0002 bvtl cc7,0x0000127C +0x00001274: 0x00000000 nop +0x00001278: 0x49000002 bvf branches_end +0x0000127C: 0x00000000 nop +0x00001280: 0x00000000 nop +0x00001284: 0x03E00008 jr ra +0x00001288: 0x00000000 nop + +load_move_store: +0x0000128C: 0xC8800040 lv.s S000,0x0040(a0) +0x00001290: 0xC8810040 lv.s S010,0x0040(a0) +0x00001294: 0xC8820040 lv.s S020,0x0040(a0) +0x00001298: 0xC8830040 lv.s S030,0x0040(a0) +0x0000129C: 0xC8840040 lv.s S100,0x0040(a0) +0x000012A0: 0xC8850040 lv.s S110,0x0040(a0) +0x000012A4: 0xC8860040 lv.s S120,0x0040(a0) +0x000012A8: 0xC8870040 lv.s S130,0x0040(a0) +0x000012AC: 0xC8880040 lv.s S200,0x0040(a0) +0x000012B0: 0xC8890040 lv.s S210,0x0040(a0) +0x000012B4: 0xC88A0040 lv.s S220,0x0040(a0) +0x000012B8: 0xC88B0040 lv.s S230,0x0040(a0) +0x000012BC: 0xC88C0040 lv.s S300,0x0040(a0) +0x000012C0: 0xC88D0040 lv.s S310,0x0040(a0) +0x000012C4: 0xC88E0040 lv.s S320,0x0040(a0) +0x000012C8: 0xC88F0040 lv.s S330,0x0040(a0) +0x000012CC: 0xC8900040 lv.s S400,0x0040(a0) +0x000012D0: 0xC8910040 lv.s S410,0x0040(a0) +0x000012D4: 0xC8920040 lv.s S420,0x0040(a0) +0x000012D8: 0xC8930040 lv.s S430,0x0040(a0) +0x000012DC: 0xC8940040 lv.s S500,0x0040(a0) +0x000012E0: 0xC8950040 lv.s S510,0x0040(a0) +0x000012E4: 0xC8960040 lv.s S520,0x0040(a0) +0x000012E8: 0xC8970040 lv.s S530,0x0040(a0) +0x000012EC: 0xC8980040 lv.s S600,0x0040(a0) +0x000012F0: 0xC8990040 lv.s S610,0x0040(a0) +0x000012F4: 0xC89A0040 lv.s S620,0x0040(a0) +0x000012F8: 0xC89B0040 lv.s S630,0x0040(a0) +0x000012FC: 0xC89C0040 lv.s S700,0x0040(a0) +0x00001300: 0xC89D0040 lv.s S710,0x0040(a0) +0x00001304: 0xC89E0040 lv.s S720,0x0040(a0) +0x00001308: 0xC89F0040 lv.s S730,0x0040(a0) +0x0000130C: 0xC8800041 lv.s S001,0x0040(a0) +0x00001310: 0xC8810041 lv.s S011,0x0040(a0) +0x00001314: 0xC8820041 lv.s S021,0x0040(a0) +0x00001318: 0xC8830041 lv.s S031,0x0040(a0) +0x0000131C: 0xC8840041 lv.s S101,0x0040(a0) +0x00001320: 0xC8850041 lv.s S111,0x0040(a0) +0x00001324: 0xC8860041 lv.s S121,0x0040(a0) +0x00001328: 0xC8870041 lv.s S131,0x0040(a0) +0x0000132C: 0xC8880041 lv.s S201,0x0040(a0) +0x00001330: 0xC8890041 lv.s S211,0x0040(a0) +0x00001334: 0xC88A0041 lv.s S221,0x0040(a0) +0x00001338: 0xC88B0041 lv.s S231,0x0040(a0) +0x0000133C: 0xC88C0041 lv.s S301,0x0040(a0) +0x00001340: 0xC88D0041 lv.s S311,0x0040(a0) +0x00001344: 0xC88E0041 lv.s S321,0x0040(a0) +0x00001348: 0xC88F0041 lv.s S331,0x0040(a0) +0x0000134C: 0xC8900041 lv.s S401,0x0040(a0) +0x00001350: 0xC8910041 lv.s S411,0x0040(a0) +0x00001354: 0xC8920041 lv.s S421,0x0040(a0) +0x00001358: 0xC8930041 lv.s S431,0x0040(a0) +0x0000135C: 0xC8940041 lv.s S501,0x0040(a0) +0x00001360: 0xC8950041 lv.s S511,0x0040(a0) +0x00001364: 0xC8960041 lv.s S521,0x0040(a0) +0x00001368: 0xC8970041 lv.s S531,0x0040(a0) +0x0000136C: 0xC8980041 lv.s S601,0x0040(a0) +0x00001370: 0xC8990041 lv.s S611,0x0040(a0) +0x00001374: 0xC89A0041 lv.s S621,0x0040(a0) +0x00001378: 0xC89B0041 lv.s S631,0x0040(a0) +0x0000137C: 0xC89C0041 lv.s S701,0x0040(a0) +0x00001380: 0xC89D0041 lv.s S711,0x0040(a0) +0x00001384: 0xC89E0041 lv.s S721,0x0040(a0) +0x00001388: 0xC89F0041 lv.s S731,0x0040(a0) +0x0000138C: 0xC8800042 lv.s S002,0x0040(a0) +0x00001390: 0xC8810042 lv.s S012,0x0040(a0) +0x00001394: 0xC8820042 lv.s S022,0x0040(a0) +0x00001398: 0xC8830042 lv.s S032,0x0040(a0) +0x0000139C: 0xC8840042 lv.s S102,0x0040(a0) +0x000013A0: 0xC8850042 lv.s S112,0x0040(a0) +0x000013A4: 0xC8860042 lv.s S122,0x0040(a0) +0x000013A8: 0xC8870042 lv.s S132,0x0040(a0) +0x000013AC: 0xC8880042 lv.s S202,0x0040(a0) +0x000013B0: 0xC8890042 lv.s S212,0x0040(a0) +0x000013B4: 0xC88A0042 lv.s S222,0x0040(a0) +0x000013B8: 0xC88B0042 lv.s S232,0x0040(a0) +0x000013BC: 0xC88C0042 lv.s S302,0x0040(a0) +0x000013C0: 0xC88D0042 lv.s S312,0x0040(a0) +0x000013C4: 0xC88E0042 lv.s S322,0x0040(a0) +0x000013C8: 0xC88F0042 lv.s S332,0x0040(a0) +0x000013CC: 0xC8900042 lv.s S402,0x0040(a0) +0x000013D0: 0xC8910042 lv.s S412,0x0040(a0) +0x000013D4: 0xC8920042 lv.s S422,0x0040(a0) +0x000013D8: 0xC8930042 lv.s S432,0x0040(a0) +0x000013DC: 0xC8940042 lv.s S502,0x0040(a0) +0x000013E0: 0xC8950042 lv.s S512,0x0040(a0) +0x000013E4: 0xC8960042 lv.s S522,0x0040(a0) +0x000013E8: 0xC8970042 lv.s S532,0x0040(a0) +0x000013EC: 0xC8980042 lv.s S602,0x0040(a0) +0x000013F0: 0xC8990042 lv.s S612,0x0040(a0) +0x000013F4: 0xC89A0042 lv.s S622,0x0040(a0) +0x000013F8: 0xC89B0042 lv.s S632,0x0040(a0) +0x000013FC: 0xC89C0042 lv.s S702,0x0040(a0) +0x00001400: 0xC89D0042 lv.s S712,0x0040(a0) +0x00001404: 0xC89E0042 lv.s S722,0x0040(a0) +0x00001408: 0xC89F0042 lv.s S732,0x0040(a0) +0x0000140C: 0xC8800043 lv.s S003,0x0040(a0) +0x00001410: 0xC8810043 lv.s S013,0x0040(a0) +0x00001414: 0xC8820043 lv.s S023,0x0040(a0) +0x00001418: 0xC8830043 lv.s S033,0x0040(a0) +0x0000141C: 0xC8840043 lv.s S103,0x0040(a0) +0x00001420: 0xC8850043 lv.s S113,0x0040(a0) +0x00001424: 0xC8860043 lv.s S123,0x0040(a0) +0x00001428: 0xC8870043 lv.s S133,0x0040(a0) +0x0000142C: 0xC8880043 lv.s S203,0x0040(a0) +0x00001430: 0xC8890043 lv.s S213,0x0040(a0) +0x00001434: 0xC88A0043 lv.s S223,0x0040(a0) +0x00001438: 0xC88B0043 lv.s S233,0x0040(a0) +0x0000143C: 0xC88C0043 lv.s S303,0x0040(a0) +0x00001440: 0xC88D0043 lv.s S313,0x0040(a0) +0x00001444: 0xC88E0043 lv.s S323,0x0040(a0) +0x00001448: 0xC88F0043 lv.s S333,0x0040(a0) +0x0000144C: 0xC8900043 lv.s S403,0x0040(a0) +0x00001450: 0xC8910043 lv.s S413,0x0040(a0) +0x00001454: 0xC8920043 lv.s S423,0x0040(a0) +0x00001458: 0xC8930043 lv.s S433,0x0040(a0) +0x0000145C: 0xC8940043 lv.s S503,0x0040(a0) +0x00001460: 0xC8950043 lv.s S513,0x0040(a0) +0x00001464: 0xC8960043 lv.s S523,0x0040(a0) +0x00001468: 0xC8970043 lv.s S533,0x0040(a0) +0x0000146C: 0xC8980043 lv.s S603,0x0040(a0) +0x00001470: 0xC8990043 lv.s S613,0x0040(a0) +0x00001474: 0xC89A0043 lv.s S623,0x0040(a0) +0x00001478: 0xC89B0043 lv.s S633,0x0040(a0) +0x0000147C: 0xC89C0043 lv.s S703,0x0040(a0) +0x00001480: 0xC89D0043 lv.s S713,0x0040(a0) +0x00001484: 0xC89E0043 lv.s S723,0x0040(a0) +0x00001488: 0xC89F0043 lv.s S733,0x0040(a0) +0x0000148C: 0xD8800040 lv.q C000,0x0040(a0) +0x00001490: 0xD8810040 lv.q C010,0x0040(a0) +0x00001494: 0xD8820040 lv.q C020,0x0040(a0) +0x00001498: 0xD8830040 lv.q C030,0x0040(a0) +0x0000149C: 0xD8840040 lv.q C100,0x0040(a0) +0x000014A0: 0xD8850040 lv.q C110,0x0040(a0) +0x000014A4: 0xD8860040 lv.q C120,0x0040(a0) +0x000014A8: 0xD8870040 lv.q C130,0x0040(a0) +0x000014AC: 0xD8880040 lv.q C200,0x0040(a0) +0x000014B0: 0xD8890040 lv.q C210,0x0040(a0) +0x000014B4: 0xD88A0040 lv.q C220,0x0040(a0) +0x000014B8: 0xD88B0040 lv.q C230,0x0040(a0) +0x000014BC: 0xD88C0040 lv.q C300,0x0040(a0) +0x000014C0: 0xD88D0040 lv.q C310,0x0040(a0) +0x000014C4: 0xD88E0040 lv.q C320,0x0040(a0) +0x000014C8: 0xD88F0040 lv.q C330,0x0040(a0) +0x000014CC: 0xD8900040 lv.q C400,0x0040(a0) +0x000014D0: 0xD8910040 lv.q C410,0x0040(a0) +0x000014D4: 0xD8920040 lv.q C420,0x0040(a0) +0x000014D8: 0xD8930040 lv.q C430,0x0040(a0) +0x000014DC: 0xD8940040 lv.q C500,0x0040(a0) +0x000014E0: 0xD8950040 lv.q C510,0x0040(a0) +0x000014E4: 0xD8960040 lv.q C520,0x0040(a0) +0x000014E8: 0xD8970040 lv.q C530,0x0040(a0) +0x000014EC: 0xD8980040 lv.q C600,0x0040(a0) +0x000014F0: 0xD8990040 lv.q C610,0x0040(a0) +0x000014F4: 0xD89A0040 lv.q C620,0x0040(a0) +0x000014F8: 0xD89B0040 lv.q C630,0x0040(a0) +0x000014FC: 0xD89C0040 lv.q C700,0x0040(a0) +0x00001500: 0xD89D0040 lv.q C710,0x0040(a0) +0x00001504: 0xD89E0040 lv.q C720,0x0040(a0) +0x00001508: 0xD89F0040 lv.q C730,0x0040(a0) +0x0000150C: 0xD8800041 lv.q R000,0x0040(a0) +0x00001510: 0xD8810041 lv.q R001,0x0040(a0) +0x00001514: 0xD8820041 lv.q R002,0x0040(a0) +0x00001518: 0xD8830041 lv.q R003,0x0040(a0) +0x0000151C: 0xD8840041 lv.q R100,0x0040(a0) +0x00001520: 0xD8850041 lv.q R101,0x0040(a0) +0x00001524: 0xD8860041 lv.q R102,0x0040(a0) +0x00001528: 0xD8870041 lv.q R103,0x0040(a0) +0x0000152C: 0xD8880041 lv.q R200,0x0040(a0) +0x00001530: 0xD8890041 lv.q R201,0x0040(a0) +0x00001534: 0xD88A0041 lv.q R202,0x0040(a0) +0x00001538: 0xD88B0041 lv.q R203,0x0040(a0) +0x0000153C: 0xD88C0041 lv.q R300,0x0040(a0) +0x00001540: 0xD88D0041 lv.q R301,0x0040(a0) +0x00001544: 0xD88E0041 lv.q R302,0x0040(a0) +0x00001548: 0xD88F0041 lv.q R303,0x0040(a0) +0x0000154C: 0xD8900041 lv.q R400,0x0040(a0) +0x00001550: 0xD8910041 lv.q R401,0x0040(a0) +0x00001554: 0xD8920041 lv.q R402,0x0040(a0) +0x00001558: 0xD8930041 lv.q R403,0x0040(a0) +0x0000155C: 0xD8940041 lv.q R500,0x0040(a0) +0x00001560: 0xD8950041 lv.q R501,0x0040(a0) +0x00001564: 0xD8960041 lv.q R502,0x0040(a0) +0x00001568: 0xD8970041 lv.q R503,0x0040(a0) +0x0000156C: 0xD8980041 lv.q R600,0x0040(a0) +0x00001570: 0xD8990041 lv.q R601,0x0040(a0) +0x00001574: 0xD89A0041 lv.q R602,0x0040(a0) +0x00001578: 0xD89B0041 lv.q R603,0x0040(a0) +0x0000157C: 0xD89C0041 lv.q R700,0x0040(a0) +0x00001580: 0xD89D0041 lv.q R701,0x0040(a0) +0x00001584: 0xD89E0041 lv.q R702,0x0040(a0) +0x00001588: 0xD89F0041 lv.q R703,0x0040(a0) +0x0000158C: 0xD8800042 lv.q C000,0x0040(a0) +0x00001590: 0xD8810042 lv.q C010,0x0040(a0) +0x00001594: 0xD8820042 lv.q C020,0x0040(a0) +0x00001598: 0xD8830042 lv.q C030,0x0040(a0) +0x0000159C: 0xD8840042 lv.q C100,0x0040(a0) +0x000015A0: 0xD8850042 lv.q C110,0x0040(a0) +0x000015A4: 0xD8860042 lv.q C120,0x0040(a0) +0x000015A8: 0xD8870042 lv.q C130,0x0040(a0) +0x000015AC: 0xD8880042 lv.q C200,0x0040(a0) +0x000015B0: 0xD8890042 lv.q C210,0x0040(a0) +0x000015B4: 0xD88A0042 lv.q C220,0x0040(a0) +0x000015B8: 0xD88B0042 lv.q C230,0x0040(a0) +0x000015BC: 0xD88C0042 lv.q C300,0x0040(a0) +0x000015C0: 0xD88D0042 lv.q C310,0x0040(a0) +0x000015C4: 0xD88E0042 lv.q C320,0x0040(a0) +0x000015C8: 0xD88F0042 lv.q C330,0x0040(a0) +0x000015CC: 0xD8900042 lv.q C400,0x0040(a0) +0x000015D0: 0xD8910042 lv.q C410,0x0040(a0) +0x000015D4: 0xD8920042 lv.q C420,0x0040(a0) +0x000015D8: 0xD8930042 lv.q C430,0x0040(a0) +0x000015DC: 0xD8940042 lv.q C500,0x0040(a0) +0x000015E0: 0xD8950042 lv.q C510,0x0040(a0) +0x000015E4: 0xD8960042 lv.q C520,0x0040(a0) +0x000015E8: 0xD8970042 lv.q C530,0x0040(a0) +0x000015EC: 0xD8980042 lv.q C600,0x0040(a0) +0x000015F0: 0xD8990042 lv.q C610,0x0040(a0) +0x000015F4: 0xD89A0042 lv.q C620,0x0040(a0) +0x000015F8: 0xD89B0042 lv.q C630,0x0040(a0) +0x000015FC: 0xD89C0042 lv.q C700,0x0040(a0) +0x00001600: 0xD89D0042 lv.q C710,0x0040(a0) +0x00001604: 0xD89E0042 lv.q C720,0x0040(a0) +0x00001608: 0xD89F0042 lv.q C730,0x0040(a0) +0x0000160C: 0x48640004 mfv a0,S100 +0x00001610: 0x48640004 mfv a0,S100 06 (0000160C) PITCH +0x00001614: 0x48640080 mfvc a0,VFPU_PFXS 06 (00001610) PITCH +0x00001618: 0x48640084 mfvc a0,VFPU_INF4 06 (00001614) PITCH +0x0000161C: 0x48E40004 mtv a0,S100 06 (00001618) PITCH +0x00001620: 0x48E40084 mtvc a0,VFPU_INF4 +0x00001624: 0xE8800040 sv.s S000,0x0040(a0) +0x00001628: 0xF8800040 sv.q C000,0x0040(a0) 06 (00001624) PITCH +0x0000162C: 0xF8800042 sv.q C000,0x0040(a0),wb 06 (00001628) PITCH +0x00001630: 0xF4800040 svl.q C000,0x0040(a0) +0x00001634: 0xF4800042 svr.q C000,0x0040(a0) 06 (00001630) PITCH +0x00001638: 0x03E00008 jr ra +0x0000163C: 0x00000000 nop + +abs_all: +0x00001640: 0xD0010000 vabs.s S000,S000 +0x00001644: 0xD0010101 vabs.s S010,S010 +0x00001648: 0xD0010202 vabs.s S020,S020 +0x0000164C: 0xD0010303 vabs.s S030,S030 +0x00001650: 0xD0010404 vabs.s S100,S100 +0x00001654: 0xD0010505 vabs.s S110,S110 +0x00001658: 0xD0010606 vabs.s S120,S120 +0x0000165C: 0xD0010707 vabs.s S130,S130 +0x00001660: 0xD0010808 vabs.s S200,S200 +0x00001664: 0xD0010909 vabs.s S210,S210 +0x00001668: 0xD0010A0A vabs.s S220,S220 +0x0000166C: 0xD0010B0B vabs.s S230,S230 +0x00001670: 0xD0010C0C vabs.s S300,S300 +0x00001674: 0xD0010D0D vabs.s S310,S310 +0x00001678: 0xD0010E0E vabs.s S320,S320 +0x0000167C: 0xD0010F0F vabs.s S330,S330 +0x00001680: 0xD0011010 vabs.s S400,S400 +0x00001684: 0xD0011111 vabs.s S410,S410 +0x00001688: 0xD0011212 vabs.s S420,S420 +0x0000168C: 0xD0011313 vabs.s S430,S430 +0x00001690: 0xD0011414 vabs.s S500,S500 +0x00001694: 0xD0011515 vabs.s S510,S510 +0x00001698: 0xD0011616 vabs.s S520,S520 +0x0000169C: 0xD0011717 vabs.s S530,S530 +0x000016A0: 0xD0011818 vabs.s S600,S600 +0x000016A4: 0xD0011919 vabs.s S610,S610 +0x000016A8: 0xD0011A1A vabs.s S620,S620 +0x000016AC: 0xD0011B1B vabs.s S630,S630 +0x000016B0: 0xD0011C1C vabs.s S700,S700 +0x000016B4: 0xD0011D1D vabs.s S710,S710 +0x000016B8: 0xD0011E1E vabs.s S720,S720 +0x000016BC: 0xD0011F1F vabs.s S730,S730 +0x000016C0: 0xD0012020 vabs.s S001,S001 +0x000016C4: 0xD0012121 vabs.s S011,S011 +0x000016C8: 0xD0012222 vabs.s S021,S021 +0x000016CC: 0xD0012323 vabs.s S031,S031 +0x000016D0: 0xD0012424 vabs.s S101,S101 +0x000016D4: 0xD0012525 vabs.s S111,S111 +0x000016D8: 0xD0012626 vabs.s S121,S121 +0x000016DC: 0xD0012727 vabs.s S131,S131 +0x000016E0: 0xD0012828 vabs.s S201,S201 +0x000016E4: 0xD0012929 vabs.s S211,S211 +0x000016E8: 0xD0012A2A vabs.s S221,S221 +0x000016EC: 0xD0012B2B vabs.s S231,S231 +0x000016F0: 0xD0012C2C vabs.s S301,S301 +0x000016F4: 0xD0012D2D vabs.s S311,S311 +0x000016F8: 0xD0012E2E vabs.s S321,S321 +0x000016FC: 0xD0012F2F vabs.s S331,S331 +0x00001700: 0xD0013030 vabs.s S401,S401 +0x00001704: 0xD0013131 vabs.s S411,S411 +0x00001708: 0xD0013232 vabs.s S421,S421 +0x0000170C: 0xD0013333 vabs.s S431,S431 +0x00001710: 0xD0013434 vabs.s S501,S501 +0x00001714: 0xD0013535 vabs.s S511,S511 +0x00001718: 0xD0013636 vabs.s S521,S521 +0x0000171C: 0xD0013737 vabs.s S531,S531 +0x00001720: 0xD0013838 vabs.s S601,S601 +0x00001724: 0xD0013939 vabs.s S611,S611 +0x00001728: 0xD0013A3A vabs.s S621,S621 +0x0000172C: 0xD0013B3B vabs.s S631,S631 +0x00001730: 0xD0013C3C vabs.s S701,S701 +0x00001734: 0xD0013D3D vabs.s S711,S711 +0x00001738: 0xD0013E3E vabs.s S721,S721 +0x0000173C: 0xD0013F3F vabs.s S731,S731 +0x00001740: 0xD0014040 vabs.s S002,S002 +0x00001744: 0xD0014141 vabs.s S012,S012 +0x00001748: 0xD0014242 vabs.s S022,S022 +0x0000174C: 0xD0014343 vabs.s S032,S032 +0x00001750: 0xD0014444 vabs.s S102,S102 +0x00001754: 0xD0014545 vabs.s S112,S112 +0x00001758: 0xD0014646 vabs.s S122,S122 +0x0000175C: 0xD0014747 vabs.s S132,S132 +0x00001760: 0xD0014848 vabs.s S202,S202 +0x00001764: 0xD0014949 vabs.s S212,S212 +0x00001768: 0xD0014A4A vabs.s S222,S222 +0x0000176C: 0xD0014B4B vabs.s S232,S232 +0x00001770: 0xD0014C4C vabs.s S302,S302 +0x00001774: 0xD0014D4D vabs.s S312,S312 +0x00001778: 0xD0014E4E vabs.s S322,S322 +0x0000177C: 0xD0014F4F vabs.s S332,S332 +0x00001780: 0xD0015050 vabs.s S402,S402 +0x00001784: 0xD0015151 vabs.s S412,S412 +0x00001788: 0xD0015252 vabs.s S422,S422 +0x0000178C: 0xD0015353 vabs.s S432,S432 +0x00001790: 0xD0015454 vabs.s S502,S502 +0x00001794: 0xD0015555 vabs.s S512,S512 +0x00001798: 0xD0015656 vabs.s S522,S522 +0x0000179C: 0xD0015757 vabs.s S532,S532 +0x000017A0: 0xD0015858 vabs.s S602,S602 +0x000017A4: 0xD0015959 vabs.s S612,S612 +0x000017A8: 0xD0015A5A vabs.s S622,S622 +0x000017AC: 0xD0015B5B vabs.s S632,S632 +0x000017B0: 0xD0015C5C vabs.s S702,S702 +0x000017B4: 0xD0015D5D vabs.s S712,S712 +0x000017B8: 0xD0015E5E vabs.s S722,S722 +0x000017BC: 0xD0015F5F vabs.s S732,S732 +0x000017C0: 0xD0016060 vabs.s S003,S003 +0x000017C4: 0xD0016161 vabs.s S013,S013 +0x000017C8: 0xD0016262 vabs.s S023,S023 +0x000017CC: 0xD0016363 vabs.s S033,S033 +0x000017D0: 0xD0016464 vabs.s S103,S103 +0x000017D4: 0xD0016565 vabs.s S113,S113 +0x000017D8: 0xD0016666 vabs.s S123,S123 +0x000017DC: 0xD0016767 vabs.s S133,S133 +0x000017E0: 0xD0016868 vabs.s S203,S203 +0x000017E4: 0xD0016969 vabs.s S213,S213 +0x000017E8: 0xD0016A6A vabs.s S223,S223 +0x000017EC: 0xD0016B6B vabs.s S233,S233 +0x000017F0: 0xD0016C6C vabs.s S303,S303 +0x000017F4: 0xD0016D6D vabs.s S313,S313 +0x000017F8: 0xD0016E6E vabs.s S323,S323 +0x000017FC: 0xD0016F6F vabs.s S333,S333 +0x00001800: 0xD0017070 vabs.s S403,S403 +0x00001804: 0xD0017171 vabs.s S413,S413 +0x00001808: 0xD0017272 vabs.s S423,S423 +0x0000180C: 0xD0017373 vabs.s S433,S433 +0x00001810: 0xD0017474 vabs.s S503,S503 +0x00001814: 0xD0017575 vabs.s S513,S513 +0x00001818: 0xD0017676 vabs.s S523,S523 +0x0000181C: 0xD0017777 vabs.s S533,S533 +0x00001820: 0xD0017878 vabs.s S603,S603 +0x00001824: 0xD0017979 vabs.s S613,S613 +0x00001828: 0xD0017A7A vabs.s S623,S623 +0x0000182C: 0xD0017B7B vabs.s S633,S633 +0x00001830: 0xD0017C7C vabs.s S703,S703 +0x00001834: 0xD0017D7D vabs.s S713,S713 +0x00001838: 0xD0017E7E vabs.s S723,S723 +0x0000183C: 0xD0017F7F vabs.s S733,S733 +0x00001840: 0xD0010080 vabs.p C000,C000 +0x00001844: 0xD0010181 vabs.p C010,C010 +0x00001848: 0xD0010282 vabs.p C020,C020 +0x0000184C: 0xD0010383 vabs.p C030,C030 +0x00001850: 0xD0010484 vabs.p C100,C100 +0x00001854: 0xD0010585 vabs.p C110,C110 +0x00001858: 0xD0010686 vabs.p C120,C120 +0x0000185C: 0xD0010787 vabs.p C130,C130 +0x00001860: 0xD0010888 vabs.p C200,C200 +0x00001864: 0xD0010989 vabs.p C210,C210 +0x00001868: 0xD0010A8A vabs.p C220,C220 +0x0000186C: 0xD0010B8B vabs.p C230,C230 +0x00001870: 0xD0010C8C vabs.p C300,C300 +0x00001874: 0xD0010D8D vabs.p C310,C310 +0x00001878: 0xD0010E8E vabs.p C320,C320 +0x0000187C: 0xD0010F8F vabs.p C330,C330 +0x00001880: 0xD0011090 vabs.p C400,C400 +0x00001884: 0xD0011191 vabs.p C410,C410 +0x00001888: 0xD0011292 vabs.p C420,C420 +0x0000188C: 0xD0011393 vabs.p C430,C430 +0x00001890: 0xD0011494 vabs.p C500,C500 +0x00001894: 0xD0011595 vabs.p C510,C510 +0x00001898: 0xD0011696 vabs.p C520,C520 +0x0000189C: 0xD0011797 vabs.p C530,C530 +0x000018A0: 0xD0011898 vabs.p C600,C600 +0x000018A4: 0xD0011999 vabs.p C610,C610 +0x000018A8: 0xD0011A9A vabs.p C620,C620 +0x000018AC: 0xD0011B9B vabs.p C630,C630 +0x000018B0: 0xD0011C9C vabs.p C700,C700 +0x000018B4: 0xD0011D9D vabs.p C710,C710 +0x000018B8: 0xD0011E9E vabs.p C720,C720 +0x000018BC: 0xD0011F9F vabs.p C730,C730 +0x000018C0: 0xD00120A0 vabs.p R000,R000 +0x000018C4: 0xD00121A1 vabs.p R001,R001 +0x000018C8: 0xD00122A2 vabs.p R002,R002 +0x000018CC: 0xD00123A3 vabs.p R003,R003 +0x000018D0: 0xD00124A4 vabs.p R100,R100 +0x000018D4: 0xD00125A5 vabs.p R101,R101 +0x000018D8: 0xD00126A6 vabs.p R102,R102 +0x000018DC: 0xD00127A7 vabs.p R103,R103 +0x000018E0: 0xD00128A8 vabs.p R200,R200 +0x000018E4: 0xD00129A9 vabs.p R201,R201 +0x000018E8: 0xD0012AAA vabs.p R202,R202 +0x000018EC: 0xD0012BAB vabs.p R203,R203 +0x000018F0: 0xD0012CAC vabs.p R300,R300 +0x000018F4: 0xD0012DAD vabs.p R301,R301 +0x000018F8: 0xD0012EAE vabs.p R302,R302 +0x000018FC: 0xD0012FAF vabs.p R303,R303 +0x00001900: 0xD00130B0 vabs.p R400,R400 +0x00001904: 0xD00131B1 vabs.p R401,R401 +0x00001908: 0xD00132B2 vabs.p R402,R402 +0x0000190C: 0xD00133B3 vabs.p R403,R403 +0x00001910: 0xD00134B4 vabs.p R500,R500 +0x00001914: 0xD00135B5 vabs.p R501,R501 +0x00001918: 0xD00136B6 vabs.p R502,R502 +0x0000191C: 0xD00137B7 vabs.p R503,R503 +0x00001920: 0xD00138B8 vabs.p R600,R600 +0x00001924: 0xD00139B9 vabs.p R601,R601 +0x00001928: 0xD0013ABA vabs.p R602,R602 +0x0000192C: 0xD0013BBB vabs.p R603,R603 +0x00001930: 0xD0013CBC vabs.p R700,R700 +0x00001934: 0xD0013DBD vabs.p R701,R701 +0x00001938: 0xD0013EBE vabs.p R702,R702 +0x0000193C: 0xD0013FBF vabs.p R703,R703 +0x00001940: 0xD00140C0 vabs.p C002,C002 +0x00001944: 0xD00141C1 vabs.p C012,C012 +0x00001948: 0xD00142C2 vabs.p C022,C022 +0x0000194C: 0xD00143C3 vabs.p C032,C032 +0x00001950: 0xD00144C4 vabs.p C102,C102 +0x00001954: 0xD00145C5 vabs.p C112,C112 +0x00001958: 0xD00146C6 vabs.p C122,C122 +0x0000195C: 0xD00147C7 vabs.p C132,C132 +0x00001960: 0xD00148C8 vabs.p C202,C202 +0x00001964: 0xD00149C9 vabs.p C212,C212 +0x00001968: 0xD0014ACA vabs.p C222,C222 +0x0000196C: 0xD0014BCB vabs.p C232,C232 +0x00001970: 0xD0014CCC vabs.p C302,C302 +0x00001974: 0xD0014DCD vabs.p C312,C312 +0x00001978: 0xD0014ECE vabs.p C322,C322 +0x0000197C: 0xD0014FCF vabs.p C332,C332 +0x00001980: 0xD00150D0 vabs.p C402,C402 +0x00001984: 0xD00151D1 vabs.p C412,C412 +0x00001988: 0xD00152D2 vabs.p C422,C422 +0x0000198C: 0xD00153D3 vabs.p C432,C432 +0x00001990: 0xD00154D4 vabs.p C502,C502 +0x00001994: 0xD00155D5 vabs.p C512,C512 +0x00001998: 0xD00156D6 vabs.p C522,C522 +0x0000199C: 0xD00157D7 vabs.p C532,C532 +0x000019A0: 0xD00158D8 vabs.p C602,C602 +0x000019A4: 0xD00159D9 vabs.p C612,C612 +0x000019A8: 0xD0015ADA vabs.p C622,C622 +0x000019AC: 0xD0015BDB vabs.p C632,C632 +0x000019B0: 0xD0015CDC vabs.p C702,C702 +0x000019B4: 0xD0015DDD vabs.p C712,C712 +0x000019B8: 0xD0015EDE vabs.p C722,C722 +0x000019BC: 0xD0015FDF vabs.p C732,C732 +0x000019C0: 0xD00160E0 vabs.p R020,R020 +0x000019C4: 0xD00161E1 vabs.p R021,R021 +0x000019C8: 0xD00162E2 vabs.p R022,R022 +0x000019CC: 0xD00163E3 vabs.p R023,R023 +0x000019D0: 0xD00164E4 vabs.p R120,R120 +0x000019D4: 0xD00165E5 vabs.p R121,R121 +0x000019D8: 0xD00166E6 vabs.p R122,R122 +0x000019DC: 0xD00167E7 vabs.p R123,R123 +0x000019E0: 0xD00168E8 vabs.p R220,R220 +0x000019E4: 0xD00169E9 vabs.p R221,R221 +0x000019E8: 0xD0016AEA vabs.p R222,R222 +0x000019EC: 0xD0016BEB vabs.p R223,R223 +0x000019F0: 0xD0016CEC vabs.p R320,R320 +0x000019F4: 0xD0016DED vabs.p R321,R321 +0x000019F8: 0xD0016EEE vabs.p R322,R322 +0x000019FC: 0xD0016FEF vabs.p R323,R323 +0x00001A00: 0xD00170F0 vabs.p R420,R420 +0x00001A04: 0xD00171F1 vabs.p R421,R421 +0x00001A08: 0xD00172F2 vabs.p R422,R422 +0x00001A0C: 0xD00173F3 vabs.p R423,R423 +0x00001A10: 0xD00174F4 vabs.p R520,R520 +0x00001A14: 0xD00175F5 vabs.p R521,R521 +0x00001A18: 0xD00176F6 vabs.p R522,R522 +0x00001A1C: 0xD00177F7 vabs.p R523,R523 +0x00001A20: 0xD00178F8 vabs.p R620,R620 +0x00001A24: 0xD00179F9 vabs.p R621,R621 +0x00001A28: 0xD0017AFA vabs.p R622,R622 +0x00001A2C: 0xD0017BFB vabs.p R623,R623 +0x00001A30: 0xD0017CFC vabs.p R720,R720 +0x00001A34: 0xD0017DFD vabs.p R721,R721 +0x00001A38: 0xD0017EFE vabs.p R722,R722 +0x00001A3C: 0xD0017FFF vabs.p R723,R723 +0x00001A40: 0xD0018000 vabs.t C000,C000 +0x00001A44: 0xD0018101 vabs.t C010,C010 +0x00001A48: 0xD0018202 vabs.t C020,C020 +0x00001A4C: 0xD0018303 vabs.t C030,C030 +0x00001A50: 0xD0018404 vabs.t C100,C100 +0x00001A54: 0xD0018505 vabs.t C110,C110 +0x00001A58: 0xD0018606 vabs.t C120,C120 +0x00001A5C: 0xD0018707 vabs.t C130,C130 +0x00001A60: 0xD0018808 vabs.t C200,C200 +0x00001A64: 0xD0018909 vabs.t C210,C210 +0x00001A68: 0xD0018A0A vabs.t C220,C220 +0x00001A6C: 0xD0018B0B vabs.t C230,C230 +0x00001A70: 0xD0018C0C vabs.t C300,C300 +0x00001A74: 0xD0018D0D vabs.t C310,C310 +0x00001A78: 0xD0018E0E vabs.t C320,C320 +0x00001A7C: 0xD0018F0F vabs.t C330,C330 +0x00001A80: 0xD0019010 vabs.t C400,C400 +0x00001A84: 0xD0019111 vabs.t C410,C410 +0x00001A88: 0xD0019212 vabs.t C420,C420 +0x00001A8C: 0xD0019313 vabs.t C430,C430 +0x00001A90: 0xD0019414 vabs.t C500,C500 +0x00001A94: 0xD0019515 vabs.t C510,C510 +0x00001A98: 0xD0019616 vabs.t C520,C520 +0x00001A9C: 0xD0019717 vabs.t C530,C530 +0x00001AA0: 0xD0019818 vabs.t C600,C600 +0x00001AA4: 0xD0019919 vabs.t C610,C610 +0x00001AA8: 0xD0019A1A vabs.t C620,C620 +0x00001AAC: 0xD0019B1B vabs.t C630,C630 +0x00001AB0: 0xD0019C1C vabs.t C700,C700 +0x00001AB4: 0xD0019D1D vabs.t C710,C710 +0x00001AB8: 0xD0019E1E vabs.t C720,C720 +0x00001ABC: 0xD0019F1F vabs.t C730,C730 +0x00001AC0: 0xD001A020 vabs.t R000,R000 +0x00001AC4: 0xD001A121 vabs.t R001,R001 +0x00001AC8: 0xD001A222 vabs.t R002,R002 +0x00001ACC: 0xD001A323 vabs.t R003,R003 +0x00001AD0: 0xD001A424 vabs.t R100,R100 +0x00001AD4: 0xD001A525 vabs.t R101,R101 +0x00001AD8: 0xD001A626 vabs.t R102,R102 +0x00001ADC: 0xD001A727 vabs.t R103,R103 +0x00001AE0: 0xD001A828 vabs.t R200,R200 +0x00001AE4: 0xD001A929 vabs.t R201,R201 +0x00001AE8: 0xD001AA2A vabs.t R202,R202 +0x00001AEC: 0xD001AB2B vabs.t R203,R203 +0x00001AF0: 0xD001AC2C vabs.t R300,R300 +0x00001AF4: 0xD001AD2D vabs.t R301,R301 +0x00001AF8: 0xD001AE2E vabs.t R302,R302 +0x00001AFC: 0xD001AF2F vabs.t R303,R303 +0x00001B00: 0xD001B030 vabs.t R400,R400 +0x00001B04: 0xD001B131 vabs.t R401,R401 +0x00001B08: 0xD001B232 vabs.t R402,R402 +0x00001B0C: 0xD001B333 vabs.t R403,R403 +0x00001B10: 0xD001B434 vabs.t R500,R500 +0x00001B14: 0xD001B535 vabs.t R501,R501 +0x00001B18: 0xD001B636 vabs.t R502,R502 +0x00001B1C: 0xD001B737 vabs.t R503,R503 +0x00001B20: 0xD001B838 vabs.t R600,R600 +0x00001B24: 0xD001B939 vabs.t R601,R601 +0x00001B28: 0xD001BA3A vabs.t R602,R602 +0x00001B2C: 0xD001BB3B vabs.t R603,R603 +0x00001B30: 0xD001BC3C vabs.t R700,R700 +0x00001B34: 0xD001BD3D vabs.t R701,R701 +0x00001B38: 0xD001BE3E vabs.t R702,R702 +0x00001B3C: 0xD001BF3F vabs.t R703,R703 +0x00001B40: 0xD001C040 vabs.t C001,C001 +0x00001B44: 0xD001C141 vabs.t C011,C011 +0x00001B48: 0xD001C242 vabs.t C021,C021 +0x00001B4C: 0xD001C343 vabs.t C031,C031 +0x00001B50: 0xD001C444 vabs.t C101,C101 +0x00001B54: 0xD001C545 vabs.t C111,C111 +0x00001B58: 0xD001C646 vabs.t C121,C121 +0x00001B5C: 0xD001C747 vabs.t C131,C131 +0x00001B60: 0xD001C848 vabs.t C201,C201 +0x00001B64: 0xD001C949 vabs.t C211,C211 +0x00001B68: 0xD001CA4A vabs.t C221,C221 +0x00001B6C: 0xD001CB4B vabs.t C231,C231 +0x00001B70: 0xD001CC4C vabs.t C301,C301 +0x00001B74: 0xD001CD4D vabs.t C311,C311 +0x00001B78: 0xD001CE4E vabs.t C321,C321 +0x00001B7C: 0xD001CF4F vabs.t C331,C331 +0x00001B80: 0xD001D050 vabs.t C401,C401 +0x00001B84: 0xD001D151 vabs.t C411,C411 +0x00001B88: 0xD001D252 vabs.t C421,C421 +0x00001B8C: 0xD001D353 vabs.t C431,C431 +0x00001B90: 0xD001D454 vabs.t C501,C501 +0x00001B94: 0xD001D555 vabs.t C511,C511 +0x00001B98: 0xD001D656 vabs.t C521,C521 +0x00001B9C: 0xD001D757 vabs.t C531,C531 +0x00001BA0: 0xD001D858 vabs.t C601,C601 +0x00001BA4: 0xD001D959 vabs.t C611,C611 +0x00001BA8: 0xD001DA5A vabs.t C621,C621 +0x00001BAC: 0xD001DB5B vabs.t C631,C631 +0x00001BB0: 0xD001DC5C vabs.t C701,C701 +0x00001BB4: 0xD001DD5D vabs.t C711,C711 +0x00001BB8: 0xD001DE5E vabs.t C721,C721 +0x00001BBC: 0xD001DF5F vabs.t C731,C731 +0x00001BC0: 0xD001E060 vabs.t R010,R010 +0x00001BC4: 0xD001E161 vabs.t R011,R011 +0x00001BC8: 0xD001E262 vabs.t R012,R012 +0x00001BCC: 0xD001E363 vabs.t R013,R013 +0x00001BD0: 0xD001E464 vabs.t R110,R110 +0x00001BD4: 0xD001E565 vabs.t R111,R111 +0x00001BD8: 0xD001E666 vabs.t R112,R112 +0x00001BDC: 0xD001E767 vabs.t R113,R113 +0x00001BE0: 0xD001E868 vabs.t R210,R210 +0x00001BE4: 0xD001E969 vabs.t R211,R211 +0x00001BE8: 0xD001EA6A vabs.t R212,R212 +0x00001BEC: 0xD001EB6B vabs.t R213,R213 +0x00001BF0: 0xD001EC6C vabs.t R310,R310 +0x00001BF4: 0xD001ED6D vabs.t R311,R311 +0x00001BF8: 0xD001EE6E vabs.t R312,R312 +0x00001BFC: 0xD001EF6F vabs.t R313,R313 +0x00001C00: 0xD001F070 vabs.t R410,R410 +0x00001C04: 0xD001F171 vabs.t R411,R411 +0x00001C08: 0xD001F272 vabs.t R412,R412 +0x00001C0C: 0xD001F373 vabs.t R413,R413 +0x00001C10: 0xD001F474 vabs.t R510,R510 +0x00001C14: 0xD001F575 vabs.t R511,R511 +0x00001C18: 0xD001F676 vabs.t R512,R512 +0x00001C1C: 0xD001F777 vabs.t R513,R513 +0x00001C20: 0xD001F878 vabs.t R610,R610 +0x00001C24: 0xD001F979 vabs.t R611,R611 +0x00001C28: 0xD001FA7A vabs.t R612,R612 +0x00001C2C: 0xD001FB7B vabs.t R613,R613 +0x00001C30: 0xD001FC7C vabs.t R710,R710 +0x00001C34: 0xD001FD7D vabs.t R711,R711 +0x00001C38: 0xD001FE7E vabs.t R712,R712 +0x00001C3C: 0xD001FF7F vabs.t R713,R713 +0x00001C40: 0xD0018080 vabs.q C000,C000 +0x00001C44: 0xD0018181 vabs.q C010,C010 +0x00001C48: 0xD0018282 vabs.q C020,C020 +0x00001C4C: 0xD0018383 vabs.q C030,C030 +0x00001C50: 0xD0018484 vabs.q C100,C100 +0x00001C54: 0xD0018585 vabs.q C110,C110 +0x00001C58: 0xD0018686 vabs.q C120,C120 +0x00001C5C: 0xD0018787 vabs.q C130,C130 +0x00001C60: 0xD0018888 vabs.q C200,C200 +0x00001C64: 0xD0018989 vabs.q C210,C210 +0x00001C68: 0xD0018A8A vabs.q C220,C220 +0x00001C6C: 0xD0018B8B vabs.q C230,C230 +0x00001C70: 0xD0018C8C vabs.q C300,C300 +0x00001C74: 0xD0018D8D vabs.q C310,C310 +0x00001C78: 0xD0018E8E vabs.q C320,C320 +0x00001C7C: 0xD0018F8F vabs.q C330,C330 +0x00001C80: 0xD0019090 vabs.q C400,C400 +0x00001C84: 0xD0019191 vabs.q C410,C410 +0x00001C88: 0xD0019292 vabs.q C420,C420 +0x00001C8C: 0xD0019393 vabs.q C430,C430 +0x00001C90: 0xD0019494 vabs.q C500,C500 +0x00001C94: 0xD0019595 vabs.q C510,C510 +0x00001C98: 0xD0019696 vabs.q C520,C520 +0x00001C9C: 0xD0019797 vabs.q C530,C530 +0x00001CA0: 0xD0019898 vabs.q C600,C600 +0x00001CA4: 0xD0019999 vabs.q C610,C610 +0x00001CA8: 0xD0019A9A vabs.q C620,C620 +0x00001CAC: 0xD0019B9B vabs.q C630,C630 +0x00001CB0: 0xD0019C9C vabs.q C700,C700 +0x00001CB4: 0xD0019D9D vabs.q C710,C710 +0x00001CB8: 0xD0019E9E vabs.q C720,C720 +0x00001CBC: 0xD0019F9F vabs.q C730,C730 +0x00001CC0: 0xD001A0A0 vabs.q R000,R000 +0x00001CC4: 0xD001A1A1 vabs.q R001,R001 +0x00001CC8: 0xD001A2A2 vabs.q R002,R002 +0x00001CCC: 0xD001A3A3 vabs.q R003,R003 +0x00001CD0: 0xD001A4A4 vabs.q R100,R100 +0x00001CD4: 0xD001A5A5 vabs.q R101,R101 +0x00001CD8: 0xD001A6A6 vabs.q R102,R102 +0x00001CDC: 0xD001A7A7 vabs.q R103,R103 +0x00001CE0: 0xD001A8A8 vabs.q R200,R200 +0x00001CE4: 0xD001A9A9 vabs.q R201,R201 +0x00001CE8: 0xD001AAAA vabs.q R202,R202 +0x00001CEC: 0xD001ABAB vabs.q R203,R203 +0x00001CF0: 0xD001ACAC vabs.q R300,R300 +0x00001CF4: 0xD001ADAD vabs.q R301,R301 +0x00001CF8: 0xD001AEAE vabs.q R302,R302 +0x00001CFC: 0xD001AFAF vabs.q R303,R303 +0x00001D00: 0xD001B0B0 vabs.q R400,R400 +0x00001D04: 0xD001B1B1 vabs.q R401,R401 +0x00001D08: 0xD001B2B2 vabs.q R402,R402 +0x00001D0C: 0xD001B3B3 vabs.q R403,R403 +0x00001D10: 0xD001B4B4 vabs.q R500,R500 +0x00001D14: 0xD001B5B5 vabs.q R501,R501 +0x00001D18: 0xD001B6B6 vabs.q R502,R502 +0x00001D1C: 0xD001B7B7 vabs.q R503,R503 +0x00001D20: 0xD001B8B8 vabs.q R600,R600 +0x00001D24: 0xD001B9B9 vabs.q R601,R601 +0x00001D28: 0xD001BABA vabs.q R602,R602 +0x00001D2C: 0xD001BBBB vabs.q R603,R603 +0x00001D30: 0xD001BCBC vabs.q R700,R700 +0x00001D34: 0xD001BDBD vabs.q R701,R701 +0x00001D38: 0xD001BEBE vabs.q R702,R702 +0x00001D3C: 0xD001BFBF vabs.q R703,R703 +0x00001D40: 0xD001C0C0 vabs.q C002,C002 +0x00001D44: 0xD001C1C1 vabs.q C012,C012 +0x00001D48: 0xD001C2C2 vabs.q C022,C022 +0x00001D4C: 0xD001C3C3 vabs.q C032,C032 +0x00001D50: 0xD001C4C4 vabs.q C102,C102 +0x00001D54: 0xD001C5C5 vabs.q C112,C112 +0x00001D58: 0xD001C6C6 vabs.q C122,C122 +0x00001D5C: 0xD001C7C7 vabs.q C132,C132 +0x00001D60: 0xD001C8C8 vabs.q C202,C202 +0x00001D64: 0xD001C9C9 vabs.q C212,C212 +0x00001D68: 0xD001CACA vabs.q C222,C222 +0x00001D6C: 0xD001CBCB vabs.q C232,C232 +0x00001D70: 0xD001CCCC vabs.q C302,C302 +0x00001D74: 0xD001CDCD vabs.q C312,C312 +0x00001D78: 0xD001CECE vabs.q C322,C322 +0x00001D7C: 0xD001CFCF vabs.q C332,C332 +0x00001D80: 0xD001D0D0 vabs.q C402,C402 +0x00001D84: 0xD001D1D1 vabs.q C412,C412 +0x00001D88: 0xD001D2D2 vabs.q C422,C422 +0x00001D8C: 0xD001D3D3 vabs.q C432,C432 +0x00001D90: 0xD001D4D4 vabs.q C502,C502 +0x00001D94: 0xD001D5D5 vabs.q C512,C512 +0x00001D98: 0xD001D6D6 vabs.q C522,C522 +0x00001D9C: 0xD001D7D7 vabs.q C532,C532 +0x00001DA0: 0xD001D8D8 vabs.q C602,C602 +0x00001DA4: 0xD001D9D9 vabs.q C612,C612 +0x00001DA8: 0xD001DADA vabs.q C622,C622 +0x00001DAC: 0xD001DBDB vabs.q C632,C632 +0x00001DB0: 0xD001DCDC vabs.q C702,C702 +0x00001DB4: 0xD001DDDD vabs.q C712,C712 +0x00001DB8: 0xD001DEDE vabs.q C722,C722 +0x00001DBC: 0xD001DFDF vabs.q C732,C732 +0x00001DC0: 0xD001E0E0 vabs.q R020,R020 +0x00001DC4: 0xD001E1E1 vabs.q R021,R021 +0x00001DC8: 0xD001E2E2 vabs.q R022,R022 +0x00001DCC: 0xD001E3E3 vabs.q R023,R023 +0x00001DD0: 0xD001E4E4 vabs.q R120,R120 +0x00001DD4: 0xD001E5E5 vabs.q R121,R121 +0x00001DD8: 0xD001E6E6 vabs.q R122,R122 +0x00001DDC: 0xD001E7E7 vabs.q R123,R123 +0x00001DE0: 0xD001E8E8 vabs.q R220,R220 +0x00001DE4: 0xD001E9E9 vabs.q R221,R221 +0x00001DE8: 0xD001EAEA vabs.q R222,R222 +0x00001DEC: 0xD001EBEB vabs.q R223,R223 +0x00001DF0: 0xD001ECEC vabs.q R320,R320 +0x00001DF4: 0xD001EDED vabs.q R321,R321 +0x00001DF8: 0xD001EEEE vabs.q R322,R322 +0x00001DFC: 0xD001EFEF vabs.q R323,R323 +0x00001E00: 0xD001F0F0 vabs.q R420,R420 +0x00001E04: 0xD001F1F1 vabs.q R421,R421 +0x00001E08: 0xD001F2F2 vabs.q R422,R422 +0x00001E0C: 0xD001F3F3 vabs.q R423,R423 +0x00001E10: 0xD001F4F4 vabs.q R520,R520 +0x00001E14: 0xD001F5F5 vabs.q R521,R521 +0x00001E18: 0xD001F6F6 vabs.q R522,R522 +0x00001E1C: 0xD001F7F7 vabs.q R523,R523 +0x00001E20: 0xD001F8F8 vabs.q R620,R620 +0x00001E24: 0xD001F9F9 vabs.q R621,R621 +0x00001E28: 0xD001FAFA vabs.q R622,R622 +0x00001E2C: 0xD001FBFB vabs.q R623,R623 +0x00001E30: 0xD001FCFC vabs.q R720,R720 +0x00001E34: 0xD001FDFD vabs.q R721,R721 +0x00001E38: 0xD001FEFE vabs.q R722,R722 +0x00001E3C: 0xD001FFFF vabs.q R723,R723 +0x00001E40: 0x03E00008 jr ra +0x00001E44: 0x00000000 nop + +vfpu0_all: +0x00001E48: 0x60001040 vadd.s S002,S400,S000 +0x00001E4C: 0x600010C0 vadd.p C002,C400,C000 +0x00001E50: 0x60009040 vadd.t C001,C400,C000 04 (00001E4C) REG +0x00001E54: 0x600090C0 vadd.q C002,C400,C000 04 (00001E50) REG +0x00001E58: 0x60801040 vsub.s S002,S400,S000 04 (00001E54) REG +0x00001E5C: 0x608010C0 vsub.p C002,C400,C000 +0x00001E60: 0x60809040 vsub.t C001,C400,C000 04 (00001E5C) REG +0x00001E64: 0x608090C0 vsub.q C002,C400,C000 04 (00001E60) REG +0x00001E68: 0x61001040 vsbn.s S002,S400,S000 04 (00001E64) REG +0x00001E6C: 0x610010C0 illegal +0x00001E70: 0x61009040 illegal +0x00001E74: 0x610090C0 illegal +0x00001E78: 0x61801040 illegal +0x00001E7C: 0x618010C0 illegal +0x00001E80: 0x61809040 illegal +0x00001E84: 0x618090C0 illegal +0x00001E88: 0x62001040 illegal +0x00001E8C: 0x620010C0 illegal +0x00001E90: 0x62009040 illegal +0x00001E94: 0x620090C0 illegal +0x00001E98: 0x62801040 illegal +0x00001E9C: 0x628010C0 illegal +0x00001EA0: 0x62809040 illegal +0x00001EA4: 0x628090C0 illegal +0x00001EA8: 0x63001040 illegal +0x00001EAC: 0x630010C0 illegal +0x00001EB0: 0x63009040 illegal +0x00001EB4: 0x630090C0 illegal +0x00001EB8: 0x63801040 vdiv.s S002,S400,S000 +0x00001EBC: 0x638010C0 vdiv.p C002,C400,C000 13 (00001EB8) PITCH +0x00001EC0: 0x63809040 vdiv.t C001,C400,C000 30 (00001EBC) PITCH REG +0x00001EC4: 0x638090C0 vdiv.q C002,C400,C000 44 (00001EC0) PITCH REG +0x00001EC8: 0x03E00008 jr ra +0x00001ECC: 0x00000000 nop + +vfpu1_all: +0x00001ED0: 0x64001040 vmul.s S002,S400,S000 +0x00001ED4: 0x640010C0 vmul.p C002,C400,C000 +0x00001ED8: 0x64009040 vmul.t C001,C400,C000 04 (00001ED4) REG +0x00001EDC: 0x640090C0 vmul.q C002,C400,C000 04 (00001ED8) REG +0x00001EE0: 0x64801040 illegal +0x00001EE4: 0x648010C0 vdot.p S002,C400,C000 03 (00001EDC) REG +0x00001EE8: 0x64809040 vdot.t S002,C400,C000 06 (00001EE4) REG +0x00001EEC: 0x648090C0 vdot.q S002,C400,C000 06 (00001EE8) REG +0x00001EF0: 0x65001040 illegal +0x00001EF4: 0x650010C0 vscl.p C002,C400,S000 +0x00001EF8: 0x65009040 vscl.t C001,C400,S000 +0x00001EFC: 0x650090C0 vscl.q C002,C400,S000 +0x00001F00: 0x65801040 illegal +0x00001F04: 0x658010C0 illegal +0x00001F08: 0x65809040 illegal +0x00001F0C: 0x658090C0 illegal +0x00001F10: 0x66001040 illegal +0x00001F14: 0x660010C0 vhdp.p S002,C400,C000 +0x00001F18: 0x66009040 vhdp.t S002,C400,C000 06 (00001F14) REG +0x00001F1C: 0x660090C0 vhdp.q S002,C400,C000 06 (00001F18) REG +0x00001F20: 0x66801040 illegal +0x00001F24: 0x668010C0 illegal +0x00001F28: 0x66809040 vcrs.t C001,C400,C000 04 (00001F1C) REG +0x00001F2C: 0x668090C0 illegal +0x00001F30: 0x67001040 illegal +0x00001F34: 0x670010C0 vdet.p S002,C400,C000 02 (00001F28) REG +0x00001F38: 0x67009040 illegal +0x00001F3C: 0x670090C0 illegal +0x00001F40: 0x67801040 illegal +0x00001F44: 0x678010C0 illegal +0x00001F48: 0x67809040 illegal +0x00001F4C: 0x678090C0 illegal +0x00001F50: 0x03E00008 jr ra +0x00001F54: 0x00000000 nop + +vfpu3_all: +0x00001F58: 0x6C401001 vcmp.s eq,S400,S002 +0x00001F5C: 0x6C401081 vcmp.p eq,C400,C002 +0x00001F60: 0x6C409001 vcmp.t eq,C400,C001 +0x00001F64: 0x6C409081 vcmp.q eq,C400,C002 +0x00001F68: 0x6CC01001 illegal +0x00001F6C: 0x6CC01081 illegal +0x00001F70: 0x6CC09001 illegal +0x00001F74: 0x6CC09081 illegal +0x00001F78: 0x6D401001 vmin.s S010,S400,S002 +0x00001F7C: 0x6D401081 vmin.p C010,C400,C002 +0x00001F80: 0x6D409001 vmin.t C010,C400,C001 +0x00001F84: 0x6D409081 vmin.q C010,C400,C002 +0x00001F88: 0x6DC01001 vmax.s S010,S400,S002 +0x00001F8C: 0x6DC01081 vmax.p C010,C400,C002 +0x00001F90: 0x6DC09001 vmax.t C010,C400,C001 +0x00001F94: 0x6DC09081 vmax.q C010,C400,C002 +0x00001F98: 0x6E401001 illegal +0x00001F9C: 0x6E401081 illegal +0x00001FA0: 0x6E409001 illegal +0x00001FA4: 0x6E409081 illegal +0x00001FA8: 0x6EC01001 vscmp.s S010,S400,S002 +0x00001FAC: 0x6EC01081 vscmp.p C010,C400,C002 +0x00001FB0: 0x6EC09001 vscmp.t C010,C400,C001 +0x00001FB4: 0x6EC09081 vscmp.q C010,C400,C002 +0x00001FB8: 0x6F401001 vsge.s S010,S400,S002 +0x00001FBC: 0x6F401081 vsge.p C010,C400,C002 +0x00001FC0: 0x6F409001 vsge.t C010,C400,C001 +0x00001FC4: 0x6F409081 vsge.q C010,C400,C002 +0x00001FC8: 0x6FC01001 vslt.s S010,S400,S002 +0x00001FCC: 0x6FC01081 vslt.p C010,C400,C002 +0x00001FD0: 0x6FC09001 vslt.t C010,C400,C001 +0x00001FD4: 0x6FC09081 vslt.q C010,C400,C002 +0x00001FD8: 0x03E00008 jr ra +0x00001FDC: 0x00000000 nop + +vcmp_all: +0x00001FE0: 0x6C400800 vcmp.s fl +0x00001FE4: 0x6C400880 vcmp.p fl +0x00001FE8: 0x6C408800 vcmp.t fl +0x00001FEC: 0x6C408880 vcmp.q fl +0x00001FF0: 0x6C400801 vcmp.s eq,S200,S002 +0x00001FF4: 0x6C400881 vcmp.p eq,C200,C002 +0x00001FF8: 0x6C408801 vcmp.t eq,C200,C001 +0x00001FFC: 0x6C408881 vcmp.q eq,C200,C002 +0x00002000: 0x6C400802 vcmp.s lt,S200,S002 +0x00002004: 0x6C400882 vcmp.p lt,C200,C002 +0x00002008: 0x6C408802 vcmp.t lt,C200,C001 +0x0000200C: 0x6C408882 vcmp.q lt,C200,C002 +0x00002010: 0x6C400803 vcmp.s le,S200,S002 +0x00002014: 0x6C400883 vcmp.p le,C200,C002 +0x00002018: 0x6C408803 vcmp.t le,C200,C001 +0x0000201C: 0x6C408883 vcmp.q le,C200,C002 +0x00002020: 0x6C400804 vcmp.s tr +0x00002024: 0x6C400884 vcmp.p tr +0x00002028: 0x6C408804 vcmp.t tr +0x0000202C: 0x6C408884 vcmp.q tr +0x00002030: 0x6C400805 vcmp.s ne,S200,S002 +0x00002034: 0x6C400885 vcmp.p ne,C200,C002 +0x00002038: 0x6C408805 vcmp.t ne,C200,C001 +0x0000203C: 0x6C408885 vcmp.q ne,C200,C002 +0x00002040: 0x6C400806 vcmp.s ge,S200,S002 +0x00002044: 0x6C400886 vcmp.p ge,C200,C002 +0x00002048: 0x6C408806 vcmp.t ge,C200,C001 +0x0000204C: 0x6C408886 vcmp.q ge,C200,C002 +0x00002050: 0x6C400807 vcmp.s gt,S200,S002 +0x00002054: 0x6C400887 vcmp.p gt,C200,C002 +0x00002058: 0x6C408807 vcmp.t gt,C200,C001 +0x0000205C: 0x6C408887 vcmp.q gt,C200,C002 +0x00002060: 0x6C400808 vcmp.s ez,S200 +0x00002064: 0x6C400888 vcmp.p ez,C200 +0x00002068: 0x6C408808 vcmp.t ez,C200 +0x0000206C: 0x6C408888 vcmp.q ez,C200 +0x00002070: 0x6C400809 vcmp.s en,S200 +0x00002074: 0x6C400889 vcmp.p en,C200 +0x00002078: 0x6C408809 vcmp.t en,C200 +0x0000207C: 0x6C408889 vcmp.q en,C200 +0x00002080: 0x6C40080A vcmp.s ei,S200 +0x00002084: 0x6C40088A vcmp.p ei,C200 +0x00002088: 0x6C40880A vcmp.t ei,C200 +0x0000208C: 0x6C40888A vcmp.q ei,C200 +0x00002090: 0x6C40080B vcmp.s es,S200 +0x00002094: 0x6C40088B vcmp.p es,C200 +0x00002098: 0x6C40880B vcmp.t es,C200 +0x0000209C: 0x6C40888B vcmp.q es,C200 +0x000020A0: 0x6C40080C vcmp.s nz,S200 +0x000020A4: 0x6C40088C vcmp.p nz,C200 +0x000020A8: 0x6C40880C vcmp.t nz,C200 +0x000020AC: 0x6C40888C vcmp.q nz,C200 +0x000020B0: 0x6C40080D vcmp.s nn,S200 +0x000020B4: 0x6C40088D vcmp.p nn,C200 +0x000020B8: 0x6C40880D vcmp.t nn,C200 +0x000020BC: 0x6C40888D vcmp.q nn,C200 +0x000020C0: 0x6C40080E vcmp.s ni,S200 +0x000020C4: 0x6C40088E vcmp.p ni,C200 +0x000020C8: 0x6C40880E vcmp.t ni,C200 +0x000020CC: 0x6C40888E vcmp.q ni,C200 +0x000020D0: 0x6C40080F vcmp.s ns,S200 +0x000020D4: 0x6C40088F vcmp.p ns,C200 +0x000020D8: 0x6C40880F vcmp.t ns,C200 +0x000020DC: 0x6C40888F vcmp.q ns,C200 +0x000020E0: 0x03E00008 jr ra +0x000020E4: 0x00000000 nop + +vcmp_zero: +0x000020E8: 0x6C000000 vcmp.s fl +0x000020EC: 0x6C000080 vcmp.p fl +0x000020F0: 0x6C008000 vcmp.t fl +0x000020F4: 0x6C008080 vcmp.q fl +0x000020F8: 0x6C000001 vcmp.s eq,S000,S000 +0x000020FC: 0x6C000081 vcmp.p eq,C000,C000 +0x00002100: 0x6C008001 vcmp.t eq,C000,C000 +0x00002104: 0x6C008081 vcmp.q eq,C000,C000 +0x00002108: 0x6C000002 vcmp.s lt,S000,S000 +0x0000210C: 0x6C000082 vcmp.p lt,C000,C000 +0x00002110: 0x6C008002 vcmp.t lt,C000,C000 +0x00002114: 0x6C008082 vcmp.q lt,C000,C000 +0x00002118: 0x6C000003 vcmp.s le,S000,S000 +0x0000211C: 0x6C000083 vcmp.p le,C000,C000 +0x00002120: 0x6C008003 vcmp.t le,C000,C000 +0x00002124: 0x6C008083 vcmp.q le,C000,C000 +0x00002128: 0x6C000004 vcmp.s tr +0x0000212C: 0x6C000084 vcmp.p tr +0x00002130: 0x6C008004 vcmp.t tr +0x00002134: 0x6C008084 vcmp.q tr +0x00002138: 0x6C000005 vcmp.s ne,S000,S000 +0x0000213C: 0x6C000085 vcmp.p ne,C000,C000 +0x00002140: 0x6C008005 vcmp.t ne,C000,C000 +0x00002144: 0x6C008085 vcmp.q ne,C000,C000 +0x00002148: 0x6C000006 vcmp.s ge,S000,S000 +0x0000214C: 0x6C000086 vcmp.p ge,C000,C000 +0x00002150: 0x6C008006 vcmp.t ge,C000,C000 +0x00002154: 0x6C008086 vcmp.q ge,C000,C000 +0x00002158: 0x6C000007 vcmp.s gt,S000,S000 +0x0000215C: 0x6C000087 vcmp.p gt,C000,C000 +0x00002160: 0x6C008007 vcmp.t gt,C000,C000 +0x00002164: 0x6C008087 vcmp.q gt,C000,C000 +0x00002168: 0x6C000008 vcmp.s ez,S000 +0x0000216C: 0x6C000088 vcmp.p ez,C000 +0x00002170: 0x6C008008 vcmp.t ez,C000 +0x00002174: 0x6C008088 vcmp.q ez,C000 +0x00002178: 0x6C000009 vcmp.s en,S000 +0x0000217C: 0x6C000089 vcmp.p en,C000 +0x00002180: 0x6C008009 vcmp.t en,C000 +0x00002184: 0x6C008089 vcmp.q en,C000 +0x00002188: 0x6C00000A vcmp.s ei,S000 +0x0000218C: 0x6C00008A vcmp.p ei,C000 +0x00002190: 0x6C00800A vcmp.t ei,C000 +0x00002194: 0x6C00808A vcmp.q ei,C000 +0x00002198: 0x6C00000B vcmp.s es,S000 +0x0000219C: 0x6C00008B vcmp.p es,C000 +0x000021A0: 0x6C00800B vcmp.t es,C000 +0x000021A4: 0x6C00808B vcmp.q es,C000 +0x000021A8: 0x6C00000C vcmp.s nz,S000 +0x000021AC: 0x6C00008C vcmp.p nz,C000 +0x000021B0: 0x6C00800C vcmp.t nz,C000 +0x000021B4: 0x6C00808C vcmp.q nz,C000 +0x000021B8: 0x6C00000D vcmp.s nn,S000 +0x000021BC: 0x6C00008D vcmp.p nn,C000 +0x000021C0: 0x6C00800D vcmp.t nn,C000 +0x000021C4: 0x6C00808D vcmp.q nn,C000 +0x000021C8: 0x6C00000E vcmp.s ni,S000 +0x000021CC: 0x6C00008E vcmp.p ni,C000 +0x000021D0: 0x6C00800E vcmp.t ni,C000 +0x000021D4: 0x6C00808E vcmp.q ni,C000 +0x000021D8: 0x6C00000F vcmp.s ns,S000 +0x000021DC: 0x6C00008F vcmp.p ns,C000 +0x000021E0: 0x6C00800F vcmp.t ns,C000 +0x000021E4: 0x6C00808F vcmp.q ns,C000 +0x000021E8: 0x03E00008 jr ra +0x000021EC: 0x00000000 nop + +mfvc_test: +0x000021F0: 0x48640080 mfvc a0,VFPU_PFXS +0x000021F4: 0x48640081 mfvc a0,VFPU_PFXT 06 (000021F0) PITCH +0x000021F8: 0x48640082 mfvc a0,VFPU_PFXD 06 (000021F4) PITCH +0x000021FC: 0x48640083 mfvc a0,VFPU_CC 06 (000021F8) PITCH +0x00002200: 0x48640084 mfvc a0,VFPU_INF4 06 (000021FC) PITCH +0x00002204: 0x48640085 mfvc a0,VFPU_RSV5 06 (00002200) PITCH +0x00002208: 0x48640086 mfvc a0,VFPU_RSV6 06 (00002204) PITCH +0x0000220C: 0x48640087 mfvc a0,VFPU_REV 06 (00002208) PITCH +0x00002210: 0x48640088 mfvc a0,VFPU_RCX0 06 (0000220C) PITCH +0x00002214: 0x48640089 mfvc a0,VFPU_RCX1 06 (00002210) PITCH +0x00002218: 0x4864008A mfvc a0,VFPU_RCX2 06 (00002214) PITCH +0x0000221C: 0x4864008B mfvc a0,VFPU_RCX3 06 (00002218) PITCH +0x00002220: 0x4864008C mfvc a0,VFPU_RCX4 06 (0000221C) PITCH +0x00002224: 0x4864008D mfvc a0,VFPU_RCX5 06 (00002220) PITCH +0x00002228: 0x4864008E mfvc a0,VFPU_RCX6 06 (00002224) PITCH +0x0000222C: 0x4864008F mfvc a0,VFPU_RCX7 06 (00002228) PITCH +0x00002230: 0x00000000 nop +0x00002234: 0x48640090 mfvc a0,0x90 05 (0000222C) PITCH +0x00002238: 0x48640091 mfvc a0,0x91 06 (00002234) PITCH +0x0000223C: 0x48640092 mfvc a0,0x92 06 (00002238) PITCH +0x00002240: 0x03E00008 jr ra +0x00002244: 0x00000000 nop + +cop2_test: +0x00002248: 0x486000FF vsync2 +0x0000224C: 0x48650000 mfv a1,S000 06 (00002248) PITCH +0x00002250: 0x48650081 mfvc a1,VFPU_PFXT 06 (0000224C) PITCH +0x00002254: 0x48E50000 mtv a1,S000 06 (00002250) PITCH +0x00002258: 0x48E50081 mtvc a1,VFPU_PFXT +0x0000225C: 0x03E00008 jr ra +0x00002260: 0x00000000 nop + +vfpu4_fmt0_all: +0x00002264: 0xD0001001 vmov.s S010,S400 +0x00002268: 0xD0001081 vmov.p C010,C400 +0x0000226C: 0xD0009001 vmov.t C010,C400 +0x00002270: 0xD0009081 vmov.q C010,C400 +0x00002274: 0xD0011001 vabs.s S010,S400 +0x00002278: 0xD0011081 vabs.p C010,C400 +0x0000227C: 0xD0019001 vabs.t C010,C400 +0x00002280: 0xD0019081 vabs.q C010,C400 +0x00002284: 0xD0021001 vneg.s S010,S400 +0x00002288: 0xD0021081 vneg.p C010,C400 +0x0000228C: 0xD0029001 vneg.t C010,C400 +0x00002290: 0xD0029081 vneg.q C010,C400 +0x00002294: 0xD0031001 vidt.s S010 +0x00002298: 0xD0031081 vidt.p C010 +0x0000229C: 0xD0039001 illegal +0x000022A0: 0xD0039081 vidt.q C010 +0x000022A4: 0xD0041001 vsat0.s S010,S400 +0x000022A8: 0xD0041081 vsat0.p C010,C400 +0x000022AC: 0xD0049001 vsat0.t C010,C400 +0x000022B0: 0xD0049081 vsat0.q C010,C400 +0x000022B4: 0xD0051001 vsat1.s S010,S400 +0x000022B8: 0xD0051081 vsat1.p C010,C400 +0x000022BC: 0xD0059001 vsat1.t C010,C400 +0x000022C0: 0xD0059081 vsat1.q C010,C400 +0x000022C4: 0xD0061001 vzero.s S010 +0x000022C8: 0xD0061081 vzero.p C010 +0x000022CC: 0xD0069001 vzero.t C010 +0x000022D0: 0xD0069081 vzero.q C010 +0x000022D4: 0xD0071001 vone.s S010 +0x000022D8: 0xD0071081 vone.p C010 +0x000022DC: 0xD0079001 vone.t C010 +0x000022E0: 0xD0079081 vone.q C010 +0x000022E4: 0xD0081001 illegal +0x000022E8: 0xD0081081 illegal +0x000022EC: 0xD0089001 illegal +0x000022F0: 0xD0089081 illegal +0x000022F4: 0xD0091001 illegal +0x000022F8: 0xD0091081 illegal +0x000022FC: 0xD0099001 illegal +0x00002300: 0xD0099081 illegal +0x00002304: 0xD00A1001 illegal +0x00002308: 0xD00A1081 illegal +0x0000230C: 0xD00A9001 illegal +0x00002310: 0xD00A9081 illegal +0x00002314: 0xD00B1001 illegal +0x00002318: 0xD00B1081 illegal +0x0000231C: 0xD00B9001 illegal +0x00002320: 0xD00B9081 illegal +0x00002324: 0xD00C1001 illegal +0x00002328: 0xD00C1081 illegal +0x0000232C: 0xD00C9001 illegal +0x00002330: 0xD00C9081 illegal +0x00002334: 0xD00D1001 illegal +0x00002338: 0xD00D1081 illegal +0x0000233C: 0xD00D9001 illegal +0x00002340: 0xD00D9081 illegal +0x00002344: 0xD00E1001 illegal +0x00002348: 0xD00E1081 illegal +0x0000234C: 0xD00E9001 illegal +0x00002350: 0xD00E9081 illegal +0x00002354: 0xD00F1001 illegal +0x00002358: 0xD00F1081 illegal +0x0000235C: 0xD00F9001 illegal +0x00002360: 0xD00F9081 illegal +0x00002364: 0xD0101001 vrcp.s S010,S400 +0x00002368: 0xD0101081 vrcp.p C010,C400 +0x0000236C: 0xD0109001 vrcp.t C010,C400 01 (00002368) PITCH +0x00002370: 0xD0109081 vrcp.q C010,C400 02 (0000236C) PITCH +0x00002374: 0xD0111001 vrsq.s S010,S400 03 (00002370) PITCH +0x00002378: 0xD0111081 vrsq.p C010,C400 +0x0000237C: 0xD0119001 vrsq.t C010,C400 01 (00002378) PITCH +0x00002380: 0xD0119081 vrsq.q C010,C400 02 (0000237C) PITCH +0x00002384: 0xD0121001 vsin.s S010,S400 03 (00002380) PITCH +0x00002388: 0xD0121081 vsin.p C010,C400 +0x0000238C: 0xD0129001 vsin.t C010,C400 01 (00002388) PITCH +0x00002390: 0xD0129081 vsin.q C010,C400 02 (0000238C) PITCH +0x00002394: 0xD0131001 vcos.s S010,S400 03 (00002390) PITCH +0x00002398: 0xD0131081 vcos.p C010,C400 +0x0000239C: 0xD0139001 vcos.t C010,C400 01 (00002398) PITCH +0x000023A0: 0xD0139081 vcos.q C010,C400 02 (0000239C) PITCH +0x000023A4: 0xD0141001 vexp2.s S010,S400 03 (000023A0) PITCH +0x000023A8: 0xD0141081 vexp2.p C010,C400 +0x000023AC: 0xD0149001 vexp2.t C010,C400 01 (000023A8) PITCH +0x000023B0: 0xD0149081 vexp2.q C010,C400 02 (000023AC) PITCH +0x000023B4: 0xD0151001 vlog2.s S010,S400 03 (000023B0) PITCH +0x000023B8: 0xD0151081 vlog2.p C010,C400 +0x000023BC: 0xD0159001 vlog2.t C010,C400 01 (000023B8) PITCH +0x000023C0: 0xD0159081 vlog2.q C010,C400 02 (000023BC) PITCH +0x000023C4: 0xD0161001 vsqrt.s S010,S400 03 (000023C0) PITCH +0x000023C8: 0xD0161081 vsqrt.p C010,C400 +0x000023CC: 0xD0169001 vsqrt.t C010,C400 01 (000023C8) PITCH +0x000023D0: 0xD0169081 vsqrt.q C010,C400 02 (000023CC) PITCH +0x000023D4: 0xD0171001 vasin.s S010,S400 03 (000023D0) PITCH +0x000023D8: 0xD0171081 vasin.p C010,C400 +0x000023DC: 0xD0179001 vasin.t C010,C400 01 (000023D8) PITCH +0x000023E0: 0xD0179081 vasin.q C010,C400 02 (000023DC) PITCH +0x000023E4: 0xD0181001 vnrcp.s S010,S400 03 (000023E0) PITCH +0x000023E8: 0xD0181081 vnrcp.p C010,C400 +0x000023EC: 0xD0189001 vnrcp.t C010,C400 01 (000023E8) PITCH +0x000023F0: 0xD0189081 vnrcp.q C010,C400 02 (000023EC) PITCH +0x000023F4: 0xD0191001 illegal 03 (000023F0) PITCH +0x000023F8: 0xD0191081 illegal +0x000023FC: 0xD0199001 illegal 01 (000023F8) PITCH +0x00002400: 0xD0199081 illegal 02 (000023FC) PITCH +0x00002404: 0xD01A1001 vnsin.s S010,S400 03 (00002400) PITCH +0x00002408: 0xD01A1081 vnsin.p C010,C400 +0x0000240C: 0xD01A9001 vnsin.t C010,C400 01 (00002408) PITCH +0x00002410: 0xD01A9081 vnsin.q C010,C400 02 (0000240C) PITCH +0x00002414: 0xD01B1001 illegal 03 (00002410) PITCH +0x00002418: 0xD01B1081 illegal +0x0000241C: 0xD01B9001 illegal 01 (00002418) PITCH +0x00002420: 0xD01B9081 illegal 02 (0000241C) PITCH +0x00002424: 0xD01C1001 vrexp2.s S010,S400 03 (00002420) PITCH +0x00002428: 0xD01C1081 vrexp2.p C010,C400 +0x0000242C: 0xD01C9001 vrexp2.t C010,C400 01 (00002428) PITCH +0x00002430: 0xD01C9081 vrexp2.q C010,C400 02 (0000242C) PITCH +0x00002434: 0xD01D1001 illegal 03 (00002430) PITCH +0x00002438: 0xD01D1081 illegal +0x0000243C: 0xD01D9001 illegal 01 (00002438) PITCH +0x00002440: 0xD01D9081 illegal 02 (0000243C) PITCH +0x00002444: 0xD01E1001 illegal 03 (00002440) PITCH +0x00002448: 0xD01E1081 illegal +0x0000244C: 0xD01E9001 illegal 01 (00002448) PITCH +0x00002450: 0xD01E9081 illegal 02 (0000244C) PITCH +0x00002454: 0xD01F1001 illegal 03 (00002450) PITCH +0x00002458: 0xD01F1081 illegal +0x0000245C: 0xD01F9001 illegal 01 (00002458) PITCH +0x00002460: 0xD01F9081 illegal 02 (0000245C) PITCH +0x00002464: 0xD0201001 vrnds.s S400 03 (00002460) PITCH +0x00002468: 0xD0201081 illegal 02 (00002464) PITCH +0x0000246C: 0xD0209001 illegal 05 (00002468) PITCH +0x00002470: 0xD0209081 illegal 08 (0000246C) PITCH +0x00002474: 0xD0211001 vrndi.s S010 11 (00002470) PITCH +0x00002478: 0xD0211081 vrndi.p C010 02 (00002474) PITCH +0x0000247C: 0xD0219001 vrndi.t C010 05 (00002478) PITCH +0x00002480: 0xD0219081 vrndi.q C010 08 (0000247C) PITCH +0x00002484: 0xD0221001 vrndf1.s S010 11 (00002480) PITCH +0x00002488: 0xD0221081 vrndf1.p C010 02 (00002484) PITCH +0x0000248C: 0xD0229001 vrndf1.t C010 05 (00002488) PITCH +0x00002490: 0xD0229081 vrndf1.q C010 08 (0000248C) PITCH +0x00002494: 0xD0231001 vrndf2.s S010 11 (00002490) PITCH +0x00002498: 0xD0231081 vrndf2.p C010 02 (00002494) PITCH +0x0000249C: 0xD0239001 vrndf2.t C010 05 (00002498) PITCH +0x000024A0: 0xD0239081 vrndf2.q C010 08 (0000249C) PITCH +0x000024A4: 0xD0241001 illegal 11 (000024A0) PITCH +0x000024A8: 0xD0241081 illegal 02 (000024A4) PITCH +0x000024AC: 0xD0249001 illegal 05 (000024A8) PITCH +0x000024B0: 0xD0249081 illegal 08 (000024AC) PITCH +0x000024B4: 0xD0251001 illegal 11 (000024B0) PITCH +0x000024B8: 0xD0251081 illegal 02 (000024B4) PITCH +0x000024BC: 0xD0259001 illegal 05 (000024B8) PITCH +0x000024C0: 0xD0259081 illegal 08 (000024BC) PITCH +0x000024C4: 0xD0261001 illegal 11 (000024C0) PITCH +0x000024C8: 0xD0261081 illegal 02 (000024C4) PITCH +0x000024CC: 0xD0269001 illegal 05 (000024C8) PITCH +0x000024D0: 0xD0269081 illegal 08 (000024CC) PITCH +0x000024D4: 0xD0271001 illegal 11 (000024D0) PITCH +0x000024D8: 0xD0271081 illegal 02 (000024D4) PITCH +0x000024DC: 0xD0279001 illegal 05 (000024D8) PITCH +0x000024E0: 0xD0279081 illegal 08 (000024DC) PITCH +0x000024E4: 0xD0281001 illegal 11 (000024E0) PITCH +0x000024E8: 0xD0281081 illegal 02 (000024E4) PITCH +0x000024EC: 0xD0289001 illegal 05 (000024E8) PITCH +0x000024F0: 0xD0289081 illegal 08 (000024EC) PITCH +0x000024F4: 0xD0291001 illegal 11 (000024F0) PITCH +0x000024F8: 0xD0291081 illegal 02 (000024F4) PITCH +0x000024FC: 0xD0299001 illegal 05 (000024F8) PITCH +0x00002500: 0xD0299081 illegal 08 (000024FC) PITCH +0x00002504: 0xD02A1001 illegal 11 (00002500) PITCH +0x00002508: 0xD02A1081 illegal 02 (00002504) PITCH +0x0000250C: 0xD02A9001 illegal 05 (00002508) PITCH +0x00002510: 0xD02A9081 illegal 08 (0000250C) PITCH +0x00002514: 0xD02B1001 illegal 11 (00002510) PITCH +0x00002518: 0xD02B1081 illegal 02 (00002514) PITCH +0x0000251C: 0xD02B9001 illegal 05 (00002518) PITCH +0x00002520: 0xD02B9081 illegal 08 (0000251C) PITCH +0x00002524: 0xD02C1001 illegal 11 (00002520) PITCH +0x00002528: 0xD02C1081 illegal 02 (00002524) PITCH +0x0000252C: 0xD02C9001 illegal 05 (00002528) PITCH +0x00002530: 0xD02C9081 illegal 08 (0000252C) PITCH +0x00002534: 0xD02D1001 illegal 11 (00002530) PITCH +0x00002538: 0xD02D1081 illegal 02 (00002534) PITCH +0x0000253C: 0xD02D9001 illegal 05 (00002538) PITCH +0x00002540: 0xD02D9081 illegal 08 (0000253C) PITCH +0x00002544: 0xD02E1001 illegal 11 (00002540) PITCH +0x00002548: 0xD02E1081 illegal 02 (00002544) PITCH +0x0000254C: 0xD02E9001 illegal 05 (00002548) PITCH +0x00002550: 0xD02E9081 illegal 08 (0000254C) PITCH +0x00002554: 0xD02F1001 illegal 11 (00002550) PITCH +0x00002558: 0xD02F1081 illegal 02 (00002554) PITCH +0x0000255C: 0xD02F9001 illegal 05 (00002558) PITCH +0x00002560: 0xD02F9081 illegal 08 (0000255C) PITCH +0x00002564: 0xD0301001 illegal 11 (00002560) PITCH +0x00002568: 0xD0301081 illegal 02 (00002564) PITCH +0x0000256C: 0xD0309001 illegal 05 (00002568) PITCH +0x00002570: 0xD0309081 illegal 08 (0000256C) PITCH +0x00002574: 0xD0311001 illegal 11 (00002570) PITCH +0x00002578: 0xD0311081 illegal 02 (00002574) PITCH +0x0000257C: 0xD0319001 illegal 05 (00002578) PITCH +0x00002580: 0xD0319081 illegal 08 (0000257C) PITCH +0x00002584: 0xD0321001 illegal 11 (00002580) PITCH +0x00002588: 0xD0321081 vf2h.p S010,C400 +0x0000258C: 0xD0329001 illegal +0x00002590: 0xD0329081 vf2h.q C010,C400 +0x00002594: 0xD0331001 vh2f.s C010,S400 +0x00002598: 0xD0331081 vh2f.p C010,C400 +0x0000259C: 0xD0339001 illegal +0x000025A0: 0xD0339081 illegal +0x000025A4: 0xD0341001 illegal 02 (000025A0) WAW +0x000025A8: 0xD0341081 illegal +0x000025AC: 0xD0349001 illegal +0x000025B0: 0xD0349081 illegal +0x000025B4: 0xD0351001 illegal +0x000025B8: 0xD0351081 illegal +0x000025BC: 0xD0359001 illegal +0x000025C0: 0xD0359081 illegal +0x000025C4: 0xD0361001 vsbz.s S010,S400 +0x000025C8: 0xD0361081 illegal +0x000025CC: 0xD0369001 illegal +0x000025D0: 0xD0369081 illegal +0x000025D4: 0xD0371001 vlgb.s S010,S400 +0x000025D8: 0xD0371081 illegal +0x000025DC: 0xD0379001 illegal +0x000025E0: 0xD0379081 illegal +0x000025E4: 0xD0381001 vuc2ifs.s C010,S400 02 (000025E0) WAW +0x000025E8: 0xD0381081 illegal +0x000025EC: 0xD0389001 illegal +0x000025F0: 0xD0389081 illegal +0x000025F4: 0xD0391001 vc2i.s C010,S400 +0x000025F8: 0xD0391081 illegal +0x000025FC: 0xD0399001 illegal +0x00002600: 0xD0399081 illegal +0x00002604: 0xD03A1001 vus2i.s C010,S400 +0x00002608: 0xD03A1081 vus2i.p C010,C400 +0x0000260C: 0xD03A9001 illegal +0x00002610: 0xD03A9081 illegal +0x00002614: 0xD03B1001 vs2i.s C010,S400 +0x00002618: 0xD03B1081 vs2i.p C010,C400 +0x0000261C: 0xD03B9001 illegal +0x00002620: 0xD03B9081 illegal +0x00002624: 0xD03C1001 illegal +0x00002628: 0xD03C1081 illegal +0x0000262C: 0xD03C9001 illegal +0x00002630: 0xD03C9081 vi2uc.q S010,C400 +0x00002634: 0xD03D1001 illegal +0x00002638: 0xD03D1081 illegal +0x0000263C: 0xD03D9001 illegal +0x00002640: 0xD03D9081 vi2c.q S010,C400 +0x00002644: 0xD03E1001 illegal +0x00002648: 0xD03E1081 vi2us.p S010,C400 +0x0000264C: 0xD03E9001 illegal +0x00002650: 0xD03E9081 vi2us.q C010,C400 +0x00002654: 0xD03F1001 illegal +0x00002658: 0xD03F1081 vi2s.p S010,C400 +0x0000265C: 0xD03F9001 illegal +0x00002660: 0xD03F9081 vi2s.q C010,C400 +0x00002664: 0xD0401001 illegal +0x00002668: 0xD0401081 illegal +0x0000266C: 0xD0409001 illegal +0x00002670: 0xD0409081 vsrt1.q C010,C400 +0x00002674: 0xD0411001 illegal +0x00002678: 0xD0411081 illegal +0x0000267C: 0xD0419001 illegal +0x00002680: 0xD0419081 vsrt2.q C010,C400 +0x00002684: 0xD0421001 illegal +0x00002688: 0xD0421081 vbfy1.pq C010,C400 +0x0000268C: 0xD0429001 illegal +0x00002690: 0xD0429081 vbfy1.pq C010,C400 +0x00002694: 0xD0431001 illegal +0x00002698: 0xD0431081 illegal +0x0000269C: 0xD0439001 illegal +0x000026A0: 0xD0439081 vbfy2.q C010,C400 +0x000026A4: 0xD0441001 vocp.s S010,S400 +0x000026A8: 0xD0441081 vocp.p C010,C400 +0x000026AC: 0xD0449001 vocp.t C010,C400 +0x000026B0: 0xD0449081 vocp.q C010,C400 +0x000026B4: 0xD0451001 vsocp.s C010,S400 +0x000026B8: 0xD0451081 vsocp.p C010,C400 +0x000026BC: 0xD0459001 illegal +0x000026C0: 0xD0459081 illegal +0x000026C4: 0xD0461001 illegal +0x000026C8: 0xD0461081 vfad.p S010,C400 +0x000026CC: 0xD0469001 vfad.t S010,C400 +0x000026D0: 0xD0469081 vfad.q S010,C400 +0x000026D4: 0xD0471001 illegal +0x000026D8: 0xD0471081 vavg.p S010,C400 +0x000026DC: 0xD0479001 vavg.t S010,C400 +0x000026E0: 0xD0479081 vavg.q S010,C400 +0x000026E4: 0xD0481001 illegal 02 (000026E0) WAW +0x000026E8: 0xD0481081 illegal +0x000026EC: 0xD0489001 illegal +0x000026F0: 0xD0489081 vsrt3.q C010,C400 +0x000026F4: 0xD0491001 illegal +0x000026F8: 0xD0491081 illegal +0x000026FC: 0xD0499001 illegal +0x00002700: 0xD0499081 vsrt4.q C010,C400 +0x00002704: 0xD04A1001 vsgn.s S010,S400 02 (00002700) WAW +0x00002708: 0xD04A1081 vsgn.p C010,C400 +0x0000270C: 0xD04A9001 vsgn.t C010,C400 +0x00002710: 0xD04A9081 vsgn.q C010,C400 +0x00002714: 0xD04B1001 illegal +0x00002718: 0xD04B1081 illegal +0x0000271C: 0xD04B9001 illegal +0x00002720: 0xD04B9081 illegal +0x00002724: 0xD04C1001 illegal +0x00002728: 0xD04C1081 illegal +0x0000272C: 0xD04C9001 illegal +0x00002730: 0xD04C9081 illegal +0x00002734: 0xD04D1001 illegal +0x00002738: 0xD04D1081 illegal +0x0000273C: 0xD04D9001 illegal +0x00002740: 0xD04D9081 illegal +0x00002744: 0xD04E1001 illegal +0x00002748: 0xD04E1081 illegal +0x0000274C: 0xD04E9001 illegal +0x00002750: 0xD04E9081 illegal +0x00002754: 0xD04F1001 illegal +0x00002758: 0xD04F1081 illegal +0x0000275C: 0xD04F9001 illegal +0x00002760: 0xD04F9081 illegal +0x00002764: 0xD0501001 vmfvc S010,0x10 02 (00002760) WAW +0x00002768: 0xD0501081 vmfvc S010,0x10 +0x0000276C: 0xD0509001 vmfvc S010,0x90 +0x00002770: 0xD0509081 vmfvc S010,0x90 +0x00002774: 0xD0511001 vmtvc 0x01,S400 +0x00002778: 0xD0511081 vmtvc VFPU_PFXT,S400 +0x0000277C: 0xD0519001 vmtvc 0x01,S400 +0x00002780: 0xD0519081 vmtvc VFPU_PFXT,S400 +0x00002784: 0xD0521001 illegal +0x00002788: 0xD0521081 illegal +0x0000278C: 0xD0529001 illegal +0x00002790: 0xD0529081 illegal +0x00002794: 0xD0531001 illegal +0x00002798: 0xD0531081 illegal +0x0000279C: 0xD0539001 illegal +0x000027A0: 0xD0539081 illegal +0x000027A4: 0xD0541001 illegal +0x000027A8: 0xD0541081 illegal +0x000027AC: 0xD0549001 illegal +0x000027B0: 0xD0549081 illegal +0x000027B4: 0xD0551001 illegal +0x000027B8: 0xD0551081 illegal +0x000027BC: 0xD0559001 illegal +0x000027C0: 0xD0559081 illegal +0x000027C4: 0xD0561001 illegal +0x000027C8: 0xD0561081 illegal +0x000027CC: 0xD0569001 illegal +0x000027D0: 0xD0569081 illegal +0x000027D4: 0xD0571001 illegal +0x000027D8: 0xD0571081 illegal +0x000027DC: 0xD0579001 illegal +0x000027E0: 0xD0579081 illegal +0x000027E4: 0xD0581001 illegal +0x000027E8: 0xD0581081 illegal +0x000027EC: 0xD0589001 illegal +0x000027F0: 0xD0589081 illegal +0x000027F4: 0xD0591001 illegal 02 (000027F0) WAW +0x000027F8: 0xD0591081 illegal +0x000027FC: 0xD0599001 illegal +0x00002800: 0xD0599081 vt4444.q C010,C400 +0x00002804: 0xD05A1001 illegal +0x00002808: 0xD05A1081 illegal +0x0000280C: 0xD05A9001 illegal +0x00002810: 0xD05A9081 vt5551.q C010,C400 +0x00002814: 0xD05B1001 illegal +0x00002818: 0xD05B1081 illegal +0x0000281C: 0xD05B9001 illegal +0x00002820: 0xD05B9081 vt5650.q C010,C400 +0x00002824: 0xD05C1001 illegal +0x00002828: 0xD05C1081 illegal +0x0000282C: 0xD05C9001 illegal +0x00002830: 0xD05C9081 illegal +0x00002834: 0xD05D1001 illegal +0x00002838: 0xD05D1081 illegal +0x0000283C: 0xD05D9001 illegal +0x00002840: 0xD05D9081 illegal +0x00002844: 0xD05E1001 illegal +0x00002848: 0xD05E1081 illegal +0x0000284C: 0xD05E9001 illegal +0x00002850: 0xD05E9081 illegal +0x00002854: 0xD05F1001 illegal +0x00002858: 0xD05F1081 illegal +0x0000285C: 0xD05F9001 illegal +0x00002860: 0xD05F9081 illegal +0x00002864: 0xD0601001 vcst.s S010,Undefined 02 (00002860) WAW +0x00002868: 0xD0601081 vcst.p C010,Undefined +0x0000286C: 0xD0609001 vcst.t C010,Undefined +0x00002870: 0xD0609081 vcst.q C010,Undefined +0x00002874: 0xD0611001 vcst.s S010,VFPU_HUGE +0x00002878: 0xD0611081 vcst.p C010,VFPU_HUGE +0x0000287C: 0xD0619001 vcst.t C010,VFPU_HUGE +0x00002880: 0xD0619081 vcst.q C010,VFPU_HUGE +0x00002884: 0xD0621001 vcst.s S010,VFPU_SQRT2 +0x00002888: 0xD0621081 vcst.p C010,VFPU_SQRT2 +0x0000288C: 0xD0629001 vcst.t C010,VFPU_SQRT2 +0x00002890: 0xD0629081 vcst.q C010,VFPU_SQRT2 +0x00002894: 0xD0631001 vcst.s S010,VFPU_SQRT1/2 +0x00002898: 0xD0631081 vcst.p C010,VFPU_SQRT1/2 +0x0000289C: 0xD0639001 vcst.t C010,VFPU_SQRT1/2 +0x000028A0: 0xD0639081 vcst.q C010,VFPU_SQRT1/2 +0x000028A4: 0xD0641001 vcst.s S010,VFPU_2/SQRTPI +0x000028A8: 0xD0641081 vcst.p C010,VFPU_2/SQRTPI +0x000028AC: 0xD0649001 vcst.t C010,VFPU_2/SQRTPI +0x000028B0: 0xD0649081 vcst.q C010,VFPU_2/SQRTPI +0x000028B4: 0xD0651001 vcst.s S010,VFPU_2/PI +0x000028B8: 0xD0651081 vcst.p C010,VFPU_2/PI +0x000028BC: 0xD0659001 vcst.t C010,VFPU_2/PI +0x000028C0: 0xD0659081 vcst.q C010,VFPU_2/PI +0x000028C4: 0xD0661001 vcst.s S010,VFPU_1/PI +0x000028C8: 0xD0661081 vcst.p C010,VFPU_1/PI +0x000028CC: 0xD0669001 vcst.t C010,VFPU_1/PI +0x000028D0: 0xD0669081 vcst.q C010,VFPU_1/PI +0x000028D4: 0xD0671001 vcst.s S010,VFPU_PI/4 +0x000028D8: 0xD0671081 vcst.p C010,VFPU_PI/4 +0x000028DC: 0xD0679001 vcst.t C010,VFPU_PI/4 +0x000028E0: 0xD0679081 vcst.q C010,VFPU_PI/4 +0x000028E4: 0xD0681001 vcst.s S010,VFPU_PI/2 +0x000028E8: 0xD0681081 vcst.p C010,VFPU_PI/2 +0x000028EC: 0xD0689001 vcst.t C010,VFPU_PI/2 +0x000028F0: 0xD0689081 vcst.q C010,VFPU_PI/2 +0x000028F4: 0xD0691001 vcst.s S010,VFPU_PI +0x000028F8: 0xD0691081 vcst.p C010,VFPU_PI +0x000028FC: 0xD0699001 vcst.t C010,VFPU_PI +0x00002900: 0xD0699081 vcst.q C010,VFPU_PI +0x00002904: 0xD06A1001 vcst.s S010,VFPU_E +0x00002908: 0xD06A1081 vcst.p C010,VFPU_E +0x0000290C: 0xD06A9001 vcst.t C010,VFPU_E +0x00002910: 0xD06A9081 vcst.q C010,VFPU_E +0x00002914: 0xD06B1001 vcst.s S010,VFPU_LOG2E +0x00002918: 0xD06B1081 vcst.p C010,VFPU_LOG2E +0x0000291C: 0xD06B9001 vcst.t C010,VFPU_LOG2E +0x00002920: 0xD06B9081 vcst.q C010,VFPU_LOG2E +0x00002924: 0xD06C1001 vcst.s S010,VFPU_LOG10E +0x00002928: 0xD06C1081 vcst.p C010,VFPU_LOG10E +0x0000292C: 0xD06C9001 vcst.t C010,VFPU_LOG10E +0x00002930: 0xD06C9081 vcst.q C010,VFPU_LOG10E +0x00002934: 0xD06D1001 vcst.s S010,VFPU_LN2 +0x00002938: 0xD06D1081 vcst.p C010,VFPU_LN2 +0x0000293C: 0xD06D9001 vcst.t C010,VFPU_LN2 +0x00002940: 0xD06D9081 vcst.q C010,VFPU_LN2 +0x00002944: 0xD06E1001 vcst.s S010,VFPU_LN10 +0x00002948: 0xD06E1081 vcst.p C010,VFPU_LN10 +0x0000294C: 0xD06E9001 vcst.t C010,VFPU_LN10 +0x00002950: 0xD06E9081 vcst.q C010,VFPU_LN10 +0x00002954: 0xD06F1001 vcst.s S010,VFPU_2PI +0x00002958: 0xD06F1081 vcst.p C010,VFPU_2PI +0x0000295C: 0xD06F9001 vcst.t C010,VFPU_2PI +0x00002960: 0xD06F9081 vcst.q C010,VFPU_2PI +0x00002964: 0xD0701001 vcst.s S010,VFPU_PI/6 +0x00002968: 0xD0701081 vcst.p C010,VFPU_PI/6 +0x0000296C: 0xD0709001 vcst.t C010,VFPU_PI/6 +0x00002970: 0xD0709081 vcst.q C010,VFPU_PI/6 +0x00002974: 0xD0711001 vcst.s S010,VFPU_LOG10TWO +0x00002978: 0xD0711081 vcst.p C010,VFPU_LOG10TWO +0x0000297C: 0xD0719001 vcst.t C010,VFPU_LOG10TWO +0x00002980: 0xD0719081 vcst.q C010,VFPU_LOG10TWO +0x00002984: 0xD0721001 vcst.s S010,VFPU_LOG2TEN +0x00002988: 0xD0721081 vcst.p C010,VFPU_LOG2TEN +0x0000298C: 0xD0729001 vcst.t C010,VFPU_LOG2TEN +0x00002990: 0xD0729081 vcst.q C010,VFPU_LOG2TEN +0x00002994: 0xD0731001 vcst.s S010,VFPU_SQRT3/2 +0x00002998: 0xD0731081 vcst.p C010,VFPU_SQRT3/2 +0x0000299C: 0xD0739001 vcst.t C010,VFPU_SQRT3/2 +0x000029A0: 0xD0739081 vcst.q C010,VFPU_SQRT3/2 +0x000029A4: 0xD0741001 vcst.s S010,Undefined +0x000029A8: 0xD0741081 vcst.p C010,Undefined +0x000029AC: 0xD0749001 vcst.t C010,Undefined +0x000029B0: 0xD0749081 vcst.q C010,Undefined +0x000029B4: 0xD0751001 vcst.s S010,Undefined +0x000029B8: 0xD0751081 vcst.p C010,Undefined +0x000029BC: 0xD0759001 vcst.t C010,Undefined +0x000029C0: 0xD0759081 vcst.q C010,Undefined +0x000029C4: 0xD0761001 vcst.s S010,Undefined +0x000029C8: 0xD0761081 vcst.p C010,Undefined +0x000029CC: 0xD0769001 vcst.t C010,Undefined +0x000029D0: 0xD0769081 vcst.q C010,Undefined +0x000029D4: 0xD0771001 vcst.s S010,Undefined +0x000029D8: 0xD0771081 vcst.p C010,Undefined +0x000029DC: 0xD0779001 vcst.t C010,Undefined +0x000029E0: 0xD0779081 vcst.q C010,Undefined +0x000029E4: 0xD0781001 vcst.s S010,Undefined +0x000029E8: 0xD0781081 vcst.p C010,Undefined +0x000029EC: 0xD0789001 vcst.t C010,Undefined +0x000029F0: 0xD0789081 vcst.q C010,Undefined +0x000029F4: 0xD0791001 vcst.s S010,Undefined +0x000029F8: 0xD0791081 vcst.p C010,Undefined +0x000029FC: 0xD0799001 vcst.t C010,Undefined +0x00002A00: 0xD0799081 vcst.q C010,Undefined +0x00002A04: 0xD07A1001 vcst.s S010,Undefined +0x00002A08: 0xD07A1081 vcst.p C010,Undefined +0x00002A0C: 0xD07A9001 vcst.t C010,Undefined +0x00002A10: 0xD07A9081 vcst.q C010,Undefined +0x00002A14: 0xD07B1001 vcst.s S010,Undefined +0x00002A18: 0xD07B1081 vcst.p C010,Undefined +0x00002A1C: 0xD07B9001 vcst.t C010,Undefined +0x00002A20: 0xD07B9081 vcst.q C010,Undefined +0x00002A24: 0xD07C1001 vcst.s S010,Undefined +0x00002A28: 0xD07C1081 vcst.p C010,Undefined +0x00002A2C: 0xD07C9001 vcst.t C010,Undefined +0x00002A30: 0xD07C9081 vcst.q C010,Undefined +0x00002A34: 0xD07D1001 vcst.s S010,Undefined +0x00002A38: 0xD07D1081 vcst.p C010,Undefined +0x00002A3C: 0xD07D9001 vcst.t C010,Undefined +0x00002A40: 0xD07D9081 vcst.q C010,Undefined +0x00002A44: 0xD07E1001 vcst.s S010,Undefined +0x00002A48: 0xD07E1081 vcst.p C010,Undefined +0x00002A4C: 0xD07E9001 vcst.t C010,Undefined +0x00002A50: 0xD07E9081 vcst.q C010,Undefined +0x00002A54: 0xD07F1001 vcst.s S010,Undefined +0x00002A58: 0xD07F1081 vcst.p C010,Undefined +0x00002A5C: 0xD07F9001 vcst.t C010,Undefined +0x00002A60: 0xD07F9081 vcst.q C010,Undefined +0x00002A64: 0xD0801001 illegal +0x00002A68: 0xD0801081 illegal +0x00002A6C: 0xD0809001 illegal +0x00002A70: 0xD0809081 illegal +0x00002A74: 0xD0811001 illegal +0x00002A78: 0xD0811081 illegal +0x00002A7C: 0xD0819001 illegal +0x00002A80: 0xD0819081 illegal +0x00002A84: 0xD0821001 illegal +0x00002A88: 0xD0821081 illegal +0x00002A8C: 0xD0829001 illegal +0x00002A90: 0xD0829081 illegal +0x00002A94: 0xD0831001 illegal +0x00002A98: 0xD0831081 illegal +0x00002A9C: 0xD0839001 illegal +0x00002AA0: 0xD0839081 illegal +0x00002AA4: 0xD0841001 illegal +0x00002AA8: 0xD0841081 illegal +0x00002AAC: 0xD0849001 illegal +0x00002AB0: 0xD0849081 illegal +0x00002AB4: 0xD0851001 illegal +0x00002AB8: 0xD0851081 illegal +0x00002ABC: 0xD0859001 illegal +0x00002AC0: 0xD0859081 illegal +0x00002AC4: 0xD0861001 illegal +0x00002AC8: 0xD0861081 illegal +0x00002ACC: 0xD0869001 illegal +0x00002AD0: 0xD0869081 illegal +0x00002AD4: 0xD0871001 illegal +0x00002AD8: 0xD0871081 illegal +0x00002ADC: 0xD0879001 illegal +0x00002AE0: 0xD0879081 illegal +0x00002AE4: 0xD0881001 illegal +0x00002AE8: 0xD0881081 illegal +0x00002AEC: 0xD0889001 illegal +0x00002AF0: 0xD0889081 illegal +0x00002AF4: 0xD0891001 illegal +0x00002AF8: 0xD0891081 illegal +0x00002AFC: 0xD0899001 illegal +0x00002B00: 0xD0899081 illegal +0x00002B04: 0xD08A1001 illegal +0x00002B08: 0xD08A1081 illegal +0x00002B0C: 0xD08A9001 illegal +0x00002B10: 0xD08A9081 illegal +0x00002B14: 0xD08B1001 illegal +0x00002B18: 0xD08B1081 illegal +0x00002B1C: 0xD08B9001 illegal +0x00002B20: 0xD08B9081 illegal +0x00002B24: 0xD08C1001 illegal +0x00002B28: 0xD08C1081 illegal +0x00002B2C: 0xD08C9001 illegal +0x00002B30: 0xD08C9081 illegal +0x00002B34: 0xD08D1001 illegal +0x00002B38: 0xD08D1081 illegal +0x00002B3C: 0xD08D9001 illegal +0x00002B40: 0xD08D9081 illegal +0x00002B44: 0xD08E1001 illegal +0x00002B48: 0xD08E1081 illegal +0x00002B4C: 0xD08E9001 illegal +0x00002B50: 0xD08E9081 illegal +0x00002B54: 0xD08F1001 illegal +0x00002B58: 0xD08F1081 illegal +0x00002B5C: 0xD08F9001 illegal +0x00002B60: 0xD08F9081 illegal +0x00002B64: 0xD0901001 illegal +0x00002B68: 0xD0901081 illegal +0x00002B6C: 0xD0909001 illegal +0x00002B70: 0xD0909081 illegal +0x00002B74: 0xD0911001 illegal +0x00002B78: 0xD0911081 illegal +0x00002B7C: 0xD0919001 illegal +0x00002B80: 0xD0919081 illegal +0x00002B84: 0xD0921001 illegal +0x00002B88: 0xD0921081 illegal +0x00002B8C: 0xD0929001 illegal +0x00002B90: 0xD0929081 illegal +0x00002B94: 0xD0931001 illegal +0x00002B98: 0xD0931081 illegal +0x00002B9C: 0xD0939001 illegal +0x00002BA0: 0xD0939081 illegal +0x00002BA4: 0xD0941001 illegal +0x00002BA8: 0xD0941081 illegal +0x00002BAC: 0xD0949001 illegal +0x00002BB0: 0xD0949081 illegal +0x00002BB4: 0xD0951001 illegal +0x00002BB8: 0xD0951081 illegal +0x00002BBC: 0xD0959001 illegal +0x00002BC0: 0xD0959081 illegal +0x00002BC4: 0xD0961001 illegal +0x00002BC8: 0xD0961081 illegal +0x00002BCC: 0xD0969001 illegal +0x00002BD0: 0xD0969081 illegal +0x00002BD4: 0xD0971001 illegal +0x00002BD8: 0xD0971081 illegal +0x00002BDC: 0xD0979001 illegal +0x00002BE0: 0xD0979081 illegal +0x00002BE4: 0xD0981001 illegal +0x00002BE8: 0xD0981081 illegal +0x00002BEC: 0xD0989001 illegal +0x00002BF0: 0xD0989081 illegal +0x00002BF4: 0xD0991001 illegal +0x00002BF8: 0xD0991081 illegal +0x00002BFC: 0xD0999001 illegal +0x00002C00: 0xD0999081 illegal +0x00002C04: 0xD09A1001 illegal +0x00002C08: 0xD09A1081 illegal +0x00002C0C: 0xD09A9001 illegal +0x00002C10: 0xD09A9081 illegal +0x00002C14: 0xD09B1001 illegal +0x00002C18: 0xD09B1081 illegal +0x00002C1C: 0xD09B9001 illegal +0x00002C20: 0xD09B9081 illegal +0x00002C24: 0xD09C1001 illegal +0x00002C28: 0xD09C1081 illegal +0x00002C2C: 0xD09C9001 illegal +0x00002C30: 0xD09C9081 illegal +0x00002C34: 0xD09D1001 illegal +0x00002C38: 0xD09D1081 illegal +0x00002C3C: 0xD09D9001 illegal +0x00002C40: 0xD09D9081 illegal +0x00002C44: 0xD09E1001 illegal +0x00002C48: 0xD09E1081 illegal +0x00002C4C: 0xD09E9001 illegal +0x00002C50: 0xD09E9081 illegal +0x00002C54: 0xD09F1001 illegal +0x00002C58: 0xD09F1081 illegal +0x00002C5C: 0xD09F9001 illegal +0x00002C60: 0xD09F9081 illegal +0x00002C64: 0xD0A01001 illegal +0x00002C68: 0xD0A01081 illegal +0x00002C6C: 0xD0A09001 illegal +0x00002C70: 0xD0A09081 illegal +0x00002C74: 0xD0A11001 illegal +0x00002C78: 0xD0A11081 illegal +0x00002C7C: 0xD0A19001 illegal +0x00002C80: 0xD0A19081 illegal +0x00002C84: 0xD0A21001 illegal +0x00002C88: 0xD0A21081 illegal +0x00002C8C: 0xD0A29001 illegal +0x00002C90: 0xD0A29081 illegal +0x00002C94: 0xD0A31001 illegal +0x00002C98: 0xD0A31081 illegal +0x00002C9C: 0xD0A39001 illegal +0x00002CA0: 0xD0A39081 illegal +0x00002CA4: 0xD0A41001 illegal +0x00002CA8: 0xD0A41081 illegal +0x00002CAC: 0xD0A49001 illegal +0x00002CB0: 0xD0A49081 illegal +0x00002CB4: 0xD0A51001 illegal +0x00002CB8: 0xD0A51081 illegal +0x00002CBC: 0xD0A59001 illegal +0x00002CC0: 0xD0A59081 illegal +0x00002CC4: 0xD0A61001 illegal +0x00002CC8: 0xD0A61081 illegal +0x00002CCC: 0xD0A69001 illegal +0x00002CD0: 0xD0A69081 illegal +0x00002CD4: 0xD0A71001 illegal +0x00002CD8: 0xD0A71081 illegal +0x00002CDC: 0xD0A79001 illegal +0x00002CE0: 0xD0A79081 illegal +0x00002CE4: 0xD0A81001 illegal +0x00002CE8: 0xD0A81081 illegal +0x00002CEC: 0xD0A89001 illegal +0x00002CF0: 0xD0A89081 illegal +0x00002CF4: 0xD0A91001 illegal +0x00002CF8: 0xD0A91081 illegal +0x00002CFC: 0xD0A99001 illegal +0x00002D00: 0xD0A99081 illegal +0x00002D04: 0xD0AA1001 illegal +0x00002D08: 0xD0AA1081 illegal +0x00002D0C: 0xD0AA9001 illegal +0x00002D10: 0xD0AA9081 illegal +0x00002D14: 0xD0AB1001 illegal +0x00002D18: 0xD0AB1081 illegal +0x00002D1C: 0xD0AB9001 illegal +0x00002D20: 0xD0AB9081 illegal +0x00002D24: 0xD0AC1001 illegal +0x00002D28: 0xD0AC1081 illegal +0x00002D2C: 0xD0AC9001 illegal +0x00002D30: 0xD0AC9081 illegal +0x00002D34: 0xD0AD1001 illegal +0x00002D38: 0xD0AD1081 illegal +0x00002D3C: 0xD0AD9001 illegal +0x00002D40: 0xD0AD9081 illegal +0x00002D44: 0xD0AE1001 illegal +0x00002D48: 0xD0AE1081 illegal +0x00002D4C: 0xD0AE9001 illegal +0x00002D50: 0xD0AE9081 illegal +0x00002D54: 0xD0AF1001 illegal +0x00002D58: 0xD0AF1081 illegal +0x00002D5C: 0xD0AF9001 illegal +0x00002D60: 0xD0AF9081 illegal +0x00002D64: 0xD0B01001 illegal +0x00002D68: 0xD0B01081 illegal +0x00002D6C: 0xD0B09001 illegal +0x00002D70: 0xD0B09081 illegal +0x00002D74: 0xD0B11001 illegal +0x00002D78: 0xD0B11081 illegal +0x00002D7C: 0xD0B19001 illegal +0x00002D80: 0xD0B19081 illegal +0x00002D84: 0xD0B21001 illegal +0x00002D88: 0xD0B21081 illegal +0x00002D8C: 0xD0B29001 illegal +0x00002D90: 0xD0B29081 illegal +0x00002D94: 0xD0B31001 illegal +0x00002D98: 0xD0B31081 illegal +0x00002D9C: 0xD0B39001 illegal +0x00002DA0: 0xD0B39081 illegal +0x00002DA4: 0xD0B41001 illegal +0x00002DA8: 0xD0B41081 illegal +0x00002DAC: 0xD0B49001 illegal +0x00002DB0: 0xD0B49081 illegal +0x00002DB4: 0xD0B51001 illegal +0x00002DB8: 0xD0B51081 illegal +0x00002DBC: 0xD0B59001 illegal +0x00002DC0: 0xD0B59081 illegal +0x00002DC4: 0xD0B61001 illegal +0x00002DC8: 0xD0B61081 illegal +0x00002DCC: 0xD0B69001 illegal +0x00002DD0: 0xD0B69081 illegal +0x00002DD4: 0xD0B71001 illegal +0x00002DD8: 0xD0B71081 illegal +0x00002DDC: 0xD0B79001 illegal +0x00002DE0: 0xD0B79081 illegal +0x00002DE4: 0xD0B81001 illegal +0x00002DE8: 0xD0B81081 illegal +0x00002DEC: 0xD0B89001 illegal +0x00002DF0: 0xD0B89081 illegal +0x00002DF4: 0xD0B91001 illegal +0x00002DF8: 0xD0B91081 illegal +0x00002DFC: 0xD0B99001 illegal +0x00002E00: 0xD0B99081 illegal +0x00002E04: 0xD0BA1001 illegal +0x00002E08: 0xD0BA1081 illegal +0x00002E0C: 0xD0BA9001 illegal +0x00002E10: 0xD0BA9081 illegal +0x00002E14: 0xD0BB1001 illegal +0x00002E18: 0xD0BB1081 illegal +0x00002E1C: 0xD0BB9001 illegal +0x00002E20: 0xD0BB9081 illegal +0x00002E24: 0xD0BC1001 illegal +0x00002E28: 0xD0BC1081 illegal +0x00002E2C: 0xD0BC9001 illegal +0x00002E30: 0xD0BC9081 illegal +0x00002E34: 0xD0BD1001 illegal +0x00002E38: 0xD0BD1081 illegal +0x00002E3C: 0xD0BD9001 illegal +0x00002E40: 0xD0BD9081 illegal +0x00002E44: 0xD0BE1001 illegal +0x00002E48: 0xD0BE1081 illegal +0x00002E4C: 0xD0BE9001 illegal +0x00002E50: 0xD0BE9081 illegal +0x00002E54: 0xD0BF1001 illegal +0x00002E58: 0xD0BF1081 illegal +0x00002E5C: 0xD0BF9001 illegal +0x00002E60: 0xD0BF9081 illegal +0x00002E64: 0xD0C01001 illegal +0x00002E68: 0xD0C01081 illegal +0x00002E6C: 0xD0C09001 illegal +0x00002E70: 0xD0C09081 illegal +0x00002E74: 0xD0C11001 illegal +0x00002E78: 0xD0C11081 illegal +0x00002E7C: 0xD0C19001 illegal +0x00002E80: 0xD0C19081 illegal +0x00002E84: 0xD0C21001 illegal +0x00002E88: 0xD0C21081 illegal +0x00002E8C: 0xD0C29001 illegal +0x00002E90: 0xD0C29081 illegal +0x00002E94: 0xD0C31001 illegal +0x00002E98: 0xD0C31081 illegal +0x00002E9C: 0xD0C39001 illegal +0x00002EA0: 0xD0C39081 illegal +0x00002EA4: 0xD0C41001 illegal +0x00002EA8: 0xD0C41081 illegal +0x00002EAC: 0xD0C49001 illegal +0x00002EB0: 0xD0C49081 illegal +0x00002EB4: 0xD0C51001 illegal +0x00002EB8: 0xD0C51081 illegal +0x00002EBC: 0xD0C59001 illegal +0x00002EC0: 0xD0C59081 illegal +0x00002EC4: 0xD0C61001 illegal +0x00002EC8: 0xD0C61081 illegal +0x00002ECC: 0xD0C69001 illegal +0x00002ED0: 0xD0C69081 illegal +0x00002ED4: 0xD0C71001 illegal +0x00002ED8: 0xD0C71081 illegal +0x00002EDC: 0xD0C79001 illegal +0x00002EE0: 0xD0C79081 illegal +0x00002EE4: 0xD0C81001 illegal +0x00002EE8: 0xD0C81081 illegal +0x00002EEC: 0xD0C89001 illegal +0x00002EF0: 0xD0C89081 illegal +0x00002EF4: 0xD0C91001 illegal +0x00002EF8: 0xD0C91081 illegal +0x00002EFC: 0xD0C99001 illegal +0x00002F00: 0xD0C99081 illegal +0x00002F04: 0xD0CA1001 illegal +0x00002F08: 0xD0CA1081 illegal +0x00002F0C: 0xD0CA9001 illegal +0x00002F10: 0xD0CA9081 illegal +0x00002F14: 0xD0CB1001 illegal +0x00002F18: 0xD0CB1081 illegal +0x00002F1C: 0xD0CB9001 illegal +0x00002F20: 0xD0CB9081 illegal +0x00002F24: 0xD0CC1001 illegal +0x00002F28: 0xD0CC1081 illegal +0x00002F2C: 0xD0CC9001 illegal +0x00002F30: 0xD0CC9081 illegal +0x00002F34: 0xD0CD1001 illegal +0x00002F38: 0xD0CD1081 illegal +0x00002F3C: 0xD0CD9001 illegal +0x00002F40: 0xD0CD9081 illegal +0x00002F44: 0xD0CE1001 illegal +0x00002F48: 0xD0CE1081 illegal +0x00002F4C: 0xD0CE9001 illegal +0x00002F50: 0xD0CE9081 illegal +0x00002F54: 0xD0CF1001 illegal +0x00002F58: 0xD0CF1081 illegal +0x00002F5C: 0xD0CF9001 illegal +0x00002F60: 0xD0CF9081 illegal +0x00002F64: 0xD0D01001 illegal +0x00002F68: 0xD0D01081 illegal +0x00002F6C: 0xD0D09001 illegal +0x00002F70: 0xD0D09081 illegal +0x00002F74: 0xD0D11001 illegal +0x00002F78: 0xD0D11081 illegal +0x00002F7C: 0xD0D19001 illegal +0x00002F80: 0xD0D19081 illegal +0x00002F84: 0xD0D21001 illegal +0x00002F88: 0xD0D21081 illegal +0x00002F8C: 0xD0D29001 illegal +0x00002F90: 0xD0D29081 illegal +0x00002F94: 0xD0D31001 illegal +0x00002F98: 0xD0D31081 illegal +0x00002F9C: 0xD0D39001 illegal +0x00002FA0: 0xD0D39081 illegal +0x00002FA4: 0xD0D41001 illegal +0x00002FA8: 0xD0D41081 illegal +0x00002FAC: 0xD0D49001 illegal +0x00002FB0: 0xD0D49081 illegal +0x00002FB4: 0xD0D51001 illegal +0x00002FB8: 0xD0D51081 illegal +0x00002FBC: 0xD0D59001 illegal +0x00002FC0: 0xD0D59081 illegal +0x00002FC4: 0xD0D61001 illegal +0x00002FC8: 0xD0D61081 illegal +0x00002FCC: 0xD0D69001 illegal +0x00002FD0: 0xD0D69081 illegal +0x00002FD4: 0xD0D71001 illegal +0x00002FD8: 0xD0D71081 illegal +0x00002FDC: 0xD0D79001 illegal +0x00002FE0: 0xD0D79081 illegal +0x00002FE4: 0xD0D81001 illegal +0x00002FE8: 0xD0D81081 illegal +0x00002FEC: 0xD0D89001 illegal +0x00002FF0: 0xD0D89081 illegal +0x00002FF4: 0xD0D91001 illegal +0x00002FF8: 0xD0D91081 illegal +0x00002FFC: 0xD0D99001 illegal +0x00003000: 0xD0D99081 illegal +0x00003004: 0xD0DA1001 illegal +0x00003008: 0xD0DA1081 illegal +0x0000300C: 0xD0DA9001 illegal +0x00003010: 0xD0DA9081 illegal +0x00003014: 0xD0DB1001 illegal +0x00003018: 0xD0DB1081 illegal +0x0000301C: 0xD0DB9001 illegal +0x00003020: 0xD0DB9081 illegal +0x00003024: 0xD0DC1001 illegal +0x00003028: 0xD0DC1081 illegal +0x0000302C: 0xD0DC9001 illegal +0x00003030: 0xD0DC9081 illegal +0x00003034: 0xD0DD1001 illegal +0x00003038: 0xD0DD1081 illegal +0x0000303C: 0xD0DD9001 illegal +0x00003040: 0xD0DD9081 illegal +0x00003044: 0xD0DE1001 illegal +0x00003048: 0xD0DE1081 illegal +0x0000304C: 0xD0DE9001 illegal +0x00003050: 0xD0DE9081 illegal +0x00003054: 0xD0DF1001 illegal +0x00003058: 0xD0DF1081 illegal +0x0000305C: 0xD0DF9001 illegal +0x00003060: 0xD0DF9081 illegal +0x00003064: 0xD0E01001 illegal +0x00003068: 0xD0E01081 illegal +0x0000306C: 0xD0E09001 illegal +0x00003070: 0xD0E09081 illegal +0x00003074: 0xD0E11001 illegal +0x00003078: 0xD0E11081 illegal +0x0000307C: 0xD0E19001 illegal +0x00003080: 0xD0E19081 illegal +0x00003084: 0xD0E21001 illegal +0x00003088: 0xD0E21081 illegal +0x0000308C: 0xD0E29001 illegal +0x00003090: 0xD0E29081 illegal +0x00003094: 0xD0E31001 illegal +0x00003098: 0xD0E31081 illegal +0x0000309C: 0xD0E39001 illegal +0x000030A0: 0xD0E39081 illegal +0x000030A4: 0xD0E41001 illegal +0x000030A8: 0xD0E41081 illegal +0x000030AC: 0xD0E49001 illegal +0x000030B0: 0xD0E49081 illegal +0x000030B4: 0xD0E51001 illegal +0x000030B8: 0xD0E51081 illegal +0x000030BC: 0xD0E59001 illegal +0x000030C0: 0xD0E59081 illegal +0x000030C4: 0xD0E61001 illegal +0x000030C8: 0xD0E61081 illegal +0x000030CC: 0xD0E69001 illegal +0x000030D0: 0xD0E69081 illegal +0x000030D4: 0xD0E71001 illegal +0x000030D8: 0xD0E71081 illegal +0x000030DC: 0xD0E79001 illegal +0x000030E0: 0xD0E79081 illegal +0x000030E4: 0xD0E81001 illegal +0x000030E8: 0xD0E81081 illegal +0x000030EC: 0xD0E89001 illegal +0x000030F0: 0xD0E89081 illegal +0x000030F4: 0xD0E91001 illegal +0x000030F8: 0xD0E91081 illegal +0x000030FC: 0xD0E99001 illegal +0x00003100: 0xD0E99081 illegal +0x00003104: 0xD0EA1001 illegal +0x00003108: 0xD0EA1081 illegal +0x0000310C: 0xD0EA9001 illegal +0x00003110: 0xD0EA9081 illegal +0x00003114: 0xD0EB1001 illegal +0x00003118: 0xD0EB1081 illegal +0x0000311C: 0xD0EB9001 illegal +0x00003120: 0xD0EB9081 illegal +0x00003124: 0xD0EC1001 illegal +0x00003128: 0xD0EC1081 illegal +0x0000312C: 0xD0EC9001 illegal +0x00003130: 0xD0EC9081 illegal +0x00003134: 0xD0ED1001 illegal +0x00003138: 0xD0ED1081 illegal +0x0000313C: 0xD0ED9001 illegal +0x00003140: 0xD0ED9081 illegal +0x00003144: 0xD0EE1001 illegal +0x00003148: 0xD0EE1081 illegal +0x0000314C: 0xD0EE9001 illegal +0x00003150: 0xD0EE9081 illegal +0x00003154: 0xD0EF1001 illegal +0x00003158: 0xD0EF1081 illegal +0x0000315C: 0xD0EF9001 illegal +0x00003160: 0xD0EF9081 illegal +0x00003164: 0xD0F01001 illegal +0x00003168: 0xD0F01081 illegal +0x0000316C: 0xD0F09001 illegal +0x00003170: 0xD0F09081 illegal +0x00003174: 0xD0F11001 illegal +0x00003178: 0xD0F11081 illegal +0x0000317C: 0xD0F19001 illegal +0x00003180: 0xD0F19081 illegal +0x00003184: 0xD0F21001 illegal +0x00003188: 0xD0F21081 illegal +0x0000318C: 0xD0F29001 illegal +0x00003190: 0xD0F29081 illegal +0x00003194: 0xD0F31001 illegal +0x00003198: 0xD0F31081 illegal +0x0000319C: 0xD0F39001 illegal +0x000031A0: 0xD0F39081 illegal +0x000031A4: 0xD0F41001 illegal +0x000031A8: 0xD0F41081 illegal +0x000031AC: 0xD0F49001 illegal +0x000031B0: 0xD0F49081 illegal +0x000031B4: 0xD0F51001 illegal +0x000031B8: 0xD0F51081 illegal +0x000031BC: 0xD0F59001 illegal +0x000031C0: 0xD0F59081 illegal +0x000031C4: 0xD0F61001 illegal +0x000031C8: 0xD0F61081 illegal +0x000031CC: 0xD0F69001 illegal +0x000031D0: 0xD0F69081 illegal +0x000031D4: 0xD0F71001 illegal +0x000031D8: 0xD0F71081 illegal +0x000031DC: 0xD0F79001 illegal +0x000031E0: 0xD0F79081 illegal +0x000031E4: 0xD0F81001 illegal +0x000031E8: 0xD0F81081 illegal +0x000031EC: 0xD0F89001 illegal +0x000031F0: 0xD0F89081 illegal +0x000031F4: 0xD0F91001 illegal +0x000031F8: 0xD0F91081 illegal +0x000031FC: 0xD0F99001 illegal +0x00003200: 0xD0F99081 illegal +0x00003204: 0xD0FA1001 illegal +0x00003208: 0xD0FA1081 illegal +0x0000320C: 0xD0FA9001 illegal +0x00003210: 0xD0FA9081 illegal +0x00003214: 0xD0FB1001 illegal +0x00003218: 0xD0FB1081 illegal +0x0000321C: 0xD0FB9001 illegal +0x00003220: 0xD0FB9081 illegal +0x00003224: 0xD0FC1001 illegal +0x00003228: 0xD0FC1081 illegal +0x0000322C: 0xD0FC9001 illegal +0x00003230: 0xD0FC9081 illegal +0x00003234: 0xD0FD1001 illegal +0x00003238: 0xD0FD1081 illegal +0x0000323C: 0xD0FD9001 illegal +0x00003240: 0xD0FD9081 illegal +0x00003244: 0xD0FE1001 illegal +0x00003248: 0xD0FE1081 illegal +0x0000324C: 0xD0FE9001 illegal +0x00003250: 0xD0FE9081 illegal +0x00003254: 0xD0FF1001 illegal +0x00003258: 0xD0FF1081 illegal +0x0000325C: 0xD0FF9001 illegal +0x00003260: 0xD0FF9081 illegal +0x00003264: 0x03E00008 jr ra +0x00003268: 0x00000000 nop + +vfpu4_fmt2_all: +0x0000326C: 0xD2001001 vf2in.s S010,S400,0 +0x00003270: 0xD2001081 vf2in.p C010,C400,0 +0x00003274: 0xD2009001 vf2in.t C010,C400,0 +0x00003278: 0xD2009081 vf2in.q C010,C400,0 +0x0000327C: 0xD2011001 vf2in.s S010,S400,1 +0x00003280: 0xD2011081 vf2in.p C010,C400,1 +0x00003284: 0xD2019001 vf2in.t C010,C400,1 +0x00003288: 0xD2019081 vf2in.q C010,C400,1 +0x0000328C: 0xD2021001 vf2in.s S010,S400,2 +0x00003290: 0xD2021081 vf2in.p C010,C400,2 +0x00003294: 0xD2029001 vf2in.t C010,C400,2 +0x00003298: 0xD2029081 vf2in.q C010,C400,2 +0x0000329C: 0xD2031001 vf2in.s S010,S400,3 +0x000032A0: 0xD2031081 vf2in.p C010,C400,3 +0x000032A4: 0xD2039001 vf2in.t C010,C400,3 +0x000032A8: 0xD2039081 vf2in.q C010,C400,3 +0x000032AC: 0xD2041001 vf2in.s S010,S400,4 +0x000032B0: 0xD2041081 vf2in.p C010,C400,4 +0x000032B4: 0xD2049001 vf2in.t C010,C400,4 +0x000032B8: 0xD2049081 vf2in.q C010,C400,4 +0x000032BC: 0xD2051001 vf2in.s S010,S400,5 +0x000032C0: 0xD2051081 vf2in.p C010,C400,5 +0x000032C4: 0xD2059001 vf2in.t C010,C400,5 +0x000032C8: 0xD2059081 vf2in.q C010,C400,5 +0x000032CC: 0xD2061001 vf2in.s S010,S400,6 +0x000032D0: 0xD2061081 vf2in.p C010,C400,6 +0x000032D4: 0xD2069001 vf2in.t C010,C400,6 +0x000032D8: 0xD2069081 vf2in.q C010,C400,6 +0x000032DC: 0xD2071001 vf2in.s S010,S400,7 +0x000032E0: 0xD2071081 vf2in.p C010,C400,7 +0x000032E4: 0xD2079001 vf2in.t C010,C400,7 +0x000032E8: 0xD2079081 vf2in.q C010,C400,7 +0x000032EC: 0xD2081001 vf2in.s S010,S400,8 +0x000032F0: 0xD2081081 vf2in.p C010,C400,8 +0x000032F4: 0xD2089001 vf2in.t C010,C400,8 +0x000032F8: 0xD2089081 vf2in.q C010,C400,8 +0x000032FC: 0xD2091001 vf2in.s S010,S400,9 +0x00003300: 0xD2091081 vf2in.p C010,C400,9 +0x00003304: 0xD2099001 vf2in.t C010,C400,9 +0x00003308: 0xD2099081 vf2in.q C010,C400,9 +0x0000330C: 0xD20A1001 vf2in.s S010,S400,10 +0x00003310: 0xD20A1081 vf2in.p C010,C400,10 +0x00003314: 0xD20A9001 vf2in.t C010,C400,10 +0x00003318: 0xD20A9081 vf2in.q C010,C400,10 +0x0000331C: 0xD20B1001 vf2in.s S010,S400,11 +0x00003320: 0xD20B1081 vf2in.p C010,C400,11 +0x00003324: 0xD20B9001 vf2in.t C010,C400,11 +0x00003328: 0xD20B9081 vf2in.q C010,C400,11 +0x0000332C: 0xD20C1001 vf2in.s S010,S400,12 +0x00003330: 0xD20C1081 vf2in.p C010,C400,12 +0x00003334: 0xD20C9001 vf2in.t C010,C400,12 +0x00003338: 0xD20C9081 vf2in.q C010,C400,12 +0x0000333C: 0xD20D1001 vf2in.s S010,S400,13 +0x00003340: 0xD20D1081 vf2in.p C010,C400,13 +0x00003344: 0xD20D9001 vf2in.t C010,C400,13 +0x00003348: 0xD20D9081 vf2in.q C010,C400,13 +0x0000334C: 0xD20E1001 vf2in.s S010,S400,14 +0x00003350: 0xD20E1081 vf2in.p C010,C400,14 +0x00003354: 0xD20E9001 vf2in.t C010,C400,14 +0x00003358: 0xD20E9081 vf2in.q C010,C400,14 +0x0000335C: 0xD20F1001 vf2in.s S010,S400,15 +0x00003360: 0xD20F1081 vf2in.p C010,C400,15 +0x00003364: 0xD20F9001 vf2in.t C010,C400,15 +0x00003368: 0xD20F9081 vf2in.q C010,C400,15 +0x0000336C: 0xD2101001 vf2in.s S010,S400,16 +0x00003370: 0xD2101081 vf2in.p C010,C400,16 +0x00003374: 0xD2109001 vf2in.t C010,C400,16 +0x00003378: 0xD2109081 vf2in.q C010,C400,16 +0x0000337C: 0xD2111001 vf2in.s S010,S400,17 +0x00003380: 0xD2111081 vf2in.p C010,C400,17 +0x00003384: 0xD2119001 vf2in.t C010,C400,17 +0x00003388: 0xD2119081 vf2in.q C010,C400,17 +0x0000338C: 0xD2121001 vf2in.s S010,S400,18 +0x00003390: 0xD2121081 vf2in.p C010,C400,18 +0x00003394: 0xD2129001 vf2in.t C010,C400,18 +0x00003398: 0xD2129081 vf2in.q C010,C400,18 +0x0000339C: 0xD2131001 vf2in.s S010,S400,19 +0x000033A0: 0xD2131081 vf2in.p C010,C400,19 +0x000033A4: 0xD2139001 vf2in.t C010,C400,19 +0x000033A8: 0xD2139081 vf2in.q C010,C400,19 +0x000033AC: 0xD2141001 vf2in.s S010,S400,20 +0x000033B0: 0xD2141081 vf2in.p C010,C400,20 +0x000033B4: 0xD2149001 vf2in.t C010,C400,20 +0x000033B8: 0xD2149081 vf2in.q C010,C400,20 +0x000033BC: 0xD2151001 vf2in.s S010,S400,21 +0x000033C0: 0xD2151081 vf2in.p C010,C400,21 +0x000033C4: 0xD2159001 vf2in.t C010,C400,21 +0x000033C8: 0xD2159081 vf2in.q C010,C400,21 +0x000033CC: 0xD2161001 vf2in.s S010,S400,22 +0x000033D0: 0xD2161081 vf2in.p C010,C400,22 +0x000033D4: 0xD2169001 vf2in.t C010,C400,22 +0x000033D8: 0xD2169081 vf2in.q C010,C400,22 +0x000033DC: 0xD2171001 vf2in.s S010,S400,23 +0x000033E0: 0xD2171081 vf2in.p C010,C400,23 +0x000033E4: 0xD2179001 vf2in.t C010,C400,23 +0x000033E8: 0xD2179081 vf2in.q C010,C400,23 +0x000033EC: 0xD2181001 vf2in.s S010,S400,24 +0x000033F0: 0xD2181081 vf2in.p C010,C400,24 +0x000033F4: 0xD2189001 vf2in.t C010,C400,24 +0x000033F8: 0xD2189081 vf2in.q C010,C400,24 +0x000033FC: 0xD2191001 vf2in.s S010,S400,25 +0x00003400: 0xD2191081 vf2in.p C010,C400,25 +0x00003404: 0xD2199001 vf2in.t C010,C400,25 +0x00003408: 0xD2199081 vf2in.q C010,C400,25 +0x0000340C: 0xD21A1001 vf2in.s S010,S400,26 +0x00003410: 0xD21A1081 vf2in.p C010,C400,26 +0x00003414: 0xD21A9001 vf2in.t C010,C400,26 +0x00003418: 0xD21A9081 vf2in.q C010,C400,26 +0x0000341C: 0xD21B1001 vf2in.s S010,S400,27 +0x00003420: 0xD21B1081 vf2in.p C010,C400,27 +0x00003424: 0xD21B9001 vf2in.t C010,C400,27 +0x00003428: 0xD21B9081 vf2in.q C010,C400,27 +0x0000342C: 0xD21C1001 vf2in.s S010,S400,28 +0x00003430: 0xD21C1081 vf2in.p C010,C400,28 +0x00003434: 0xD21C9001 vf2in.t C010,C400,28 +0x00003438: 0xD21C9081 vf2in.q C010,C400,28 +0x0000343C: 0xD21D1001 vf2in.s S010,S400,29 +0x00003440: 0xD21D1081 vf2in.p C010,C400,29 +0x00003444: 0xD21D9001 vf2in.t C010,C400,29 +0x00003448: 0xD21D9081 vf2in.q C010,C400,29 +0x0000344C: 0xD21E1001 vf2in.s S010,S400,30 +0x00003450: 0xD21E1081 vf2in.p C010,C400,30 +0x00003454: 0xD21E9001 vf2in.t C010,C400,30 +0x00003458: 0xD21E9081 vf2in.q C010,C400,30 +0x0000345C: 0xD21F1001 vf2in.s S010,S400,31 +0x00003460: 0xD21F1081 vf2in.p C010,C400,31 +0x00003464: 0xD21F9001 vf2in.t C010,C400,31 +0x00003468: 0xD21F9081 vf2in.q C010,C400,31 +0x0000346C: 0xD2201001 vf2iz.s S010,S400,0 +0x00003470: 0xD2201081 vf2iz.p C010,C400,0 +0x00003474: 0xD2209001 vf2iz.t C010,C400,0 +0x00003478: 0xD2209081 vf2iz.q C010,C400,0 +0x0000347C: 0xD2211001 vf2iz.s S010,S400,1 +0x00003480: 0xD2211081 vf2iz.p C010,C400,1 +0x00003484: 0xD2219001 vf2iz.t C010,C400,1 +0x00003488: 0xD2219081 vf2iz.q C010,C400,1 +0x0000348C: 0xD2221001 vf2iz.s S010,S400,2 +0x00003490: 0xD2221081 vf2iz.p C010,C400,2 +0x00003494: 0xD2229001 vf2iz.t C010,C400,2 +0x00003498: 0xD2229081 vf2iz.q C010,C400,2 +0x0000349C: 0xD2231001 vf2iz.s S010,S400,3 +0x000034A0: 0xD2231081 vf2iz.p C010,C400,3 +0x000034A4: 0xD2239001 vf2iz.t C010,C400,3 +0x000034A8: 0xD2239081 vf2iz.q C010,C400,3 +0x000034AC: 0xD2241001 vf2iz.s S010,S400,4 +0x000034B0: 0xD2241081 vf2iz.p C010,C400,4 +0x000034B4: 0xD2249001 vf2iz.t C010,C400,4 +0x000034B8: 0xD2249081 vf2iz.q C010,C400,4 +0x000034BC: 0xD2251001 vf2iz.s S010,S400,5 +0x000034C0: 0xD2251081 vf2iz.p C010,C400,5 +0x000034C4: 0xD2259001 vf2iz.t C010,C400,5 +0x000034C8: 0xD2259081 vf2iz.q C010,C400,5 +0x000034CC: 0xD2261001 vf2iz.s S010,S400,6 +0x000034D0: 0xD2261081 vf2iz.p C010,C400,6 +0x000034D4: 0xD2269001 vf2iz.t C010,C400,6 +0x000034D8: 0xD2269081 vf2iz.q C010,C400,6 +0x000034DC: 0xD2271001 vf2iz.s S010,S400,7 +0x000034E0: 0xD2271081 vf2iz.p C010,C400,7 +0x000034E4: 0xD2279001 vf2iz.t C010,C400,7 +0x000034E8: 0xD2279081 vf2iz.q C010,C400,7 +0x000034EC: 0xD2281001 vf2iz.s S010,S400,8 +0x000034F0: 0xD2281081 vf2iz.p C010,C400,8 +0x000034F4: 0xD2289001 vf2iz.t C010,C400,8 +0x000034F8: 0xD2289081 vf2iz.q C010,C400,8 +0x000034FC: 0xD2291001 vf2iz.s S010,S400,9 +0x00003500: 0xD2291081 vf2iz.p C010,C400,9 +0x00003504: 0xD2299001 vf2iz.t C010,C400,9 +0x00003508: 0xD2299081 vf2iz.q C010,C400,9 +0x0000350C: 0xD22A1001 vf2iz.s S010,S400,10 +0x00003510: 0xD22A1081 vf2iz.p C010,C400,10 +0x00003514: 0xD22A9001 vf2iz.t C010,C400,10 +0x00003518: 0xD22A9081 vf2iz.q C010,C400,10 +0x0000351C: 0xD22B1001 vf2iz.s S010,S400,11 +0x00003520: 0xD22B1081 vf2iz.p C010,C400,11 +0x00003524: 0xD22B9001 vf2iz.t C010,C400,11 +0x00003528: 0xD22B9081 vf2iz.q C010,C400,11 +0x0000352C: 0xD22C1001 vf2iz.s S010,S400,12 +0x00003530: 0xD22C1081 vf2iz.p C010,C400,12 +0x00003534: 0xD22C9001 vf2iz.t C010,C400,12 +0x00003538: 0xD22C9081 vf2iz.q C010,C400,12 +0x0000353C: 0xD22D1001 vf2iz.s S010,S400,13 +0x00003540: 0xD22D1081 vf2iz.p C010,C400,13 +0x00003544: 0xD22D9001 vf2iz.t C010,C400,13 +0x00003548: 0xD22D9081 vf2iz.q C010,C400,13 +0x0000354C: 0xD22E1001 vf2iz.s S010,S400,14 +0x00003550: 0xD22E1081 vf2iz.p C010,C400,14 +0x00003554: 0xD22E9001 vf2iz.t C010,C400,14 +0x00003558: 0xD22E9081 vf2iz.q C010,C400,14 +0x0000355C: 0xD22F1001 vf2iz.s S010,S400,15 +0x00003560: 0xD22F1081 vf2iz.p C010,C400,15 +0x00003564: 0xD22F9001 vf2iz.t C010,C400,15 +0x00003568: 0xD22F9081 vf2iz.q C010,C400,15 +0x0000356C: 0xD2301001 vf2iz.s S010,S400,16 +0x00003570: 0xD2301081 vf2iz.p C010,C400,16 +0x00003574: 0xD2309001 vf2iz.t C010,C400,16 +0x00003578: 0xD2309081 vf2iz.q C010,C400,16 +0x0000357C: 0xD2311001 vf2iz.s S010,S400,17 +0x00003580: 0xD2311081 vf2iz.p C010,C400,17 +0x00003584: 0xD2319001 vf2iz.t C010,C400,17 +0x00003588: 0xD2319081 vf2iz.q C010,C400,17 +0x0000358C: 0xD2321001 vf2iz.s S010,S400,18 +0x00003590: 0xD2321081 vf2iz.p C010,C400,18 +0x00003594: 0xD2329001 vf2iz.t C010,C400,18 +0x00003598: 0xD2329081 vf2iz.q C010,C400,18 +0x0000359C: 0xD2331001 vf2iz.s S010,S400,19 +0x000035A0: 0xD2331081 vf2iz.p C010,C400,19 +0x000035A4: 0xD2339001 vf2iz.t C010,C400,19 +0x000035A8: 0xD2339081 vf2iz.q C010,C400,19 +0x000035AC: 0xD2341001 vf2iz.s S010,S400,20 +0x000035B0: 0xD2341081 vf2iz.p C010,C400,20 +0x000035B4: 0xD2349001 vf2iz.t C010,C400,20 +0x000035B8: 0xD2349081 vf2iz.q C010,C400,20 +0x000035BC: 0xD2351001 vf2iz.s S010,S400,21 +0x000035C0: 0xD2351081 vf2iz.p C010,C400,21 +0x000035C4: 0xD2359001 vf2iz.t C010,C400,21 +0x000035C8: 0xD2359081 vf2iz.q C010,C400,21 +0x000035CC: 0xD2361001 vf2iz.s S010,S400,22 +0x000035D0: 0xD2361081 vf2iz.p C010,C400,22 +0x000035D4: 0xD2369001 vf2iz.t C010,C400,22 +0x000035D8: 0xD2369081 vf2iz.q C010,C400,22 +0x000035DC: 0xD2371001 vf2iz.s S010,S400,23 +0x000035E0: 0xD2371081 vf2iz.p C010,C400,23 +0x000035E4: 0xD2379001 vf2iz.t C010,C400,23 +0x000035E8: 0xD2379081 vf2iz.q C010,C400,23 +0x000035EC: 0xD2381001 vf2iz.s S010,S400,24 +0x000035F0: 0xD2381081 vf2iz.p C010,C400,24 +0x000035F4: 0xD2389001 vf2iz.t C010,C400,24 +0x000035F8: 0xD2389081 vf2iz.q C010,C400,24 +0x000035FC: 0xD2391001 vf2iz.s S010,S400,25 +0x00003600: 0xD2391081 vf2iz.p C010,C400,25 +0x00003604: 0xD2399001 vf2iz.t C010,C400,25 +0x00003608: 0xD2399081 vf2iz.q C010,C400,25 +0x0000360C: 0xD23A1001 vf2iz.s S010,S400,26 +0x00003610: 0xD23A1081 vf2iz.p C010,C400,26 +0x00003614: 0xD23A9001 vf2iz.t C010,C400,26 +0x00003618: 0xD23A9081 vf2iz.q C010,C400,26 +0x0000361C: 0xD23B1001 vf2iz.s S010,S400,27 +0x00003620: 0xD23B1081 vf2iz.p C010,C400,27 +0x00003624: 0xD23B9001 vf2iz.t C010,C400,27 +0x00003628: 0xD23B9081 vf2iz.q C010,C400,27 +0x0000362C: 0xD23C1001 vf2iz.s S010,S400,28 +0x00003630: 0xD23C1081 vf2iz.p C010,C400,28 +0x00003634: 0xD23C9001 vf2iz.t C010,C400,28 +0x00003638: 0xD23C9081 vf2iz.q C010,C400,28 +0x0000363C: 0xD23D1001 vf2iz.s S010,S400,29 +0x00003640: 0xD23D1081 vf2iz.p C010,C400,29 +0x00003644: 0xD23D9001 vf2iz.t C010,C400,29 +0x00003648: 0xD23D9081 vf2iz.q C010,C400,29 +0x0000364C: 0xD23E1001 vf2iz.s S010,S400,30 +0x00003650: 0xD23E1081 vf2iz.p C010,C400,30 +0x00003654: 0xD23E9001 vf2iz.t C010,C400,30 +0x00003658: 0xD23E9081 vf2iz.q C010,C400,30 +0x0000365C: 0xD23F1001 vf2iz.s S010,S400,31 +0x00003660: 0xD23F1081 vf2iz.p C010,C400,31 +0x00003664: 0xD23F9001 vf2iz.t C010,C400,31 +0x00003668: 0xD23F9081 vf2iz.q C010,C400,31 +0x0000366C: 0xD2401001 vf2iu.s S010,S400,0 +0x00003670: 0xD2401081 vf2iu.p C010,C400,0 +0x00003674: 0xD2409001 vf2iu.t C010,C400,0 +0x00003678: 0xD2409081 vf2iu.q C010,C400,0 +0x0000367C: 0xD2411001 vf2iu.s S010,S400,1 +0x00003680: 0xD2411081 vf2iu.p C010,C400,1 +0x00003684: 0xD2419001 vf2iu.t C010,C400,1 +0x00003688: 0xD2419081 vf2iu.q C010,C400,1 +0x0000368C: 0xD2421001 vf2iu.s S010,S400,2 +0x00003690: 0xD2421081 vf2iu.p C010,C400,2 +0x00003694: 0xD2429001 vf2iu.t C010,C400,2 +0x00003698: 0xD2429081 vf2iu.q C010,C400,2 +0x0000369C: 0xD2431001 vf2iu.s S010,S400,3 +0x000036A0: 0xD2431081 vf2iu.p C010,C400,3 +0x000036A4: 0xD2439001 vf2iu.t C010,C400,3 +0x000036A8: 0xD2439081 vf2iu.q C010,C400,3 +0x000036AC: 0xD2441001 vf2iu.s S010,S400,4 +0x000036B0: 0xD2441081 vf2iu.p C010,C400,4 +0x000036B4: 0xD2449001 vf2iu.t C010,C400,4 +0x000036B8: 0xD2449081 vf2iu.q C010,C400,4 +0x000036BC: 0xD2451001 vf2iu.s S010,S400,5 +0x000036C0: 0xD2451081 vf2iu.p C010,C400,5 +0x000036C4: 0xD2459001 vf2iu.t C010,C400,5 +0x000036C8: 0xD2459081 vf2iu.q C010,C400,5 +0x000036CC: 0xD2461001 vf2iu.s S010,S400,6 +0x000036D0: 0xD2461081 vf2iu.p C010,C400,6 +0x000036D4: 0xD2469001 vf2iu.t C010,C400,6 +0x000036D8: 0xD2469081 vf2iu.q C010,C400,6 +0x000036DC: 0xD2471001 vf2iu.s S010,S400,7 +0x000036E0: 0xD2471081 vf2iu.p C010,C400,7 +0x000036E4: 0xD2479001 vf2iu.t C010,C400,7 +0x000036E8: 0xD2479081 vf2iu.q C010,C400,7 +0x000036EC: 0xD2481001 vf2iu.s S010,S400,8 +0x000036F0: 0xD2481081 vf2iu.p C010,C400,8 +0x000036F4: 0xD2489001 vf2iu.t C010,C400,8 +0x000036F8: 0xD2489081 vf2iu.q C010,C400,8 +0x000036FC: 0xD2491001 vf2iu.s S010,S400,9 +0x00003700: 0xD2491081 vf2iu.p C010,C400,9 +0x00003704: 0xD2499001 vf2iu.t C010,C400,9 +0x00003708: 0xD2499081 vf2iu.q C010,C400,9 +0x0000370C: 0xD24A1001 vf2iu.s S010,S400,10 +0x00003710: 0xD24A1081 vf2iu.p C010,C400,10 +0x00003714: 0xD24A9001 vf2iu.t C010,C400,10 +0x00003718: 0xD24A9081 vf2iu.q C010,C400,10 +0x0000371C: 0xD24B1001 vf2iu.s S010,S400,11 +0x00003720: 0xD24B1081 vf2iu.p C010,C400,11 +0x00003724: 0xD24B9001 vf2iu.t C010,C400,11 +0x00003728: 0xD24B9081 vf2iu.q C010,C400,11 +0x0000372C: 0xD24C1001 vf2iu.s S010,S400,12 +0x00003730: 0xD24C1081 vf2iu.p C010,C400,12 +0x00003734: 0xD24C9001 vf2iu.t C010,C400,12 +0x00003738: 0xD24C9081 vf2iu.q C010,C400,12 +0x0000373C: 0xD24D1001 vf2iu.s S010,S400,13 +0x00003740: 0xD24D1081 vf2iu.p C010,C400,13 +0x00003744: 0xD24D9001 vf2iu.t C010,C400,13 +0x00003748: 0xD24D9081 vf2iu.q C010,C400,13 +0x0000374C: 0xD24E1001 vf2iu.s S010,S400,14 +0x00003750: 0xD24E1081 vf2iu.p C010,C400,14 +0x00003754: 0xD24E9001 vf2iu.t C010,C400,14 +0x00003758: 0xD24E9081 vf2iu.q C010,C400,14 +0x0000375C: 0xD24F1001 vf2iu.s S010,S400,15 +0x00003760: 0xD24F1081 vf2iu.p C010,C400,15 +0x00003764: 0xD24F9001 vf2iu.t C010,C400,15 +0x00003768: 0xD24F9081 vf2iu.q C010,C400,15 +0x0000376C: 0xD2501001 vf2iu.s S010,S400,16 +0x00003770: 0xD2501081 vf2iu.p C010,C400,16 +0x00003774: 0xD2509001 vf2iu.t C010,C400,16 +0x00003778: 0xD2509081 vf2iu.q C010,C400,16 +0x0000377C: 0xD2511001 vf2iu.s S010,S400,17 +0x00003780: 0xD2511081 vf2iu.p C010,C400,17 +0x00003784: 0xD2519001 vf2iu.t C010,C400,17 +0x00003788: 0xD2519081 vf2iu.q C010,C400,17 +0x0000378C: 0xD2521001 vf2iu.s S010,S400,18 +0x00003790: 0xD2521081 vf2iu.p C010,C400,18 +0x00003794: 0xD2529001 vf2iu.t C010,C400,18 +0x00003798: 0xD2529081 vf2iu.q C010,C400,18 +0x0000379C: 0xD2531001 vf2iu.s S010,S400,19 +0x000037A0: 0xD2531081 vf2iu.p C010,C400,19 +0x000037A4: 0xD2539001 vf2iu.t C010,C400,19 +0x000037A8: 0xD2539081 vf2iu.q C010,C400,19 +0x000037AC: 0xD2541001 vf2iu.s S010,S400,20 +0x000037B0: 0xD2541081 vf2iu.p C010,C400,20 +0x000037B4: 0xD2549001 vf2iu.t C010,C400,20 +0x000037B8: 0xD2549081 vf2iu.q C010,C400,20 +0x000037BC: 0xD2551001 vf2iu.s S010,S400,21 +0x000037C0: 0xD2551081 vf2iu.p C010,C400,21 +0x000037C4: 0xD2559001 vf2iu.t C010,C400,21 +0x000037C8: 0xD2559081 vf2iu.q C010,C400,21 +0x000037CC: 0xD2561001 vf2iu.s S010,S400,22 +0x000037D0: 0xD2561081 vf2iu.p C010,C400,22 +0x000037D4: 0xD2569001 vf2iu.t C010,C400,22 +0x000037D8: 0xD2569081 vf2iu.q C010,C400,22 +0x000037DC: 0xD2571001 vf2iu.s S010,S400,23 +0x000037E0: 0xD2571081 vf2iu.p C010,C400,23 +0x000037E4: 0xD2579001 vf2iu.t C010,C400,23 +0x000037E8: 0xD2579081 vf2iu.q C010,C400,23 +0x000037EC: 0xD2581001 vf2iu.s S010,S400,24 +0x000037F0: 0xD2581081 vf2iu.p C010,C400,24 +0x000037F4: 0xD2589001 vf2iu.t C010,C400,24 +0x000037F8: 0xD2589081 vf2iu.q C010,C400,24 +0x000037FC: 0xD2591001 vf2iu.s S010,S400,25 +0x00003800: 0xD2591081 vf2iu.p C010,C400,25 +0x00003804: 0xD2599001 vf2iu.t C010,C400,25 +0x00003808: 0xD2599081 vf2iu.q C010,C400,25 +0x0000380C: 0xD25A1001 vf2iu.s S010,S400,26 +0x00003810: 0xD25A1081 vf2iu.p C010,C400,26 +0x00003814: 0xD25A9001 vf2iu.t C010,C400,26 +0x00003818: 0xD25A9081 vf2iu.q C010,C400,26 +0x0000381C: 0xD25B1001 vf2iu.s S010,S400,27 +0x00003820: 0xD25B1081 vf2iu.p C010,C400,27 +0x00003824: 0xD25B9001 vf2iu.t C010,C400,27 +0x00003828: 0xD25B9081 vf2iu.q C010,C400,27 +0x0000382C: 0xD25C1001 vf2iu.s S010,S400,28 +0x00003830: 0xD25C1081 vf2iu.p C010,C400,28 +0x00003834: 0xD25C9001 vf2iu.t C010,C400,28 +0x00003838: 0xD25C9081 vf2iu.q C010,C400,28 +0x0000383C: 0xD25D1001 vf2iu.s S010,S400,29 +0x00003840: 0xD25D1081 vf2iu.p C010,C400,29 +0x00003844: 0xD25D9001 vf2iu.t C010,C400,29 +0x00003848: 0xD25D9081 vf2iu.q C010,C400,29 +0x0000384C: 0xD25E1001 vf2iu.s S010,S400,30 +0x00003850: 0xD25E1081 vf2iu.p C010,C400,30 +0x00003854: 0xD25E9001 vf2iu.t C010,C400,30 +0x00003858: 0xD25E9081 vf2iu.q C010,C400,30 +0x0000385C: 0xD25F1001 vf2iu.s S010,S400,31 +0x00003860: 0xD25F1081 vf2iu.p C010,C400,31 +0x00003864: 0xD25F9001 vf2iu.t C010,C400,31 +0x00003868: 0xD25F9081 vf2iu.q C010,C400,31 +0x0000386C: 0xD2601001 vf2id.s S010,S400,0 +0x00003870: 0xD2601081 vf2id.p C010,C400,0 +0x00003874: 0xD2609001 vf2id.t C010,C400,0 +0x00003878: 0xD2609081 vf2id.q C010,C400,0 +0x0000387C: 0xD2611001 vf2id.s S010,S400,1 +0x00003880: 0xD2611081 vf2id.p C010,C400,1 +0x00003884: 0xD2619001 vf2id.t C010,C400,1 +0x00003888: 0xD2619081 vf2id.q C010,C400,1 +0x0000388C: 0xD2621001 vf2id.s S010,S400,2 +0x00003890: 0xD2621081 vf2id.p C010,C400,2 +0x00003894: 0xD2629001 vf2id.t C010,C400,2 +0x00003898: 0xD2629081 vf2id.q C010,C400,2 +0x0000389C: 0xD2631001 vf2id.s S010,S400,3 +0x000038A0: 0xD2631081 vf2id.p C010,C400,3 +0x000038A4: 0xD2639001 vf2id.t C010,C400,3 +0x000038A8: 0xD2639081 vf2id.q C010,C400,3 +0x000038AC: 0xD2641001 vf2id.s S010,S400,4 +0x000038B0: 0xD2641081 vf2id.p C010,C400,4 +0x000038B4: 0xD2649001 vf2id.t C010,C400,4 +0x000038B8: 0xD2649081 vf2id.q C010,C400,4 +0x000038BC: 0xD2651001 vf2id.s S010,S400,5 +0x000038C0: 0xD2651081 vf2id.p C010,C400,5 +0x000038C4: 0xD2659001 vf2id.t C010,C400,5 +0x000038C8: 0xD2659081 vf2id.q C010,C400,5 +0x000038CC: 0xD2661001 vf2id.s S010,S400,6 +0x000038D0: 0xD2661081 vf2id.p C010,C400,6 +0x000038D4: 0xD2669001 vf2id.t C010,C400,6 +0x000038D8: 0xD2669081 vf2id.q C010,C400,6 +0x000038DC: 0xD2671001 vf2id.s S010,S400,7 +0x000038E0: 0xD2671081 vf2id.p C010,C400,7 +0x000038E4: 0xD2679001 vf2id.t C010,C400,7 +0x000038E8: 0xD2679081 vf2id.q C010,C400,7 +0x000038EC: 0xD2681001 vf2id.s S010,S400,8 +0x000038F0: 0xD2681081 vf2id.p C010,C400,8 +0x000038F4: 0xD2689001 vf2id.t C010,C400,8 +0x000038F8: 0xD2689081 vf2id.q C010,C400,8 +0x000038FC: 0xD2691001 vf2id.s S010,S400,9 +0x00003900: 0xD2691081 vf2id.p C010,C400,9 +0x00003904: 0xD2699001 vf2id.t C010,C400,9 +0x00003908: 0xD2699081 vf2id.q C010,C400,9 +0x0000390C: 0xD26A1001 vf2id.s S010,S400,10 +0x00003910: 0xD26A1081 vf2id.p C010,C400,10 +0x00003914: 0xD26A9001 vf2id.t C010,C400,10 +0x00003918: 0xD26A9081 vf2id.q C010,C400,10 +0x0000391C: 0xD26B1001 vf2id.s S010,S400,11 +0x00003920: 0xD26B1081 vf2id.p C010,C400,11 +0x00003924: 0xD26B9001 vf2id.t C010,C400,11 +0x00003928: 0xD26B9081 vf2id.q C010,C400,11 +0x0000392C: 0xD26C1001 vf2id.s S010,S400,12 +0x00003930: 0xD26C1081 vf2id.p C010,C400,12 +0x00003934: 0xD26C9001 vf2id.t C010,C400,12 +0x00003938: 0xD26C9081 vf2id.q C010,C400,12 +0x0000393C: 0xD26D1001 vf2id.s S010,S400,13 +0x00003940: 0xD26D1081 vf2id.p C010,C400,13 +0x00003944: 0xD26D9001 vf2id.t C010,C400,13 +0x00003948: 0xD26D9081 vf2id.q C010,C400,13 +0x0000394C: 0xD26E1001 vf2id.s S010,S400,14 +0x00003950: 0xD26E1081 vf2id.p C010,C400,14 +0x00003954: 0xD26E9001 vf2id.t C010,C400,14 +0x00003958: 0xD26E9081 vf2id.q C010,C400,14 +0x0000395C: 0xD26F1001 vf2id.s S010,S400,15 +0x00003960: 0xD26F1081 vf2id.p C010,C400,15 +0x00003964: 0xD26F9001 vf2id.t C010,C400,15 +0x00003968: 0xD26F9081 vf2id.q C010,C400,15 +0x0000396C: 0xD2701001 vf2id.s S010,S400,16 +0x00003970: 0xD2701081 vf2id.p C010,C400,16 +0x00003974: 0xD2709001 vf2id.t C010,C400,16 +0x00003978: 0xD2709081 vf2id.q C010,C400,16 +0x0000397C: 0xD2711001 vf2id.s S010,S400,17 +0x00003980: 0xD2711081 vf2id.p C010,C400,17 +0x00003984: 0xD2719001 vf2id.t C010,C400,17 +0x00003988: 0xD2719081 vf2id.q C010,C400,17 +0x0000398C: 0xD2721001 vf2id.s S010,S400,18 +0x00003990: 0xD2721081 vf2id.p C010,C400,18 +0x00003994: 0xD2729001 vf2id.t C010,C400,18 +0x00003998: 0xD2729081 vf2id.q C010,C400,18 +0x0000399C: 0xD2731001 vf2id.s S010,S400,19 +0x000039A0: 0xD2731081 vf2id.p C010,C400,19 +0x000039A4: 0xD2739001 vf2id.t C010,C400,19 +0x000039A8: 0xD2739081 vf2id.q C010,C400,19 +0x000039AC: 0xD2741001 vf2id.s S010,S400,20 +0x000039B0: 0xD2741081 vf2id.p C010,C400,20 +0x000039B4: 0xD2749001 vf2id.t C010,C400,20 +0x000039B8: 0xD2749081 vf2id.q C010,C400,20 +0x000039BC: 0xD2751001 vf2id.s S010,S400,21 +0x000039C0: 0xD2751081 vf2id.p C010,C400,21 +0x000039C4: 0xD2759001 vf2id.t C010,C400,21 +0x000039C8: 0xD2759081 vf2id.q C010,C400,21 +0x000039CC: 0xD2761001 vf2id.s S010,S400,22 +0x000039D0: 0xD2761081 vf2id.p C010,C400,22 +0x000039D4: 0xD2769001 vf2id.t C010,C400,22 +0x000039D8: 0xD2769081 vf2id.q C010,C400,22 +0x000039DC: 0xD2771001 vf2id.s S010,S400,23 +0x000039E0: 0xD2771081 vf2id.p C010,C400,23 +0x000039E4: 0xD2779001 vf2id.t C010,C400,23 +0x000039E8: 0xD2779081 vf2id.q C010,C400,23 +0x000039EC: 0xD2781001 vf2id.s S010,S400,24 +0x000039F0: 0xD2781081 vf2id.p C010,C400,24 +0x000039F4: 0xD2789001 vf2id.t C010,C400,24 +0x000039F8: 0xD2789081 vf2id.q C010,C400,24 +0x000039FC: 0xD2791001 vf2id.s S010,S400,25 +0x00003A00: 0xD2791081 vf2id.p C010,C400,25 +0x00003A04: 0xD2799001 vf2id.t C010,C400,25 +0x00003A08: 0xD2799081 vf2id.q C010,C400,25 +0x00003A0C: 0xD27A1001 vf2id.s S010,S400,26 +0x00003A10: 0xD27A1081 vf2id.p C010,C400,26 +0x00003A14: 0xD27A9001 vf2id.t C010,C400,26 +0x00003A18: 0xD27A9081 vf2id.q C010,C400,26 +0x00003A1C: 0xD27B1001 vf2id.s S010,S400,27 +0x00003A20: 0xD27B1081 vf2id.p C010,C400,27 +0x00003A24: 0xD27B9001 vf2id.t C010,C400,27 +0x00003A28: 0xD27B9081 vf2id.q C010,C400,27 +0x00003A2C: 0xD27C1001 vf2id.s S010,S400,28 +0x00003A30: 0xD27C1081 vf2id.p C010,C400,28 +0x00003A34: 0xD27C9001 vf2id.t C010,C400,28 +0x00003A38: 0xD27C9081 vf2id.q C010,C400,28 +0x00003A3C: 0xD27D1001 vf2id.s S010,S400,29 +0x00003A40: 0xD27D1081 vf2id.p C010,C400,29 +0x00003A44: 0xD27D9001 vf2id.t C010,C400,29 +0x00003A48: 0xD27D9081 vf2id.q C010,C400,29 +0x00003A4C: 0xD27E1001 vf2id.s S010,S400,30 +0x00003A50: 0xD27E1081 vf2id.p C010,C400,30 +0x00003A54: 0xD27E9001 vf2id.t C010,C400,30 +0x00003A58: 0xD27E9081 vf2id.q C010,C400,30 +0x00003A5C: 0xD27F1001 vf2id.s S010,S400,31 +0x00003A60: 0xD27F1081 vf2id.p C010,C400,31 +0x00003A64: 0xD27F9001 vf2id.t C010,C400,31 +0x00003A68: 0xD27F9081 vf2id.q C010,C400,31 +0x00003A6C: 0xD2801001 vi2f.s S010,S400,0 +0x00003A70: 0xD2801081 vi2f.p C010,C400,0 +0x00003A74: 0xD2809001 vi2f.t C010,C400,0 +0x00003A78: 0xD2809081 vi2f.q C010,C400,0 +0x00003A7C: 0xD2811001 vi2f.s S010,S400,1 +0x00003A80: 0xD2811081 vi2f.p C010,C400,1 +0x00003A84: 0xD2819001 vi2f.t C010,C400,1 +0x00003A88: 0xD2819081 vi2f.q C010,C400,1 +0x00003A8C: 0xD2821001 vi2f.s S010,S400,2 +0x00003A90: 0xD2821081 vi2f.p C010,C400,2 +0x00003A94: 0xD2829001 vi2f.t C010,C400,2 +0x00003A98: 0xD2829081 vi2f.q C010,C400,2 +0x00003A9C: 0xD2831001 vi2f.s S010,S400,3 +0x00003AA0: 0xD2831081 vi2f.p C010,C400,3 +0x00003AA4: 0xD2839001 vi2f.t C010,C400,3 +0x00003AA8: 0xD2839081 vi2f.q C010,C400,3 +0x00003AAC: 0xD2841001 vi2f.s S010,S400,4 +0x00003AB0: 0xD2841081 vi2f.p C010,C400,4 +0x00003AB4: 0xD2849001 vi2f.t C010,C400,4 +0x00003AB8: 0xD2849081 vi2f.q C010,C400,4 +0x00003ABC: 0xD2851001 vi2f.s S010,S400,5 +0x00003AC0: 0xD2851081 vi2f.p C010,C400,5 +0x00003AC4: 0xD2859001 vi2f.t C010,C400,5 +0x00003AC8: 0xD2859081 vi2f.q C010,C400,5 +0x00003ACC: 0xD2861001 vi2f.s S010,S400,6 +0x00003AD0: 0xD2861081 vi2f.p C010,C400,6 +0x00003AD4: 0xD2869001 vi2f.t C010,C400,6 +0x00003AD8: 0xD2869081 vi2f.q C010,C400,6 +0x00003ADC: 0xD2871001 vi2f.s S010,S400,7 +0x00003AE0: 0xD2871081 vi2f.p C010,C400,7 +0x00003AE4: 0xD2879001 vi2f.t C010,C400,7 +0x00003AE8: 0xD2879081 vi2f.q C010,C400,7 +0x00003AEC: 0xD2881001 vi2f.s S010,S400,8 +0x00003AF0: 0xD2881081 vi2f.p C010,C400,8 +0x00003AF4: 0xD2889001 vi2f.t C010,C400,8 +0x00003AF8: 0xD2889081 vi2f.q C010,C400,8 +0x00003AFC: 0xD2891001 vi2f.s S010,S400,9 +0x00003B00: 0xD2891081 vi2f.p C010,C400,9 +0x00003B04: 0xD2899001 vi2f.t C010,C400,9 +0x00003B08: 0xD2899081 vi2f.q C010,C400,9 +0x00003B0C: 0xD28A1001 vi2f.s S010,S400,10 +0x00003B10: 0xD28A1081 vi2f.p C010,C400,10 +0x00003B14: 0xD28A9001 vi2f.t C010,C400,10 +0x00003B18: 0xD28A9081 vi2f.q C010,C400,10 +0x00003B1C: 0xD28B1001 vi2f.s S010,S400,11 +0x00003B20: 0xD28B1081 vi2f.p C010,C400,11 +0x00003B24: 0xD28B9001 vi2f.t C010,C400,11 +0x00003B28: 0xD28B9081 vi2f.q C010,C400,11 +0x00003B2C: 0xD28C1001 vi2f.s S010,S400,12 +0x00003B30: 0xD28C1081 vi2f.p C010,C400,12 +0x00003B34: 0xD28C9001 vi2f.t C010,C400,12 +0x00003B38: 0xD28C9081 vi2f.q C010,C400,12 +0x00003B3C: 0xD28D1001 vi2f.s S010,S400,13 +0x00003B40: 0xD28D1081 vi2f.p C010,C400,13 +0x00003B44: 0xD28D9001 vi2f.t C010,C400,13 +0x00003B48: 0xD28D9081 vi2f.q C010,C400,13 +0x00003B4C: 0xD28E1001 vi2f.s S010,S400,14 +0x00003B50: 0xD28E1081 vi2f.p C010,C400,14 +0x00003B54: 0xD28E9001 vi2f.t C010,C400,14 +0x00003B58: 0xD28E9081 vi2f.q C010,C400,14 +0x00003B5C: 0xD28F1001 vi2f.s S010,S400,15 +0x00003B60: 0xD28F1081 vi2f.p C010,C400,15 +0x00003B64: 0xD28F9001 vi2f.t C010,C400,15 +0x00003B68: 0xD28F9081 vi2f.q C010,C400,15 +0x00003B6C: 0xD2901001 vi2f.s S010,S400,16 +0x00003B70: 0xD2901081 vi2f.p C010,C400,16 +0x00003B74: 0xD2909001 vi2f.t C010,C400,16 +0x00003B78: 0xD2909081 vi2f.q C010,C400,16 +0x00003B7C: 0xD2911001 vi2f.s S010,S400,17 +0x00003B80: 0xD2911081 vi2f.p C010,C400,17 +0x00003B84: 0xD2919001 vi2f.t C010,C400,17 +0x00003B88: 0xD2919081 vi2f.q C010,C400,17 +0x00003B8C: 0xD2921001 vi2f.s S010,S400,18 +0x00003B90: 0xD2921081 vi2f.p C010,C400,18 +0x00003B94: 0xD2929001 vi2f.t C010,C400,18 +0x00003B98: 0xD2929081 vi2f.q C010,C400,18 +0x00003B9C: 0xD2931001 vi2f.s S010,S400,19 +0x00003BA0: 0xD2931081 vi2f.p C010,C400,19 +0x00003BA4: 0xD2939001 vi2f.t C010,C400,19 +0x00003BA8: 0xD2939081 vi2f.q C010,C400,19 +0x00003BAC: 0xD2941001 vi2f.s S010,S400,20 +0x00003BB0: 0xD2941081 vi2f.p C010,C400,20 +0x00003BB4: 0xD2949001 vi2f.t C010,C400,20 +0x00003BB8: 0xD2949081 vi2f.q C010,C400,20 +0x00003BBC: 0xD2951001 vi2f.s S010,S400,21 +0x00003BC0: 0xD2951081 vi2f.p C010,C400,21 +0x00003BC4: 0xD2959001 vi2f.t C010,C400,21 +0x00003BC8: 0xD2959081 vi2f.q C010,C400,21 +0x00003BCC: 0xD2961001 vi2f.s S010,S400,22 +0x00003BD0: 0xD2961081 vi2f.p C010,C400,22 +0x00003BD4: 0xD2969001 vi2f.t C010,C400,22 +0x00003BD8: 0xD2969081 vi2f.q C010,C400,22 +0x00003BDC: 0xD2971001 vi2f.s S010,S400,23 +0x00003BE0: 0xD2971081 vi2f.p C010,C400,23 +0x00003BE4: 0xD2979001 vi2f.t C010,C400,23 +0x00003BE8: 0xD2979081 vi2f.q C010,C400,23 +0x00003BEC: 0xD2981001 vi2f.s S010,S400,24 +0x00003BF0: 0xD2981081 vi2f.p C010,C400,24 +0x00003BF4: 0xD2989001 vi2f.t C010,C400,24 +0x00003BF8: 0xD2989081 vi2f.q C010,C400,24 +0x00003BFC: 0xD2991001 vi2f.s S010,S400,25 +0x00003C00: 0xD2991081 vi2f.p C010,C400,25 +0x00003C04: 0xD2999001 vi2f.t C010,C400,25 +0x00003C08: 0xD2999081 vi2f.q C010,C400,25 +0x00003C0C: 0xD29A1001 vi2f.s S010,S400,26 +0x00003C10: 0xD29A1081 vi2f.p C010,C400,26 +0x00003C14: 0xD29A9001 vi2f.t C010,C400,26 +0x00003C18: 0xD29A9081 vi2f.q C010,C400,26 +0x00003C1C: 0xD29B1001 vi2f.s S010,S400,27 +0x00003C20: 0xD29B1081 vi2f.p C010,C400,27 +0x00003C24: 0xD29B9001 vi2f.t C010,C400,27 +0x00003C28: 0xD29B9081 vi2f.q C010,C400,27 +0x00003C2C: 0xD29C1001 vi2f.s S010,S400,28 +0x00003C30: 0xD29C1081 vi2f.p C010,C400,28 +0x00003C34: 0xD29C9001 vi2f.t C010,C400,28 +0x00003C38: 0xD29C9081 vi2f.q C010,C400,28 +0x00003C3C: 0xD29D1001 vi2f.s S010,S400,29 +0x00003C40: 0xD29D1081 vi2f.p C010,C400,29 +0x00003C44: 0xD29D9001 vi2f.t C010,C400,29 +0x00003C48: 0xD29D9081 vi2f.q C010,C400,29 +0x00003C4C: 0xD29E1001 vi2f.s S010,S400,30 +0x00003C50: 0xD29E1081 vi2f.p C010,C400,30 +0x00003C54: 0xD29E9001 vi2f.t C010,C400,30 +0x00003C58: 0xD29E9081 vi2f.q C010,C400,30 +0x00003C5C: 0xD29F1001 vi2f.s S010,S400,31 +0x00003C60: 0xD29F1081 vi2f.p C010,C400,31 +0x00003C64: 0xD29F9001 vi2f.t C010,C400,31 +0x00003C68: 0xD29F9081 vi2f.q C010,C400,31 +0x00003C6C: 0xD2A01001 vcmovt.s S010,S400,cc0 +0x00003C70: 0xD2A01081 vcmovt.p C010,C400,cc0 +0x00003C74: 0xD2A09001 vcmovt.t C010,C400,cc0 +0x00003C78: 0xD2A09081 vcmovt.q C010,C400,cc0 +0x00003C7C: 0xD2A11001 vcmovt.s S010,S400,cc1 +0x00003C80: 0xD2A11081 vcmovt.p C010,C400,cc1 +0x00003C84: 0xD2A19001 vcmovt.t C010,C400,cc1 +0x00003C88: 0xD2A19081 vcmovt.q C010,C400,cc1 +0x00003C8C: 0xD2A21001 vcmovt.s S010,S400,cc2 +0x00003C90: 0xD2A21081 vcmovt.p C010,C400,cc2 +0x00003C94: 0xD2A29001 vcmovt.t C010,C400,cc2 +0x00003C98: 0xD2A29081 vcmovt.q C010,C400,cc2 +0x00003C9C: 0xD2A31001 vcmovt.s S010,S400,cc3 +0x00003CA0: 0xD2A31081 vcmovt.p C010,C400,cc3 +0x00003CA4: 0xD2A39001 vcmovt.t C010,C400,cc3 +0x00003CA8: 0xD2A39081 vcmovt.q C010,C400,cc3 +0x00003CAC: 0xD2A41001 vcmovt.s S010,S400,cc4 +0x00003CB0: 0xD2A41081 vcmovt.p C010,C400,cc4 +0x00003CB4: 0xD2A49001 vcmovt.t C010,C400,cc4 +0x00003CB8: 0xD2A49081 vcmovt.q C010,C400,cc4 +0x00003CBC: 0xD2A51001 vcmovt.s S010,S400,cc5 +0x00003CC0: 0xD2A51081 vcmovt.p C010,C400,cc5 +0x00003CC4: 0xD2A59001 vcmovt.t C010,C400,cc5 +0x00003CC8: 0xD2A59081 vcmovt.q C010,C400,cc5 +0x00003CCC: 0xD2A61001 vcmovt.s S010,S400,cc6 +0x00003CD0: 0xD2A61081 vcmovt.p C010,C400,cc6 +0x00003CD4: 0xD2A69001 vcmovt.t C010,C400,cc6 +0x00003CD8: 0xD2A69081 vcmovt.q C010,C400,cc6 +0x00003CDC: 0xD2A71001 vcmovt.s S010,S400,cc7 +0x00003CE0: 0xD2A71081 vcmovt.p C010,C400,cc7 +0x00003CE4: 0xD2A79001 vcmovt.t C010,C400,cc7 +0x00003CE8: 0xD2A79081 vcmovt.q C010,C400,cc7 +0x00003CEC: 0xD2A81001 vcmovf.s S010,S400,cc0 +0x00003CF0: 0xD2A81081 vcmovf.p C010,C400,cc0 +0x00003CF4: 0xD2A89001 vcmovf.t C010,C400,cc0 +0x00003CF8: 0xD2A89081 vcmovf.q C010,C400,cc0 +0x00003CFC: 0xD2A91001 vcmovf.s S010,S400,cc1 +0x00003D00: 0xD2A91081 vcmovf.p C010,C400,cc1 +0x00003D04: 0xD2A99001 vcmovf.t C010,C400,cc1 +0x00003D08: 0xD2A99081 vcmovf.q C010,C400,cc1 +0x00003D0C: 0xD2AA1001 vcmovf.s S010,S400,cc2 +0x00003D10: 0xD2AA1081 vcmovf.p C010,C400,cc2 +0x00003D14: 0xD2AA9001 vcmovf.t C010,C400,cc2 +0x00003D18: 0xD2AA9081 vcmovf.q C010,C400,cc2 +0x00003D1C: 0xD2AB1001 vcmovf.s S010,S400,cc3 +0x00003D20: 0xD2AB1081 vcmovf.p C010,C400,cc3 +0x00003D24: 0xD2AB9001 vcmovf.t C010,C400,cc3 +0x00003D28: 0xD2AB9081 vcmovf.q C010,C400,cc3 +0x00003D2C: 0xD2AC1001 vcmovf.s S010,S400,cc4 +0x00003D30: 0xD2AC1081 vcmovf.p C010,C400,cc4 +0x00003D34: 0xD2AC9001 vcmovf.t C010,C400,cc4 +0x00003D38: 0xD2AC9081 vcmovf.q C010,C400,cc4 +0x00003D3C: 0xD2AD1001 vcmovf.s S010,S400,cc5 +0x00003D40: 0xD2AD1081 vcmovf.p C010,C400,cc5 +0x00003D44: 0xD2AD9001 vcmovf.t C010,C400,cc5 +0x00003D48: 0xD2AD9081 vcmovf.q C010,C400,cc5 +0x00003D4C: 0xD2AE1001 vcmovf.s S010,S400,cc6 +0x00003D50: 0xD2AE1081 vcmovf.p C010,C400,cc6 +0x00003D54: 0xD2AE9001 vcmovf.t C010,C400,cc6 +0x00003D58: 0xD2AE9081 vcmovf.q C010,C400,cc6 +0x00003D5C: 0xD2AF1001 vcmovf.s S010,S400,cc7 +0x00003D60: 0xD2AF1081 vcmovf.p C010,C400,cc7 +0x00003D64: 0xD2AF9001 vcmovf.t C010,C400,cc7 +0x00003D68: 0xD2AF9081 vcmovf.q C010,C400,cc7 +0x00003D6C: 0xD2B01001 vcmovt.s S010,S400,cc0 +0x00003D70: 0xD2B01081 vcmovt.p C010,C400,cc0 +0x00003D74: 0xD2B09001 vcmovt.t C010,C400,cc0 +0x00003D78: 0xD2B09081 vcmovt.q C010,C400,cc0 +0x00003D7C: 0xD2B11001 vcmovt.s S010,S400,cc1 +0x00003D80: 0xD2B11081 vcmovt.p C010,C400,cc1 +0x00003D84: 0xD2B19001 vcmovt.t C010,C400,cc1 +0x00003D88: 0xD2B19081 vcmovt.q C010,C400,cc1 +0x00003D8C: 0xD2B21001 vcmovt.s S010,S400,cc2 +0x00003D90: 0xD2B21081 vcmovt.p C010,C400,cc2 +0x00003D94: 0xD2B29001 vcmovt.t C010,C400,cc2 +0x00003D98: 0xD2B29081 vcmovt.q C010,C400,cc2 +0x00003D9C: 0xD2B31001 vcmovt.s S010,S400,cc3 +0x00003DA0: 0xD2B31081 vcmovt.p C010,C400,cc3 +0x00003DA4: 0xD2B39001 vcmovt.t C010,C400,cc3 +0x00003DA8: 0xD2B39081 vcmovt.q C010,C400,cc3 +0x00003DAC: 0xD2B41001 vcmovt.s S010,S400,cc4 +0x00003DB0: 0xD2B41081 vcmovt.p C010,C400,cc4 +0x00003DB4: 0xD2B49001 vcmovt.t C010,C400,cc4 +0x00003DB8: 0xD2B49081 vcmovt.q C010,C400,cc4 +0x00003DBC: 0xD2B51001 vcmovt.s S010,S400,cc5 +0x00003DC0: 0xD2B51081 vcmovt.p C010,C400,cc5 +0x00003DC4: 0xD2B59001 vcmovt.t C010,C400,cc5 +0x00003DC8: 0xD2B59081 vcmovt.q C010,C400,cc5 +0x00003DCC: 0xD2B61001 vcmovt.s S010,S400,cc6 +0x00003DD0: 0xD2B61081 vcmovt.p C010,C400,cc6 +0x00003DD4: 0xD2B69001 vcmovt.t C010,C400,cc6 +0x00003DD8: 0xD2B69081 vcmovt.q C010,C400,cc6 +0x00003DDC: 0xD2B71001 vcmovt.s S010,S400,cc7 +0x00003DE0: 0xD2B71081 vcmovt.p C010,C400,cc7 +0x00003DE4: 0xD2B79001 vcmovt.t C010,C400,cc7 +0x00003DE8: 0xD2B79081 vcmovt.q C010,C400,cc7 +0x00003DEC: 0xD2B81001 vcmovf.s S010,S400,cc0 +0x00003DF0: 0xD2B81081 vcmovf.p C010,C400,cc0 +0x00003DF4: 0xD2B89001 vcmovf.t C010,C400,cc0 +0x00003DF8: 0xD2B89081 vcmovf.q C010,C400,cc0 +0x00003DFC: 0xD2B91001 vcmovf.s S010,S400,cc1 +0x00003E00: 0xD2B91081 vcmovf.p C010,C400,cc1 +0x00003E04: 0xD2B99001 vcmovf.t C010,C400,cc1 +0x00003E08: 0xD2B99081 vcmovf.q C010,C400,cc1 +0x00003E0C: 0xD2BA1001 vcmovf.s S010,S400,cc2 +0x00003E10: 0xD2BA1081 vcmovf.p C010,C400,cc2 +0x00003E14: 0xD2BA9001 vcmovf.t C010,C400,cc2 +0x00003E18: 0xD2BA9081 vcmovf.q C010,C400,cc2 +0x00003E1C: 0xD2BB1001 vcmovf.s S010,S400,cc3 +0x00003E20: 0xD2BB1081 vcmovf.p C010,C400,cc3 +0x00003E24: 0xD2BB9001 vcmovf.t C010,C400,cc3 +0x00003E28: 0xD2BB9081 vcmovf.q C010,C400,cc3 +0x00003E2C: 0xD2BC1001 vcmovf.s S010,S400,cc4 +0x00003E30: 0xD2BC1081 vcmovf.p C010,C400,cc4 +0x00003E34: 0xD2BC9001 vcmovf.t C010,C400,cc4 +0x00003E38: 0xD2BC9081 vcmovf.q C010,C400,cc4 +0x00003E3C: 0xD2BD1001 vcmovf.s S010,S400,cc5 +0x00003E40: 0xD2BD1081 vcmovf.p C010,C400,cc5 +0x00003E44: 0xD2BD9001 vcmovf.t C010,C400,cc5 +0x00003E48: 0xD2BD9081 vcmovf.q C010,C400,cc5 +0x00003E4C: 0xD2BE1001 vcmovf.s S010,S400,cc6 +0x00003E50: 0xD2BE1081 vcmovf.p C010,C400,cc6 +0x00003E54: 0xD2BE9001 vcmovf.t C010,C400,cc6 +0x00003E58: 0xD2BE9081 vcmovf.q C010,C400,cc6 +0x00003E5C: 0xD2BF1001 vcmovf.s S010,S400,cc7 +0x00003E60: 0xD2BF1081 vcmovf.p C010,C400,cc7 +0x00003E64: 0xD2BF9001 vcmovf.t C010,C400,cc7 +0x00003E68: 0xD2BF9081 vcmovf.q C010,C400,cc7 +0x00003E6C: 0xD2C01001 illegal 02 (00003E68) WAW +0x00003E70: 0xD2C01081 illegal +0x00003E74: 0xD2C09001 illegal +0x00003E78: 0xD2C09081 illegal +0x00003E7C: 0xD2C11001 illegal +0x00003E80: 0xD2C11081 illegal +0x00003E84: 0xD2C19001 illegal +0x00003E88: 0xD2C19081 illegal +0x00003E8C: 0xD2C21001 illegal +0x00003E90: 0xD2C21081 illegal +0x00003E94: 0xD2C29001 illegal +0x00003E98: 0xD2C29081 illegal +0x00003E9C: 0xD2C31001 illegal +0x00003EA0: 0xD2C31081 illegal +0x00003EA4: 0xD2C39001 illegal +0x00003EA8: 0xD2C39081 illegal +0x00003EAC: 0xD2C41001 illegal +0x00003EB0: 0xD2C41081 illegal +0x00003EB4: 0xD2C49001 illegal +0x00003EB8: 0xD2C49081 illegal +0x00003EBC: 0xD2C51001 illegal +0x00003EC0: 0xD2C51081 illegal +0x00003EC4: 0xD2C59001 illegal +0x00003EC8: 0xD2C59081 illegal +0x00003ECC: 0xD2C61001 illegal +0x00003ED0: 0xD2C61081 illegal +0x00003ED4: 0xD2C69001 illegal +0x00003ED8: 0xD2C69081 illegal +0x00003EDC: 0xD2C71001 illegal +0x00003EE0: 0xD2C71081 illegal +0x00003EE4: 0xD2C79001 illegal +0x00003EE8: 0xD2C79081 illegal +0x00003EEC: 0xD2C81001 illegal +0x00003EF0: 0xD2C81081 illegal +0x00003EF4: 0xD2C89001 illegal +0x00003EF8: 0xD2C89081 illegal +0x00003EFC: 0xD2C91001 illegal +0x00003F00: 0xD2C91081 illegal +0x00003F04: 0xD2C99001 illegal +0x00003F08: 0xD2C99081 illegal +0x00003F0C: 0xD2CA1001 illegal +0x00003F10: 0xD2CA1081 illegal +0x00003F14: 0xD2CA9001 illegal +0x00003F18: 0xD2CA9081 illegal +0x00003F1C: 0xD2CB1001 illegal +0x00003F20: 0xD2CB1081 illegal +0x00003F24: 0xD2CB9001 illegal +0x00003F28: 0xD2CB9081 illegal +0x00003F2C: 0xD2CC1001 illegal +0x00003F30: 0xD2CC1081 illegal +0x00003F34: 0xD2CC9001 illegal +0x00003F38: 0xD2CC9081 illegal +0x00003F3C: 0xD2CD1001 illegal +0x00003F40: 0xD2CD1081 illegal +0x00003F44: 0xD2CD9001 illegal +0x00003F48: 0xD2CD9081 illegal +0x00003F4C: 0xD2CE1001 illegal +0x00003F50: 0xD2CE1081 illegal +0x00003F54: 0xD2CE9001 illegal +0x00003F58: 0xD2CE9081 illegal +0x00003F5C: 0xD2CF1001 illegal +0x00003F60: 0xD2CF1081 illegal +0x00003F64: 0xD2CF9001 illegal +0x00003F68: 0xD2CF9081 illegal +0x00003F6C: 0xD2D01001 illegal +0x00003F70: 0xD2D01081 illegal +0x00003F74: 0xD2D09001 illegal +0x00003F78: 0xD2D09081 illegal +0x00003F7C: 0xD2D11001 illegal +0x00003F80: 0xD2D11081 illegal +0x00003F84: 0xD2D19001 illegal +0x00003F88: 0xD2D19081 illegal +0x00003F8C: 0xD2D21001 illegal +0x00003F90: 0xD2D21081 illegal +0x00003F94: 0xD2D29001 illegal +0x00003F98: 0xD2D29081 illegal +0x00003F9C: 0xD2D31001 illegal +0x00003FA0: 0xD2D31081 illegal +0x00003FA4: 0xD2D39001 illegal +0x00003FA8: 0xD2D39081 illegal +0x00003FAC: 0xD2D41001 illegal +0x00003FB0: 0xD2D41081 illegal +0x00003FB4: 0xD2D49001 illegal +0x00003FB8: 0xD2D49081 illegal +0x00003FBC: 0xD2D51001 illegal +0x00003FC0: 0xD2D51081 illegal +0x00003FC4: 0xD2D59001 illegal +0x00003FC8: 0xD2D59081 illegal +0x00003FCC: 0xD2D61001 illegal +0x00003FD0: 0xD2D61081 illegal +0x00003FD4: 0xD2D69001 illegal +0x00003FD8: 0xD2D69081 illegal +0x00003FDC: 0xD2D71001 illegal +0x00003FE0: 0xD2D71081 illegal +0x00003FE4: 0xD2D79001 illegal +0x00003FE8: 0xD2D79081 illegal +0x00003FEC: 0xD2D81001 illegal +0x00003FF0: 0xD2D81081 illegal +0x00003FF4: 0xD2D89001 illegal +0x00003FF8: 0xD2D89081 illegal +0x00003FFC: 0xD2D91001 illegal +0x00004000: 0xD2D91081 illegal +0x00004004: 0xD2D99001 illegal +0x00004008: 0xD2D99081 illegal +0x0000400C: 0xD2DA1001 illegal +0x00004010: 0xD2DA1081 illegal +0x00004014: 0xD2DA9001 illegal +0x00004018: 0xD2DA9081 illegal +0x0000401C: 0xD2DB1001 illegal +0x00004020: 0xD2DB1081 illegal +0x00004024: 0xD2DB9001 illegal +0x00004028: 0xD2DB9081 illegal +0x0000402C: 0xD2DC1001 illegal +0x00004030: 0xD2DC1081 illegal +0x00004034: 0xD2DC9001 illegal +0x00004038: 0xD2DC9081 illegal +0x0000403C: 0xD2DD1001 illegal +0x00004040: 0xD2DD1081 illegal +0x00004044: 0xD2DD9001 illegal +0x00004048: 0xD2DD9081 illegal +0x0000404C: 0xD2DE1001 illegal +0x00004050: 0xD2DE1081 illegal +0x00004054: 0xD2DE9001 illegal +0x00004058: 0xD2DE9081 illegal +0x0000405C: 0xD2DF1001 illegal +0x00004060: 0xD2DF1081 illegal +0x00004064: 0xD2DF9001 illegal +0x00004068: 0xD2DF9081 illegal +0x0000406C: 0xD2E01001 illegal +0x00004070: 0xD2E01081 illegal +0x00004074: 0xD2E09001 illegal +0x00004078: 0xD2E09081 illegal +0x0000407C: 0xD2E11001 illegal +0x00004080: 0xD2E11081 illegal +0x00004084: 0xD2E19001 illegal +0x00004088: 0xD2E19081 illegal +0x0000408C: 0xD2E21001 illegal +0x00004090: 0xD2E21081 illegal +0x00004094: 0xD2E29001 illegal +0x00004098: 0xD2E29081 illegal +0x0000409C: 0xD2E31001 illegal +0x000040A0: 0xD2E31081 illegal +0x000040A4: 0xD2E39001 illegal +0x000040A8: 0xD2E39081 illegal +0x000040AC: 0xD2E41001 illegal +0x000040B0: 0xD2E41081 illegal +0x000040B4: 0xD2E49001 illegal +0x000040B8: 0xD2E49081 illegal +0x000040BC: 0xD2E51001 illegal +0x000040C0: 0xD2E51081 illegal +0x000040C4: 0xD2E59001 illegal +0x000040C8: 0xD2E59081 illegal +0x000040CC: 0xD2E61001 illegal +0x000040D0: 0xD2E61081 illegal +0x000040D4: 0xD2E69001 illegal +0x000040D8: 0xD2E69081 illegal +0x000040DC: 0xD2E71001 illegal +0x000040E0: 0xD2E71081 illegal +0x000040E4: 0xD2E79001 illegal +0x000040E8: 0xD2E79081 illegal +0x000040EC: 0xD2E81001 illegal +0x000040F0: 0xD2E81081 illegal +0x000040F4: 0xD2E89001 illegal +0x000040F8: 0xD2E89081 illegal +0x000040FC: 0xD2E91001 illegal +0x00004100: 0xD2E91081 illegal +0x00004104: 0xD2E99001 illegal +0x00004108: 0xD2E99081 illegal +0x0000410C: 0xD2EA1001 illegal +0x00004110: 0xD2EA1081 illegal +0x00004114: 0xD2EA9001 illegal +0x00004118: 0xD2EA9081 illegal +0x0000411C: 0xD2EB1001 illegal +0x00004120: 0xD2EB1081 illegal +0x00004124: 0xD2EB9001 illegal +0x00004128: 0xD2EB9081 illegal +0x0000412C: 0xD2EC1001 illegal +0x00004130: 0xD2EC1081 illegal +0x00004134: 0xD2EC9001 illegal +0x00004138: 0xD2EC9081 illegal +0x0000413C: 0xD2ED1001 illegal +0x00004140: 0xD2ED1081 illegal +0x00004144: 0xD2ED9001 illegal +0x00004148: 0xD2ED9081 illegal +0x0000414C: 0xD2EE1001 illegal +0x00004150: 0xD2EE1081 illegal +0x00004154: 0xD2EE9001 illegal +0x00004158: 0xD2EE9081 illegal +0x0000415C: 0xD2EF1001 illegal +0x00004160: 0xD2EF1081 illegal +0x00004164: 0xD2EF9001 illegal +0x00004168: 0xD2EF9081 illegal +0x0000416C: 0xD2F01001 illegal +0x00004170: 0xD2F01081 illegal +0x00004174: 0xD2F09001 illegal +0x00004178: 0xD2F09081 illegal +0x0000417C: 0xD2F11001 illegal +0x00004180: 0xD2F11081 illegal +0x00004184: 0xD2F19001 illegal +0x00004188: 0xD2F19081 illegal +0x0000418C: 0xD2F21001 illegal +0x00004190: 0xD2F21081 illegal +0x00004194: 0xD2F29001 illegal +0x00004198: 0xD2F29081 illegal +0x0000419C: 0xD2F31001 illegal +0x000041A0: 0xD2F31081 illegal +0x000041A4: 0xD2F39001 illegal +0x000041A8: 0xD2F39081 illegal +0x000041AC: 0xD2F41001 illegal +0x000041B0: 0xD2F41081 illegal +0x000041B4: 0xD2F49001 illegal +0x000041B8: 0xD2F49081 illegal +0x000041BC: 0xD2F51001 illegal +0x000041C0: 0xD2F51081 illegal +0x000041C4: 0xD2F59001 illegal +0x000041C8: 0xD2F59081 illegal +0x000041CC: 0xD2F61001 illegal +0x000041D0: 0xD2F61081 illegal +0x000041D4: 0xD2F69001 illegal +0x000041D8: 0xD2F69081 illegal +0x000041DC: 0xD2F71001 illegal +0x000041E0: 0xD2F71081 illegal +0x000041E4: 0xD2F79001 illegal +0x000041E8: 0xD2F79081 illegal +0x000041EC: 0xD2F81001 illegal +0x000041F0: 0xD2F81081 illegal +0x000041F4: 0xD2F89001 illegal +0x000041F8: 0xD2F89081 illegal +0x000041FC: 0xD2F91001 illegal +0x00004200: 0xD2F91081 illegal +0x00004204: 0xD2F99001 illegal +0x00004208: 0xD2F99081 illegal +0x0000420C: 0xD2FA1001 illegal +0x00004210: 0xD2FA1081 illegal +0x00004214: 0xD2FA9001 illegal +0x00004218: 0xD2FA9081 illegal +0x0000421C: 0xD2FB1001 illegal +0x00004220: 0xD2FB1081 illegal +0x00004224: 0xD2FB9001 illegal +0x00004228: 0xD2FB9081 illegal +0x0000422C: 0xD2FC1001 illegal +0x00004230: 0xD2FC1081 illegal +0x00004234: 0xD2FC9001 illegal +0x00004238: 0xD2FC9081 illegal +0x0000423C: 0xD2FD1001 illegal +0x00004240: 0xD2FD1081 illegal +0x00004244: 0xD2FD9001 illegal +0x00004248: 0xD2FD9081 illegal +0x0000424C: 0xD2FE1001 illegal +0x00004250: 0xD2FE1081 illegal +0x00004254: 0xD2FE9001 illegal +0x00004258: 0xD2FE9081 illegal +0x0000425C: 0xD2FF1001 illegal +0x00004260: 0xD2FF1081 illegal +0x00004264: 0xD2FF9001 illegal +0x00004268: 0xD2FF9081 illegal +0x0000426C: 0x03E00008 jr ra +0x00004270: 0x00000000 nop + +vfpu4_fmt3_all: +0x00004274: 0xD3001001 vwbn.s S010,S400,0 +0x00004278: 0xD3011001 vwbn.s S010,S400,1 +0x0000427C: 0xD3021001 vwbn.s S010,S400,2 +0x00004280: 0xD3031001 vwbn.s S010,S400,3 +0x00004284: 0xD3041001 vwbn.s S010,S400,4 +0x00004288: 0xD3051001 vwbn.s S010,S400,5 +0x0000428C: 0xD3061001 vwbn.s S010,S400,6 +0x00004290: 0xD3071001 vwbn.s S010,S400,7 +0x00004294: 0xD3081001 vwbn.s S010,S400,8 +0x00004298: 0xD3091001 vwbn.s S010,S400,9 +0x0000429C: 0xD30A1001 vwbn.s S010,S400,10 +0x000042A0: 0xD30B1001 vwbn.s S010,S400,11 +0x000042A4: 0xD30C1001 vwbn.s S010,S400,12 +0x000042A8: 0xD30D1001 vwbn.s S010,S400,13 +0x000042AC: 0xD30E1001 vwbn.s S010,S400,14 +0x000042B0: 0xD30F1001 vwbn.s S010,S400,15 +0x000042B4: 0xD3101001 vwbn.s S010,S400,16 +0x000042B8: 0xD3111001 vwbn.s S010,S400,17 +0x000042BC: 0xD3121001 vwbn.s S010,S400,18 +0x000042C0: 0xD3131001 vwbn.s S010,S400,19 +0x000042C4: 0xD3141001 vwbn.s S010,S400,20 +0x000042C8: 0xD3151001 vwbn.s S010,S400,21 +0x000042CC: 0xD3161001 vwbn.s S010,S400,22 +0x000042D0: 0xD3171001 vwbn.s S010,S400,23 +0x000042D4: 0xD3181001 vwbn.s S010,S400,24 +0x000042D8: 0xD3191001 vwbn.s S010,S400,25 +0x000042DC: 0xD31A1001 vwbn.s S010,S400,26 +0x000042E0: 0xD31B1001 vwbn.s S010,S400,27 +0x000042E4: 0xD31C1001 vwbn.s S010,S400,28 +0x000042E8: 0xD31D1001 vwbn.s S010,S400,29 +0x000042EC: 0xD31E1001 vwbn.s S010,S400,30 +0x000042F0: 0xD31F1001 vwbn.s S010,S400,31 +0x000042F4: 0xD3201001 vwbn.s S010,S400,32 +0x000042F8: 0xD3211001 vwbn.s S010,S400,33 +0x000042FC: 0xD3221001 vwbn.s S010,S400,34 +0x00004300: 0xD3231001 vwbn.s S010,S400,35 +0x00004304: 0xD3241001 vwbn.s S010,S400,36 +0x00004308: 0xD3251001 vwbn.s S010,S400,37 +0x0000430C: 0xD3261001 vwbn.s S010,S400,38 +0x00004310: 0xD3271001 vwbn.s S010,S400,39 +0x00004314: 0xD3281001 vwbn.s S010,S400,40 +0x00004318: 0xD3291001 vwbn.s S010,S400,41 +0x0000431C: 0xD32A1001 vwbn.s S010,S400,42 +0x00004320: 0xD32B1001 vwbn.s S010,S400,43 +0x00004324: 0xD32C1001 vwbn.s S010,S400,44 +0x00004328: 0xD32D1001 vwbn.s S010,S400,45 +0x0000432C: 0xD32E1001 vwbn.s S010,S400,46 +0x00004330: 0xD32F1001 vwbn.s S010,S400,47 +0x00004334: 0xD3301001 vwbn.s S010,S400,48 +0x00004338: 0xD3311001 vwbn.s S010,S400,49 +0x0000433C: 0xD3321001 vwbn.s S010,S400,50 +0x00004340: 0xD3331001 vwbn.s S010,S400,51 +0x00004344: 0xD3341001 vwbn.s S010,S400,52 +0x00004348: 0xD3351001 vwbn.s S010,S400,53 +0x0000434C: 0xD3361001 vwbn.s S010,S400,54 +0x00004350: 0xD3371001 vwbn.s S010,S400,55 +0x00004354: 0xD3381001 vwbn.s S010,S400,56 +0x00004358: 0xD3391001 vwbn.s S010,S400,57 +0x0000435C: 0xD33A1001 vwbn.s S010,S400,58 +0x00004360: 0xD33B1001 vwbn.s S010,S400,59 +0x00004364: 0xD33C1001 vwbn.s S010,S400,60 +0x00004368: 0xD33D1001 vwbn.s S010,S400,61 +0x0000436C: 0xD33E1001 vwbn.s S010,S400,62 +0x00004370: 0xD33F1001 vwbn.s S010,S400,63 +0x00004374: 0xD3401001 vwbn.s S010,S400,64 +0x00004378: 0xD3411001 vwbn.s S010,S400,65 +0x0000437C: 0xD3421001 vwbn.s S010,S400,66 +0x00004380: 0xD3431001 vwbn.s S010,S400,67 +0x00004384: 0xD3441001 vwbn.s S010,S400,68 +0x00004388: 0xD3451001 vwbn.s S010,S400,69 +0x0000438C: 0xD3461001 vwbn.s S010,S400,70 +0x00004390: 0xD3471001 vwbn.s S010,S400,71 +0x00004394: 0xD3481001 vwbn.s S010,S400,72 +0x00004398: 0xD3491001 vwbn.s S010,S400,73 +0x0000439C: 0xD34A1001 vwbn.s S010,S400,74 +0x000043A0: 0xD34B1001 vwbn.s S010,S400,75 +0x000043A4: 0xD34C1001 vwbn.s S010,S400,76 +0x000043A8: 0xD34D1001 vwbn.s S010,S400,77 +0x000043AC: 0xD34E1001 vwbn.s S010,S400,78 +0x000043B0: 0xD34F1001 vwbn.s S010,S400,79 +0x000043B4: 0xD3501001 vwbn.s S010,S400,80 +0x000043B8: 0xD3511001 vwbn.s S010,S400,81 +0x000043BC: 0xD3521001 vwbn.s S010,S400,82 +0x000043C0: 0xD3531001 vwbn.s S010,S400,83 +0x000043C4: 0xD3541001 vwbn.s S010,S400,84 +0x000043C8: 0xD3551001 vwbn.s S010,S400,85 +0x000043CC: 0xD3561001 vwbn.s S010,S400,86 +0x000043D0: 0xD3571001 vwbn.s S010,S400,87 +0x000043D4: 0xD3581001 vwbn.s S010,S400,88 +0x000043D8: 0xD3591001 vwbn.s S010,S400,89 +0x000043DC: 0xD35A1001 vwbn.s S010,S400,90 +0x000043E0: 0xD35B1001 vwbn.s S010,S400,91 +0x000043E4: 0xD35C1001 vwbn.s S010,S400,92 +0x000043E8: 0xD35D1001 vwbn.s S010,S400,93 +0x000043EC: 0xD35E1001 vwbn.s S010,S400,94 +0x000043F0: 0xD35F1001 vwbn.s S010,S400,95 +0x000043F4: 0xD3601001 vwbn.s S010,S400,96 +0x000043F8: 0xD3611001 vwbn.s S010,S400,97 +0x000043FC: 0xD3621001 vwbn.s S010,S400,98 +0x00004400: 0xD3631001 vwbn.s S010,S400,99 +0x00004404: 0xD3641001 vwbn.s S010,S400,100 +0x00004408: 0xD3651001 vwbn.s S010,S400,101 +0x0000440C: 0xD3661001 vwbn.s S010,S400,102 +0x00004410: 0xD3671001 vwbn.s S010,S400,103 +0x00004414: 0xD3681001 vwbn.s S010,S400,104 +0x00004418: 0xD3691001 vwbn.s S010,S400,105 +0x0000441C: 0xD36A1001 vwbn.s S010,S400,106 +0x00004420: 0xD36B1001 vwbn.s S010,S400,107 +0x00004424: 0xD36C1001 vwbn.s S010,S400,108 +0x00004428: 0xD36D1001 vwbn.s S010,S400,109 +0x0000442C: 0xD36E1001 vwbn.s S010,S400,110 +0x00004430: 0xD36F1001 vwbn.s S010,S400,111 +0x00004434: 0xD3701001 vwbn.s S010,S400,112 +0x00004438: 0xD3711001 vwbn.s S010,S400,113 +0x0000443C: 0xD3721001 vwbn.s S010,S400,114 +0x00004440: 0xD3731001 vwbn.s S010,S400,115 +0x00004444: 0xD3741001 vwbn.s S010,S400,116 +0x00004448: 0xD3751001 vwbn.s S010,S400,117 +0x0000444C: 0xD3761001 vwbn.s S010,S400,118 +0x00004450: 0xD3771001 vwbn.s S010,S400,119 +0x00004454: 0xD3781001 vwbn.s S010,S400,120 +0x00004458: 0xD3791001 vwbn.s S010,S400,121 +0x0000445C: 0xD37A1001 vwbn.s S010,S400,122 +0x00004460: 0xD37B1001 vwbn.s S010,S400,123 +0x00004464: 0xD37C1001 vwbn.s S010,S400,124 +0x00004468: 0xD37D1001 vwbn.s S010,S400,125 +0x0000446C: 0xD37E1001 vwbn.s S010,S400,126 +0x00004470: 0xD37F1001 vwbn.s S010,S400,127 +0x00004474: 0xD3801001 vwbn.s S010,S400,128 +0x00004478: 0xD3811001 vwbn.s S010,S400,129 +0x0000447C: 0xD3821001 vwbn.s S010,S400,130 +0x00004480: 0xD3831001 vwbn.s S010,S400,131 +0x00004484: 0xD3841001 vwbn.s S010,S400,132 +0x00004488: 0xD3851001 vwbn.s S010,S400,133 +0x0000448C: 0xD3861001 vwbn.s S010,S400,134 +0x00004490: 0xD3871001 vwbn.s S010,S400,135 +0x00004494: 0xD3881001 vwbn.s S010,S400,136 +0x00004498: 0xD3891001 vwbn.s S010,S400,137 +0x0000449C: 0xD38A1001 vwbn.s S010,S400,138 +0x000044A0: 0xD38B1001 vwbn.s S010,S400,139 +0x000044A4: 0xD38C1001 vwbn.s S010,S400,140 +0x000044A8: 0xD38D1001 vwbn.s S010,S400,141 +0x000044AC: 0xD38E1001 vwbn.s S010,S400,142 +0x000044B0: 0xD38F1001 vwbn.s S010,S400,143 +0x000044B4: 0xD3901001 vwbn.s S010,S400,144 +0x000044B8: 0xD3911001 vwbn.s S010,S400,145 +0x000044BC: 0xD3921001 vwbn.s S010,S400,146 +0x000044C0: 0xD3931001 vwbn.s S010,S400,147 +0x000044C4: 0xD3941001 vwbn.s S010,S400,148 +0x000044C8: 0xD3951001 vwbn.s S010,S400,149 +0x000044CC: 0xD3961001 vwbn.s S010,S400,150 +0x000044D0: 0xD3971001 vwbn.s S010,S400,151 +0x000044D4: 0xD3981001 vwbn.s S010,S400,152 +0x000044D8: 0xD3991001 vwbn.s S010,S400,153 +0x000044DC: 0xD39A1001 vwbn.s S010,S400,154 +0x000044E0: 0xD39B1001 vwbn.s S010,S400,155 +0x000044E4: 0xD39C1001 vwbn.s S010,S400,156 +0x000044E8: 0xD39D1001 vwbn.s S010,S400,157 +0x000044EC: 0xD39E1001 vwbn.s S010,S400,158 +0x000044F0: 0xD39F1001 vwbn.s S010,S400,159 +0x000044F4: 0xD3A01001 vwbn.s S010,S400,160 +0x000044F8: 0xD3A11001 vwbn.s S010,S400,161 +0x000044FC: 0xD3A21001 vwbn.s S010,S400,162 +0x00004500: 0xD3A31001 vwbn.s S010,S400,163 +0x00004504: 0xD3A41001 vwbn.s S010,S400,164 +0x00004508: 0xD3A51001 vwbn.s S010,S400,165 +0x0000450C: 0xD3A61001 vwbn.s S010,S400,166 +0x00004510: 0xD3A71001 vwbn.s S010,S400,167 +0x00004514: 0xD3A81001 vwbn.s S010,S400,168 +0x00004518: 0xD3A91001 vwbn.s S010,S400,169 +0x0000451C: 0xD3AA1001 vwbn.s S010,S400,170 +0x00004520: 0xD3AB1001 vwbn.s S010,S400,171 +0x00004524: 0xD3AC1001 vwbn.s S010,S400,172 +0x00004528: 0xD3AD1001 vwbn.s S010,S400,173 +0x0000452C: 0xD3AE1001 vwbn.s S010,S400,174 +0x00004530: 0xD3AF1001 vwbn.s S010,S400,175 +0x00004534: 0xD3B01001 vwbn.s S010,S400,176 +0x00004538: 0xD3B11001 vwbn.s S010,S400,177 +0x0000453C: 0xD3B21001 vwbn.s S010,S400,178 +0x00004540: 0xD3B31001 vwbn.s S010,S400,179 +0x00004544: 0xD3B41001 vwbn.s S010,S400,180 +0x00004548: 0xD3B51001 vwbn.s S010,S400,181 +0x0000454C: 0xD3B61001 vwbn.s S010,S400,182 +0x00004550: 0xD3B71001 vwbn.s S010,S400,183 +0x00004554: 0xD3B81001 vwbn.s S010,S400,184 +0x00004558: 0xD3B91001 vwbn.s S010,S400,185 +0x0000455C: 0xD3BA1001 vwbn.s S010,S400,186 +0x00004560: 0xD3BB1001 vwbn.s S010,S400,187 +0x00004564: 0xD3BC1001 vwbn.s S010,S400,188 +0x00004568: 0xD3BD1001 vwbn.s S010,S400,189 +0x0000456C: 0xD3BE1001 vwbn.s S010,S400,190 +0x00004570: 0xD3BF1001 vwbn.s S010,S400,191 +0x00004574: 0xD3C01001 vwbn.s S010,S400,192 +0x00004578: 0xD3C11001 vwbn.s S010,S400,193 +0x0000457C: 0xD3C21001 vwbn.s S010,S400,194 +0x00004580: 0xD3C31001 vwbn.s S010,S400,195 +0x00004584: 0xD3C41001 vwbn.s S010,S400,196 +0x00004588: 0xD3C51001 vwbn.s S010,S400,197 +0x0000458C: 0xD3C61001 vwbn.s S010,S400,198 +0x00004590: 0xD3C71001 vwbn.s S010,S400,199 +0x00004594: 0xD3C81001 vwbn.s S010,S400,200 +0x00004598: 0xD3C91001 vwbn.s S010,S400,201 +0x0000459C: 0xD3CA1001 vwbn.s S010,S400,202 +0x000045A0: 0xD3CB1001 vwbn.s S010,S400,203 +0x000045A4: 0xD3CC1001 vwbn.s S010,S400,204 +0x000045A8: 0xD3CD1001 vwbn.s S010,S400,205 +0x000045AC: 0xD3CE1001 vwbn.s S010,S400,206 +0x000045B0: 0xD3CF1001 vwbn.s S010,S400,207 +0x000045B4: 0xD3D01001 vwbn.s S010,S400,208 +0x000045B8: 0xD3D11001 vwbn.s S010,S400,209 +0x000045BC: 0xD3D21001 vwbn.s S010,S400,210 +0x000045C0: 0xD3D31001 vwbn.s S010,S400,211 +0x000045C4: 0xD3D41001 vwbn.s S010,S400,212 +0x000045C8: 0xD3D51001 vwbn.s S010,S400,213 +0x000045CC: 0xD3D61001 vwbn.s S010,S400,214 +0x000045D0: 0xD3D71001 vwbn.s S010,S400,215 +0x000045D4: 0xD3D81001 vwbn.s S010,S400,216 +0x000045D8: 0xD3D91001 vwbn.s S010,S400,217 +0x000045DC: 0xD3DA1001 vwbn.s S010,S400,218 +0x000045E0: 0xD3DB1001 vwbn.s S010,S400,219 +0x000045E4: 0xD3DC1001 vwbn.s S010,S400,220 +0x000045E8: 0xD3DD1001 vwbn.s S010,S400,221 +0x000045EC: 0xD3DE1001 vwbn.s S010,S400,222 +0x000045F0: 0xD3DF1001 vwbn.s S010,S400,223 +0x000045F4: 0xD3E01001 vwbn.s S010,S400,224 +0x000045F8: 0xD3E11001 vwbn.s S010,S400,225 +0x000045FC: 0xD3E21001 vwbn.s S010,S400,226 +0x00004600: 0xD3E31001 vwbn.s S010,S400,227 +0x00004604: 0xD3E41001 vwbn.s S010,S400,228 +0x00004608: 0xD3E51001 vwbn.s S010,S400,229 +0x0000460C: 0xD3E61001 vwbn.s S010,S400,230 +0x00004610: 0xD3E71001 vwbn.s S010,S400,231 +0x00004614: 0xD3E81001 vwbn.s S010,S400,232 +0x00004618: 0xD3E91001 vwbn.s S010,S400,233 +0x0000461C: 0xD3EA1001 vwbn.s S010,S400,234 +0x00004620: 0xD3EB1001 vwbn.s S010,S400,235 +0x00004624: 0xD3EC1001 vwbn.s S010,S400,236 +0x00004628: 0xD3ED1001 vwbn.s S010,S400,237 +0x0000462C: 0xD3EE1001 vwbn.s S010,S400,238 +0x00004630: 0xD3EF1001 vwbn.s S010,S400,239 +0x00004634: 0xD3F01001 vwbn.s S010,S400,240 +0x00004638: 0xD3F11001 vwbn.s S010,S400,241 +0x0000463C: 0xD3F21001 vwbn.s S010,S400,242 +0x00004640: 0xD3F31001 vwbn.s S010,S400,243 +0x00004644: 0xD3F41001 vwbn.s S010,S400,244 +0x00004648: 0xD3F51001 vwbn.s S010,S400,245 +0x0000464C: 0xD3F61001 vwbn.s S010,S400,246 +0x00004650: 0xD3F71001 vwbn.s S010,S400,247 +0x00004654: 0xD3F81001 vwbn.s S010,S400,248 +0x00004658: 0xD3F91001 vwbn.s S010,S400,249 +0x0000465C: 0xD3FA1001 vwbn.s S010,S400,250 +0x00004660: 0xD3FB1001 vwbn.s S010,S400,251 +0x00004664: 0xD3FC1001 vwbn.s S010,S400,252 +0x00004668: 0xD3FD1001 vwbn.s S010,S400,253 +0x0000466C: 0xD3FE1001 vwbn.s S010,S400,254 +0x00004670: 0xD3FF1001 vwbn.s S010,S400,255 +0x00004674: 0x03E00008 jr ra +0x00004678: 0x00000000 nop + +vfpu5_all: +0x0000467C: 0xDC000000 vpfxs X,X,X,X +0x00004680: 0xDC000001 vpfxs Y,X,X,X +0x00004684: 0xDC000010 vpfxs X,X,Y,X +0x00004688: 0xDC000100 vpfxs |X|,X,X,X +0x0000468C: 0xDC001000 vpfxs 0,X,X,X +0x00004690: 0xDC010000 vpfxs -X,X,X,X +0x00004694: 0xDC100000 vpfxs X,X,X,X +0x00004698: 0xDC800000 vpfxs X,X,X,X +0x0000469C: 0xDCF00000 vpfxs X,X,X,X +0x000046A0: 0xDD000000 vpfxt X,X,X,X +0x000046A4: 0xDD000001 vpfxt Y,X,X,X +0x000046A8: 0xDD000010 vpfxt X,X,Y,X +0x000046AC: 0xDD000100 vpfxt |X|,X,X,X +0x000046B0: 0xDD001000 vpfxt 0,X,X,X +0x000046B4: 0xDD010000 vpfxt -X,X,X,X +0x000046B8: 0xDD100000 vpfxt X,X,X,X +0x000046BC: 0xDD800000 vpfxt X,X,X,X +0x000046C0: 0xDDF00000 vpfxt X,X,X,X +0x000046C4: 0xDE000000 vpfxd ,,, +0x000046C8: 0xDE000001 vpfxd 0,,, +0x000046CC: 0xDE000010 vpfxd ,,0, +0x000046D0: 0xDE000100 vpfxd M,,, +0x000046D4: 0xDE001000 vpfxd ,,, +0x000046D8: 0xDE010000 vpfxd ,,, +0x000046DC: 0xDE100000 vpfxd ,,, +0x000046E0: 0xDE800000 vpfxd ,,, +0x000046E4: 0xDEF00000 vpfxd ,,, +0x000046E8: 0xDF400000 viim.s S002,0 +0x000046EC: 0xDF400001 viim.s S002,1 +0x000046F0: 0xDF400010 viim.s S002,16 +0x000046F4: 0xDF400100 viim.s S002,256 +0x000046F8: 0xDF401000 viim.s S002,4096 +0x000046FC: 0xDF408000 viim.s S002,32768 +0x00004700: 0xDF40F000 viim.s S002,61440 +0x00004704: 0xDFC00000 vfim.s S002,0.0 +0x00004708: 0xDFC00001 vfim.s S002,2.980232238769531e-008 +0x0000470C: 0xDFC00010 vfim.s S002,4.76837158203125e-007 +0x00004710: 0xDFC00100 vfim.s S002,7.62939453125e-006 +0x00004714: 0xDFC01000 vfim.s S002,4.8828125e-004 +0x00004718: 0xDFC08000 vfim.s S002,-0.0 +0x0000471C: 0xDFC0F000 vfim.s S002,-8192.0 +0x00004720: 0x03E00008 jr ra +0x00004724: 0x00000000 nop + +vmmul_test: +0x00004728: 0xF004001F illegal +0x0000472C: 0xF004011F illegal +0x00004730: 0xF004021F illegal +0x00004734: 0xF004031F illegal +0x00004738: 0xF004041F illegal +0x0000473C: 0xF004051F illegal +0x00004740: 0xF004061F illegal +0x00004744: 0xF004071F illegal +0x00004748: 0xF004081F illegal +0x0000474C: 0xF004091F illegal +0x00004750: 0xF0040A1F illegal +0x00004754: 0xF0040B1F illegal +0x00004758: 0xF0040C1F illegal +0x0000475C: 0xF0040D1F illegal +0x00004760: 0xF0040E1F illegal +0x00004764: 0xF0040F1F illegal +0x00004768: 0xF004101F illegal +0x0000476C: 0xF004111F illegal +0x00004770: 0xF004121F illegal +0x00004774: 0xF004131F illegal +0x00004778: 0xF004141F illegal +0x0000477C: 0xF004151F illegal +0x00004780: 0xF004161F illegal +0x00004784: 0xF004171F illegal +0x00004788: 0xF004181F illegal +0x0000478C: 0xF004191F illegal +0x00004790: 0xF0041A1F illegal +0x00004794: 0xF0041B1F illegal +0x00004798: 0xF0041C1F illegal +0x0000479C: 0xF0041D1F illegal +0x000047A0: 0xF0041E1F illegal +0x000047A4: 0xF0041F1F illegal +0x000047A8: 0xF004201F illegal +0x000047AC: 0xF004211F illegal +0x000047B0: 0xF004221F illegal +0x000047B4: 0xF004231F illegal +0x000047B8: 0xF004241F illegal +0x000047BC: 0xF004251F illegal +0x000047C0: 0xF004261F illegal +0x000047C4: 0xF004271F illegal +0x000047C8: 0xF004281F illegal +0x000047CC: 0xF004291F illegal +0x000047D0: 0xF0042A1F illegal +0x000047D4: 0xF0042B1F illegal +0x000047D8: 0xF0042C1F illegal +0x000047DC: 0xF0042D1F illegal +0x000047E0: 0xF0042E1F illegal +0x000047E4: 0xF0042F1F illegal +0x000047E8: 0xF004301F illegal +0x000047EC: 0xF004311F illegal +0x000047F0: 0xF004321F illegal +0x000047F4: 0xF004331F illegal +0x000047F8: 0xF004341F illegal +0x000047FC: 0xF004351F illegal +0x00004800: 0xF004361F illegal +0x00004804: 0xF004371F illegal +0x00004808: 0xF004381F illegal +0x0000480C: 0xF004391F illegal +0x00004810: 0xF0043A1F illegal +0x00004814: 0xF0043B1F illegal +0x00004818: 0xF0043C1F illegal +0x0000481C: 0xF0043D1F illegal +0x00004820: 0xF0043E1F illegal +0x00004824: 0xF0043F1F illegal +0x00004828: 0xF004401F illegal +0x0000482C: 0xF004411F illegal +0x00004830: 0xF004421F illegal +0x00004834: 0xF004431F illegal +0x00004838: 0xF004441F illegal +0x0000483C: 0xF004451F illegal +0x00004840: 0xF004461F illegal +0x00004844: 0xF004471F illegal +0x00004848: 0xF004481F illegal +0x0000484C: 0xF004491F illegal +0x00004850: 0xF0044A1F illegal +0x00004854: 0xF0044B1F illegal +0x00004858: 0xF0044C1F illegal +0x0000485C: 0xF0044D1F illegal +0x00004860: 0xF0044E1F illegal +0x00004864: 0xF0044F1F illegal +0x00004868: 0xF004501F illegal +0x0000486C: 0xF004511F illegal +0x00004870: 0xF004521F illegal +0x00004874: 0xF004531F illegal +0x00004878: 0xF004541F illegal +0x0000487C: 0xF004551F illegal +0x00004880: 0xF004561F illegal +0x00004884: 0xF004571F illegal +0x00004888: 0xF004581F illegal +0x0000488C: 0xF004591F illegal +0x00004890: 0xF0045A1F illegal +0x00004894: 0xF0045B1F illegal +0x00004898: 0xF0045C1F illegal +0x0000489C: 0xF0045D1F illegal +0x000048A0: 0xF0045E1F illegal +0x000048A4: 0xF0045F1F illegal +0x000048A8: 0xF004601F illegal +0x000048AC: 0xF004611F illegal +0x000048B0: 0xF004621F illegal +0x000048B4: 0xF004631F illegal +0x000048B8: 0xF004641F illegal +0x000048BC: 0xF004651F illegal +0x000048C0: 0xF004661F illegal +0x000048C4: 0xF004671F illegal +0x000048C8: 0xF004681F illegal +0x000048CC: 0xF004691F illegal +0x000048D0: 0xF0046A1F illegal +0x000048D4: 0xF0046B1F illegal +0x000048D8: 0xF0046C1F illegal +0x000048DC: 0xF0046D1F illegal +0x000048E0: 0xF0046E1F illegal +0x000048E4: 0xF0046F1F illegal +0x000048E8: 0xF004701F illegal +0x000048EC: 0xF004711F illegal +0x000048F0: 0xF004721F illegal +0x000048F4: 0xF004731F illegal +0x000048F8: 0xF004741F illegal +0x000048FC: 0xF004751F illegal +0x00004900: 0xF004761F illegal +0x00004904: 0xF004771F illegal +0x00004908: 0xF004781F illegal +0x0000490C: 0xF004791F illegal +0x00004910: 0xF0047A1F illegal +0x00004914: 0xF0047B1F illegal +0x00004918: 0xF0047C1F illegal +0x0000491C: 0xF0047D1F illegal +0x00004920: 0xF0047E1F illegal +0x00004924: 0xF0047F1F illegal +0x00004928: 0xF004009F vmmul.p M730,E000,M100 +0x0000492C: 0xF004019F vmmul.p M730,E001,M100 03 (00004928) PITCH +0x00004930: 0xF004029F vmmul.p M730,E002,M100 03 (0000492C) PITCH +0x00004934: 0xF004039F vmmul.p M730,E003,M100 03 (00004930) PITCH +0x00004938: 0xF004049F vmmul.p M730,E100,M100 03 (00004934) PITCH +0x0000493C: 0xF004059F vmmul.p M730,E101,M100 03 (00004938) PITCH +0x00004940: 0xF004069F vmmul.p M730,E102,M100 03 (0000493C) PITCH +0x00004944: 0xF004079F vmmul.p M730,E103,M100 03 (00004940) PITCH +0x00004948: 0xF004089F vmmul.p M730,E200,M100 03 (00004944) PITCH +0x0000494C: 0xF004099F vmmul.p M730,E201,M100 03 (00004948) PITCH +0x00004950: 0xF0040A9F vmmul.p M730,E202,M100 03 (0000494C) PITCH +0x00004954: 0xF0040B9F vmmul.p M730,E203,M100 03 (00004950) PITCH +0x00004958: 0xF0040C9F vmmul.p M730,E300,M100 03 (00004954) PITCH +0x0000495C: 0xF0040D9F vmmul.p M730,E301,M100 03 (00004958) PITCH +0x00004960: 0xF0040E9F vmmul.p M730,E302,M100 03 (0000495C) PITCH +0x00004964: 0xF0040F9F vmmul.p M730,E303,M100 03 (00004960) PITCH +0x00004968: 0xF004109F vmmul.p M730,E400,M100 03 (00004964) PITCH +0x0000496C: 0xF004119F vmmul.p M730,E401,M100 03 (00004968) PITCH +0x00004970: 0xF004129F vmmul.p M730,E402,M100 03 (0000496C) PITCH +0x00004974: 0xF004139F vmmul.p M730,E403,M100 03 (00004970) PITCH +0x00004978: 0xF004149F vmmul.p M730,E500,M100 03 (00004974) PITCH +0x0000497C: 0xF004159F vmmul.p M730,E501,M100 03 (00004978) PITCH +0x00004980: 0xF004169F vmmul.p M730,E502,M100 03 (0000497C) PITCH +0x00004984: 0xF004179F vmmul.p M730,E503,M100 03 (00004980) PITCH +0x00004988: 0xF004189F vmmul.p M730,E600,M100 03 (00004984) PITCH +0x0000498C: 0xF004199F vmmul.p M730,E601,M100 03 (00004988) PITCH +0x00004990: 0xF0041A9F vmmul.p M730,E602,M100 03 (0000498C) PITCH +0x00004994: 0xF0041B9F vmmul.p M730,E603,M100 03 (00004990) PITCH +0x00004998: 0xF0041C9F vmmul.p M730,E700,M100 09 (00004994) PITCH REG +0x0000499C: 0xF0041D9F vmmul.p M730,E701,M100 09 (00004998) PITCH REG +0x000049A0: 0xF0041E9F vmmul.p M730,E702,M100 03 (0000499C) PITCH +0x000049A4: 0xF0041F9F vmmul.p M730,E703,M100 09 (000049A0) PITCH REG +0x000049A8: 0xF004209F vmmul.p M730,M000,M100 03 (000049A4) PITCH +0x000049AC: 0xF004219F vmmul.p M730,M010,M100 03 (000049A8) PITCH +0x000049B0: 0xF004229F vmmul.p M730,M020,M100 03 (000049AC) PITCH +0x000049B4: 0xF004239F vmmul.p M730,M030,M100 03 (000049B0) PITCH +0x000049B8: 0xF004249F vmmul.p M730,M100,M100 03 (000049B4) PITCH +0x000049BC: 0xF004259F vmmul.p M730,M110,M100 03 (000049B8) PITCH +0x000049C0: 0xF004269F vmmul.p M730,M120,M100 03 (000049BC) PITCH +0x000049C4: 0xF004279F vmmul.p M730,M130,M100 03 (000049C0) PITCH +0x000049C8: 0xF004289F vmmul.p M730,M200,M100 03 (000049C4) PITCH +0x000049CC: 0xF004299F vmmul.p M730,M210,M100 03 (000049C8) PITCH +0x000049D0: 0xF0042A9F vmmul.p M730,M220,M100 03 (000049CC) PITCH +0x000049D4: 0xF0042B9F vmmul.p M730,M230,M100 03 (000049D0) PITCH +0x000049D8: 0xF0042C9F vmmul.p M730,M300,M100 03 (000049D4) PITCH +0x000049DC: 0xF0042D9F vmmul.p M730,M310,M100 03 (000049D8) PITCH +0x000049E0: 0xF0042E9F vmmul.p M730,M320,M100 03 (000049DC) PITCH +0x000049E4: 0xF0042F9F vmmul.p M730,M330,M100 03 (000049E0) PITCH +0x000049E8: 0xF004309F vmmul.p M730,M400,M100 03 (000049E4) PITCH +0x000049EC: 0xF004319F vmmul.p M730,M410,M100 03 (000049E8) PITCH +0x000049F0: 0xF004329F vmmul.p M730,M420,M100 03 (000049EC) PITCH +0x000049F4: 0xF004339F vmmul.p M730,M430,M100 03 (000049F0) PITCH +0x000049F8: 0xF004349F vmmul.p M730,M500,M100 03 (000049F4) PITCH +0x000049FC: 0xF004359F vmmul.p M730,M510,M100 03 (000049F8) PITCH +0x00004A00: 0xF004369F vmmul.p M730,M520,M100 03 (000049FC) PITCH +0x00004A04: 0xF004379F vmmul.p M730,M530,M100 03 (00004A00) PITCH +0x00004A08: 0xF004389F vmmul.p M730,M600,M100 03 (00004A04) PITCH +0x00004A0C: 0xF004399F vmmul.p M730,M610,M100 03 (00004A08) PITCH +0x00004A10: 0xF0043A9F vmmul.p M730,M620,M100 03 (00004A0C) PITCH +0x00004A14: 0xF0043B9F vmmul.p M730,M630,M100 03 (00004A10) PITCH +0x00004A18: 0xF0043C9F vmmul.p M730,M700,M100 09 (00004A14) PITCH REG +0x00004A1C: 0xF0043D9F vmmul.p M730,M710,M100 03 (00004A18) PITCH +0x00004A20: 0xF0043E9F vmmul.p M730,M720,M100 09 (00004A1C) PITCH REG +0x00004A24: 0xF0043F9F vmmul.p M730,M730,M100 09 (00004A20) PITCH REG +0x00004A28: 0xF004409F vmmul.p M730,E020,M100 03 (00004A24) PITCH +0x00004A2C: 0xF004419F vmmul.p M730,E021,M100 03 (00004A28) PITCH +0x00004A30: 0xF004429F vmmul.p M730,E022,M100 03 (00004A2C) PITCH +0x00004A34: 0xF004439F vmmul.p M730,E023,M100 03 (00004A30) PITCH +0x00004A38: 0xF004449F vmmul.p M730,E120,M100 03 (00004A34) PITCH +0x00004A3C: 0xF004459F vmmul.p M730,E121,M100 03 (00004A38) PITCH +0x00004A40: 0xF004469F vmmul.p M730,E122,M100 03 (00004A3C) PITCH +0x00004A44: 0xF004479F vmmul.p M730,E123,M100 03 (00004A40) PITCH +0x00004A48: 0xF004489F vmmul.p M730,E220,M100 03 (00004A44) PITCH +0x00004A4C: 0xF004499F vmmul.p M730,E221,M100 03 (00004A48) PITCH +0x00004A50: 0xF0044A9F vmmul.p M730,E222,M100 03 (00004A4C) PITCH +0x00004A54: 0xF0044B9F vmmul.p M730,E223,M100 03 (00004A50) PITCH +0x00004A58: 0xF0044C9F vmmul.p M730,E320,M100 03 (00004A54) PITCH +0x00004A5C: 0xF0044D9F vmmul.p M730,E321,M100 03 (00004A58) PITCH +0x00004A60: 0xF0044E9F vmmul.p M730,E322,M100 03 (00004A5C) PITCH +0x00004A64: 0xF0044F9F vmmul.p M730,E323,M100 03 (00004A60) PITCH +0x00004A68: 0xF004509F vmmul.p M730,E420,M100 03 (00004A64) PITCH +0x00004A6C: 0xF004519F vmmul.p M730,E421,M100 03 (00004A68) PITCH +0x00004A70: 0xF004529F vmmul.p M730,E422,M100 03 (00004A6C) PITCH +0x00004A74: 0xF004539F vmmul.p M730,E423,M100 03 (00004A70) PITCH +0x00004A78: 0xF004549F vmmul.p M730,E520,M100 03 (00004A74) PITCH +0x00004A7C: 0xF004559F vmmul.p M730,E521,M100 03 (00004A78) PITCH +0x00004A80: 0xF004569F vmmul.p M730,E522,M100 03 (00004A7C) PITCH +0x00004A84: 0xF004579F vmmul.p M730,E523,M100 03 (00004A80) PITCH +0x00004A88: 0xF004589F vmmul.p M730,E620,M100 03 (00004A84) PITCH +0x00004A8C: 0xF004599F vmmul.p M730,E621,M100 03 (00004A88) PITCH +0x00004A90: 0xF0045A9F vmmul.p M730,E622,M100 03 (00004A8C) PITCH +0x00004A94: 0xF0045B9F vmmul.p M730,E623,M100 03 (00004A90) PITCH +0x00004A98: 0xF0045C9F vmmul.p M730,E720,M100 09 (00004A94) PITCH REG +0x00004A9C: 0xF0045D9F vmmul.p M730,E721,M100 09 (00004A98) PITCH REG +0x00004AA0: 0xF0045E9F vmmul.p M730,E722,M100 03 (00004A9C) PITCH +0x00004AA4: 0xF0045F9F vmmul.p M730,E723,M100 09 (00004AA0) PITCH REG +0x00004AA8: 0xF004609F vmmul.p M730,M002,M100 03 (00004AA4) PITCH +0x00004AAC: 0xF004619F vmmul.p M730,M012,M100 03 (00004AA8) PITCH +0x00004AB0: 0xF004629F vmmul.p M730,M022,M100 03 (00004AAC) PITCH +0x00004AB4: 0xF004639F vmmul.p M730,M032,M100 03 (00004AB0) PITCH +0x00004AB8: 0xF004649F vmmul.p M730,M102,M100 03 (00004AB4) PITCH +0x00004ABC: 0xF004659F vmmul.p M730,M112,M100 03 (00004AB8) PITCH +0x00004AC0: 0xF004669F vmmul.p M730,M122,M100 03 (00004ABC) PITCH +0x00004AC4: 0xF004679F vmmul.p M730,M132,M100 03 (00004AC0) PITCH +0x00004AC8: 0xF004689F vmmul.p M730,M202,M100 03 (00004AC4) PITCH +0x00004ACC: 0xF004699F vmmul.p M730,M212,M100 03 (00004AC8) PITCH +0x00004AD0: 0xF0046A9F vmmul.p M730,M222,M100 03 (00004ACC) PITCH +0x00004AD4: 0xF0046B9F vmmul.p M730,M232,M100 03 (00004AD0) PITCH +0x00004AD8: 0xF0046C9F vmmul.p M730,M302,M100 03 (00004AD4) PITCH +0x00004ADC: 0xF0046D9F vmmul.p M730,M312,M100 03 (00004AD8) PITCH +0x00004AE0: 0xF0046E9F vmmul.p M730,M322,M100 03 (00004ADC) PITCH +0x00004AE4: 0xF0046F9F vmmul.p M730,M332,M100 03 (00004AE0) PITCH +0x00004AE8: 0xF004709F vmmul.p M730,M402,M100 03 (00004AE4) PITCH +0x00004AEC: 0xF004719F vmmul.p M730,M412,M100 03 (00004AE8) PITCH +0x00004AF0: 0xF004729F vmmul.p M730,M422,M100 03 (00004AEC) PITCH +0x00004AF4: 0xF004739F vmmul.p M730,M432,M100 03 (00004AF0) PITCH +0x00004AF8: 0xF004749F vmmul.p M730,M502,M100 03 (00004AF4) PITCH +0x00004AFC: 0xF004759F vmmul.p M730,M512,M100 03 (00004AF8) PITCH +0x00004B00: 0xF004769F vmmul.p M730,M522,M100 03 (00004AFC) PITCH +0x00004B04: 0xF004779F vmmul.p M730,M532,M100 03 (00004B00) PITCH +0x00004B08: 0xF004789F vmmul.p M730,M602,M100 03 (00004B04) PITCH +0x00004B0C: 0xF004799F vmmul.p M730,M612,M100 03 (00004B08) PITCH +0x00004B10: 0xF0047A9F vmmul.p M730,M622,M100 03 (00004B0C) PITCH +0x00004B14: 0xF0047B9F vmmul.p M730,M632,M100 03 (00004B10) PITCH +0x00004B18: 0xF0047C9F vmmul.p M730,M702,M100 03 (00004B14) PITCH +0x00004B1C: 0xF0047D9F vmmul.p M730,M712,M100 03 (00004B18) PITCH +0x00004B20: 0xF0047E9F vmmul.p M730,M722,M100 03 (00004B1C) PITCH +0x00004B24: 0xF0047F9F vmmul.p M730,M732,M100 03 (00004B20) PITCH +0x00004B28: 0xF004801F vmmul.t M730,E000,M100 03 (00004B24) PITCH +0x00004B2C: 0xF004811F vmmul.t M730,E001,M100 08 (00004B28) PITCH +0x00004B30: 0xF004821F vmmul.t M730,E002,M100 08 (00004B2C) PITCH +0x00004B34: 0xF004831F vmmul.t M730,E003,M100 08 (00004B30) PITCH +0x00004B38: 0xF004841F vmmul.t M730,E100,M100 08 (00004B34) PITCH +0x00004B3C: 0xF004851F vmmul.t M730,E101,M100 08 (00004B38) PITCH +0x00004B40: 0xF004861F vmmul.t M730,E102,M100 08 (00004B3C) PITCH +0x00004B44: 0xF004871F vmmul.t M730,E103,M100 08 (00004B40) PITCH +0x00004B48: 0xF004881F vmmul.t M730,E200,M100 08 (00004B44) PITCH +0x00004B4C: 0xF004891F vmmul.t M730,E201,M100 08 (00004B48) PITCH +0x00004B50: 0xF0048A1F vmmul.t M730,E202,M100 08 (00004B4C) PITCH +0x00004B54: 0xF0048B1F vmmul.t M730,E203,M100 08 (00004B50) PITCH +0x00004B58: 0xF0048C1F vmmul.t M730,E300,M100 08 (00004B54) PITCH +0x00004B5C: 0xF0048D1F vmmul.t M730,E301,M100 08 (00004B58) PITCH +0x00004B60: 0xF0048E1F vmmul.t M730,E302,M100 08 (00004B5C) PITCH +0x00004B64: 0xF0048F1F vmmul.t M730,E303,M100 08 (00004B60) PITCH +0x00004B68: 0xF004901F vmmul.t M730,E400,M100 08 (00004B64) PITCH +0x00004B6C: 0xF004911F vmmul.t M730,E401,M100 08 (00004B68) PITCH +0x00004B70: 0xF004921F vmmul.t M730,E402,M100 08 (00004B6C) PITCH +0x00004B74: 0xF004931F vmmul.t M730,E403,M100 08 (00004B70) PITCH +0x00004B78: 0xF004941F vmmul.t M730,E500,M100 08 (00004B74) PITCH +0x00004B7C: 0xF004951F vmmul.t M730,E501,M100 08 (00004B78) PITCH +0x00004B80: 0xF004961F vmmul.t M730,E502,M100 08 (00004B7C) PITCH +0x00004B84: 0xF004971F vmmul.t M730,E503,M100 08 (00004B80) PITCH +0x00004B88: 0xF004981F vmmul.t M730,E600,M100 08 (00004B84) PITCH +0x00004B8C: 0xF004991F vmmul.t M730,E601,M100 08 (00004B88) PITCH +0x00004B90: 0xF0049A1F vmmul.t M730,E602,M100 08 (00004B8C) PITCH +0x00004B94: 0xF0049B1F vmmul.t M730,E603,M100 08 (00004B90) PITCH +0x00004B98: 0xF0049C1F vmmul.t M730,E700,M100 14 (00004B94) PITCH REG +0x00004B9C: 0xF0049D1F vmmul.t M730,E701,M100 14 (00004B98) PITCH REG +0x00004BA0: 0xF0049E1F vmmul.t M730,E702,M100 14 (00004B9C) PITCH REG +0x00004BA4: 0xF0049F1F vmmul.t M730,E703,M100 14 (00004BA0) PITCH REG +0x00004BA8: 0xF004A01F vmmul.t M730,M000,M100 08 (00004BA4) PITCH +0x00004BAC: 0xF004A11F vmmul.t M730,M010,M100 08 (00004BA8) PITCH +0x00004BB0: 0xF004A21F vmmul.t M730,M020,M100 08 (00004BAC) PITCH +0x00004BB4: 0xF004A31F vmmul.t M730,M030,M100 08 (00004BB0) PITCH +0x00004BB8: 0xF004A41F vmmul.t M730,M100,M100 08 (00004BB4) PITCH +0x00004BBC: 0xF004A51F vmmul.t M730,M110,M100 08 (00004BB8) PITCH +0x00004BC0: 0xF004A61F vmmul.t M730,M120,M100 08 (00004BBC) PITCH +0x00004BC4: 0xF004A71F vmmul.t M730,M130,M100 08 (00004BC0) PITCH +0x00004BC8: 0xF004A81F vmmul.t M730,M200,M100 08 (00004BC4) PITCH +0x00004BCC: 0xF004A91F vmmul.t M730,M210,M100 08 (00004BC8) PITCH +0x00004BD0: 0xF004AA1F vmmul.t M730,M220,M100 08 (00004BCC) PITCH +0x00004BD4: 0xF004AB1F vmmul.t M730,M230,M100 08 (00004BD0) PITCH +0x00004BD8: 0xF004AC1F vmmul.t M730,M300,M100 08 (00004BD4) PITCH +0x00004BDC: 0xF004AD1F vmmul.t M730,M310,M100 08 (00004BD8) PITCH +0x00004BE0: 0xF004AE1F vmmul.t M730,M320,M100 08 (00004BDC) PITCH +0x00004BE4: 0xF004AF1F vmmul.t M730,M330,M100 08 (00004BE0) PITCH +0x00004BE8: 0xF004B01F vmmul.t M730,M400,M100 08 (00004BE4) PITCH +0x00004BEC: 0xF004B11F vmmul.t M730,M410,M100 08 (00004BE8) PITCH +0x00004BF0: 0xF004B21F vmmul.t M730,M420,M100 08 (00004BEC) PITCH +0x00004BF4: 0xF004B31F vmmul.t M730,M430,M100 08 (00004BF0) PITCH +0x00004BF8: 0xF004B41F vmmul.t M730,M500,M100 08 (00004BF4) PITCH +0x00004BFC: 0xF004B51F vmmul.t M730,M510,M100 08 (00004BF8) PITCH +0x00004C00: 0xF004B61F vmmul.t M730,M520,M100 08 (00004BFC) PITCH +0x00004C04: 0xF004B71F vmmul.t M730,M530,M100 08 (00004C00) PITCH +0x00004C08: 0xF004B81F vmmul.t M730,M600,M100 08 (00004C04) PITCH +0x00004C0C: 0xF004B91F vmmul.t M730,M610,M100 08 (00004C08) PITCH +0x00004C10: 0xF004BA1F vmmul.t M730,M620,M100 08 (00004C0C) PITCH +0x00004C14: 0xF004BB1F vmmul.t M730,M630,M100 08 (00004C10) PITCH +0x00004C18: 0xF004BC1F vmmul.t M730,M700,M100 14 (00004C14) PITCH REG +0x00004C1C: 0xF004BD1F vmmul.t M730,M710,M100 14 (00004C18) PITCH REG +0x00004C20: 0xF004BE1F vmmul.t M730,M720,M100 14 (00004C1C) PITCH REG +0x00004C24: 0xF004BF1F vmmul.t M730,M730,M100 14 (00004C20) PITCH REG +0x00004C28: 0xF004C01F vmmul.t M730,E010,M100 08 (00004C24) PITCH +0x00004C2C: 0xF004C11F vmmul.t M730,E011,M100 08 (00004C28) PITCH +0x00004C30: 0xF004C21F vmmul.t M730,E012,M100 08 (00004C2C) PITCH +0x00004C34: 0xF004C31F vmmul.t M730,E013,M100 08 (00004C30) PITCH +0x00004C38: 0xF004C41F vmmul.t M730,E110,M100 08 (00004C34) PITCH +0x00004C3C: 0xF004C51F vmmul.t M730,E111,M100 08 (00004C38) PITCH +0x00004C40: 0xF004C61F vmmul.t M730,E112,M100 08 (00004C3C) PITCH +0x00004C44: 0xF004C71F vmmul.t M730,E113,M100 08 (00004C40) PITCH +0x00004C48: 0xF004C81F vmmul.t M730,E210,M100 08 (00004C44) PITCH +0x00004C4C: 0xF004C91F vmmul.t M730,E211,M100 08 (00004C48) PITCH +0x00004C50: 0xF004CA1F vmmul.t M730,E212,M100 08 (00004C4C) PITCH +0x00004C54: 0xF004CB1F vmmul.t M730,E213,M100 08 (00004C50) PITCH +0x00004C58: 0xF004CC1F vmmul.t M730,E310,M100 08 (00004C54) PITCH +0x00004C5C: 0xF004CD1F vmmul.t M730,E311,M100 08 (00004C58) PITCH +0x00004C60: 0xF004CE1F vmmul.t M730,E312,M100 08 (00004C5C) PITCH +0x00004C64: 0xF004CF1F vmmul.t M730,E313,M100 08 (00004C60) PITCH +0x00004C68: 0xF004D01F vmmul.t M730,E410,M100 08 (00004C64) PITCH +0x00004C6C: 0xF004D11F vmmul.t M730,E411,M100 08 (00004C68) PITCH +0x00004C70: 0xF004D21F vmmul.t M730,E412,M100 08 (00004C6C) PITCH +0x00004C74: 0xF004D31F vmmul.t M730,E413,M100 08 (00004C70) PITCH +0x00004C78: 0xF004D41F vmmul.t M730,E510,M100 08 (00004C74) PITCH +0x00004C7C: 0xF004D51F vmmul.t M730,E511,M100 08 (00004C78) PITCH +0x00004C80: 0xF004D61F vmmul.t M730,E512,M100 08 (00004C7C) PITCH +0x00004C84: 0xF004D71F vmmul.t M730,E513,M100 08 (00004C80) PITCH +0x00004C88: 0xF004D81F vmmul.t M730,E610,M100 08 (00004C84) PITCH +0x00004C8C: 0xF004D91F vmmul.t M730,E611,M100 08 (00004C88) PITCH +0x00004C90: 0xF004DA1F vmmul.t M730,E612,M100 08 (00004C8C) PITCH +0x00004C94: 0xF004DB1F vmmul.t M730,E613,M100 08 (00004C90) PITCH +0x00004C98: 0xF004DC1F vmmul.t M730,E710,M100 14 (00004C94) PITCH REG +0x00004C9C: 0xF004DD1F vmmul.t M730,E711,M100 14 (00004C98) PITCH REG +0x00004CA0: 0xF004DE1F vmmul.t M730,E712,M100 14 (00004C9C) PITCH REG +0x00004CA4: 0xF004DF1F vmmul.t M730,E713,M100 14 (00004CA0) PITCH REG +0x00004CA8: 0xF004E01F vmmul.t M730,M001,M100 08 (00004CA4) PITCH +0x00004CAC: 0xF004E11F vmmul.t M730,M011,M100 08 (00004CA8) PITCH +0x00004CB0: 0xF004E21F vmmul.t M730,M021,M100 08 (00004CAC) PITCH +0x00004CB4: 0xF004E31F vmmul.t M730,M031,M100 08 (00004CB0) PITCH +0x00004CB8: 0xF004E41F vmmul.t M730,M101,M100 08 (00004CB4) PITCH +0x00004CBC: 0xF004E51F vmmul.t M730,M111,M100 08 (00004CB8) PITCH +0x00004CC0: 0xF004E61F vmmul.t M730,M121,M100 08 (00004CBC) PITCH +0x00004CC4: 0xF004E71F vmmul.t M730,M131,M100 08 (00004CC0) PITCH +0x00004CC8: 0xF004E81F vmmul.t M730,M201,M100 08 (00004CC4) PITCH +0x00004CCC: 0xF004E91F vmmul.t M730,M211,M100 08 (00004CC8) PITCH +0x00004CD0: 0xF004EA1F vmmul.t M730,M221,M100 08 (00004CCC) PITCH +0x00004CD4: 0xF004EB1F vmmul.t M730,M231,M100 08 (00004CD0) PITCH +0x00004CD8: 0xF004EC1F vmmul.t M730,M301,M100 08 (00004CD4) PITCH +0x00004CDC: 0xF004ED1F vmmul.t M730,M311,M100 08 (00004CD8) PITCH +0x00004CE0: 0xF004EE1F vmmul.t M730,M321,M100 08 (00004CDC) PITCH +0x00004CE4: 0xF004EF1F vmmul.t M730,M331,M100 08 (00004CE0) PITCH +0x00004CE8: 0xF004F01F vmmul.t M730,M401,M100 08 (00004CE4) PITCH +0x00004CEC: 0xF004F11F vmmul.t M730,M411,M100 08 (00004CE8) PITCH +0x00004CF0: 0xF004F21F vmmul.t M730,M421,M100 08 (00004CEC) PITCH +0x00004CF4: 0xF004F31F vmmul.t M730,M431,M100 08 (00004CF0) PITCH +0x00004CF8: 0xF004F41F vmmul.t M730,M501,M100 08 (00004CF4) PITCH +0x00004CFC: 0xF004F51F vmmul.t M730,M511,M100 08 (00004CF8) PITCH +0x00004D00: 0xF004F61F vmmul.t M730,M521,M100 08 (00004CFC) PITCH +0x00004D04: 0xF004F71F vmmul.t M730,M531,M100 08 (00004D00) PITCH +0x00004D08: 0xF004F81F vmmul.t M730,M601,M100 08 (00004D04) PITCH +0x00004D0C: 0xF004F91F vmmul.t M730,M611,M100 08 (00004D08) PITCH +0x00004D10: 0xF004FA1F vmmul.t M730,M621,M100 08 (00004D0C) PITCH +0x00004D14: 0xF004FB1F vmmul.t M730,M631,M100 08 (00004D10) PITCH +0x00004D18: 0xF004FC1F vmmul.t M730,M701,M100 14 (00004D14) PITCH REG +0x00004D1C: 0xF004FD1F vmmul.t M730,M711,M100 14 (00004D18) PITCH REG +0x00004D20: 0xF004FE1F vmmul.t M730,M721,M100 14 (00004D1C) PITCH REG +0x00004D24: 0xF004FF1F vmmul.t M730,M731,M100 14 (00004D20) PITCH REG +0x00004D28: 0xF004809F vmmul.q M730,E000,M100 08 (00004D24) PITCH +0x00004D2C: 0xF004819F vmmul.q M730,E001,M100 15 (00004D28) PITCH +0x00004D30: 0xF004829F vmmul.q M730,E002,M100 15 (00004D2C) PITCH +0x00004D34: 0xF004839F vmmul.q M730,E003,M100 15 (00004D30) PITCH +0x00004D38: 0xF004849F vmmul.q M730,E100,M100 15 (00004D34) PITCH +0x00004D3C: 0xF004859F vmmul.q M730,E101,M100 15 (00004D38) PITCH +0x00004D40: 0xF004869F vmmul.q M730,E102,M100 15 (00004D3C) PITCH +0x00004D44: 0xF004879F vmmul.q M730,E103,M100 15 (00004D40) PITCH +0x00004D48: 0xF004889F vmmul.q M730,E200,M100 15 (00004D44) PITCH +0x00004D4C: 0xF004899F vmmul.q M730,E201,M100 15 (00004D48) PITCH +0x00004D50: 0xF0048A9F vmmul.q M730,E202,M100 15 (00004D4C) PITCH +0x00004D54: 0xF0048B9F vmmul.q M730,E203,M100 15 (00004D50) PITCH +0x00004D58: 0xF0048C9F vmmul.q M730,E300,M100 15 (00004D54) PITCH +0x00004D5C: 0xF0048D9F vmmul.q M730,E301,M100 15 (00004D58) PITCH +0x00004D60: 0xF0048E9F vmmul.q M730,E302,M100 15 (00004D5C) PITCH +0x00004D64: 0xF0048F9F vmmul.q M730,E303,M100 15 (00004D60) PITCH +0x00004D68: 0xF004909F vmmul.q M730,E400,M100 15 (00004D64) PITCH +0x00004D6C: 0xF004919F vmmul.q M730,E401,M100 15 (00004D68) PITCH +0x00004D70: 0xF004929F vmmul.q M730,E402,M100 15 (00004D6C) PITCH +0x00004D74: 0xF004939F vmmul.q M730,E403,M100 15 (00004D70) PITCH +0x00004D78: 0xF004949F vmmul.q M730,E500,M100 15 (00004D74) PITCH +0x00004D7C: 0xF004959F vmmul.q M730,E501,M100 15 (00004D78) PITCH +0x00004D80: 0xF004969F vmmul.q M730,E502,M100 15 (00004D7C) PITCH +0x00004D84: 0xF004979F vmmul.q M730,E503,M100 15 (00004D80) PITCH +0x00004D88: 0xF004989F vmmul.q M730,E600,M100 15 (00004D84) PITCH +0x00004D8C: 0xF004999F vmmul.q M730,E601,M100 15 (00004D88) PITCH +0x00004D90: 0xF0049A9F vmmul.q M730,E602,M100 15 (00004D8C) PITCH +0x00004D94: 0xF0049B9F vmmul.q M730,E603,M100 15 (00004D90) PITCH +0x00004D98: 0xF0049C9F vmmul.q M730,E700,M100 21 (00004D94) PITCH REG +0x00004D9C: 0xF0049D9F vmmul.q M730,E701,M100 21 (00004D98) PITCH REG +0x00004DA0: 0xF0049E9F vmmul.q M730,E702,M100 21 (00004D9C) PITCH REG +0x00004DA4: 0xF0049F9F vmmul.q M730,E703,M100 21 (00004DA0) PITCH REG +0x00004DA8: 0xF004A09F vmmul.q M730,M000,M100 15 (00004DA4) PITCH +0x00004DAC: 0xF004A19F vmmul.q M730,M010,M100 15 (00004DA8) PITCH +0x00004DB0: 0xF004A29F vmmul.q M730,M020,M100 15 (00004DAC) PITCH +0x00004DB4: 0xF004A39F vmmul.q M730,M030,M100 15 (00004DB0) PITCH +0x00004DB8: 0xF004A49F vmmul.q M730,M100,M100 15 (00004DB4) PITCH +0x00004DBC: 0xF004A59F vmmul.q M730,M110,M100 15 (00004DB8) PITCH +0x00004DC0: 0xF004A69F vmmul.q M730,M120,M100 15 (00004DBC) PITCH +0x00004DC4: 0xF004A79F vmmul.q M730,M130,M100 15 (00004DC0) PITCH +0x00004DC8: 0xF004A89F vmmul.q M730,M200,M100 15 (00004DC4) PITCH +0x00004DCC: 0xF004A99F vmmul.q M730,M210,M100 15 (00004DC8) PITCH +0x00004DD0: 0xF004AA9F vmmul.q M730,M220,M100 15 (00004DCC) PITCH +0x00004DD4: 0xF004AB9F vmmul.q M730,M230,M100 15 (00004DD0) PITCH +0x00004DD8: 0xF004AC9F vmmul.q M730,M300,M100 15 (00004DD4) PITCH +0x00004DDC: 0xF004AD9F vmmul.q M730,M310,M100 15 (00004DD8) PITCH +0x00004DE0: 0xF004AE9F vmmul.q M730,M320,M100 15 (00004DDC) PITCH +0x00004DE4: 0xF004AF9F vmmul.q M730,M330,M100 15 (00004DE0) PITCH +0x00004DE8: 0xF004B09F vmmul.q M730,M400,M100 15 (00004DE4) PITCH +0x00004DEC: 0xF004B19F vmmul.q M730,M410,M100 15 (00004DE8) PITCH +0x00004DF0: 0xF004B29F vmmul.q M730,M420,M100 15 (00004DEC) PITCH +0x00004DF4: 0xF004B39F vmmul.q M730,M430,M100 15 (00004DF0) PITCH +0x00004DF8: 0xF004B49F vmmul.q M730,M500,M100 15 (00004DF4) PITCH +0x00004DFC: 0xF004B59F vmmul.q M730,M510,M100 15 (00004DF8) PITCH +0x00004E00: 0xF004B69F vmmul.q M730,M520,M100 15 (00004DFC) PITCH +0x00004E04: 0xF004B79F vmmul.q M730,M530,M100 15 (00004E00) PITCH +0x00004E08: 0xF004B89F vmmul.q M730,M600,M100 15 (00004E04) PITCH +0x00004E0C: 0xF004B99F vmmul.q M730,M610,M100 15 (00004E08) PITCH +0x00004E10: 0xF004BA9F vmmul.q M730,M620,M100 15 (00004E0C) PITCH +0x00004E14: 0xF004BB9F vmmul.q M730,M630,M100 15 (00004E10) PITCH +0x00004E18: 0xF004BC9F vmmul.q M730,M700,M100 21 (00004E14) PITCH REG +0x00004E1C: 0xF004BD9F vmmul.q M730,M710,M100 21 (00004E18) PITCH REG +0x00004E20: 0xF004BE9F vmmul.q M730,M720,M100 21 (00004E1C) PITCH REG +0x00004E24: 0xF004BF9F vmmul.q M730,M730,M100 21 (00004E20) PITCH REG +0x00004E28: 0xF004C09F vmmul.q M730,E020,M100 15 (00004E24) PITCH +0x00004E2C: 0xF004C19F vmmul.q M730,E021,M100 15 (00004E28) PITCH +0x00004E30: 0xF004C29F vmmul.q M730,E022,M100 15 (00004E2C) PITCH +0x00004E34: 0xF004C39F vmmul.q M730,E023,M100 15 (00004E30) PITCH +0x00004E38: 0xF004C49F vmmul.q M730,E120,M100 15 (00004E34) PITCH +0x00004E3C: 0xF004C59F vmmul.q M730,E121,M100 15 (00004E38) PITCH +0x00004E40: 0xF004C69F vmmul.q M730,E122,M100 15 (00004E3C) PITCH +0x00004E44: 0xF004C79F vmmul.q M730,E123,M100 15 (00004E40) PITCH +0x00004E48: 0xF004C89F vmmul.q M730,E220,M100 15 (00004E44) PITCH +0x00004E4C: 0xF004C99F vmmul.q M730,E221,M100 15 (00004E48) PITCH +0x00004E50: 0xF004CA9F vmmul.q M730,E222,M100 15 (00004E4C) PITCH +0x00004E54: 0xF004CB9F vmmul.q M730,E223,M100 15 (00004E50) PITCH +0x00004E58: 0xF004CC9F vmmul.q M730,E320,M100 15 (00004E54) PITCH +0x00004E5C: 0xF004CD9F vmmul.q M730,E321,M100 15 (00004E58) PITCH +0x00004E60: 0xF004CE9F vmmul.q M730,E322,M100 15 (00004E5C) PITCH +0x00004E64: 0xF004CF9F vmmul.q M730,E323,M100 15 (00004E60) PITCH +0x00004E68: 0xF004D09F vmmul.q M730,E420,M100 15 (00004E64) PITCH +0x00004E6C: 0xF004D19F vmmul.q M730,E421,M100 15 (00004E68) PITCH +0x00004E70: 0xF004D29F vmmul.q M730,E422,M100 15 (00004E6C) PITCH +0x00004E74: 0xF004D39F vmmul.q M730,E423,M100 15 (00004E70) PITCH +0x00004E78: 0xF004D49F vmmul.q M730,E520,M100 15 (00004E74) PITCH +0x00004E7C: 0xF004D59F vmmul.q M730,E521,M100 15 (00004E78) PITCH +0x00004E80: 0xF004D69F vmmul.q M730,E522,M100 15 (00004E7C) PITCH +0x00004E84: 0xF004D79F vmmul.q M730,E523,M100 15 (00004E80) PITCH +0x00004E88: 0xF004D89F vmmul.q M730,E620,M100 15 (00004E84) PITCH +0x00004E8C: 0xF004D99F vmmul.q M730,E621,M100 15 (00004E88) PITCH +0x00004E90: 0xF004DA9F vmmul.q M730,E622,M100 15 (00004E8C) PITCH +0x00004E94: 0xF004DB9F vmmul.q M730,E623,M100 15 (00004E90) PITCH +0x00004E98: 0xF004DC9F vmmul.q M730,E720,M100 21 (00004E94) PITCH REG +0x00004E9C: 0xF004DD9F vmmul.q M730,E721,M100 21 (00004E98) PITCH REG +0x00004EA0: 0xF004DE9F vmmul.q M730,E722,M100 21 (00004E9C) PITCH REG +0x00004EA4: 0xF004DF9F vmmul.q M730,E723,M100 21 (00004EA0) PITCH REG +0x00004EA8: 0xF004E09F vmmul.q M730,M002,M100 15 (00004EA4) PITCH +0x00004EAC: 0xF004E19F vmmul.q M730,M012,M100 15 (00004EA8) PITCH +0x00004EB0: 0xF004E29F vmmul.q M730,M022,M100 15 (00004EAC) PITCH +0x00004EB4: 0xF004E39F vmmul.q M730,M032,M100 15 (00004EB0) PITCH +0x00004EB8: 0xF004E49F vmmul.q M730,M102,M100 15 (00004EB4) PITCH +0x00004EBC: 0xF004E59F vmmul.q M730,M112,M100 15 (00004EB8) PITCH +0x00004EC0: 0xF004E69F vmmul.q M730,M122,M100 15 (00004EBC) PITCH +0x00004EC4: 0xF004E79F vmmul.q M730,M132,M100 15 (00004EC0) PITCH +0x00004EC8: 0xF004E89F vmmul.q M730,M202,M100 15 (00004EC4) PITCH +0x00004ECC: 0xF004E99F vmmul.q M730,M212,M100 15 (00004EC8) PITCH +0x00004ED0: 0xF004EA9F vmmul.q M730,M222,M100 15 (00004ECC) PITCH +0x00004ED4: 0xF004EB9F vmmul.q M730,M232,M100 15 (00004ED0) PITCH +0x00004ED8: 0xF004EC9F vmmul.q M730,M302,M100 15 (00004ED4) PITCH +0x00004EDC: 0xF004ED9F vmmul.q M730,M312,M100 15 (00004ED8) PITCH +0x00004EE0: 0xF004EE9F vmmul.q M730,M322,M100 15 (00004EDC) PITCH +0x00004EE4: 0xF004EF9F vmmul.q M730,M332,M100 15 (00004EE0) PITCH +0x00004EE8: 0xF004F09F vmmul.q M730,M402,M100 15 (00004EE4) PITCH +0x00004EEC: 0xF004F19F vmmul.q M730,M412,M100 15 (00004EE8) PITCH +0x00004EF0: 0xF004F29F vmmul.q M730,M422,M100 15 (00004EEC) PITCH +0x00004EF4: 0xF004F39F vmmul.q M730,M432,M100 15 (00004EF0) PITCH +0x00004EF8: 0xF004F49F vmmul.q M730,M502,M100 15 (00004EF4) PITCH +0x00004EFC: 0xF004F59F vmmul.q M730,M512,M100 15 (00004EF8) PITCH +0x00004F00: 0xF004F69F vmmul.q M730,M522,M100 15 (00004EFC) PITCH +0x00004F04: 0xF004F79F vmmul.q M730,M532,M100 15 (00004F00) PITCH +0x00004F08: 0xF004F89F vmmul.q M730,M602,M100 15 (00004F04) PITCH +0x00004F0C: 0xF004F99F vmmul.q M730,M612,M100 15 (00004F08) PITCH +0x00004F10: 0xF004FA9F vmmul.q M730,M622,M100 15 (00004F0C) PITCH +0x00004F14: 0xF004FB9F vmmul.q M730,M632,M100 15 (00004F10) PITCH +0x00004F18: 0xF004FC9F vmmul.q M730,M702,M100 21 (00004F14) PITCH REG +0x00004F1C: 0xF004FD9F vmmul.q M730,M712,M100 21 (00004F18) PITCH REG +0x00004F20: 0xF004FE9F vmmul.q M730,M722,M100 21 (00004F1C) PITCH REG +0x00004F24: 0xF004FF9F vmmul.q M730,M732,M100 21 (00004F20) PITCH REG +0x00004F28: 0x03E00008 jr ra +0x00004F2C: 0x00000000 nop + +vrot_test: +0x00004F30: 0xF3A0009F vrot.p C730,S000,[C,S] +0x00004F34: 0xF3A1009F vrot.p C730,S000,[S,C] 01 (00004F30) PITCH +0x00004F38: 0xF3A2009F vrot.p C730,S000,[S,0] 01 (00004F34) PITCH +0x00004F3C: 0xF3A3009F vrot.p C730,S000,[S,0] 01 (00004F38) PITCH +0x00004F40: 0xF3A4009F vrot.p C730,S000,[C,S] 01 (00004F3C) PITCH +0x00004F44: 0xF3A5009F vrot.p C730,S000,[S,C] 01 (00004F40) PITCH +0x00004F48: 0xF3A6009F vrot.p C730,S000,[0,S] 01 (00004F44) PITCH +0x00004F4C: 0xF3A7009F vrot.p C730,S000,[0,S] 01 (00004F48) PITCH +0x00004F50: 0xF3A8009F vrot.p C730,S000,[C,0] 01 (00004F4C) PITCH +0x00004F54: 0xF3A9009F vrot.p C730,S000,[0,C] 01 (00004F50) PITCH +0x00004F58: 0xF3AA009F vrot.p C730,S000,[S,S] 01 (00004F54) PITCH +0x00004F5C: 0xF3AB009F vrot.p C730,S000,[0,0] 01 (00004F58) PITCH +0x00004F60: 0xF3AC009F vrot.p C730,S000,[C,0] 01 (00004F5C) PITCH +0x00004F64: 0xF3AD009F vrot.p C730,S000,[0,C] 01 (00004F60) PITCH +0x00004F68: 0xF3AE009F vrot.p C730,S000,[0,0] 01 (00004F64) PITCH +0x00004F6C: 0xF3AF009F vrot.p C730,S000,[S,S] 01 (00004F68) PITCH +0x00004F70: 0xF3B0009F vrot.p C730,S000,[C,-S] 01 (00004F6C) PITCH +0x00004F74: 0xF3B1009F vrot.p C730,S000,[-S,C] 01 (00004F70) PITCH +0x00004F78: 0xF3B2009F vrot.p C730,S000,[-S,0] 01 (00004F74) PITCH +0x00004F7C: 0xF3B3009F vrot.p C730,S000,[-S,0] 01 (00004F78) PITCH +0x00004F80: 0xF3B4009F vrot.p C730,S000,[C,-S] 01 (00004F7C) PITCH +0x00004F84: 0xF3B5009F vrot.p C730,S000,[-S,C] 01 (00004F80) PITCH +0x00004F88: 0xF3B6009F vrot.p C730,S000,[0,-S] 01 (00004F84) PITCH +0x00004F8C: 0xF3B7009F vrot.p C730,S000,[0,-S] 01 (00004F88) PITCH +0x00004F90: 0xF3B8009F vrot.p C730,S000,[C,0] 01 (00004F8C) PITCH +0x00004F94: 0xF3B9009F vrot.p C730,S000,[0,C] 01 (00004F90) PITCH +0x00004F98: 0xF3BA009F vrot.p C730,S000,[-S,-S] 01 (00004F94) PITCH +0x00004F9C: 0xF3BB009F vrot.p C730,S000,[0,0] 01 (00004F98) PITCH +0x00004FA0: 0xF3BC009F vrot.p C730,S000,[C,0] 01 (00004F9C) PITCH +0x00004FA4: 0xF3BD009F vrot.p C730,S000,[0,C] 01 (00004FA0) PITCH +0x00004FA8: 0xF3BE009F vrot.p C730,S000,[0,0] 01 (00004FA4) PITCH +0x00004FAC: 0xF3BF009F vrot.p C730,S000,[-S,-S] 01 (00004FA8) PITCH +0x00004FB0: 0xF3A0801F vrot.t C730,S000,[C,S,S] 01 (00004FAC) PITCH +0x00004FB4: 0xF3A1801F vrot.t C730,S000,[S,C,0] 01 (00004FB0) PITCH +0x00004FB8: 0xF3A2801F vrot.t C730,S000,[S,0,C] 01 (00004FB4) PITCH +0x00004FBC: 0xF3A3801F vrot.t C730,S000,[S,0,0] 01 (00004FB8) PITCH +0x00004FC0: 0xF3A4801F vrot.t C730,S000,[C,S,0] 01 (00004FBC) PITCH +0x00004FC4: 0xF3A5801F vrot.t C730,S000,[S,C,S] 01 (00004FC0) PITCH +0x00004FC8: 0xF3A6801F vrot.t C730,S000,[0,S,C] 01 (00004FC4) PITCH +0x00004FCC: 0xF3A7801F vrot.t C730,S000,[0,S,0] 01 (00004FC8) PITCH +0x00004FD0: 0xF3A8801F vrot.t C730,S000,[C,0,S] 01 (00004FCC) PITCH +0x00004FD4: 0xF3A9801F vrot.t C730,S000,[0,C,S] 01 (00004FD0) PITCH +0x00004FD8: 0xF3AA801F vrot.t C730,S000,[S,S,C] 01 (00004FD4) PITCH +0x00004FDC: 0xF3AB801F vrot.t C730,S000,[0,0,S] 01 (00004FD8) PITCH +0x00004FE0: 0xF3AC801F vrot.t C730,S000,[C,0,0] 01 (00004FDC) PITCH +0x00004FE4: 0xF3AD801F vrot.t C730,S000,[0,C,0] 01 (00004FE0) PITCH +0x00004FE8: 0xF3AE801F vrot.t C730,S000,[0,0,C] 01 (00004FE4) PITCH +0x00004FEC: 0xF3AF801F vrot.t C730,S000,[S,S,S] 01 (00004FE8) PITCH +0x00004FF0: 0xF3B0801F vrot.t C730,S000,[C,-S,-S] 01 (00004FEC) PITCH +0x00004FF4: 0xF3B1801F vrot.t C730,S000,[-S,C,0] 01 (00004FF0) PITCH +0x00004FF8: 0xF3B2801F vrot.t C730,S000,[-S,0,C] 01 (00004FF4) PITCH +0x00004FFC: 0xF3B3801F vrot.t C730,S000,[-S,0,0] 01 (00004FF8) PITCH +0x00005000: 0xF3B4801F vrot.t C730,S000,[C,-S,0] 01 (00004FFC) PITCH +0x00005004: 0xF3B5801F vrot.t C730,S000,[-S,C,-S] 01 (00005000) PITCH +0x00005008: 0xF3B6801F vrot.t C730,S000,[0,-S,C] 01 (00005004) PITCH +0x0000500C: 0xF3B7801F vrot.t C730,S000,[0,-S,0] 01 (00005008) PITCH +0x00005010: 0xF3B8801F vrot.t C730,S000,[C,0,-S] 01 (0000500C) PITCH +0x00005014: 0xF3B9801F vrot.t C730,S000,[0,C,-S] 01 (00005010) PITCH +0x00005018: 0xF3BA801F vrot.t C730,S000,[-S,-S,C] 01 (00005014) PITCH +0x0000501C: 0xF3BB801F vrot.t C730,S000,[0,0,-S] 01 (00005018) PITCH +0x00005020: 0xF3BC801F vrot.t C730,S000,[C,0,0] 01 (0000501C) PITCH +0x00005024: 0xF3BD801F vrot.t C730,S000,[0,C,0] 01 (00005020) PITCH +0x00005028: 0xF3BE801F vrot.t C730,S000,[0,0,C] 01 (00005024) PITCH +0x0000502C: 0xF3BF801F vrot.t C730,S000,[-S,-S,-S] 01 (00005028) PITCH +0x00005030: 0xF3A0809F vrot.q C730,S000,[C,S,S,S] 01 (0000502C) PITCH +0x00005034: 0xF3A1809F vrot.q C730,S000,[S,C,0,0] 01 (00005030) PITCH +0x00005038: 0xF3A2809F vrot.q C730,S000,[S,0,C,0] 01 (00005034) PITCH +0x0000503C: 0xF3A3809F vrot.q C730,S000,[S,0,0,C] 01 (00005038) PITCH +0x00005040: 0xF3A4809F vrot.q C730,S000,[C,S,0,0] 01 (0000503C) PITCH +0x00005044: 0xF3A5809F vrot.q C730,S000,[S,C,S,S] 01 (00005040) PITCH +0x00005048: 0xF3A6809F vrot.q C730,S000,[0,S,C,0] 01 (00005044) PITCH +0x0000504C: 0xF3A7809F vrot.q C730,S000,[0,S,0,C] 01 (00005048) PITCH +0x00005050: 0xF3A8809F vrot.q C730,S000,[C,0,S,0] 01 (0000504C) PITCH +0x00005054: 0xF3A9809F vrot.q C730,S000,[0,C,S,0] 01 (00005050) PITCH +0x00005058: 0xF3AA809F vrot.q C730,S000,[S,S,C,S] 01 (00005054) PITCH +0x0000505C: 0xF3AB809F vrot.q C730,S000,[0,0,S,C] 01 (00005058) PITCH +0x00005060: 0xF3AC809F vrot.q C730,S000,[C,0,0,S] 01 (0000505C) PITCH +0x00005064: 0xF3AD809F vrot.q C730,S000,[0,C,0,S] 01 (00005060) PITCH +0x00005068: 0xF3AE809F vrot.q C730,S000,[0,0,C,S] 01 (00005064) PITCH +0x0000506C: 0xF3AF809F vrot.q C730,S000,[S,S,S,C] 01 (00005068) PITCH +0x00005070: 0xF3B0809F vrot.q C730,S000,[C,-S,-S,-S] 01 (0000506C) PITCH +0x00005074: 0xF3B1809F vrot.q C730,S000,[-S,C,0,0] 01 (00005070) PITCH +0x00005078: 0xF3B2809F vrot.q C730,S000,[-S,0,C,0] 01 (00005074) PITCH +0x0000507C: 0xF3B3809F vrot.q C730,S000,[-S,0,0,C] 01 (00005078) PITCH +0x00005080: 0xF3B4809F vrot.q C730,S000,[C,-S,0,0] 01 (0000507C) PITCH +0x00005084: 0xF3B5809F vrot.q C730,S000,[-S,C,-S,-S] 01 (00005080) PITCH +0x00005088: 0xF3B6809F vrot.q C730,S000,[0,-S,C,0] 01 (00005084) PITCH +0x0000508C: 0xF3B7809F vrot.q C730,S000,[0,-S,0,C] 01 (00005088) PITCH +0x00005090: 0xF3B8809F vrot.q C730,S000,[C,0,-S,0] 01 (0000508C) PITCH +0x00005094: 0xF3B9809F vrot.q C730,S000,[0,C,-S,0] 01 (00005090) PITCH +0x00005098: 0xF3BA809F vrot.q C730,S000,[-S,-S,C,-S] 01 (00005094) PITCH +0x0000509C: 0xF3BB809F vrot.q C730,S000,[0,0,-S,C] 01 (00005098) PITCH +0x000050A0: 0xF3BC809F vrot.q C730,S000,[C,0,0,-S] 01 (0000509C) PITCH +0x000050A4: 0xF3BD809F vrot.q C730,S000,[0,C,0,-S] 01 (000050A0) PITCH +0x000050A8: 0xF3BE809F vrot.q C730,S000,[0,0,C,-S] 01 (000050A4) PITCH +0x000050AC: 0xF3BF809F vrot.q C730,S000,[-S,-S,-S,C] 01 (000050A8) PITCH +0x000050B0: 0x03E00008 jr ra +0x000050B4: 0x00000000 nop + diff --git a/tests/asm/r4000allegrex/sceVfpuMatrix3Transform.c b/tests/asm/r4000allegrex/sceVfpuMatrix3Transform.c new file mode 100644 index 00000000..f533d7ec --- /dev/null +++ b/tests/asm/r4000allegrex/sceVfpuMatrix3Transform.c @@ -0,0 +1,41 @@ +typedef struct ScePspFVector3 { + float x, y, z; +} ScePspFVector3; + +typedef struct ScePspFMatrix3 { + ScePspFVector3 x, y, z; +} ScePspFMatrix3; + +ScePspFVector3 *sceVfpuMatrix3Transform(ScePspFVector3 *pv0, const ScePspFMatrix3 *pm1, const ScePspFVector3 *pv2) +{ +#if 0 + pv0->x = (pm1->x.x * pv2->x) + (pm1->y.x * pv2->y) + (pm1->z.x * pv2->z); + pv0->y = (pm1->x.y * pv2->x) + (pm1->y.y * pv2->y) + (pm1->z.y * pv2->z); + pv0->z = (pm1->x.z * pv2->x) + (pm1->y.z * pv2->y) + (pm1->z.z * pv2->z); +#else + __asm__ ( + ".set push\n" // save assembler option + ".set noreorder\n" // suppress reordering + "lv.s s100, 0 + %1\n" // s100 = pm1->x.x + "lv.s s101, 4 + %1\n" // s101 = pm1->x.y + "lv.s s102, 8 + %1\n" // s102 = pm1->x.z + "lv.s s110, 12 + %1\n" // s110 = pm1->y.x + "lv.s s111, 16 + %1\n" // s111 = pm1->y.y + "lv.s s112, 20 + %1\n" // s112 = pm1->y.z + "lv.s s120, 24 + %1\n" // s120 = pm1->z.x + "lv.s s121, 28 + %1\n" // s121 = pm1->z.y + "lv.s s122, 32 + %1\n" // s122 = pm1->z.z + "lv.s s200, 0 + %2\n" // s200 = pv2->x + "lv.s s201, 4 + %2\n" // s201 = pv2->y + "lv.s s202, 8 + %2\n" // s202 = pv2->z + "vctfm3.t c000, e100, c200\n" // c000 = e100 * c200 + "sv.s s000, 0 + %0\n" // pv0->x = s000 + "sv.s s001, 4 + %0\n" // pv0->y = s001 + "sv.s s002, 8 + %0\n" // pv0->z = s002 + ".set pop\n" // restore assembler option + : "=o"(*pv0) + : "o"(*pm1), "o"(*pv2) + ); +#endif + return (pv0); +} diff --git a/tests/c/instruction_checks/expected_disasm_utils.h b/tests/c/instruction_checks/expected_disasm_utils.h new file mode 100644 index 00000000..a0bfbb82 --- /dev/null +++ b/tests/c/instruction_checks/expected_disasm_utils.h @@ -0,0 +1,265 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +#ifndef EXPECTED_DISASM_UTILS_H +#define EXPECTED_DISASM_UTILS_H +#pragma once + +#include "rabbitizer.h" + +#include +#include +#include + +#ifdef NDEBUG +#error "Do not define NDEBUG" +#endif +#include + +#define BOOL_STR(x) ((x) ? "true" : "false") +#define STR_STARTS_WITH(str, prefix) (strncmp((str), (prefix), strlen((prefix))) == 0) + +#define LOG(...) \ + do { \ + fprintf(stderr, __VA_ARGS__); \ + fprintf(stderr, " File: %s\n", __BASE_FILE__); \ + } while (0) + +#define LOG_END(...) \ + do { \ + fprintf(stderr, "%s: ", __BASE_FILE__); \ + fprintf(stderr, __VA_ARGS__); \ + } while (0) + +#define LOG_ENTRY_DATA(entry, instr) \ + do { \ + fprintf(stderr, " InstrIdType: '%s'\n", RabInstrIdType_getName((instr)->instrIdType)); \ + fprintf(stderr, " gnuMode: '%s'\n", BOOL_STR((entry)->gnuMode)); \ + fprintf(stderr, "\n"); \ + } while (0) + +size_t strlen_null(const char *string) { + if (string == NULL) { + return 0; + } + return strlen(string); +} + +int strcmp_null(const char *s0, const char *s1) { + if (s0 == s1) { + return 0; + } + + if (s0 == NULL) { + return 1; + } + + if (s1 == NULL) { + return -1; + } + + return strcmp(s0, s1); +} + +typedef struct TestEntry { + RabbitizerInstrCategory category; + uint32_t word; + const char *immOverride; + const char *expectedStr; + bool gnuMode; +} TestEntry; + +#define TEST_ENTRY(cat, w, imm, expected, ...) \ + { .category = cat, .word = w, .immOverride = imm, .expectedStr = expected, .gnuMode = true, __VA_ARGS__ } + +// Must be defined by the test +const TestEntry test_entries[]; +size_t test_entries_len; + +typedef struct InstrInitInfo { + void (*init)(RabbitizerInstruction *self, uint32_t word, uint32_t vram); + void (*processUniqueId)(RabbitizerInstruction *self); + void (*destroy)(RabbitizerInstruction *self); +} InstrInitInfo; + +#define INIT_INFOS(catSuffix, plainSuffix) \ + [RABBITIZER_INSTRCAT_##catSuffix] = { \ + .init = RabbitizerInstruction##plainSuffix##_init, \ + .processUniqueId = RabbitizerInstruction##plainSuffix##_processUniqueId, \ + .destroy = RabbitizerInstruction##plainSuffix##_destroy, \ + } + +const InstrInitInfo initInfos[] = { + INIT_INFOS(CPU, ), + INIT_INFOS(RSP, Rsp), + INIT_INFOS(R3000GTE, R3000GTE), + INIT_INFOS(R4000ALLEGREX, R4000Allegrex), + INIT_INFOS(R5900, R5900), +}; + +static_assert(ARRAY_COUNT(initInfos) == RABBITIZER_INSTRCAT_MAX, "oy noy, the tests are borken"); + +void check_infos_validity(void) { + static bool checked = false; + size_t i; + + if (checked) { + return; + } + + for (i = 0; i < RABBITIZER_INSTRCAT_MAX; i++) { + const InstrInitInfo *info = &initInfos[i]; + + assert(info->init != NULL); + assert(info->processUniqueId != NULL); + assert(info->destroy != NULL); + } + + checked = true; +} + +int check_duplicated_entries(size_t entries_len, const TestEntry entries_arr[]) { + assert(entries_arr != NULL); + + int errorCount = 0; + size_t i; + + for (i = 0; i < entries_len; i++) { + size_t j; + + for (j = i + 1; j < entries_len; j++) { + if ((entries_arr[i].word == entries_arr[j].word) && + (strcmp_null(entries_arr[i].immOverride, entries_arr[j].immOverride) == 0)) { + if (entries_arr[i].gnuMode == entries_arr[j].gnuMode) { + LOG("Duplicated entry. Word: '0x%08X'. immOverride: '%s'\n", entries_arr[i].word, + entries_arr[i].immOverride); + errorCount++; + } + } + +#if 0 + if (strcmp_null(entries_arr[i].expectedStr, entries_arr[j].expectedStr) == 0) { + LOG("Duplicated expected entry. Word: '0x%08X'. immOverride: '%s'. expectedStr: '%s'\n", entries_arr[i].word, + entries_arr[i].immOverride, entries_arr[i].expectedStr); + errorCount++; + } +#endif + } + } + + return errorCount; +} + +bool check_expected_output(const TestEntry *entry) { + assert(entry != NULL); + assert(entry->category < RABBITIZER_INSTRCAT_MAX); + + bool expected = true; + RabbitizerInstruction instr; + char *buffer; + size_t bufferSize; + size_t immOverrideLength = strlen_null(entry->immOverride); + const InstrInitInfo *info = &initInfos[entry->category]; + + RabbitizerConfig_Cfg.toolchainTweaks.gnuMode = entry->gnuMode; + + check_infos_validity(); + + info->init(&instr, entry->word, 0); + info->processUniqueId(&instr); + + bufferSize = RabbitizerInstruction_getSizeForBuffer(&instr, immOverrideLength, 0); + buffer = malloc(bufferSize + 1); + assert(buffer != NULL); + + RabbitizerInstruction_disassemble(&instr, buffer, entry->immOverride, immOverrideLength, 0); + + if (entry->expectedStr == NULL) { + LOG("Word '0x%08X' doesn't have a expected str, got '%s'\n", entry->word, buffer); + LOG_ENTRY_DATA(entry, &instr); + expected = false; + } else if (strcmp(buffer, entry->expectedStr) != 0) { + LOG("Error on word '0x%08X'. Expected '%s', got '%s'\n", entry->word, entry->expectedStr, buffer); + LOG_ENTRY_DATA(entry, &instr); + expected = false; + } + + free(buffer); + info->destroy(&instr); + + return expected; +} + +void print_expected(void) { + size_t i; + + for (i = 0; i < test_entries_len; i++) { + const TestEntry *entry = &test_entries[i]; + + RabbitizerInstruction instr; + const InstrInitInfo *info = &initInfos[entry->category]; + + assert(entry->category < RABBITIZER_INSTRCAT_MAX); + + RabbitizerConfig_Cfg.toolchainTweaks.gnuMode = entry->gnuMode; + + info->init(&instr, entry->word, 0); + info->processUniqueId(&instr); + + if (!STR_STARTS_WITH(entry->expectedStr, ".word ")) { + printf("%s\n", entry->expectedStr); + } + + info->destroy(&instr); + } +} + +bool process_argv(int argc, char *argv[]) { + bool ret = false; + int i; + + for (i = 1; i < argc; i++) { + const char *opt = argv[i]; + + if (strcmp(opt, "--print-expected") == 0) { + print_expected(); + ret = true; + } else { + LOG_END("Unknown option: '%s'\n", opt); + ret = true; + } + } + + return ret; +} + +#ifndef AVOID_DEF_MAIN +int main(int argc, char *argv[]) { + int errorCount; + size_t i; + + if (process_argv(argc, argv)) { + return 0; + } + + errorCount = check_duplicated_entries(test_entries_len, test_entries); + + if (errorCount != 0) { + LOG_END("Found %i duplicated entries. Stopping\n", errorCount); + + return errorCount; + } + + for (i = 0; i < test_entries_len; i++) { + if (!check_expected_output(&test_entries[i])) { + errorCount++; + } + } + + LOG_END("%i errors out of %zu entries. %.2f%% correct.\n\n", errorCount, test_entries_len, (double)((test_entries_len - errorCount) / (float)test_entries_len * 100.0f)); + + return errorCount; +} +#endif + +#endif diff --git a/tests/c/instruction_checks/jalr.c b/tests/c/instruction_checks/jalr.c index 01296898..7113a0a3 100644 --- a/tests/c/instruction_checks/jalr.c +++ b/tests/c/instruction_checks/jalr.c @@ -17,6 +17,19 @@ int main() { size_t rs; int errorCount = 0; + /** + * Generates and checks all possible jalr combinations. + * + * jalr has 2 syntaxes, one for an explicit return address and another for an implicit one + * (implicit assumes $ra). + * Both syntaxes use an explicit register to jump to. + * + * Since I didn't want to make a TestEntry array with all the 1024 combinations then I'm + * manually checking each part of the disassembled instruction to match what I expect. + * + * Checking all the possible combinations is overkill, but the test is already written, so meh. + */ + for (rs = 0; rs < RAB_REGISTERS_COUNT; rs++) { uint32_t shifted_rs = RAB_INSTR_PACK_rs(0, rs); size_t rd; @@ -42,6 +55,8 @@ int main() { bufferPtr += strlen(INSTR_OPCODE_PREFIX); if (rd == RABBITIZER_REG_GPR_O32_ra) { + /* Implicit return address */ + if (!STR_STARTS_WITH(bufferPtr, rsName)) { fprintf(stderr, "Error in word 0x%08X. Expected '%s', got '%s'\n", new_word, rsName, bufferPtr); errorCount++; @@ -54,6 +69,8 @@ int main() { } } } else { + /* Explicit return address */ + const char *rdName = RabbitizerRegister_getNameGpr(rd); if (!STR_STARTS_WITH(bufferPtr, rdName)) { diff --git a/tests/c/instruction_checks/plain_disassembly.c b/tests/c/instruction_checks/plain_disassembly.c index ff14bf46..4a76ac43 100644 --- a/tests/c/instruction_checks/plain_disassembly.c +++ b/tests/c/instruction_checks/plain_disassembly.c @@ -7,96 +7,53 @@ #include #include -size_t strlen_null(const char *string) { - if (string == NULL) { - return 0; - } - return strlen(string); -} +#include "expected_disasm_utils.h" -typedef struct TestEntry { - uint32_t word; - const char *immOverride; - const char *expectedStr; -} TestEntry; +#define TEST_ENTRY_C(word, imm, expected) TEST_ENTRY(RABBITIZER_INSTRCAT_CPU, word, imm, expected,) -const TestEntry entries[] = { - { 0x3C088001, NULL, "lui $t0, 0x8001" }, - { 0x25080E60, NULL, "addiu $t0, $t0, 0xE60" }, - { 0x3C090002, NULL, "lui $t1, 0x2" }, - { 0x25298DE0, NULL, "addiu $t1, $t1, -0x7220" }, - { 0xAD000000, NULL, "sw $zero, 0x0($t0)" }, - { 0xAD000004, NULL, "sw $zero, 0x4($t0)" }, - { 0x21080008, NULL, "addi $t0, $t0, 0x8" }, - { 0x2129FFF8, NULL, "addi $t1, $t1, -0x8" }, - { 0x1520FFFB, NULL, "bnez $t1, . + 4 + (-0x5 << 2)" }, - { 0x00000000, NULL, "nop" }, - { 0x3C0A8000, NULL, "lui $t2, 0x8000" }, - { 0x254A0494, NULL, "addiu $t2, $t2, 0x494" }, - { 0x3C1D8002, NULL, "lui $sp, 0x8002" }, - { 0x01400008, NULL, "jr $t2" }, - { 0x27BDF8C0, NULL, "addiu $sp, $sp, -0x740" }, +const TestEntry test_entries[] = { + TEST_ENTRY_C(0x3C088001, NULL, "lui $t0, 0x8001"), + TEST_ENTRY_C(0x25080E60, NULL, "addiu $t0, $t0, 0xE60"), + TEST_ENTRY_C(0x3C090002, NULL, "lui $t1, 0x2"), + TEST_ENTRY_C(0x25298DE0, NULL, "addiu $t1, $t1, -0x7220"), + TEST_ENTRY_C(0xAD000000, NULL, "sw $zero, 0x0($t0)"), + TEST_ENTRY_C(0xAD000004, NULL, "sw $zero, 0x4($t0)"), + TEST_ENTRY_C(0x21080008, NULL, "addi $t0, $t0, 0x8"), + TEST_ENTRY_C(0x2129FFF8, NULL, "addi $t1, $t1, -0x8"), + TEST_ENTRY_C(0x1520FFFB, NULL, "bnez $t1, . + 4 + (-0x5 << 2)"), + TEST_ENTRY_C(0x00000000, NULL, "nop"), + TEST_ENTRY_C(0x3C0A8000, NULL, "lui $t2, 0x8000"), + TEST_ENTRY_C(0x254A0494, NULL, "addiu $t2, $t2, 0x494"), + TEST_ENTRY_C(0x3C1D8002, NULL, "lui $sp, 0x8002"), + TEST_ENTRY_C(0x01400008, NULL, "jr $t2"), + TEST_ENTRY_C(0x27BDF8C0, NULL, "addiu $sp, $sp, -0x740"), - { 0x3C018001, NULL, "lui $at, 0x8001" }, - { 0x03E00008, NULL, "jr $ra" }, - { 0xAC24E190, NULL, "sw $a0, -0x1E70($at)" }, + TEST_ENTRY_C(0x3C018001, NULL, "lui $at, 0x8001"), + TEST_ENTRY_C(0x03E00008, NULL, "jr $ra"), + TEST_ENTRY_C(0xAC24E190, NULL, "sw $a0, -0x1E70($at)"), - { 0x3C018001, "%hi(D_8000E190)", "lui $at, %hi(D_8000E190)" }, - { 0x03E00008, NULL, "jr $ra" }, - { 0xAC24E190, "%lo(D_8000E190)", "sw $a0, %lo(D_8000E190)($at)" }, + TEST_ENTRY_C(0x3C018001, "%hi(D_8000E190)", "lui $at, %hi(D_8000E190)"), + TEST_ENTRY_C(0xAC24E190, "%lo(D_8000E190)", "sw $a0, %lo(D_8000E190)($at)"), - { 0x0C001F24, NULL, "jal func_80007C90" }, - { 0x0C001F24, "some_func", "jal some_func" }, + TEST_ENTRY_C(0x0C001F24, NULL, "jal func_80007C90"), + TEST_ENTRY_C(0x0C001F24, "some_func", "jal some_func"), - { 0x8F99805C, NULL, "lw $t9, -0x7FA4($gp)"}, - { 0x8F99805C, "%call16(strcmp)", "lw $t9, %call16(strcmp)($gp)"}, + TEST_ENTRY_C(0x8F99805C, NULL, "lw $t9, -0x7FA4($gp)"), + TEST_ENTRY_C(0x8F99805C, "%call16(strcmp)", "lw $t9, %call16(strcmp)($gp)"), - { 0x8F858028, NULL, "lw $a1, -0x7FD8($gp)"}, - { 0x8F858028, "%got(STR_10007C90)", "lw $a1, %got(STR_10007C90)($gp)"}, + TEST_ENTRY_C(0x8F858028, NULL, "lw $a1, -0x7FD8($gp)"), + TEST_ENTRY_C(0x8F858028, "%got(STR_10007C90)", "lw $a1, %got(STR_10007C90)($gp)"), - { 0x00435022, NULL, "sub $t2, $v0, $v1", }, - { 0x00025022, NULL, "neg $t2, $v0", }, + TEST_ENTRY_C(0x00435022, NULL, "sub $t2, $v0, $v1"), + TEST_ENTRY_C(0x00025022, NULL, "neg $t2, $v0"), - { 0x00E41823, NULL, "subu $v1, $a3, $a0" }, - { 0x00041823, NULL, "negu $v1, $a0" }, + TEST_ENTRY_C(0x00E41823, NULL, "subu $v1, $a3, $a0"), + TEST_ENTRY_C(0x00041823, NULL, "negu $v1, $a0"), // Invalid instructions - { 0x44444444, NULL, ".word 0x44444444 # cfc1 $a0, $8 # 00000444 " }, - { 0x77777777, NULL, ".word 0x77777777 # INVALID $k1, $s7, 0x7777 # 00000000 " }, - { 0xEEEEEEEE, NULL, ".word 0xEEEEEEEE # INVALID $s7, $t6, -0x1112 # 00000000 " }, + TEST_ENTRY_C(0x44444444, NULL, ".word 0x44444444 # cfc1 $a0, $8 # 00000444 "), + TEST_ENTRY_C(0x77777777, NULL, ".word 0x77777777 # INVALID $k1, $s7, 0x7777 # 00000000 "), + TEST_ENTRY_C(0xEEEEEEEE, NULL, ".word 0xEEEEEEEE # INVALID $s7, $t6, -0x1112 # 00000000 "), }; -int main() { - int errorCount = 0; - size_t i; - - for (i = 0; i < ARRAY_COUNT(entries); i++) { - const TestEntry *entry = &entries[i]; - RabbitizerInstruction instr; - char *buffer; - size_t bufferSize; - size_t immOverrideLength = strlen_null(entry->immOverride); - - RabbitizerInstruction_init(&instr, entry->word, 0); - RabbitizerInstruction_processUniqueId(&instr); - - bufferSize = RabbitizerInstruction_getSizeForBuffer(&instr, immOverrideLength, 0); - buffer = malloc(bufferSize + 1); - assert(buffer != NULL); - - RabbitizerInstruction_disassemble(&instr, buffer, entry->immOverride, immOverrideLength, 0); - - if (entry->expectedStr == NULL) { - printf("Word '0x%08X' doesn't have a expected str, got '%s'\n", entry->word, buffer); - errorCount++; - } else if (strcmp(buffer, entry->expectedStr) != 0) { - fprintf(stderr, "Error on word '0x%08X'. Expected '%s', got '%s'\n", entry->word, entry->expectedStr, buffer); - errorCount++; - } - - free(buffer); - RabbitizerInstruction_destroy(&instr); - } - - return errorCount; -} +size_t test_entries_len = ARRAY_COUNT(test_entries); diff --git a/tests/c/instruction_checks/r3000gte_disasm.c b/tests/c/instruction_checks/r3000gte_disasm.c index 71dae737..e8c9cec6 100644 --- a/tests/c/instruction_checks/r3000gte_disasm.c +++ b/tests/c/instruction_checks/r3000gte_disasm.c @@ -7,124 +7,78 @@ #include #include -size_t strlen_null(const char *string) { - if (string == NULL) { - return 0; - } - return strlen(string); -} +#include "expected_disasm_utils.h" -typedef struct TestEntry { - uint32_t word; - const char *immOverride; - const char *expectedStr; -} TestEntry; +#define TEST_ENTRY_C(word, imm, expected) TEST_ENTRY(RABBITIZER_INSTRCAT_R3000GTE, word, imm, expected,) -const TestEntry entries[] = { - { 0x4A180001, NULL, "RTPS" }, - { 0x4A280030, NULL, "RTPT" }, - { 0x4A680029, NULL, "DPCL" }, - { 0x4A780010, NULL, "DPCS" }, - { 0x4AF8002A, NULL, "DPCT" }, - { 0x4A980011, NULL, "INTPL" }, - { 0x4AC8041E, NULL, "NCS" }, - { 0x4AD80420, NULL, "NCT" }, - { 0x4AE80413, NULL, "NCDS" }, - { 0x4AF80416, NULL, "NCDT" }, - { 0x4B08041B, NULL, "NCCS" }, - { 0x4B18043F, NULL, "NCCT" }, - { 0x4B280414, NULL, "CDP" }, - { 0x4B38041C, NULL, "CC" }, - { 0x4B400006, NULL, "NCLIP" }, - { 0x4B58002D, NULL, "AVSZ3" }, - { 0x4B68002E, NULL, "AVSZ4" }, +const TestEntry test_entries[] = { + TEST_ENTRY_C(0x4A180001, NULL, "RTPS"), + TEST_ENTRY_C(0x4A280030, NULL, "RTPT"), + TEST_ENTRY_C(0x4A680029, NULL, "DPCL"), + TEST_ENTRY_C(0x4A780010, NULL, "DPCS"), + TEST_ENTRY_C(0x4AF8002A, NULL, "DPCT"), + TEST_ENTRY_C(0x4A980011, NULL, "INTPL"), + TEST_ENTRY_C(0x4AC8041E, NULL, "NCS"), + TEST_ENTRY_C(0x4AD80420, NULL, "NCT"), + TEST_ENTRY_C(0x4AE80413, NULL, "NCDS"), + TEST_ENTRY_C(0x4AF80416, NULL, "NCDT"), + TEST_ENTRY_C(0x4B08041B, NULL, "NCCS"), + TEST_ENTRY_C(0x4B18043F, NULL, "NCCT"), + TEST_ENTRY_C(0x4B280414, NULL, "CDP"), + TEST_ENTRY_C(0x4B38041C, NULL, "CC"), + TEST_ENTRY_C(0x4B400006, NULL, "NCLIP"), + TEST_ENTRY_C(0x4B58002D, NULL, "AVSZ3"), + TEST_ENTRY_C(0x4B68002E, NULL, "AVSZ4"), - { 0x4A400012, NULL, "MVMVA 0, 0, 0, 0, 0" }, - { 0x4AA00428, NULL, "SQR 0" }, - { 0x4B70000C, NULL, "OP 0" }, - { 0x4B90003D, NULL, "GPF 0" }, - { 0x4BA0003E, NULL, "GPL 0" }, + TEST_ENTRY_C(0x4A400012, NULL, "MVMVA 0, 0, 0, 0, 0"), + TEST_ENTRY_C(0x4AA00428, NULL, "SQR 0"), + TEST_ENTRY_C(0x4B70000C, NULL, "OP 0"), + TEST_ENTRY_C(0x4B90003D, NULL, "GPF 0"), + TEST_ENTRY_C(0x4BA0003E, NULL, "GPL 0"), - { 0x4A486012, NULL, "MVMVA 1, 0, 0, 3, 0" }, - { 0x4A48E012, NULL, "MVMVA 1, 0, 1, 3, 0" }, - { 0x4A496012, NULL, "MVMVA 1, 0, 2, 3, 0" }, - { 0x4A49E012, NULL, "MVMVA 1, 0, 3, 3, 0" }, - { 0x4A41E012, NULL, "MVMVA 0, 0, 3, 3, 0" }, - { 0x4A480012, NULL, "MVMVA 1, 0, 0, 0, 0" }, - { 0x4A488012, NULL, "MVMVA 1, 0, 1, 0, 0" }, - { 0x4A490012, NULL, "MVMVA 1, 0, 2, 0, 0" }, - { 0x4A498012, NULL, "MVMVA 1, 0, 3, 0, 0" }, - { 0x4A482012, NULL, "MVMVA 1, 0, 0, 1, 0" }, - { 0x4A48A012, NULL, "MVMVA 1, 0, 1, 1, 0" }, - { 0x4A492012, NULL, "MVMVA 1, 0, 2, 1, 0" }, - { 0x4A49A012, NULL, "MVMVA 1, 0, 3, 1, 0" }, - { 0x4A4A6412, NULL, "MVMVA 1, 1, 0, 3, 1" }, - { 0x4A4A6012, NULL, "MVMVA 1, 1, 0, 3, 0" }, - { 0x4A4AE012, NULL, "MVMVA 1, 1, 1, 3, 0" }, - { 0x4A4B6012, NULL, "MVMVA 1, 1, 2, 3, 0" }, - { 0x4A4BE012, NULL, "MVMVA 1, 1, 3, 3, 0" }, - { 0x4A4A0012, NULL, "MVMVA 1, 1, 0, 0, 0" }, - { 0x4A4A8012, NULL, "MVMVA 1, 1, 1, 0, 0" }, - { 0x4A4B0012, NULL, "MVMVA 1, 1, 2, 0, 0" }, - { 0x4A4B8012, NULL, "MVMVA 1, 1, 3, 0, 0" }, - { 0x4A4A2012, NULL, "MVMVA 1, 1, 0, 1, 0" }, - { 0x4A4AA012, NULL, "MVMVA 1, 1, 1, 1, 0" }, - { 0x4A4B2012, NULL, "MVMVA 1, 1, 2, 1, 0" }, - { 0x4A4BA012, NULL, "MVMVA 1, 1, 3, 1, 0" }, - { 0x4A4DA412, NULL, "MVMVA 1, 2, 3, 1, 1" }, - { 0x4A4C6012, NULL, "MVMVA 1, 2, 0, 3, 0" }, - { 0x4A4CE012, NULL, "MVMVA 1, 2, 1, 3, 0" }, - { 0x4A4D6012, NULL, "MVMVA 1, 2, 2, 3, 0" }, - { 0x4A4DE012, NULL, "MVMVA 1, 2, 3, 3, 0" }, - { 0x4A4C0012, NULL, "MVMVA 1, 2, 0, 0, 0" }, - { 0x4A4C8012, NULL, "MVMVA 1, 2, 1, 0, 0" }, - { 0x4A4D0012, NULL, "MVMVA 1, 2, 2, 0, 0" }, - { 0x4A4D8012, NULL, "MVMVA 1, 2, 3, 0, 0" }, - { 0x4A4C2012, NULL, "MVMVA 1, 2, 0, 1, 0" }, - { 0x4A4CA012, NULL, "MVMVA 1, 2, 1, 1, 0" }, - { 0x4A4D2012, NULL, "MVMVA 1, 2, 2, 1, 0" }, - { 0x4A4DA012, NULL, "MVMVA 1, 2, 3, 1, 0" }, - { 0x4AA80428, NULL, "SQR 1" }, - { 0x4AA80428, NULL, "SQR 1" }, - { 0x4B78000C, NULL, "OP 1" }, - { 0x4B70000C, NULL, "OP 0" }, - { 0x4B98003D, NULL, "GPF 1" }, - { 0x4B90003D, NULL, "GPF 0" }, - { 0x4BA8003E, NULL, "GPL 1" }, - { 0x4BA0003E, NULL, "GPL 0" }, + TEST_ENTRY_C(0x4A486012, NULL, "MVMVA 1, 0, 0, 3, 0"), + TEST_ENTRY_C(0x4A48E012, NULL, "MVMVA 1, 0, 1, 3, 0"), + TEST_ENTRY_C(0x4A496012, NULL, "MVMVA 1, 0, 2, 3, 0"), + TEST_ENTRY_C(0x4A49E012, NULL, "MVMVA 1, 0, 3, 3, 0"), + TEST_ENTRY_C(0x4A41E012, NULL, "MVMVA 0, 0, 3, 3, 0"), + TEST_ENTRY_C(0x4A480012, NULL, "MVMVA 1, 0, 0, 0, 0"), + TEST_ENTRY_C(0x4A488012, NULL, "MVMVA 1, 0, 1, 0, 0"), + TEST_ENTRY_C(0x4A490012, NULL, "MVMVA 1, 0, 2, 0, 0"), + TEST_ENTRY_C(0x4A498012, NULL, "MVMVA 1, 0, 3, 0, 0"), + TEST_ENTRY_C(0x4A482012, NULL, "MVMVA 1, 0, 0, 1, 0"), + TEST_ENTRY_C(0x4A48A012, NULL, "MVMVA 1, 0, 1, 1, 0"), + TEST_ENTRY_C(0x4A492012, NULL, "MVMVA 1, 0, 2, 1, 0"), + TEST_ENTRY_C(0x4A49A012, NULL, "MVMVA 1, 0, 3, 1, 0"), + TEST_ENTRY_C(0x4A4A6412, NULL, "MVMVA 1, 1, 0, 3, 1"), + TEST_ENTRY_C(0x4A4A6012, NULL, "MVMVA 1, 1, 0, 3, 0"), + TEST_ENTRY_C(0x4A4AE012, NULL, "MVMVA 1, 1, 1, 3, 0"), + TEST_ENTRY_C(0x4A4B6012, NULL, "MVMVA 1, 1, 2, 3, 0"), + TEST_ENTRY_C(0x4A4BE012, NULL, "MVMVA 1, 1, 3, 3, 0"), + TEST_ENTRY_C(0x4A4A0012, NULL, "MVMVA 1, 1, 0, 0, 0"), + TEST_ENTRY_C(0x4A4A8012, NULL, "MVMVA 1, 1, 1, 0, 0"), + TEST_ENTRY_C(0x4A4B0012, NULL, "MVMVA 1, 1, 2, 0, 0"), + TEST_ENTRY_C(0x4A4B8012, NULL, "MVMVA 1, 1, 3, 0, 0"), + TEST_ENTRY_C(0x4A4A2012, NULL, "MVMVA 1, 1, 0, 1, 0"), + TEST_ENTRY_C(0x4A4AA012, NULL, "MVMVA 1, 1, 1, 1, 0"), + TEST_ENTRY_C(0x4A4B2012, NULL, "MVMVA 1, 1, 2, 1, 0"), + TEST_ENTRY_C(0x4A4BA012, NULL, "MVMVA 1, 1, 3, 1, 0"), + TEST_ENTRY_C(0x4A4DA412, NULL, "MVMVA 1, 2, 3, 1, 1"), + TEST_ENTRY_C(0x4A4C6012, NULL, "MVMVA 1, 2, 0, 3, 0"), + TEST_ENTRY_C(0x4A4CE012, NULL, "MVMVA 1, 2, 1, 3, 0"), + TEST_ENTRY_C(0x4A4D6012, NULL, "MVMVA 1, 2, 2, 3, 0"), + TEST_ENTRY_C(0x4A4DE012, NULL, "MVMVA 1, 2, 3, 3, 0"), + TEST_ENTRY_C(0x4A4C0012, NULL, "MVMVA 1, 2, 0, 0, 0"), + TEST_ENTRY_C(0x4A4C8012, NULL, "MVMVA 1, 2, 1, 0, 0"), + TEST_ENTRY_C(0x4A4D0012, NULL, "MVMVA 1, 2, 2, 0, 0"), + TEST_ENTRY_C(0x4A4D8012, NULL, "MVMVA 1, 2, 3, 0, 0"), + TEST_ENTRY_C(0x4A4C2012, NULL, "MVMVA 1, 2, 0, 1, 0"), + TEST_ENTRY_C(0x4A4CA012, NULL, "MVMVA 1, 2, 1, 1, 0"), + TEST_ENTRY_C(0x4A4D2012, NULL, "MVMVA 1, 2, 2, 1, 0"), + TEST_ENTRY_C(0x4A4DA012, NULL, "MVMVA 1, 2, 3, 1, 0"), + TEST_ENTRY_C(0x4AA80428, NULL, "SQR 1"), + TEST_ENTRY_C(0x4B78000C, NULL, "OP 1"), + TEST_ENTRY_C(0x4B98003D, NULL, "GPF 1"), + TEST_ENTRY_C(0x4BA8003E, NULL, "GPL 1"), }; -int main() { - int errorCount = 0; - size_t i; - - for (i = 0; i < ARRAY_COUNT(entries); i++) { - const TestEntry *entry = &entries[i]; - RabbitizerInstruction instr; - char *buffer; - size_t bufferSize; - size_t immOverrideLength = strlen_null(entry->immOverride); - - RabbitizerInstructionR3000GTE_init(&instr, entry->word, 0); - RabbitizerInstructionR3000GTE_processUniqueId(&instr); - - bufferSize = RabbitizerInstruction_getSizeForBuffer(&instr, immOverrideLength, 0); - buffer = malloc(bufferSize + 1); - assert(buffer != NULL); - - RabbitizerInstruction_disassemble(&instr, buffer, entry->immOverride, immOverrideLength, 0); - - if (entry->expectedStr == NULL) { - printf("Word '0x%08X' doesn't have a expected str, got '%s'\n", entry->word, buffer); - errorCount++; - } else if (strcmp(buffer, entry->expectedStr) != 0) { - fprintf(stderr, "Error on word '0x%08X'. Expected '%s', got '%s'\n", entry->word, entry->expectedStr, buffer); - errorCount++; - } - - free(buffer); - RabbitizerInstructionR3000GTE_destroy(&instr); - } - - return errorCount; -} +size_t test_entries_len = ARRAY_COUNT(test_entries); diff --git a/tests/c/instruction_checks/r4000allegrex_disasm.c b/tests/c/instruction_checks/r4000allegrex_disasm.c new file mode 100644 index 00000000..ea5f1a1e --- /dev/null +++ b/tests/c/instruction_checks/r4000allegrex_disasm.c @@ -0,0 +1,114 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +#include "rabbitizer.h" + +#include +#include +#include + +#include "expected_disasm_utils.h" + +#define TEST_ENTRY_C(word, imm, expected) TEST_ENTRY(RABBITIZER_INSTRCAT_R4000ALLEGREX, word, imm, expected,) + +const TestEntry test_entries[] = { + TEST_ENTRY_C(0x00801017, NULL, "clo $v0, $a0"), + TEST_ENTRY_C(0x00801016, NULL, "clz $v0, $a0"), + TEST_ENTRY_C(0x00C7001C, NULL, "madd $a2, $a3"), + TEST_ENTRY_C(0x00C7001D, NULL, "maddu $a2, $a3"), + TEST_ENTRY_C(0x00C7002E, NULL, "msub $a2, $a3"), + TEST_ENTRY_C(0x00C7002F, NULL, "msubu $a2, $a3"), + TEST_ENTRY_C(0x0085102C, NULL, "max $v0, $a0, $a1"), + TEST_ENTRY_C(0x0085102D, NULL, "min $v0, $a0, $a1"), + TEST_ENTRY_C(0x0085100B, NULL, "movn $v0, $a0, $a1"), + TEST_ENTRY_C(0x0085100A, NULL, "movz $v0, $a0, $a1"), + TEST_ENTRY_C(0x7C822080, NULL, "ext $v0, $a0, 2, 5"), + TEST_ENTRY_C(0x7C8221C0, NULL, "ext $v0, $a0, 7, 5"), + TEST_ENTRY_C(0x7C823084, NULL, "ins $v0, $a0, 2, 5"), + TEST_ENTRY_C(0x7C8259C4, NULL, "ins $v0, $a0, 7, 5"), + TEST_ENTRY_C(0x7C041420, NULL, "seb $v0, $a0"), + TEST_ENTRY_C(0x7C041620, NULL, "seh $v0, $a0"), + TEST_ENTRY_C(0x7C041520, NULL, "bitrev $v0, $a0"), + TEST_ENTRY_C(0x00241182, NULL, "rotr $v0, $a0, 6"), + TEST_ENTRY_C(0x002414C2, NULL, "rotr $v0, $a0, 19"), + TEST_ENTRY_C(0x00A41046, NULL, "rotrv $v0, $a0, $a1"), + TEST_ENTRY_C(0x7C0410A0, NULL, "wsbh $v0, $a0"), + TEST_ENTRY_C(0x7C0410E0, NULL, "wsbw $v0, $a0"), + +#if 0 + TEST_ENTRY_C(0xBC840000, NULL, "cache IXIN, 0x0($a0)"), + TEST_ENTRY_C(0xBC860000, NULL, "cache IXUN, 0x0($a0)"), + TEST_ENTRY_C(0xBC880000, NULL, "cache IHIN, 0x0($a0)"), + TEST_ENTRY_C(0xBC8A0000, NULL, "cache IF, 0x0($a0)"), + TEST_ENTRY_C(0xBC8B0000, NULL, "cache IFL, 0x0($a0)"), + TEST_ENTRY_C(0xBC940000, NULL, "cache DXWBIN, 0x0($a0)"), + TEST_ENTRY_C(0xBC960000, NULL, "cache DXUN, 0x0($a0)"), + TEST_ENTRY_C(0xBC980000, NULL, "cache DCDEX, 0x0($a0)"), + TEST_ENTRY_C(0xBC990000, NULL, "cache DHIN, 0x0($a0)"), + TEST_ENTRY_C(0xBC9A0000, NULL, "cache DHWB, 0x0($a0)"), + TEST_ENTRY_C(0xBC9B0000, NULL, "cache DHWBIN, 0x0($a0)"), + TEST_ENTRY_C(0xBC9C0000, NULL, "cache DCDEXL, 0x0($a0)"), + TEST_ENTRY_C(0xBC9E0000, NULL, "cache DF, 0x0($a0)"), + TEST_ENTRY_C(0xBC9F0000, NULL, "cache DFL, 0x0($a0)"), +#else + TEST_ENTRY_C(0xBC840000, NULL, "cache 0x04, 0x0($a0)"), + TEST_ENTRY_C(0xBC860000, NULL, "cache 0x06, 0x0($a0)"), + TEST_ENTRY_C(0xBC880000, NULL, "cache 0x08, 0x0($a0)"), + TEST_ENTRY_C(0xBC8A0000, NULL, "cache 0x0A, 0x0($a0)"), + TEST_ENTRY_C(0xBC8B0000, NULL, "cache 0x0B, 0x0($a0)"), + TEST_ENTRY_C(0xBC940000, NULL, "cache 0x14, 0x0($a0)"), + TEST_ENTRY_C(0xBC960000, NULL, "cache 0x16, 0x0($a0)"), + TEST_ENTRY_C(0xBC980000, NULL, "cache 0x18, 0x0($a0)"), + TEST_ENTRY_C(0xBC990000, NULL, "cache 0x19, 0x0($a0)"), + TEST_ENTRY_C(0xBC9A0000, NULL, "cache 0x1A, 0x0($a0)"), + TEST_ENTRY_C(0xBC9B0000, NULL, "cache 0x1B, 0x0($a0)"), + TEST_ENTRY_C(0xBC9C0000, NULL, "cache 0x1C, 0x0($a0)"), + TEST_ENTRY_C(0xBC9E0000, NULL, "cache 0x1E, 0x0($a0)"), + TEST_ENTRY_C(0xBC9F0000, NULL, "cache 0x1F, 0x0($a0)"), +#endif + + TEST_ENTRY_C(0x0000000F, NULL, "sync"), + TEST_ENTRY_C(0xC0820000, NULL, "ll $v0, 0x0($a0)"), + TEST_ENTRY_C(0xE0850000, NULL, "sc $a1, 0x0($a0)"), + + TEST_ENTRY_C(0xBC800000, NULL, "cache 0x00, 0x0($a0)"), + TEST_ENTRY_C(0xBC810000, NULL, "cache 0x01, 0x0($a0)"), + TEST_ENTRY_C(0xBC820000, NULL, "cache 0x02, 0x0($a0)"), + TEST_ENTRY_C(0xBC830000, NULL, "cache 0x03, 0x0($a0)"), + TEST_ENTRY_C(0xBC850000, NULL, "cache 0x05, 0x0($a0)"), + TEST_ENTRY_C(0xBC870000, NULL, "cache 0x07, 0x0($a0)"), + TEST_ENTRY_C(0xBC890000, NULL, "cache 0x09, 0x0($a0)"), + TEST_ENTRY_C(0xBC8C0000, NULL, "cache 0x0C, 0x0($a0)"), + TEST_ENTRY_C(0xBC8D0000, NULL, "cache 0x0D, 0x0($a0)"), + TEST_ENTRY_C(0xBC8E0000, NULL, "cache 0x0E, 0x0($a0)"), + TEST_ENTRY_C(0xBC8F0000, NULL, "cache 0x0F, 0x0($a0)"), + TEST_ENTRY_C(0xBC900000, NULL, "cache 0x10, 0x0($a0)"), + TEST_ENTRY_C(0xBC910000, NULL, "cache 0x11, 0x0($a0)"), + TEST_ENTRY_C(0xBC920000, NULL, "cache 0x12, 0x0($a0)"), + TEST_ENTRY_C(0xBC930000, NULL, "cache 0x13, 0x0($a0)"), + TEST_ENTRY_C(0xBC950000, NULL, "cache 0x15, 0x0($a0)"), + TEST_ENTRY_C(0xBC970000, NULL, "cache 0x17, 0x0($a0)"), + TEST_ENTRY_C(0xBC9D0000, NULL, "cache 0x1D, 0x0($a0)"), + + TEST_ENTRY_C(0x70000000, NULL, "sleep"), + TEST_ENTRY_C(0x70020024, NULL, "mfie $v0"), + TEST_ENTRY_C(0x70000024, NULL, "mfie $zero"), + TEST_ENTRY_C(0x70000026, NULL, "mtie $zero"), + TEST_ENTRY_C(0x70040026, NULL, "mtie $a0"), + + /* Allegrex removed 64 bits FPU instructions */ + TEST_ENTRY_C(0x468020A1, NULL, ".word 0x468020A1 # INVALID $s4, $zero, 0x20A1 # 00000000 "), + TEST_ENTRY_C(0x46002088, NULL, ".word 0x46002088 # INVALID $s0, $zero, 0x2088 # 00000000 "), + TEST_ENTRY_C(0x46002089, NULL, ".word 0x46002089 # INVALID $s0, $zero, 0x2089 # 00000000 "), + TEST_ENTRY_C(0x4600208A, NULL, ".word 0x4600208A # INVALID $s0, $zero, 0x208A # 00000000 "), + TEST_ENTRY_C(0x4600208B, NULL, ".word 0x4600208B # INVALID $s0, $zero, 0x208B # 00000000 "), + TEST_ENTRY_C(0x460020A1, NULL, ".word 0x460020A1 # INVALID $s0, $zero, 0x20A1 # 00000000 "), + TEST_ENTRY_C(0x460020A5, NULL, ".word 0x460020A5 # INVALID $s0, $zero, 0x20A5 # 00000000 "), + + TEST_ENTRY_C(0x46002085, NULL, "abs.s $f2, $f4"), + TEST_ENTRY_C(0x46042080, NULL, "add.s $f2, $f4, $f4"), + TEST_ENTRY_C(0x45000008, NULL, "bc1f . + 4 + (0x8 << 2)"), + TEST_ENTRY_C(0x46100030, NULL, "c.f.s $f0, $f16"), +}; + +size_t test_entries_len = ARRAY_COUNT(test_entries); diff --git a/tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c b/tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c new file mode 100644 index 00000000..4bba7350 --- /dev/null +++ b/tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c @@ -0,0 +1,5809 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +#include "rabbitizer.h" + +#include +#include +#include + +#include "expected_disasm_utils.h" + +#define TEST_ENTRY_C(word, imm, expected) TEST_ENTRY(RABBITIZER_INSTRCAT_R4000ALLEGREX, word, imm, expected, ) + +const TestEntry test_entries[] = { + /* vector_zero */ + TEST_ENTRY_C(0xD0060000, NULL, "vzero.s S000"), + TEST_ENTRY_C(0xD0060001, NULL, "vzero.s S010"), + TEST_ENTRY_C(0xD0060002, NULL, "vzero.s S020"), + TEST_ENTRY_C(0xD0060003, NULL, "vzero.s S030"), + TEST_ENTRY_C(0xD0060004, NULL, "vzero.s S100"), + TEST_ENTRY_C(0xD0060005, NULL, "vzero.s S110"), + TEST_ENTRY_C(0xD0060006, NULL, "vzero.s S120"), + TEST_ENTRY_C(0xD0060007, NULL, "vzero.s S130"), + TEST_ENTRY_C(0xD0060008, NULL, "vzero.s S200"), + TEST_ENTRY_C(0xD0060009, NULL, "vzero.s S210"), + TEST_ENTRY_C(0xD006000A, NULL, "vzero.s S220"), + TEST_ENTRY_C(0xD006000B, NULL, "vzero.s S230"), + TEST_ENTRY_C(0xD006000C, NULL, "vzero.s S300"), + TEST_ENTRY_C(0xD006000D, NULL, "vzero.s S310"), + TEST_ENTRY_C(0xD006000E, NULL, "vzero.s S320"), + TEST_ENTRY_C(0xD006000F, NULL, "vzero.s S330"), + TEST_ENTRY_C(0xD0060010, NULL, "vzero.s S400"), + TEST_ENTRY_C(0xD0060011, NULL, "vzero.s S410"), + TEST_ENTRY_C(0xD0060012, NULL, "vzero.s S420"), + TEST_ENTRY_C(0xD0060013, NULL, "vzero.s S430"), + TEST_ENTRY_C(0xD0060014, NULL, "vzero.s S500"), + TEST_ENTRY_C(0xD0060015, NULL, "vzero.s S510"), + TEST_ENTRY_C(0xD0060016, NULL, "vzero.s S520"), + TEST_ENTRY_C(0xD0060017, NULL, "vzero.s S530"), + TEST_ENTRY_C(0xD0060018, NULL, "vzero.s S600"), + TEST_ENTRY_C(0xD0060019, NULL, "vzero.s S610"), + TEST_ENTRY_C(0xD006001A, NULL, "vzero.s S620"), + TEST_ENTRY_C(0xD006001B, NULL, "vzero.s S630"), + TEST_ENTRY_C(0xD006001C, NULL, "vzero.s S700"), + TEST_ENTRY_C(0xD006001D, NULL, "vzero.s S710"), + TEST_ENTRY_C(0xD006001E, NULL, "vzero.s S720"), + TEST_ENTRY_C(0xD006001F, NULL, "vzero.s S730"), + TEST_ENTRY_C(0xD0060020, NULL, "vzero.s S001"), + TEST_ENTRY_C(0xD0060021, NULL, "vzero.s S011"), + TEST_ENTRY_C(0xD0060022, NULL, "vzero.s S021"), + TEST_ENTRY_C(0xD0060023, NULL, "vzero.s S031"), + TEST_ENTRY_C(0xD0060024, NULL, "vzero.s S101"), + TEST_ENTRY_C(0xD0060025, NULL, "vzero.s S111"), + TEST_ENTRY_C(0xD0060026, NULL, "vzero.s S121"), + TEST_ENTRY_C(0xD0060027, NULL, "vzero.s S131"), + TEST_ENTRY_C(0xD0060028, NULL, "vzero.s S201"), + TEST_ENTRY_C(0xD0060029, NULL, "vzero.s S211"), + TEST_ENTRY_C(0xD006002A, NULL, "vzero.s S221"), + TEST_ENTRY_C(0xD006002B, NULL, "vzero.s S231"), + TEST_ENTRY_C(0xD006002C, NULL, "vzero.s S301"), + TEST_ENTRY_C(0xD006002D, NULL, "vzero.s S311"), + TEST_ENTRY_C(0xD006002E, NULL, "vzero.s S321"), + TEST_ENTRY_C(0xD006002F, NULL, "vzero.s S331"), + TEST_ENTRY_C(0xD0060030, NULL, "vzero.s S401"), + TEST_ENTRY_C(0xD0060031, NULL, "vzero.s S411"), + TEST_ENTRY_C(0xD0060032, NULL, "vzero.s S421"), + TEST_ENTRY_C(0xD0060033, NULL, "vzero.s S431"), + TEST_ENTRY_C(0xD0060034, NULL, "vzero.s S501"), + TEST_ENTRY_C(0xD0060035, NULL, "vzero.s S511"), + TEST_ENTRY_C(0xD0060036, NULL, "vzero.s S521"), + TEST_ENTRY_C(0xD0060037, NULL, "vzero.s S531"), + TEST_ENTRY_C(0xD0060038, NULL, "vzero.s S601"), + TEST_ENTRY_C(0xD0060039, NULL, "vzero.s S611"), + TEST_ENTRY_C(0xD006003A, NULL, "vzero.s S621"), + TEST_ENTRY_C(0xD006003B, NULL, "vzero.s S631"), + TEST_ENTRY_C(0xD006003C, NULL, "vzero.s S701"), + TEST_ENTRY_C(0xD006003D, NULL, "vzero.s S711"), + TEST_ENTRY_C(0xD006003E, NULL, "vzero.s S721"), + TEST_ENTRY_C(0xD006003F, NULL, "vzero.s S731"), + TEST_ENTRY_C(0xD0060040, NULL, "vzero.s S002"), + TEST_ENTRY_C(0xD0060041, NULL, "vzero.s S012"), + TEST_ENTRY_C(0xD0060042, NULL, "vzero.s S022"), + TEST_ENTRY_C(0xD0060043, NULL, "vzero.s S032"), + TEST_ENTRY_C(0xD0060044, NULL, "vzero.s S102"), + TEST_ENTRY_C(0xD0060045, NULL, "vzero.s S112"), + TEST_ENTRY_C(0xD0060046, NULL, "vzero.s S122"), + TEST_ENTRY_C(0xD0060047, NULL, "vzero.s S132"), + TEST_ENTRY_C(0xD0060048, NULL, "vzero.s S202"), + TEST_ENTRY_C(0xD0060049, NULL, "vzero.s S212"), + TEST_ENTRY_C(0xD006004A, NULL, "vzero.s S222"), + TEST_ENTRY_C(0xD006004B, NULL, "vzero.s S232"), + TEST_ENTRY_C(0xD006004C, NULL, "vzero.s S302"), + TEST_ENTRY_C(0xD006004D, NULL, "vzero.s S312"), + TEST_ENTRY_C(0xD006004E, NULL, "vzero.s S322"), + TEST_ENTRY_C(0xD006004F, NULL, "vzero.s S332"), + TEST_ENTRY_C(0xD0060050, NULL, "vzero.s S402"), + TEST_ENTRY_C(0xD0060051, NULL, "vzero.s S412"), + TEST_ENTRY_C(0xD0060052, NULL, "vzero.s S422"), + TEST_ENTRY_C(0xD0060053, NULL, "vzero.s S432"), + TEST_ENTRY_C(0xD0060054, NULL, "vzero.s S502"), + TEST_ENTRY_C(0xD0060055, NULL, "vzero.s S512"), + TEST_ENTRY_C(0xD0060056, NULL, "vzero.s S522"), + TEST_ENTRY_C(0xD0060057, NULL, "vzero.s S532"), + TEST_ENTRY_C(0xD0060058, NULL, "vzero.s S602"), + TEST_ENTRY_C(0xD0060059, NULL, "vzero.s S612"), + TEST_ENTRY_C(0xD006005A, NULL, "vzero.s S622"), + TEST_ENTRY_C(0xD006005B, NULL, "vzero.s S632"), + TEST_ENTRY_C(0xD006005C, NULL, "vzero.s S702"), + TEST_ENTRY_C(0xD006005D, NULL, "vzero.s S712"), + TEST_ENTRY_C(0xD006005E, NULL, "vzero.s S722"), + TEST_ENTRY_C(0xD006005F, NULL, "vzero.s S732"), + TEST_ENTRY_C(0xD0060060, NULL, "vzero.s S003"), + TEST_ENTRY_C(0xD0060061, NULL, "vzero.s S013"), + TEST_ENTRY_C(0xD0060062, NULL, "vzero.s S023"), + TEST_ENTRY_C(0xD0060063, NULL, "vzero.s S033"), + TEST_ENTRY_C(0xD0060064, NULL, "vzero.s S103"), + TEST_ENTRY_C(0xD0060065, NULL, "vzero.s S113"), + TEST_ENTRY_C(0xD0060066, NULL, "vzero.s S123"), + TEST_ENTRY_C(0xD0060067, NULL, "vzero.s S133"), + TEST_ENTRY_C(0xD0060068, NULL, "vzero.s S203"), + TEST_ENTRY_C(0xD0060069, NULL, "vzero.s S213"), + TEST_ENTRY_C(0xD006006A, NULL, "vzero.s S223"), + TEST_ENTRY_C(0xD006006B, NULL, "vzero.s S233"), + TEST_ENTRY_C(0xD006006C, NULL, "vzero.s S303"), + TEST_ENTRY_C(0xD006006D, NULL, "vzero.s S313"), + TEST_ENTRY_C(0xD006006E, NULL, "vzero.s S323"), + TEST_ENTRY_C(0xD006006F, NULL, "vzero.s S333"), + TEST_ENTRY_C(0xD0060070, NULL, "vzero.s S403"), + TEST_ENTRY_C(0xD0060071, NULL, "vzero.s S413"), + TEST_ENTRY_C(0xD0060072, NULL, "vzero.s S423"), + TEST_ENTRY_C(0xD0060073, NULL, "vzero.s S433"), + TEST_ENTRY_C(0xD0060074, NULL, "vzero.s S503"), + TEST_ENTRY_C(0xD0060075, NULL, "vzero.s S513"), + TEST_ENTRY_C(0xD0060076, NULL, "vzero.s S523"), + TEST_ENTRY_C(0xD0060077, NULL, "vzero.s S533"), + TEST_ENTRY_C(0xD0060078, NULL, "vzero.s S603"), + TEST_ENTRY_C(0xD0060079, NULL, "vzero.s S613"), + TEST_ENTRY_C(0xD006007A, NULL, "vzero.s S623"), + TEST_ENTRY_C(0xD006007B, NULL, "vzero.s S633"), + TEST_ENTRY_C(0xD006007C, NULL, "vzero.s S703"), + TEST_ENTRY_C(0xD006007D, NULL, "vzero.s S713"), + TEST_ENTRY_C(0xD006007E, NULL, "vzero.s S723"), + TEST_ENTRY_C(0xD006007F, NULL, "vzero.s S733"), + TEST_ENTRY_C(0xD0060080, NULL, "vzero.p C000"), + TEST_ENTRY_C(0xD0060081, NULL, "vzero.p C010"), + TEST_ENTRY_C(0xD0060082, NULL, "vzero.p C020"), + TEST_ENTRY_C(0xD0060083, NULL, "vzero.p C030"), + TEST_ENTRY_C(0xD0060084, NULL, "vzero.p C100"), + TEST_ENTRY_C(0xD0060085, NULL, "vzero.p C110"), + TEST_ENTRY_C(0xD0060086, NULL, "vzero.p C120"), + TEST_ENTRY_C(0xD0060087, NULL, "vzero.p C130"), + TEST_ENTRY_C(0xD0060088, NULL, "vzero.p C200"), + TEST_ENTRY_C(0xD0060089, NULL, "vzero.p C210"), + TEST_ENTRY_C(0xD006008A, NULL, "vzero.p C220"), + TEST_ENTRY_C(0xD006008B, NULL, "vzero.p C230"), + TEST_ENTRY_C(0xD006008C, NULL, "vzero.p C300"), + TEST_ENTRY_C(0xD006008D, NULL, "vzero.p C310"), + TEST_ENTRY_C(0xD006008E, NULL, "vzero.p C320"), + TEST_ENTRY_C(0xD006008F, NULL, "vzero.p C330"), + TEST_ENTRY_C(0xD0060090, NULL, "vzero.p C400"), + TEST_ENTRY_C(0xD0060091, NULL, "vzero.p C410"), + TEST_ENTRY_C(0xD0060092, NULL, "vzero.p C420"), + TEST_ENTRY_C(0xD0060093, NULL, "vzero.p C430"), + TEST_ENTRY_C(0xD0060094, NULL, "vzero.p C500"), + TEST_ENTRY_C(0xD0060095, NULL, "vzero.p C510"), + TEST_ENTRY_C(0xD0060096, NULL, "vzero.p C520"), + TEST_ENTRY_C(0xD0060097, NULL, "vzero.p C530"), + TEST_ENTRY_C(0xD0060098, NULL, "vzero.p C600"), + TEST_ENTRY_C(0xD0060099, NULL, "vzero.p C610"), + TEST_ENTRY_C(0xD006009A, NULL, "vzero.p C620"), + TEST_ENTRY_C(0xD006009B, NULL, "vzero.p C630"), + TEST_ENTRY_C(0xD006009C, NULL, "vzero.p C700"), + TEST_ENTRY_C(0xD006009D, NULL, "vzero.p C710"), + TEST_ENTRY_C(0xD006009E, NULL, "vzero.p C720"), + TEST_ENTRY_C(0xD006009F, NULL, "vzero.p C730"), + TEST_ENTRY_C(0xD00600A0, NULL, "vzero.p R000"), + TEST_ENTRY_C(0xD00600A1, NULL, "vzero.p R001"), + TEST_ENTRY_C(0xD00600A2, NULL, "vzero.p R002"), + TEST_ENTRY_C(0xD00600A3, NULL, "vzero.p R003"), + TEST_ENTRY_C(0xD00600A4, NULL, "vzero.p R100"), + TEST_ENTRY_C(0xD00600A5, NULL, "vzero.p R101"), + TEST_ENTRY_C(0xD00600A6, NULL, "vzero.p R102"), + TEST_ENTRY_C(0xD00600A7, NULL, "vzero.p R103"), + TEST_ENTRY_C(0xD00600A8, NULL, "vzero.p R200"), + TEST_ENTRY_C(0xD00600A9, NULL, "vzero.p R201"), + TEST_ENTRY_C(0xD00600AA, NULL, "vzero.p R202"), + TEST_ENTRY_C(0xD00600AB, NULL, "vzero.p R203"), + TEST_ENTRY_C(0xD00600AC, NULL, "vzero.p R300"), + TEST_ENTRY_C(0xD00600AD, NULL, "vzero.p R301"), + TEST_ENTRY_C(0xD00600AE, NULL, "vzero.p R302"), + TEST_ENTRY_C(0xD00600AF, NULL, "vzero.p R303"), + TEST_ENTRY_C(0xD00600B0, NULL, "vzero.p R400"), + TEST_ENTRY_C(0xD00600B1, NULL, "vzero.p R401"), + TEST_ENTRY_C(0xD00600B2, NULL, "vzero.p R402"), + TEST_ENTRY_C(0xD00600B3, NULL, "vzero.p R403"), + TEST_ENTRY_C(0xD00600B4, NULL, "vzero.p R500"), + TEST_ENTRY_C(0xD00600B5, NULL, "vzero.p R501"), + TEST_ENTRY_C(0xD00600B6, NULL, "vzero.p R502"), + TEST_ENTRY_C(0xD00600B7, NULL, "vzero.p R503"), + TEST_ENTRY_C(0xD00600B8, NULL, "vzero.p R600"), + TEST_ENTRY_C(0xD00600B9, NULL, "vzero.p R601"), + TEST_ENTRY_C(0xD00600BA, NULL, "vzero.p R602"), + TEST_ENTRY_C(0xD00600BB, NULL, "vzero.p R603"), + TEST_ENTRY_C(0xD00600BC, NULL, "vzero.p R700"), + TEST_ENTRY_C(0xD00600BD, NULL, "vzero.p R701"), + TEST_ENTRY_C(0xD00600BE, NULL, "vzero.p R702"), + TEST_ENTRY_C(0xD00600BF, NULL, "vzero.p R703"), + TEST_ENTRY_C(0xD00600C0, NULL, "vzero.p C002"), + TEST_ENTRY_C(0xD00600C1, NULL, "vzero.p C012"), + TEST_ENTRY_C(0xD00600C2, NULL, "vzero.p C022"), + TEST_ENTRY_C(0xD00600C3, NULL, "vzero.p C032"), + TEST_ENTRY_C(0xD00600C4, NULL, "vzero.p C102"), + TEST_ENTRY_C(0xD00600C5, NULL, "vzero.p C112"), + TEST_ENTRY_C(0xD00600C6, NULL, "vzero.p C122"), + TEST_ENTRY_C(0xD00600C7, NULL, "vzero.p C132"), + TEST_ENTRY_C(0xD00600C8, NULL, "vzero.p C202"), + TEST_ENTRY_C(0xD00600C9, NULL, "vzero.p C212"), + TEST_ENTRY_C(0xD00600CA, NULL, "vzero.p C222"), + TEST_ENTRY_C(0xD00600CB, NULL, "vzero.p C232"), + TEST_ENTRY_C(0xD00600CC, NULL, "vzero.p C302"), + TEST_ENTRY_C(0xD00600CD, NULL, "vzero.p C312"), + TEST_ENTRY_C(0xD00600CE, NULL, "vzero.p C322"), + TEST_ENTRY_C(0xD00600CF, NULL, "vzero.p C332"), + TEST_ENTRY_C(0xD00600D0, NULL, "vzero.p C402"), + TEST_ENTRY_C(0xD00600D1, NULL, "vzero.p C412"), + TEST_ENTRY_C(0xD00600D2, NULL, "vzero.p C422"), + TEST_ENTRY_C(0xD00600D3, NULL, "vzero.p C432"), + TEST_ENTRY_C(0xD00600D4, NULL, "vzero.p C502"), + TEST_ENTRY_C(0xD00600D5, NULL, "vzero.p C512"), + TEST_ENTRY_C(0xD00600D6, NULL, "vzero.p C522"), + TEST_ENTRY_C(0xD00600D7, NULL, "vzero.p C532"), + TEST_ENTRY_C(0xD00600D8, NULL, "vzero.p C602"), + TEST_ENTRY_C(0xD00600D9, NULL, "vzero.p C612"), + TEST_ENTRY_C(0xD00600DA, NULL, "vzero.p C622"), + TEST_ENTRY_C(0xD00600DB, NULL, "vzero.p C632"), + TEST_ENTRY_C(0xD00600DC, NULL, "vzero.p C702"), + TEST_ENTRY_C(0xD00600DD, NULL, "vzero.p C712"), + TEST_ENTRY_C(0xD00600DE, NULL, "vzero.p C722"), + TEST_ENTRY_C(0xD00600DF, NULL, "vzero.p C732"), + TEST_ENTRY_C(0xD00600E0, NULL, "vzero.p R020"), + TEST_ENTRY_C(0xD00600E1, NULL, "vzero.p R021"), + TEST_ENTRY_C(0xD00600E2, NULL, "vzero.p R022"), + TEST_ENTRY_C(0xD00600E3, NULL, "vzero.p R023"), + TEST_ENTRY_C(0xD00600E4, NULL, "vzero.p R120"), + TEST_ENTRY_C(0xD00600E5, NULL, "vzero.p R121"), + TEST_ENTRY_C(0xD00600E6, NULL, "vzero.p R122"), + TEST_ENTRY_C(0xD00600E7, NULL, "vzero.p R123"), + TEST_ENTRY_C(0xD00600E8, NULL, "vzero.p R220"), + TEST_ENTRY_C(0xD00600E9, NULL, "vzero.p R221"), + TEST_ENTRY_C(0xD00600EA, NULL, "vzero.p R222"), + TEST_ENTRY_C(0xD00600EB, NULL, "vzero.p R223"), + TEST_ENTRY_C(0xD00600EC, NULL, "vzero.p R320"), + TEST_ENTRY_C(0xD00600ED, NULL, "vzero.p R321"), + TEST_ENTRY_C(0xD00600EE, NULL, "vzero.p R322"), + TEST_ENTRY_C(0xD00600EF, NULL, "vzero.p R323"), + TEST_ENTRY_C(0xD00600F0, NULL, "vzero.p R420"), + TEST_ENTRY_C(0xD00600F1, NULL, "vzero.p R421"), + TEST_ENTRY_C(0xD00600F2, NULL, "vzero.p R422"), + TEST_ENTRY_C(0xD00600F3, NULL, "vzero.p R423"), + TEST_ENTRY_C(0xD00600F4, NULL, "vzero.p R520"), + TEST_ENTRY_C(0xD00600F5, NULL, "vzero.p R521"), + TEST_ENTRY_C(0xD00600F6, NULL, "vzero.p R522"), + TEST_ENTRY_C(0xD00600F7, NULL, "vzero.p R523"), + TEST_ENTRY_C(0xD00600F8, NULL, "vzero.p R620"), + TEST_ENTRY_C(0xD00600F9, NULL, "vzero.p R621"), + TEST_ENTRY_C(0xD00600FA, NULL, "vzero.p R622"), + TEST_ENTRY_C(0xD00600FB, NULL, "vzero.p R623"), + TEST_ENTRY_C(0xD00600FC, NULL, "vzero.p R720"), + TEST_ENTRY_C(0xD00600FD, NULL, "vzero.p R721"), + TEST_ENTRY_C(0xD00600FE, NULL, "vzero.p R722"), + TEST_ENTRY_C(0xD00600FF, NULL, "vzero.p R723"), + TEST_ENTRY_C(0xD0068000, NULL, "vzero.t C000"), + TEST_ENTRY_C(0xD0068001, NULL, "vzero.t C010"), + TEST_ENTRY_C(0xD0068002, NULL, "vzero.t C020"), + TEST_ENTRY_C(0xD0068003, NULL, "vzero.t C030"), + TEST_ENTRY_C(0xD0068004, NULL, "vzero.t C100"), + TEST_ENTRY_C(0xD0068005, NULL, "vzero.t C110"), + TEST_ENTRY_C(0xD0068006, NULL, "vzero.t C120"), + TEST_ENTRY_C(0xD0068007, NULL, "vzero.t C130"), + TEST_ENTRY_C(0xD0068008, NULL, "vzero.t C200"), + TEST_ENTRY_C(0xD0068009, NULL, "vzero.t C210"), + TEST_ENTRY_C(0xD006800A, NULL, "vzero.t C220"), + TEST_ENTRY_C(0xD006800B, NULL, "vzero.t C230"), + TEST_ENTRY_C(0xD006800C, NULL, "vzero.t C300"), + TEST_ENTRY_C(0xD006800D, NULL, "vzero.t C310"), + TEST_ENTRY_C(0xD006800E, NULL, "vzero.t C320"), + TEST_ENTRY_C(0xD006800F, NULL, "vzero.t C330"), + TEST_ENTRY_C(0xD0068010, NULL, "vzero.t C400"), + TEST_ENTRY_C(0xD0068011, NULL, "vzero.t C410"), + TEST_ENTRY_C(0xD0068012, NULL, "vzero.t C420"), + TEST_ENTRY_C(0xD0068013, NULL, "vzero.t C430"), + TEST_ENTRY_C(0xD0068014, NULL, "vzero.t C500"), + TEST_ENTRY_C(0xD0068015, NULL, "vzero.t C510"), + TEST_ENTRY_C(0xD0068016, NULL, "vzero.t C520"), + TEST_ENTRY_C(0xD0068017, NULL, "vzero.t C530"), + TEST_ENTRY_C(0xD0068018, NULL, "vzero.t C600"), + TEST_ENTRY_C(0xD0068019, NULL, "vzero.t C610"), + TEST_ENTRY_C(0xD006801A, NULL, "vzero.t C620"), + TEST_ENTRY_C(0xD006801B, NULL, "vzero.t C630"), + TEST_ENTRY_C(0xD006801C, NULL, "vzero.t C700"), + TEST_ENTRY_C(0xD006801D, NULL, "vzero.t C710"), + TEST_ENTRY_C(0xD006801E, NULL, "vzero.t C720"), + TEST_ENTRY_C(0xD006801F, NULL, "vzero.t C730"), + TEST_ENTRY_C(0xD0068020, NULL, "vzero.t R000"), + TEST_ENTRY_C(0xD0068021, NULL, "vzero.t R001"), + TEST_ENTRY_C(0xD0068022, NULL, "vzero.t R002"), + TEST_ENTRY_C(0xD0068023, NULL, "vzero.t R003"), + TEST_ENTRY_C(0xD0068024, NULL, "vzero.t R100"), + TEST_ENTRY_C(0xD0068025, NULL, "vzero.t R101"), + TEST_ENTRY_C(0xD0068026, NULL, "vzero.t R102"), + TEST_ENTRY_C(0xD0068027, NULL, "vzero.t R103"), + TEST_ENTRY_C(0xD0068028, NULL, "vzero.t R200"), + TEST_ENTRY_C(0xD0068029, NULL, "vzero.t R201"), + TEST_ENTRY_C(0xD006802A, NULL, "vzero.t R202"), + TEST_ENTRY_C(0xD006802B, NULL, "vzero.t R203"), + TEST_ENTRY_C(0xD006802C, NULL, "vzero.t R300"), + TEST_ENTRY_C(0xD006802D, NULL, "vzero.t R301"), + TEST_ENTRY_C(0xD006802E, NULL, "vzero.t R302"), + TEST_ENTRY_C(0xD006802F, NULL, "vzero.t R303"), + TEST_ENTRY_C(0xD0068030, NULL, "vzero.t R400"), + TEST_ENTRY_C(0xD0068031, NULL, "vzero.t R401"), + TEST_ENTRY_C(0xD0068032, NULL, "vzero.t R402"), + TEST_ENTRY_C(0xD0068033, NULL, "vzero.t R403"), + TEST_ENTRY_C(0xD0068034, NULL, "vzero.t R500"), + TEST_ENTRY_C(0xD0068035, NULL, "vzero.t R501"), + TEST_ENTRY_C(0xD0068036, NULL, "vzero.t R502"), + TEST_ENTRY_C(0xD0068037, NULL, "vzero.t R503"), + TEST_ENTRY_C(0xD0068038, NULL, "vzero.t R600"), + TEST_ENTRY_C(0xD0068039, NULL, "vzero.t R601"), + TEST_ENTRY_C(0xD006803A, NULL, "vzero.t R602"), + TEST_ENTRY_C(0xD006803B, NULL, "vzero.t R603"), + TEST_ENTRY_C(0xD006803C, NULL, "vzero.t R700"), + TEST_ENTRY_C(0xD006803D, NULL, "vzero.t R701"), + TEST_ENTRY_C(0xD006803E, NULL, "vzero.t R702"), + TEST_ENTRY_C(0xD006803F, NULL, "vzero.t R703"), + TEST_ENTRY_C(0xD0068040, NULL, "vzero.t C001"), + TEST_ENTRY_C(0xD0068041, NULL, "vzero.t C011"), + TEST_ENTRY_C(0xD0068042, NULL, "vzero.t C021"), + TEST_ENTRY_C(0xD0068043, NULL, "vzero.t C031"), + TEST_ENTRY_C(0xD0068044, NULL, "vzero.t C101"), + TEST_ENTRY_C(0xD0068045, NULL, "vzero.t C111"), + TEST_ENTRY_C(0xD0068046, NULL, "vzero.t C121"), + TEST_ENTRY_C(0xD0068047, NULL, "vzero.t C131"), + TEST_ENTRY_C(0xD0068048, NULL, "vzero.t C201"), + TEST_ENTRY_C(0xD0068049, NULL, "vzero.t C211"), + TEST_ENTRY_C(0xD006804A, NULL, "vzero.t C221"), + TEST_ENTRY_C(0xD006804B, NULL, "vzero.t C231"), + TEST_ENTRY_C(0xD006804C, NULL, "vzero.t C301"), + TEST_ENTRY_C(0xD006804D, NULL, "vzero.t C311"), + TEST_ENTRY_C(0xD006804E, NULL, "vzero.t C321"), + TEST_ENTRY_C(0xD006804F, NULL, "vzero.t C331"), + TEST_ENTRY_C(0xD0068050, NULL, "vzero.t C401"), + TEST_ENTRY_C(0xD0068051, NULL, "vzero.t C411"), + TEST_ENTRY_C(0xD0068052, NULL, "vzero.t C421"), + TEST_ENTRY_C(0xD0068053, NULL, "vzero.t C431"), + TEST_ENTRY_C(0xD0068054, NULL, "vzero.t C501"), + TEST_ENTRY_C(0xD0068055, NULL, "vzero.t C511"), + TEST_ENTRY_C(0xD0068056, NULL, "vzero.t C521"), + TEST_ENTRY_C(0xD0068057, NULL, "vzero.t C531"), + TEST_ENTRY_C(0xD0068058, NULL, "vzero.t C601"), + TEST_ENTRY_C(0xD0068059, NULL, "vzero.t C611"), + TEST_ENTRY_C(0xD006805A, NULL, "vzero.t C621"), + TEST_ENTRY_C(0xD006805B, NULL, "vzero.t C631"), + TEST_ENTRY_C(0xD006805C, NULL, "vzero.t C701"), + TEST_ENTRY_C(0xD006805D, NULL, "vzero.t C711"), + TEST_ENTRY_C(0xD006805E, NULL, "vzero.t C721"), + TEST_ENTRY_C(0xD006805F, NULL, "vzero.t C731"), + TEST_ENTRY_C(0xD0068060, NULL, "vzero.t R010"), + TEST_ENTRY_C(0xD0068061, NULL, "vzero.t R011"), + TEST_ENTRY_C(0xD0068062, NULL, "vzero.t R012"), + TEST_ENTRY_C(0xD0068063, NULL, "vzero.t R013"), + TEST_ENTRY_C(0xD0068064, NULL, "vzero.t R110"), + TEST_ENTRY_C(0xD0068065, NULL, "vzero.t R111"), + TEST_ENTRY_C(0xD0068066, NULL, "vzero.t R112"), + TEST_ENTRY_C(0xD0068067, NULL, "vzero.t R113"), + TEST_ENTRY_C(0xD0068068, NULL, "vzero.t R210"), + TEST_ENTRY_C(0xD0068069, NULL, "vzero.t R211"), + TEST_ENTRY_C(0xD006806A, NULL, "vzero.t R212"), + TEST_ENTRY_C(0xD006806B, NULL, "vzero.t R213"), + TEST_ENTRY_C(0xD006806C, NULL, "vzero.t R310"), + TEST_ENTRY_C(0xD006806D, NULL, "vzero.t R311"), + TEST_ENTRY_C(0xD006806E, NULL, "vzero.t R312"), + TEST_ENTRY_C(0xD006806F, NULL, "vzero.t R313"), + TEST_ENTRY_C(0xD0068070, NULL, "vzero.t R410"), + TEST_ENTRY_C(0xD0068071, NULL, "vzero.t R411"), + TEST_ENTRY_C(0xD0068072, NULL, "vzero.t R412"), + TEST_ENTRY_C(0xD0068073, NULL, "vzero.t R413"), + TEST_ENTRY_C(0xD0068074, NULL, "vzero.t R510"), + TEST_ENTRY_C(0xD0068075, NULL, "vzero.t R511"), + TEST_ENTRY_C(0xD0068076, NULL, "vzero.t R512"), + TEST_ENTRY_C(0xD0068077, NULL, "vzero.t R513"), + TEST_ENTRY_C(0xD0068078, NULL, "vzero.t R610"), + TEST_ENTRY_C(0xD0068079, NULL, "vzero.t R611"), + TEST_ENTRY_C(0xD006807A, NULL, "vzero.t R612"), + TEST_ENTRY_C(0xD006807B, NULL, "vzero.t R613"), + TEST_ENTRY_C(0xD006807C, NULL, "vzero.t R710"), + TEST_ENTRY_C(0xD006807D, NULL, "vzero.t R711"), + TEST_ENTRY_C(0xD006807E, NULL, "vzero.t R712"), + TEST_ENTRY_C(0xD006807F, NULL, "vzero.t R713"), + TEST_ENTRY_C(0xD0068080, NULL, "vzero.q C000"), + TEST_ENTRY_C(0xD0068081, NULL, "vzero.q C010"), + TEST_ENTRY_C(0xD0068082, NULL, "vzero.q C020"), + TEST_ENTRY_C(0xD0068083, NULL, "vzero.q C030"), + TEST_ENTRY_C(0xD0068084, NULL, "vzero.q C100"), + TEST_ENTRY_C(0xD0068085, NULL, "vzero.q C110"), + TEST_ENTRY_C(0xD0068086, NULL, "vzero.q C120"), + TEST_ENTRY_C(0xD0068087, NULL, "vzero.q C130"), + TEST_ENTRY_C(0xD0068088, NULL, "vzero.q C200"), + TEST_ENTRY_C(0xD0068089, NULL, "vzero.q C210"), + TEST_ENTRY_C(0xD006808A, NULL, "vzero.q C220"), + TEST_ENTRY_C(0xD006808B, NULL, "vzero.q C230"), + TEST_ENTRY_C(0xD006808C, NULL, "vzero.q C300"), + TEST_ENTRY_C(0xD006808D, NULL, "vzero.q C310"), + TEST_ENTRY_C(0xD006808E, NULL, "vzero.q C320"), + TEST_ENTRY_C(0xD006808F, NULL, "vzero.q C330"), + TEST_ENTRY_C(0xD0068090, NULL, "vzero.q C400"), + TEST_ENTRY_C(0xD0068091, NULL, "vzero.q C410"), + TEST_ENTRY_C(0xD0068092, NULL, "vzero.q C420"), + TEST_ENTRY_C(0xD0068093, NULL, "vzero.q C430"), + TEST_ENTRY_C(0xD0068094, NULL, "vzero.q C500"), + TEST_ENTRY_C(0xD0068095, NULL, "vzero.q C510"), + TEST_ENTRY_C(0xD0068096, NULL, "vzero.q C520"), + TEST_ENTRY_C(0xD0068097, NULL, "vzero.q C530"), + TEST_ENTRY_C(0xD0068098, NULL, "vzero.q C600"), + TEST_ENTRY_C(0xD0068099, NULL, "vzero.q C610"), + TEST_ENTRY_C(0xD006809A, NULL, "vzero.q C620"), + TEST_ENTRY_C(0xD006809B, NULL, "vzero.q C630"), + TEST_ENTRY_C(0xD006809C, NULL, "vzero.q C700"), + TEST_ENTRY_C(0xD006809D, NULL, "vzero.q C710"), + TEST_ENTRY_C(0xD006809E, NULL, "vzero.q C720"), + TEST_ENTRY_C(0xD006809F, NULL, "vzero.q C730"), + TEST_ENTRY_C(0xD00680A0, NULL, "vzero.q R000"), + TEST_ENTRY_C(0xD00680A1, NULL, "vzero.q R001"), + TEST_ENTRY_C(0xD00680A2, NULL, "vzero.q R002"), + TEST_ENTRY_C(0xD00680A3, NULL, "vzero.q R003"), + TEST_ENTRY_C(0xD00680A4, NULL, "vzero.q R100"), + TEST_ENTRY_C(0xD00680A5, NULL, "vzero.q R101"), + TEST_ENTRY_C(0xD00680A6, NULL, "vzero.q R102"), + TEST_ENTRY_C(0xD00680A7, NULL, "vzero.q R103"), + TEST_ENTRY_C(0xD00680A8, NULL, "vzero.q R200"), + TEST_ENTRY_C(0xD00680A9, NULL, "vzero.q R201"), + TEST_ENTRY_C(0xD00680AA, NULL, "vzero.q R202"), + TEST_ENTRY_C(0xD00680AB, NULL, "vzero.q R203"), + TEST_ENTRY_C(0xD00680AC, NULL, "vzero.q R300"), + TEST_ENTRY_C(0xD00680AD, NULL, "vzero.q R301"), + TEST_ENTRY_C(0xD00680AE, NULL, "vzero.q R302"), + TEST_ENTRY_C(0xD00680AF, NULL, "vzero.q R303"), + TEST_ENTRY_C(0xD00680B0, NULL, "vzero.q R400"), + TEST_ENTRY_C(0xD00680B1, NULL, "vzero.q R401"), + TEST_ENTRY_C(0xD00680B2, NULL, "vzero.q R402"), + TEST_ENTRY_C(0xD00680B3, NULL, "vzero.q R403"), + TEST_ENTRY_C(0xD00680B4, NULL, "vzero.q R500"), + TEST_ENTRY_C(0xD00680B5, NULL, "vzero.q R501"), + TEST_ENTRY_C(0xD00680B6, NULL, "vzero.q R502"), + TEST_ENTRY_C(0xD00680B7, NULL, "vzero.q R503"), + TEST_ENTRY_C(0xD00680B8, NULL, "vzero.q R600"), + TEST_ENTRY_C(0xD00680B9, NULL, "vzero.q R601"), + TEST_ENTRY_C(0xD00680BA, NULL, "vzero.q R602"), + TEST_ENTRY_C(0xD00680BB, NULL, "vzero.q R603"), + TEST_ENTRY_C(0xD00680BC, NULL, "vzero.q R700"), + TEST_ENTRY_C(0xD00680BD, NULL, "vzero.q R701"), + TEST_ENTRY_C(0xD00680BE, NULL, "vzero.q R702"), + TEST_ENTRY_C(0xD00680BF, NULL, "vzero.q R703"), + TEST_ENTRY_C(0xD00680C0, NULL, "vzero.q C002"), + TEST_ENTRY_C(0xD00680C1, NULL, "vzero.q C012"), + TEST_ENTRY_C(0xD00680C2, NULL, "vzero.q C022"), + TEST_ENTRY_C(0xD00680C3, NULL, "vzero.q C032"), + TEST_ENTRY_C(0xD00680C4, NULL, "vzero.q C102"), + TEST_ENTRY_C(0xD00680C5, NULL, "vzero.q C112"), + TEST_ENTRY_C(0xD00680C6, NULL, "vzero.q C122"), + TEST_ENTRY_C(0xD00680C7, NULL, "vzero.q C132"), + TEST_ENTRY_C(0xD00680C8, NULL, "vzero.q C202"), + TEST_ENTRY_C(0xD00680C9, NULL, "vzero.q C212"), + TEST_ENTRY_C(0xD00680CA, NULL, "vzero.q C222"), + TEST_ENTRY_C(0xD00680CB, NULL, "vzero.q C232"), + TEST_ENTRY_C(0xD00680CC, NULL, "vzero.q C302"), + TEST_ENTRY_C(0xD00680CD, NULL, "vzero.q C312"), + TEST_ENTRY_C(0xD00680CE, NULL, "vzero.q C322"), + TEST_ENTRY_C(0xD00680CF, NULL, "vzero.q C332"), + TEST_ENTRY_C(0xD00680D0, NULL, "vzero.q C402"), + TEST_ENTRY_C(0xD00680D1, NULL, "vzero.q C412"), + TEST_ENTRY_C(0xD00680D2, NULL, "vzero.q C422"), + TEST_ENTRY_C(0xD00680D3, NULL, "vzero.q C432"), + TEST_ENTRY_C(0xD00680D4, NULL, "vzero.q C502"), + TEST_ENTRY_C(0xD00680D5, NULL, "vzero.q C512"), + TEST_ENTRY_C(0xD00680D6, NULL, "vzero.q C522"), + TEST_ENTRY_C(0xD00680D7, NULL, "vzero.q C532"), + TEST_ENTRY_C(0xD00680D8, NULL, "vzero.q C602"), + TEST_ENTRY_C(0xD00680D9, NULL, "vzero.q C612"), + TEST_ENTRY_C(0xD00680DA, NULL, "vzero.q C622"), + TEST_ENTRY_C(0xD00680DB, NULL, "vzero.q C632"), + TEST_ENTRY_C(0xD00680DC, NULL, "vzero.q C702"), + TEST_ENTRY_C(0xD00680DD, NULL, "vzero.q C712"), + TEST_ENTRY_C(0xD00680DE, NULL, "vzero.q C722"), + TEST_ENTRY_C(0xD00680DF, NULL, "vzero.q C732"), + TEST_ENTRY_C(0xD00680E0, NULL, "vzero.q R020"), + TEST_ENTRY_C(0xD00680E1, NULL, "vzero.q R021"), + TEST_ENTRY_C(0xD00680E2, NULL, "vzero.q R022"), + TEST_ENTRY_C(0xD00680E3, NULL, "vzero.q R023"), + TEST_ENTRY_C(0xD00680E4, NULL, "vzero.q R120"), + TEST_ENTRY_C(0xD00680E5, NULL, "vzero.q R121"), + TEST_ENTRY_C(0xD00680E6, NULL, "vzero.q R122"), + TEST_ENTRY_C(0xD00680E7, NULL, "vzero.q R123"), + TEST_ENTRY_C(0xD00680E8, NULL, "vzero.q R220"), + TEST_ENTRY_C(0xD00680E9, NULL, "vzero.q R221"), + TEST_ENTRY_C(0xD00680EA, NULL, "vzero.q R222"), + TEST_ENTRY_C(0xD00680EB, NULL, "vzero.q R223"), + TEST_ENTRY_C(0xD00680EC, NULL, "vzero.q R320"), + TEST_ENTRY_C(0xD00680ED, NULL, "vzero.q R321"), + TEST_ENTRY_C(0xD00680EE, NULL, "vzero.q R322"), + TEST_ENTRY_C(0xD00680EF, NULL, "vzero.q R323"), + TEST_ENTRY_C(0xD00680F0, NULL, "vzero.q R420"), + TEST_ENTRY_C(0xD00680F1, NULL, "vzero.q R421"), + TEST_ENTRY_C(0xD00680F2, NULL, "vzero.q R422"), + TEST_ENTRY_C(0xD00680F3, NULL, "vzero.q R423"), + TEST_ENTRY_C(0xD00680F4, NULL, "vzero.q R520"), + TEST_ENTRY_C(0xD00680F5, NULL, "vzero.q R521"), + TEST_ENTRY_C(0xD00680F6, NULL, "vzero.q R522"), + TEST_ENTRY_C(0xD00680F7, NULL, "vzero.q R523"), + TEST_ENTRY_C(0xD00680F8, NULL, "vzero.q R620"), + TEST_ENTRY_C(0xD00680F9, NULL, "vzero.q R621"), + TEST_ENTRY_C(0xD00680FA, NULL, "vzero.q R622"), + TEST_ENTRY_C(0xD00680FB, NULL, "vzero.q R623"), + TEST_ENTRY_C(0xD00680FC, NULL, "vzero.q R720"), + TEST_ENTRY_C(0xD00680FD, NULL, "vzero.q R721"), + TEST_ENTRY_C(0xD00680FE, NULL, "vzero.q R722"), + TEST_ENTRY_C(0xD00680FF, NULL, "vzero.q R723"), + + /* matrix_zero */ + TEST_ENTRY_C(0xF3860080, NULL, "vmzero.p M000"), + TEST_ENTRY_C(0xF3860081, NULL, "vmzero.p M010"), + TEST_ENTRY_C(0xF3860082, NULL, "vmzero.p M020"), + TEST_ENTRY_C(0xF3860083, NULL, "vmzero.p M030"), + TEST_ENTRY_C(0xF3860084, NULL, "vmzero.p M100"), + TEST_ENTRY_C(0xF3860085, NULL, "vmzero.p M110"), + TEST_ENTRY_C(0xF3860086, NULL, "vmzero.p M120"), + TEST_ENTRY_C(0xF3860087, NULL, "vmzero.p M130"), + TEST_ENTRY_C(0xF3860088, NULL, "vmzero.p M200"), + TEST_ENTRY_C(0xF3860089, NULL, "vmzero.p M210"), + TEST_ENTRY_C(0xF386008A, NULL, "vmzero.p M220"), + TEST_ENTRY_C(0xF386008B, NULL, "vmzero.p M230"), + TEST_ENTRY_C(0xF386008C, NULL, "vmzero.p M300"), + TEST_ENTRY_C(0xF386008D, NULL, "vmzero.p M310"), + TEST_ENTRY_C(0xF386008E, NULL, "vmzero.p M320"), + TEST_ENTRY_C(0xF386008F, NULL, "vmzero.p M330"), + TEST_ENTRY_C(0xF3860090, NULL, "vmzero.p M400"), + TEST_ENTRY_C(0xF3860091, NULL, "vmzero.p M410"), + TEST_ENTRY_C(0xF3860092, NULL, "vmzero.p M420"), + TEST_ENTRY_C(0xF3860093, NULL, "vmzero.p M430"), + TEST_ENTRY_C(0xF3860094, NULL, "vmzero.p M500"), + TEST_ENTRY_C(0xF3860095, NULL, "vmzero.p M510"), + TEST_ENTRY_C(0xF3860096, NULL, "vmzero.p M520"), + TEST_ENTRY_C(0xF3860097, NULL, "vmzero.p M530"), + TEST_ENTRY_C(0xF3860098, NULL, "vmzero.p M600"), + TEST_ENTRY_C(0xF3860099, NULL, "vmzero.p M610"), + TEST_ENTRY_C(0xF386009A, NULL, "vmzero.p M620"), + TEST_ENTRY_C(0xF386009B, NULL, "vmzero.p M630"), + TEST_ENTRY_C(0xF386009C, NULL, "vmzero.p M700"), + TEST_ENTRY_C(0xF386009D, NULL, "vmzero.p M710"), + TEST_ENTRY_C(0xF386009E, NULL, "vmzero.p M720"), + TEST_ENTRY_C(0xF386009F, NULL, "vmzero.p M730"), + TEST_ENTRY_C(0xF38600A0, NULL, "vmzero.p E000"), + TEST_ENTRY_C(0xF38600A1, NULL, "vmzero.p E001"), + TEST_ENTRY_C(0xF38600A2, NULL, "vmzero.p E002"), + TEST_ENTRY_C(0xF38600A3, NULL, "vmzero.p E003"), + TEST_ENTRY_C(0xF38600A4, NULL, "vmzero.p E100"), + TEST_ENTRY_C(0xF38600A5, NULL, "vmzero.p E101"), + TEST_ENTRY_C(0xF38600A6, NULL, "vmzero.p E102"), + TEST_ENTRY_C(0xF38600A7, NULL, "vmzero.p E103"), + TEST_ENTRY_C(0xF38600A8, NULL, "vmzero.p E200"), + TEST_ENTRY_C(0xF38600A9, NULL, "vmzero.p E201"), + TEST_ENTRY_C(0xF38600AA, NULL, "vmzero.p E202"), + TEST_ENTRY_C(0xF38600AB, NULL, "vmzero.p E203"), + TEST_ENTRY_C(0xF38600AC, NULL, "vmzero.p E300"), + TEST_ENTRY_C(0xF38600AD, NULL, "vmzero.p E301"), + TEST_ENTRY_C(0xF38600AE, NULL, "vmzero.p E302"), + TEST_ENTRY_C(0xF38600AF, NULL, "vmzero.p E303"), + TEST_ENTRY_C(0xF38600B0, NULL, "vmzero.p E400"), + TEST_ENTRY_C(0xF38600B1, NULL, "vmzero.p E401"), + TEST_ENTRY_C(0xF38600B2, NULL, "vmzero.p E402"), + TEST_ENTRY_C(0xF38600B3, NULL, "vmzero.p E403"), + TEST_ENTRY_C(0xF38600B4, NULL, "vmzero.p E500"), + TEST_ENTRY_C(0xF38600B5, NULL, "vmzero.p E501"), + TEST_ENTRY_C(0xF38600B6, NULL, "vmzero.p E502"), + TEST_ENTRY_C(0xF38600B7, NULL, "vmzero.p E503"), + TEST_ENTRY_C(0xF38600B8, NULL, "vmzero.p E600"), + TEST_ENTRY_C(0xF38600B9, NULL, "vmzero.p E601"), + TEST_ENTRY_C(0xF38600BA, NULL, "vmzero.p E602"), + TEST_ENTRY_C(0xF38600BB, NULL, "vmzero.p E603"), + TEST_ENTRY_C(0xF38600BC, NULL, "vmzero.p E700"), + TEST_ENTRY_C(0xF38600BD, NULL, "vmzero.p E701"), + TEST_ENTRY_C(0xF38600BE, NULL, "vmzero.p E702"), + TEST_ENTRY_C(0xF38600BF, NULL, "vmzero.p E703"), + TEST_ENTRY_C(0xF38600C0, NULL, "vmzero.p M002"), + TEST_ENTRY_C(0xF38600C1, NULL, "vmzero.p M012"), + TEST_ENTRY_C(0xF38600C2, NULL, "vmzero.p M022"), + TEST_ENTRY_C(0xF38600C3, NULL, "vmzero.p M032"), + TEST_ENTRY_C(0xF38600C4, NULL, "vmzero.p M102"), + TEST_ENTRY_C(0xF38600C5, NULL, "vmzero.p M112"), + TEST_ENTRY_C(0xF38600C6, NULL, "vmzero.p M122"), + TEST_ENTRY_C(0xF38600C7, NULL, "vmzero.p M132"), + TEST_ENTRY_C(0xF38600C8, NULL, "vmzero.p M202"), + TEST_ENTRY_C(0xF38600C9, NULL, "vmzero.p M212"), + TEST_ENTRY_C(0xF38600CA, NULL, "vmzero.p M222"), + TEST_ENTRY_C(0xF38600CB, NULL, "vmzero.p M232"), + TEST_ENTRY_C(0xF38600CC, NULL, "vmzero.p M302"), + TEST_ENTRY_C(0xF38600CD, NULL, "vmzero.p M312"), + TEST_ENTRY_C(0xF38600CE, NULL, "vmzero.p M322"), + TEST_ENTRY_C(0xF38600CF, NULL, "vmzero.p M332"), + TEST_ENTRY_C(0xF38600D0, NULL, "vmzero.p M402"), + TEST_ENTRY_C(0xF38600D1, NULL, "vmzero.p M412"), + TEST_ENTRY_C(0xF38600D2, NULL, "vmzero.p M422"), + TEST_ENTRY_C(0xF38600D3, NULL, "vmzero.p M432"), + TEST_ENTRY_C(0xF38600D4, NULL, "vmzero.p M502"), + TEST_ENTRY_C(0xF38600D5, NULL, "vmzero.p M512"), + TEST_ENTRY_C(0xF38600D6, NULL, "vmzero.p M522"), + TEST_ENTRY_C(0xF38600D7, NULL, "vmzero.p M532"), + TEST_ENTRY_C(0xF38600D8, NULL, "vmzero.p M602"), + TEST_ENTRY_C(0xF38600D9, NULL, "vmzero.p M612"), + TEST_ENTRY_C(0xF38600DA, NULL, "vmzero.p M622"), + TEST_ENTRY_C(0xF38600DB, NULL, "vmzero.p M632"), + TEST_ENTRY_C(0xF38600DC, NULL, "vmzero.p M702"), + TEST_ENTRY_C(0xF38600DD, NULL, "vmzero.p M712"), + TEST_ENTRY_C(0xF38600DE, NULL, "vmzero.p M722"), + TEST_ENTRY_C(0xF38600DF, NULL, "vmzero.p M732"), + TEST_ENTRY_C(0xF38600E0, NULL, "vmzero.p E020"), + TEST_ENTRY_C(0xF38600E1, NULL, "vmzero.p E021"), + TEST_ENTRY_C(0xF38600E2, NULL, "vmzero.p E022"), + TEST_ENTRY_C(0xF38600E3, NULL, "vmzero.p E023"), + TEST_ENTRY_C(0xF38600E4, NULL, "vmzero.p E120"), + TEST_ENTRY_C(0xF38600E5, NULL, "vmzero.p E121"), + TEST_ENTRY_C(0xF38600E6, NULL, "vmzero.p E122"), + TEST_ENTRY_C(0xF38600E7, NULL, "vmzero.p E123"), + TEST_ENTRY_C(0xF38600E8, NULL, "vmzero.p E220"), + TEST_ENTRY_C(0xF38600E9, NULL, "vmzero.p E221"), + TEST_ENTRY_C(0xF38600EA, NULL, "vmzero.p E222"), + TEST_ENTRY_C(0xF38600EB, NULL, "vmzero.p E223"), + TEST_ENTRY_C(0xF38600EC, NULL, "vmzero.p E320"), + TEST_ENTRY_C(0xF38600ED, NULL, "vmzero.p E321"), + TEST_ENTRY_C(0xF38600EE, NULL, "vmzero.p E322"), + TEST_ENTRY_C(0xF38600EF, NULL, "vmzero.p E323"), + TEST_ENTRY_C(0xF38600F0, NULL, "vmzero.p E420"), + TEST_ENTRY_C(0xF38600F1, NULL, "vmzero.p E421"), + TEST_ENTRY_C(0xF38600F2, NULL, "vmzero.p E422"), + TEST_ENTRY_C(0xF38600F3, NULL, "vmzero.p E423"), + TEST_ENTRY_C(0xF38600F4, NULL, "vmzero.p E520"), + TEST_ENTRY_C(0xF38600F5, NULL, "vmzero.p E521"), + TEST_ENTRY_C(0xF38600F6, NULL, "vmzero.p E522"), + TEST_ENTRY_C(0xF38600F7, NULL, "vmzero.p E523"), + TEST_ENTRY_C(0xF38600F8, NULL, "vmzero.p E620"), + TEST_ENTRY_C(0xF38600F9, NULL, "vmzero.p E621"), + TEST_ENTRY_C(0xF38600FA, NULL, "vmzero.p E622"), + TEST_ENTRY_C(0xF38600FB, NULL, "vmzero.p E623"), + TEST_ENTRY_C(0xF38600FC, NULL, "vmzero.p E720"), + TEST_ENTRY_C(0xF38600FD, NULL, "vmzero.p E721"), + TEST_ENTRY_C(0xF38600FE, NULL, "vmzero.p E722"), + TEST_ENTRY_C(0xF38600FF, NULL, "vmzero.p E723"), + TEST_ENTRY_C(0xF3868000, NULL, "vmzero.t M000"), + TEST_ENTRY_C(0xF3868001, NULL, "vmzero.t M010"), + TEST_ENTRY_C(0xF3868002, NULL, "vmzero.t M020"), + TEST_ENTRY_C(0xF3868003, NULL, "vmzero.t M030"), + TEST_ENTRY_C(0xF3868004, NULL, "vmzero.t M100"), + TEST_ENTRY_C(0xF3868005, NULL, "vmzero.t M110"), + TEST_ENTRY_C(0xF3868006, NULL, "vmzero.t M120"), + TEST_ENTRY_C(0xF3868007, NULL, "vmzero.t M130"), + TEST_ENTRY_C(0xF3868008, NULL, "vmzero.t M200"), + TEST_ENTRY_C(0xF3868009, NULL, "vmzero.t M210"), + TEST_ENTRY_C(0xF386800A, NULL, "vmzero.t M220"), + TEST_ENTRY_C(0xF386800B, NULL, "vmzero.t M230"), + TEST_ENTRY_C(0xF386800C, NULL, "vmzero.t M300"), + TEST_ENTRY_C(0xF386800D, NULL, "vmzero.t M310"), + TEST_ENTRY_C(0xF386800E, NULL, "vmzero.t M320"), + TEST_ENTRY_C(0xF386800F, NULL, "vmzero.t M330"), + TEST_ENTRY_C(0xF3868010, NULL, "vmzero.t M400"), + TEST_ENTRY_C(0xF3868011, NULL, "vmzero.t M410"), + TEST_ENTRY_C(0xF3868012, NULL, "vmzero.t M420"), + TEST_ENTRY_C(0xF3868013, NULL, "vmzero.t M430"), + TEST_ENTRY_C(0xF3868014, NULL, "vmzero.t M500"), + TEST_ENTRY_C(0xF3868015, NULL, "vmzero.t M510"), + TEST_ENTRY_C(0xF3868016, NULL, "vmzero.t M520"), + TEST_ENTRY_C(0xF3868017, NULL, "vmzero.t M530"), + TEST_ENTRY_C(0xF3868018, NULL, "vmzero.t M600"), + TEST_ENTRY_C(0xF3868019, NULL, "vmzero.t M610"), + TEST_ENTRY_C(0xF386801A, NULL, "vmzero.t M620"), + TEST_ENTRY_C(0xF386801B, NULL, "vmzero.t M630"), + TEST_ENTRY_C(0xF386801C, NULL, "vmzero.t M700"), + TEST_ENTRY_C(0xF386801D, NULL, "vmzero.t M710"), + TEST_ENTRY_C(0xF386801E, NULL, "vmzero.t M720"), + TEST_ENTRY_C(0xF386801F, NULL, "vmzero.t M730"), + TEST_ENTRY_C(0xF3868020, NULL, "vmzero.t E000"), + TEST_ENTRY_C(0xF3868021, NULL, "vmzero.t E001"), + TEST_ENTRY_C(0xF3868022, NULL, "vmzero.t E002"), + TEST_ENTRY_C(0xF3868023, NULL, "vmzero.t E003"), + TEST_ENTRY_C(0xF3868024, NULL, "vmzero.t E100"), + TEST_ENTRY_C(0xF3868025, NULL, "vmzero.t E101"), + TEST_ENTRY_C(0xF3868026, NULL, "vmzero.t E102"), + TEST_ENTRY_C(0xF3868027, NULL, "vmzero.t E103"), + TEST_ENTRY_C(0xF3868028, NULL, "vmzero.t E200"), + TEST_ENTRY_C(0xF3868029, NULL, "vmzero.t E201"), + TEST_ENTRY_C(0xF386802A, NULL, "vmzero.t E202"), + TEST_ENTRY_C(0xF386802B, NULL, "vmzero.t E203"), + TEST_ENTRY_C(0xF386802C, NULL, "vmzero.t E300"), + TEST_ENTRY_C(0xF386802D, NULL, "vmzero.t E301"), + TEST_ENTRY_C(0xF386802E, NULL, "vmzero.t E302"), + TEST_ENTRY_C(0xF386802F, NULL, "vmzero.t E303"), + TEST_ENTRY_C(0xF3868030, NULL, "vmzero.t E400"), + TEST_ENTRY_C(0xF3868031, NULL, "vmzero.t E401"), + TEST_ENTRY_C(0xF3868032, NULL, "vmzero.t E402"), + TEST_ENTRY_C(0xF3868033, NULL, "vmzero.t E403"), + TEST_ENTRY_C(0xF3868034, NULL, "vmzero.t E500"), + TEST_ENTRY_C(0xF3868035, NULL, "vmzero.t E501"), + TEST_ENTRY_C(0xF3868036, NULL, "vmzero.t E502"), + TEST_ENTRY_C(0xF3868037, NULL, "vmzero.t E503"), + TEST_ENTRY_C(0xF3868038, NULL, "vmzero.t E600"), + TEST_ENTRY_C(0xF3868039, NULL, "vmzero.t E601"), + TEST_ENTRY_C(0xF386803A, NULL, "vmzero.t E602"), + TEST_ENTRY_C(0xF386803B, NULL, "vmzero.t E603"), + TEST_ENTRY_C(0xF386803C, NULL, "vmzero.t E700"), + TEST_ENTRY_C(0xF386803D, NULL, "vmzero.t E701"), + TEST_ENTRY_C(0xF386803E, NULL, "vmzero.t E702"), + TEST_ENTRY_C(0xF386803F, NULL, "vmzero.t E703"), + TEST_ENTRY_C(0xF3868040, NULL, "vmzero.t M001"), + TEST_ENTRY_C(0xF3868041, NULL, "vmzero.t M011"), + TEST_ENTRY_C(0xF3868042, NULL, "vmzero.t M021"), + TEST_ENTRY_C(0xF3868043, NULL, "vmzero.t M031"), + TEST_ENTRY_C(0xF3868044, NULL, "vmzero.t M101"), + TEST_ENTRY_C(0xF3868045, NULL, "vmzero.t M111"), + TEST_ENTRY_C(0xF3868046, NULL, "vmzero.t M121"), + TEST_ENTRY_C(0xF3868047, NULL, "vmzero.t M131"), + TEST_ENTRY_C(0xF3868048, NULL, "vmzero.t M201"), + TEST_ENTRY_C(0xF3868049, NULL, "vmzero.t M211"), + TEST_ENTRY_C(0xF386804A, NULL, "vmzero.t M221"), + TEST_ENTRY_C(0xF386804B, NULL, "vmzero.t M231"), + TEST_ENTRY_C(0xF386804C, NULL, "vmzero.t M301"), + TEST_ENTRY_C(0xF386804D, NULL, "vmzero.t M311"), + TEST_ENTRY_C(0xF386804E, NULL, "vmzero.t M321"), + TEST_ENTRY_C(0xF386804F, NULL, "vmzero.t M331"), + TEST_ENTRY_C(0xF3868050, NULL, "vmzero.t M401"), + TEST_ENTRY_C(0xF3868051, NULL, "vmzero.t M411"), + TEST_ENTRY_C(0xF3868052, NULL, "vmzero.t M421"), + TEST_ENTRY_C(0xF3868053, NULL, "vmzero.t M431"), + TEST_ENTRY_C(0xF3868054, NULL, "vmzero.t M501"), + TEST_ENTRY_C(0xF3868055, NULL, "vmzero.t M511"), + TEST_ENTRY_C(0xF3868056, NULL, "vmzero.t M521"), + TEST_ENTRY_C(0xF3868057, NULL, "vmzero.t M531"), + TEST_ENTRY_C(0xF3868058, NULL, "vmzero.t M601"), + TEST_ENTRY_C(0xF3868059, NULL, "vmzero.t M611"), + TEST_ENTRY_C(0xF386805A, NULL, "vmzero.t M621"), + TEST_ENTRY_C(0xF386805B, NULL, "vmzero.t M631"), + TEST_ENTRY_C(0xF386805C, NULL, "vmzero.t M701"), + TEST_ENTRY_C(0xF386805D, NULL, "vmzero.t M711"), + TEST_ENTRY_C(0xF386805E, NULL, "vmzero.t M721"), + TEST_ENTRY_C(0xF386805F, NULL, "vmzero.t M731"), + TEST_ENTRY_C(0xF3868060, NULL, "vmzero.t E010"), + TEST_ENTRY_C(0xF3868061, NULL, "vmzero.t E011"), + TEST_ENTRY_C(0xF3868062, NULL, "vmzero.t E012"), + TEST_ENTRY_C(0xF3868063, NULL, "vmzero.t E013"), + TEST_ENTRY_C(0xF3868064, NULL, "vmzero.t E110"), + TEST_ENTRY_C(0xF3868065, NULL, "vmzero.t E111"), + TEST_ENTRY_C(0xF3868066, NULL, "vmzero.t E112"), + TEST_ENTRY_C(0xF3868067, NULL, "vmzero.t E113"), + TEST_ENTRY_C(0xF3868068, NULL, "vmzero.t E210"), + TEST_ENTRY_C(0xF3868069, NULL, "vmzero.t E211"), + TEST_ENTRY_C(0xF386806A, NULL, "vmzero.t E212"), + TEST_ENTRY_C(0xF386806B, NULL, "vmzero.t E213"), + TEST_ENTRY_C(0xF386806C, NULL, "vmzero.t E310"), + TEST_ENTRY_C(0xF386806D, NULL, "vmzero.t E311"), + TEST_ENTRY_C(0xF386806E, NULL, "vmzero.t E312"), + TEST_ENTRY_C(0xF386806F, NULL, "vmzero.t E313"), + TEST_ENTRY_C(0xF3868070, NULL, "vmzero.t E410"), + TEST_ENTRY_C(0xF3868071, NULL, "vmzero.t E411"), + TEST_ENTRY_C(0xF3868072, NULL, "vmzero.t E412"), + TEST_ENTRY_C(0xF3868073, NULL, "vmzero.t E413"), + TEST_ENTRY_C(0xF3868074, NULL, "vmzero.t E510"), + TEST_ENTRY_C(0xF3868075, NULL, "vmzero.t E511"), + TEST_ENTRY_C(0xF3868076, NULL, "vmzero.t E512"), + TEST_ENTRY_C(0xF3868077, NULL, "vmzero.t E513"), + TEST_ENTRY_C(0xF3868078, NULL, "vmzero.t E610"), + TEST_ENTRY_C(0xF3868079, NULL, "vmzero.t E611"), + TEST_ENTRY_C(0xF386807A, NULL, "vmzero.t E612"), + TEST_ENTRY_C(0xF386807B, NULL, "vmzero.t E613"), + TEST_ENTRY_C(0xF386807C, NULL, "vmzero.t E710"), + TEST_ENTRY_C(0xF386807D, NULL, "vmzero.t E711"), + TEST_ENTRY_C(0xF386807E, NULL, "vmzero.t E712"), + TEST_ENTRY_C(0xF386807F, NULL, "vmzero.t E713"), + TEST_ENTRY_C(0xF3868080, NULL, "vmzero.q M000"), + TEST_ENTRY_C(0xF3868081, NULL, "vmzero.q M010"), + TEST_ENTRY_C(0xF3868082, NULL, "vmzero.q M020"), + TEST_ENTRY_C(0xF3868083, NULL, "vmzero.q M030"), + TEST_ENTRY_C(0xF3868084, NULL, "vmzero.q M100"), + TEST_ENTRY_C(0xF3868085, NULL, "vmzero.q M110"), + TEST_ENTRY_C(0xF3868086, NULL, "vmzero.q M120"), + TEST_ENTRY_C(0xF3868087, NULL, "vmzero.q M130"), + TEST_ENTRY_C(0xF3868088, NULL, "vmzero.q M200"), + TEST_ENTRY_C(0xF3868089, NULL, "vmzero.q M210"), + TEST_ENTRY_C(0xF386808A, NULL, "vmzero.q M220"), + TEST_ENTRY_C(0xF386808B, NULL, "vmzero.q M230"), + TEST_ENTRY_C(0xF386808C, NULL, "vmzero.q M300"), + TEST_ENTRY_C(0xF386808D, NULL, "vmzero.q M310"), + TEST_ENTRY_C(0xF386808E, NULL, "vmzero.q M320"), + TEST_ENTRY_C(0xF386808F, NULL, "vmzero.q M330"), + TEST_ENTRY_C(0xF3868090, NULL, "vmzero.q M400"), + TEST_ENTRY_C(0xF3868091, NULL, "vmzero.q M410"), + TEST_ENTRY_C(0xF3868092, NULL, "vmzero.q M420"), + TEST_ENTRY_C(0xF3868093, NULL, "vmzero.q M430"), + TEST_ENTRY_C(0xF3868094, NULL, "vmzero.q M500"), + TEST_ENTRY_C(0xF3868095, NULL, "vmzero.q M510"), + TEST_ENTRY_C(0xF3868096, NULL, "vmzero.q M520"), + TEST_ENTRY_C(0xF3868097, NULL, "vmzero.q M530"), + TEST_ENTRY_C(0xF3868098, NULL, "vmzero.q M600"), + TEST_ENTRY_C(0xF3868099, NULL, "vmzero.q M610"), + TEST_ENTRY_C(0xF386809A, NULL, "vmzero.q M620"), + TEST_ENTRY_C(0xF386809B, NULL, "vmzero.q M630"), + TEST_ENTRY_C(0xF386809C, NULL, "vmzero.q M700"), + TEST_ENTRY_C(0xF386809D, NULL, "vmzero.q M710"), + TEST_ENTRY_C(0xF386809E, NULL, "vmzero.q M720"), + TEST_ENTRY_C(0xF386809F, NULL, "vmzero.q M730"), + TEST_ENTRY_C(0xF38680A0, NULL, "vmzero.q E000"), + TEST_ENTRY_C(0xF38680A1, NULL, "vmzero.q E001"), + TEST_ENTRY_C(0xF38680A2, NULL, "vmzero.q E002"), + TEST_ENTRY_C(0xF38680A3, NULL, "vmzero.q E003"), + TEST_ENTRY_C(0xF38680A4, NULL, "vmzero.q E100"), + TEST_ENTRY_C(0xF38680A5, NULL, "vmzero.q E101"), + TEST_ENTRY_C(0xF38680A6, NULL, "vmzero.q E102"), + TEST_ENTRY_C(0xF38680A7, NULL, "vmzero.q E103"), + TEST_ENTRY_C(0xF38680A8, NULL, "vmzero.q E200"), + TEST_ENTRY_C(0xF38680A9, NULL, "vmzero.q E201"), + TEST_ENTRY_C(0xF38680AA, NULL, "vmzero.q E202"), + TEST_ENTRY_C(0xF38680AB, NULL, "vmzero.q E203"), + TEST_ENTRY_C(0xF38680AC, NULL, "vmzero.q E300"), + TEST_ENTRY_C(0xF38680AD, NULL, "vmzero.q E301"), + TEST_ENTRY_C(0xF38680AE, NULL, "vmzero.q E302"), + TEST_ENTRY_C(0xF38680AF, NULL, "vmzero.q E303"), + TEST_ENTRY_C(0xF38680B0, NULL, "vmzero.q E400"), + TEST_ENTRY_C(0xF38680B1, NULL, "vmzero.q E401"), + TEST_ENTRY_C(0xF38680B2, NULL, "vmzero.q E402"), + TEST_ENTRY_C(0xF38680B3, NULL, "vmzero.q E403"), + TEST_ENTRY_C(0xF38680B4, NULL, "vmzero.q E500"), + TEST_ENTRY_C(0xF38680B5, NULL, "vmzero.q E501"), + TEST_ENTRY_C(0xF38680B6, NULL, "vmzero.q E502"), + TEST_ENTRY_C(0xF38680B7, NULL, "vmzero.q E503"), + TEST_ENTRY_C(0xF38680B8, NULL, "vmzero.q E600"), + TEST_ENTRY_C(0xF38680B9, NULL, "vmzero.q E601"), + TEST_ENTRY_C(0xF38680BA, NULL, "vmzero.q E602"), + TEST_ENTRY_C(0xF38680BB, NULL, "vmzero.q E603"), + TEST_ENTRY_C(0xF38680BC, NULL, "vmzero.q E700"), + TEST_ENTRY_C(0xF38680BD, NULL, "vmzero.q E701"), + TEST_ENTRY_C(0xF38680BE, NULL, "vmzero.q E702"), + TEST_ENTRY_C(0xF38680BF, NULL, "vmzero.q E703"), + TEST_ENTRY_C(0xF38680C0, NULL, "vmzero.q M002"), + TEST_ENTRY_C(0xF38680C1, NULL, "vmzero.q M012"), + TEST_ENTRY_C(0xF38680C2, NULL, "vmzero.q M022"), + TEST_ENTRY_C(0xF38680C3, NULL, "vmzero.q M032"), + TEST_ENTRY_C(0xF38680C4, NULL, "vmzero.q M102"), + TEST_ENTRY_C(0xF38680C5, NULL, "vmzero.q M112"), + TEST_ENTRY_C(0xF38680C6, NULL, "vmzero.q M122"), + TEST_ENTRY_C(0xF38680C7, NULL, "vmzero.q M132"), + TEST_ENTRY_C(0xF38680C8, NULL, "vmzero.q M202"), + TEST_ENTRY_C(0xF38680C9, NULL, "vmzero.q M212"), + TEST_ENTRY_C(0xF38680CA, NULL, "vmzero.q M222"), + TEST_ENTRY_C(0xF38680CB, NULL, "vmzero.q M232"), + TEST_ENTRY_C(0xF38680CC, NULL, "vmzero.q M302"), + TEST_ENTRY_C(0xF38680CD, NULL, "vmzero.q M312"), + TEST_ENTRY_C(0xF38680CE, NULL, "vmzero.q M322"), + TEST_ENTRY_C(0xF38680CF, NULL, "vmzero.q M332"), + TEST_ENTRY_C(0xF38680D0, NULL, "vmzero.q M402"), + TEST_ENTRY_C(0xF38680D1, NULL, "vmzero.q M412"), + TEST_ENTRY_C(0xF38680D2, NULL, "vmzero.q M422"), + TEST_ENTRY_C(0xF38680D3, NULL, "vmzero.q M432"), + TEST_ENTRY_C(0xF38680D4, NULL, "vmzero.q M502"), + TEST_ENTRY_C(0xF38680D5, NULL, "vmzero.q M512"), + TEST_ENTRY_C(0xF38680D6, NULL, "vmzero.q M522"), + TEST_ENTRY_C(0xF38680D7, NULL, "vmzero.q M532"), + TEST_ENTRY_C(0xF38680D8, NULL, "vmzero.q M602"), + TEST_ENTRY_C(0xF38680D9, NULL, "vmzero.q M612"), + TEST_ENTRY_C(0xF38680DA, NULL, "vmzero.q M622"), + TEST_ENTRY_C(0xF38680DB, NULL, "vmzero.q M632"), + TEST_ENTRY_C(0xF38680DC, NULL, "vmzero.q M702"), + TEST_ENTRY_C(0xF38680DD, NULL, "vmzero.q M712"), + TEST_ENTRY_C(0xF38680DE, NULL, "vmzero.q M722"), + TEST_ENTRY_C(0xF38680DF, NULL, "vmzero.q M732"), + TEST_ENTRY_C(0xF38680E0, NULL, "vmzero.q E020"), + TEST_ENTRY_C(0xF38680E1, NULL, "vmzero.q E021"), + TEST_ENTRY_C(0xF38680E2, NULL, "vmzero.q E022"), + TEST_ENTRY_C(0xF38680E3, NULL, "vmzero.q E023"), + TEST_ENTRY_C(0xF38680E4, NULL, "vmzero.q E120"), + TEST_ENTRY_C(0xF38680E5, NULL, "vmzero.q E121"), + TEST_ENTRY_C(0xF38680E6, NULL, "vmzero.q E122"), + TEST_ENTRY_C(0xF38680E7, NULL, "vmzero.q E123"), + TEST_ENTRY_C(0xF38680E8, NULL, "vmzero.q E220"), + TEST_ENTRY_C(0xF38680E9, NULL, "vmzero.q E221"), + TEST_ENTRY_C(0xF38680EA, NULL, "vmzero.q E222"), + TEST_ENTRY_C(0xF38680EB, NULL, "vmzero.q E223"), + TEST_ENTRY_C(0xF38680EC, NULL, "vmzero.q E320"), + TEST_ENTRY_C(0xF38680ED, NULL, "vmzero.q E321"), + TEST_ENTRY_C(0xF38680EE, NULL, "vmzero.q E322"), + TEST_ENTRY_C(0xF38680EF, NULL, "vmzero.q E323"), + TEST_ENTRY_C(0xF38680F0, NULL, "vmzero.q E420"), + TEST_ENTRY_C(0xF38680F1, NULL, "vmzero.q E421"), + TEST_ENTRY_C(0xF38680F2, NULL, "vmzero.q E422"), + TEST_ENTRY_C(0xF38680F3, NULL, "vmzero.q E423"), + TEST_ENTRY_C(0xF38680F4, NULL, "vmzero.q E520"), + TEST_ENTRY_C(0xF38680F5, NULL, "vmzero.q E521"), + TEST_ENTRY_C(0xF38680F6, NULL, "vmzero.q E522"), + TEST_ENTRY_C(0xF38680F7, NULL, "vmzero.q E523"), + TEST_ENTRY_C(0xF38680F8, NULL, "vmzero.q E620"), + TEST_ENTRY_C(0xF38680F9, NULL, "vmzero.q E621"), + TEST_ENTRY_C(0xF38680FA, NULL, "vmzero.q E622"), + TEST_ENTRY_C(0xF38680FB, NULL, "vmzero.q E623"), + TEST_ENTRY_C(0xF38680FC, NULL, "vmzero.q E720"), + TEST_ENTRY_C(0xF38680FD, NULL, "vmzero.q E721"), + TEST_ENTRY_C(0xF38680FE, NULL, "vmzero.q E722"), + TEST_ENTRY_C(0xF38680FF, NULL, "vmzero.q E723"), + + /* branches */ + TEST_ENTRY_C(0x49000002, NULL, "bvf 0, . + 4 + (0x2 << 2)"), + TEST_ENTRY_C(0x49050002, NULL, "bvt 1, . + 4 + (0x2 << 2)"), + TEST_ENTRY_C(0x490A0002, NULL, "bvfl 2, . + 4 + (0x2 << 2)"), + TEST_ENTRY_C(0x490F0002, NULL, "bvtl 3, . + 4 + (0x2 << 2)"), + TEST_ENTRY_C(0x49100002, NULL, "bvf 4, . + 4 + (0x2 << 2)"), + TEST_ENTRY_C(0x49150002, NULL, "bvt 5, . + 4 + (0x2 << 2)"), + TEST_ENTRY_C(0x49000002, "branches_end", "bvf 0, branches_end"), + + /* load_move_store */ + TEST_ENTRY_C(0xC8800040, NULL, "lv.s S000, 0x40($a0)"), + TEST_ENTRY_C(0xC8810040, NULL, "lv.s S010, 0x40($a0)"), + TEST_ENTRY_C(0xC8820040, NULL, "lv.s S020, 0x40($a0)"), + TEST_ENTRY_C(0xC8830040, NULL, "lv.s S030, 0x40($a0)"), + TEST_ENTRY_C(0xC8840040, NULL, "lv.s S100, 0x40($a0)"), + TEST_ENTRY_C(0xC8850040, NULL, "lv.s S110, 0x40($a0)"), + TEST_ENTRY_C(0xC8860040, NULL, "lv.s S120, 0x40($a0)"), + TEST_ENTRY_C(0xC8870040, NULL, "lv.s S130, 0x40($a0)"), + TEST_ENTRY_C(0xC8880040, NULL, "lv.s S200, 0x40($a0)"), + TEST_ENTRY_C(0xC8890040, NULL, "lv.s S210, 0x40($a0)"), + TEST_ENTRY_C(0xC88A0040, NULL, "lv.s S220, 0x40($a0)"), + TEST_ENTRY_C(0xC88B0040, NULL, "lv.s S230, 0x40($a0)"), + TEST_ENTRY_C(0xC88C0040, NULL, "lv.s S300, 0x40($a0)"), + TEST_ENTRY_C(0xC88D0040, NULL, "lv.s S310, 0x40($a0)"), + TEST_ENTRY_C(0xC88E0040, NULL, "lv.s S320, 0x40($a0)"), + TEST_ENTRY_C(0xC88F0040, NULL, "lv.s S330, 0x40($a0)"), + TEST_ENTRY_C(0xC8900040, NULL, "lv.s S400, 0x40($a0)"), + TEST_ENTRY_C(0xC8910040, NULL, "lv.s S410, 0x40($a0)"), + TEST_ENTRY_C(0xC8920040, NULL, "lv.s S420, 0x40($a0)"), + TEST_ENTRY_C(0xC8930040, NULL, "lv.s S430, 0x40($a0)"), + TEST_ENTRY_C(0xC8940040, NULL, "lv.s S500, 0x40($a0)"), + TEST_ENTRY_C(0xC8950040, NULL, "lv.s S510, 0x40($a0)"), + TEST_ENTRY_C(0xC8960040, NULL, "lv.s S520, 0x40($a0)"), + TEST_ENTRY_C(0xC8970040, NULL, "lv.s S530, 0x40($a0)"), + TEST_ENTRY_C(0xC8980040, NULL, "lv.s S600, 0x40($a0)"), + TEST_ENTRY_C(0xC8990040, NULL, "lv.s S610, 0x40($a0)"), + TEST_ENTRY_C(0xC89A0040, NULL, "lv.s S620, 0x40($a0)"), + TEST_ENTRY_C(0xC89B0040, NULL, "lv.s S630, 0x40($a0)"), + TEST_ENTRY_C(0xC89C0040, NULL, "lv.s S700, 0x40($a0)"), + TEST_ENTRY_C(0xC89D0040, NULL, "lv.s S710, 0x40($a0)"), + TEST_ENTRY_C(0xC89E0040, NULL, "lv.s S720, 0x40($a0)"), + TEST_ENTRY_C(0xC89F0040, NULL, "lv.s S730, 0x40($a0)"), + TEST_ENTRY_C(0xC8800041, NULL, "lv.s S001, 0x40($a0)"), + TEST_ENTRY_C(0xC8810041, NULL, "lv.s S011, 0x40($a0)"), + TEST_ENTRY_C(0xC8820041, NULL, "lv.s S021, 0x40($a0)"), + TEST_ENTRY_C(0xC8830041, NULL, "lv.s S031, 0x40($a0)"), + TEST_ENTRY_C(0xC8840041, NULL, "lv.s S101, 0x40($a0)"), + TEST_ENTRY_C(0xC8850041, NULL, "lv.s S111, 0x40($a0)"), + TEST_ENTRY_C(0xC8860041, NULL, "lv.s S121, 0x40($a0)"), + TEST_ENTRY_C(0xC8870041, NULL, "lv.s S131, 0x40($a0)"), + TEST_ENTRY_C(0xC8880041, NULL, "lv.s S201, 0x40($a0)"), + TEST_ENTRY_C(0xC8890041, NULL, "lv.s S211, 0x40($a0)"), + TEST_ENTRY_C(0xC88A0041, NULL, "lv.s S221, 0x40($a0)"), + TEST_ENTRY_C(0xC88B0041, NULL, "lv.s S231, 0x40($a0)"), + TEST_ENTRY_C(0xC88C0041, NULL, "lv.s S301, 0x40($a0)"), + TEST_ENTRY_C(0xC88D0041, NULL, "lv.s S311, 0x40($a0)"), + TEST_ENTRY_C(0xC88E0041, NULL, "lv.s S321, 0x40($a0)"), + TEST_ENTRY_C(0xC88F0041, NULL, "lv.s S331, 0x40($a0)"), + TEST_ENTRY_C(0xC8900041, NULL, "lv.s S401, 0x40($a0)"), + TEST_ENTRY_C(0xC8910041, NULL, "lv.s S411, 0x40($a0)"), + TEST_ENTRY_C(0xC8920041, NULL, "lv.s S421, 0x40($a0)"), + TEST_ENTRY_C(0xC8930041, NULL, "lv.s S431, 0x40($a0)"), + TEST_ENTRY_C(0xC8940041, NULL, "lv.s S501, 0x40($a0)"), + TEST_ENTRY_C(0xC8950041, NULL, "lv.s S511, 0x40($a0)"), + TEST_ENTRY_C(0xC8960041, NULL, "lv.s S521, 0x40($a0)"), + TEST_ENTRY_C(0xC8970041, NULL, "lv.s S531, 0x40($a0)"), + TEST_ENTRY_C(0xC8980041, NULL, "lv.s S601, 0x40($a0)"), + TEST_ENTRY_C(0xC8990041, NULL, "lv.s S611, 0x40($a0)"), + TEST_ENTRY_C(0xC89A0041, NULL, "lv.s S621, 0x40($a0)"), + TEST_ENTRY_C(0xC89B0041, NULL, "lv.s S631, 0x40($a0)"), + TEST_ENTRY_C(0xC89C0041, NULL, "lv.s S701, 0x40($a0)"), + TEST_ENTRY_C(0xC89D0041, NULL, "lv.s S711, 0x40($a0)"), + TEST_ENTRY_C(0xC89E0041, NULL, "lv.s S721, 0x40($a0)"), + TEST_ENTRY_C(0xC89F0041, NULL, "lv.s S731, 0x40($a0)"), + TEST_ENTRY_C(0xC8800042, NULL, "lv.s S002, 0x40($a0)"), + TEST_ENTRY_C(0xC8810042, NULL, "lv.s S012, 0x40($a0)"), + TEST_ENTRY_C(0xC8820042, NULL, "lv.s S022, 0x40($a0)"), + TEST_ENTRY_C(0xC8830042, NULL, "lv.s S032, 0x40($a0)"), + TEST_ENTRY_C(0xC8840042, NULL, "lv.s S102, 0x40($a0)"), + TEST_ENTRY_C(0xC8850042, NULL, "lv.s S112, 0x40($a0)"), + TEST_ENTRY_C(0xC8860042, NULL, "lv.s S122, 0x40($a0)"), + TEST_ENTRY_C(0xC8870042, NULL, "lv.s S132, 0x40($a0)"), + TEST_ENTRY_C(0xC8880042, NULL, "lv.s S202, 0x40($a0)"), + TEST_ENTRY_C(0xC8890042, NULL, "lv.s S212, 0x40($a0)"), + TEST_ENTRY_C(0xC88A0042, NULL, "lv.s S222, 0x40($a0)"), + TEST_ENTRY_C(0xC88B0042, NULL, "lv.s S232, 0x40($a0)"), + TEST_ENTRY_C(0xC88C0042, NULL, "lv.s S302, 0x40($a0)"), + TEST_ENTRY_C(0xC88D0042, NULL, "lv.s S312, 0x40($a0)"), + TEST_ENTRY_C(0xC88E0042, NULL, "lv.s S322, 0x40($a0)"), + TEST_ENTRY_C(0xC88F0042, NULL, "lv.s S332, 0x40($a0)"), + TEST_ENTRY_C(0xC8900042, NULL, "lv.s S402, 0x40($a0)"), + TEST_ENTRY_C(0xC8910042, NULL, "lv.s S412, 0x40($a0)"), + TEST_ENTRY_C(0xC8920042, NULL, "lv.s S422, 0x40($a0)"), + TEST_ENTRY_C(0xC8930042, NULL, "lv.s S432, 0x40($a0)"), + TEST_ENTRY_C(0xC8940042, NULL, "lv.s S502, 0x40($a0)"), + TEST_ENTRY_C(0xC8950042, NULL, "lv.s S512, 0x40($a0)"), + TEST_ENTRY_C(0xC8960042, NULL, "lv.s S522, 0x40($a0)"), + TEST_ENTRY_C(0xC8970042, NULL, "lv.s S532, 0x40($a0)"), + TEST_ENTRY_C(0xC8980042, NULL, "lv.s S602, 0x40($a0)"), + TEST_ENTRY_C(0xC8990042, NULL, "lv.s S612, 0x40($a0)"), + TEST_ENTRY_C(0xC89A0042, NULL, "lv.s S622, 0x40($a0)"), + TEST_ENTRY_C(0xC89B0042, NULL, "lv.s S632, 0x40($a0)"), + TEST_ENTRY_C(0xC89C0042, NULL, "lv.s S702, 0x40($a0)"), + TEST_ENTRY_C(0xC89D0042, NULL, "lv.s S712, 0x40($a0)"), + TEST_ENTRY_C(0xC89E0042, NULL, "lv.s S722, 0x40($a0)"), + TEST_ENTRY_C(0xC89F0042, NULL, "lv.s S732, 0x40($a0)"), + TEST_ENTRY_C(0xC8800043, NULL, "lv.s S003, 0x40($a0)"), + TEST_ENTRY_C(0xC8810043, NULL, "lv.s S013, 0x40($a0)"), + TEST_ENTRY_C(0xC8820043, NULL, "lv.s S023, 0x40($a0)"), + TEST_ENTRY_C(0xC8830043, NULL, "lv.s S033, 0x40($a0)"), + TEST_ENTRY_C(0xC8840043, NULL, "lv.s S103, 0x40($a0)"), + TEST_ENTRY_C(0xC8850043, NULL, "lv.s S113, 0x40($a0)"), + TEST_ENTRY_C(0xC8860043, NULL, "lv.s S123, 0x40($a0)"), + TEST_ENTRY_C(0xC8870043, NULL, "lv.s S133, 0x40($a0)"), + TEST_ENTRY_C(0xC8880043, NULL, "lv.s S203, 0x40($a0)"), + TEST_ENTRY_C(0xC8890043, NULL, "lv.s S213, 0x40($a0)"), + TEST_ENTRY_C(0xC88A0043, NULL, "lv.s S223, 0x40($a0)"), + TEST_ENTRY_C(0xC88B0043, NULL, "lv.s S233, 0x40($a0)"), + TEST_ENTRY_C(0xC88C0043, NULL, "lv.s S303, 0x40($a0)"), + TEST_ENTRY_C(0xC88D0043, NULL, "lv.s S313, 0x40($a0)"), + TEST_ENTRY_C(0xC88E0043, NULL, "lv.s S323, 0x40($a0)"), + TEST_ENTRY_C(0xC88F0043, NULL, "lv.s S333, 0x40($a0)"), + TEST_ENTRY_C(0xC8900043, NULL, "lv.s S403, 0x40($a0)"), + TEST_ENTRY_C(0xC8910043, NULL, "lv.s S413, 0x40($a0)"), + TEST_ENTRY_C(0xC8920043, NULL, "lv.s S423, 0x40($a0)"), + TEST_ENTRY_C(0xC8930043, NULL, "lv.s S433, 0x40($a0)"), + TEST_ENTRY_C(0xC8940043, NULL, "lv.s S503, 0x40($a0)"), + TEST_ENTRY_C(0xC8950043, NULL, "lv.s S513, 0x40($a0)"), + TEST_ENTRY_C(0xC8960043, NULL, "lv.s S523, 0x40($a0)"), + TEST_ENTRY_C(0xC8970043, NULL, "lv.s S533, 0x40($a0)"), + TEST_ENTRY_C(0xC8980043, NULL, "lv.s S603, 0x40($a0)"), + TEST_ENTRY_C(0xC8990043, NULL, "lv.s S613, 0x40($a0)"), + TEST_ENTRY_C(0xC89A0043, NULL, "lv.s S623, 0x40($a0)"), + TEST_ENTRY_C(0xC89B0043, NULL, "lv.s S633, 0x40($a0)"), + TEST_ENTRY_C(0xC89C0043, NULL, "lv.s S703, 0x40($a0)"), + TEST_ENTRY_C(0xC89D0043, NULL, "lv.s S713, 0x40($a0)"), + TEST_ENTRY_C(0xC89E0043, NULL, "lv.s S723, 0x40($a0)"), + TEST_ENTRY_C(0xC89F0043, NULL, "lv.s S733, 0x40($a0)"), + TEST_ENTRY_C(0xD8800040, NULL, "lv.q C000, 0x40($a0)"), + TEST_ENTRY_C(0xD8810040, NULL, "lv.q C010, 0x40($a0)"), + TEST_ENTRY_C(0xD8820040, NULL, "lv.q C020, 0x40($a0)"), + TEST_ENTRY_C(0xD8830040, NULL, "lv.q C030, 0x40($a0)"), + TEST_ENTRY_C(0xD8840040, NULL, "lv.q C100, 0x40($a0)"), + TEST_ENTRY_C(0xD8850040, NULL, "lv.q C110, 0x40($a0)"), + TEST_ENTRY_C(0xD8860040, NULL, "lv.q C120, 0x40($a0)"), + TEST_ENTRY_C(0xD8870040, NULL, "lv.q C130, 0x40($a0)"), + TEST_ENTRY_C(0xD8880040, NULL, "lv.q C200, 0x40($a0)"), + TEST_ENTRY_C(0xD8890040, NULL, "lv.q C210, 0x40($a0)"), + TEST_ENTRY_C(0xD88A0040, NULL, "lv.q C220, 0x40($a0)"), + TEST_ENTRY_C(0xD88B0040, NULL, "lv.q C230, 0x40($a0)"), + TEST_ENTRY_C(0xD88C0040, NULL, "lv.q C300, 0x40($a0)"), + TEST_ENTRY_C(0xD88D0040, NULL, "lv.q C310, 0x40($a0)"), + TEST_ENTRY_C(0xD88E0040, NULL, "lv.q C320, 0x40($a0)"), + TEST_ENTRY_C(0xD88F0040, NULL, "lv.q C330, 0x40($a0)"), + TEST_ENTRY_C(0xD8900040, NULL, "lv.q C400, 0x40($a0)"), + TEST_ENTRY_C(0xD8910040, NULL, "lv.q C410, 0x40($a0)"), + TEST_ENTRY_C(0xD8920040, NULL, "lv.q C420, 0x40($a0)"), + TEST_ENTRY_C(0xD8930040, NULL, "lv.q C430, 0x40($a0)"), + TEST_ENTRY_C(0xD8940040, NULL, "lv.q C500, 0x40($a0)"), + TEST_ENTRY_C(0xD8950040, NULL, "lv.q C510, 0x40($a0)"), + TEST_ENTRY_C(0xD8960040, NULL, "lv.q C520, 0x40($a0)"), + TEST_ENTRY_C(0xD8970040, NULL, "lv.q C530, 0x40($a0)"), + TEST_ENTRY_C(0xD8980040, NULL, "lv.q C600, 0x40($a0)"), + TEST_ENTRY_C(0xD8990040, NULL, "lv.q C610, 0x40($a0)"), + TEST_ENTRY_C(0xD89A0040, NULL, "lv.q C620, 0x40($a0)"), + TEST_ENTRY_C(0xD89B0040, NULL, "lv.q C630, 0x40($a0)"), + TEST_ENTRY_C(0xD89C0040, NULL, "lv.q C700, 0x40($a0)"), + TEST_ENTRY_C(0xD89D0040, NULL, "lv.q C710, 0x40($a0)"), + TEST_ENTRY_C(0xD89E0040, NULL, "lv.q C720, 0x40($a0)"), + TEST_ENTRY_C(0xD89F0040, NULL, "lv.q C730, 0x40($a0)"), + TEST_ENTRY_C(0xD8800041, NULL, "lv.q R000, 0x40($a0)"), + TEST_ENTRY_C(0xD8810041, NULL, "lv.q R001, 0x40($a0)"), + TEST_ENTRY_C(0xD8820041, NULL, "lv.q R002, 0x40($a0)"), + TEST_ENTRY_C(0xD8830041, NULL, "lv.q R003, 0x40($a0)"), + TEST_ENTRY_C(0xD8840041, NULL, "lv.q R100, 0x40($a0)"), + TEST_ENTRY_C(0xD8850041, NULL, "lv.q R101, 0x40($a0)"), + TEST_ENTRY_C(0xD8860041, NULL, "lv.q R102, 0x40($a0)"), + TEST_ENTRY_C(0xD8870041, NULL, "lv.q R103, 0x40($a0)"), + TEST_ENTRY_C(0xD8880041, NULL, "lv.q R200, 0x40($a0)"), + TEST_ENTRY_C(0xD8890041, NULL, "lv.q R201, 0x40($a0)"), + TEST_ENTRY_C(0xD88A0041, NULL, "lv.q R202, 0x40($a0)"), + TEST_ENTRY_C(0xD88B0041, NULL, "lv.q R203, 0x40($a0)"), + TEST_ENTRY_C(0xD88C0041, NULL, "lv.q R300, 0x40($a0)"), + TEST_ENTRY_C(0xD88D0041, NULL, "lv.q R301, 0x40($a0)"), + TEST_ENTRY_C(0xD88E0041, NULL, "lv.q R302, 0x40($a0)"), + TEST_ENTRY_C(0xD88F0041, NULL, "lv.q R303, 0x40($a0)"), + TEST_ENTRY_C(0xD8900041, NULL, "lv.q R400, 0x40($a0)"), + TEST_ENTRY_C(0xD8910041, NULL, "lv.q R401, 0x40($a0)"), + TEST_ENTRY_C(0xD8920041, NULL, "lv.q R402, 0x40($a0)"), + TEST_ENTRY_C(0xD8930041, NULL, "lv.q R403, 0x40($a0)"), + TEST_ENTRY_C(0xD8940041, NULL, "lv.q R500, 0x40($a0)"), + TEST_ENTRY_C(0xD8950041, NULL, "lv.q R501, 0x40($a0)"), + TEST_ENTRY_C(0xD8960041, NULL, "lv.q R502, 0x40($a0)"), + TEST_ENTRY_C(0xD8970041, NULL, "lv.q R503, 0x40($a0)"), + TEST_ENTRY_C(0xD8980041, NULL, "lv.q R600, 0x40($a0)"), + TEST_ENTRY_C(0xD8990041, NULL, "lv.q R601, 0x40($a0)"), + TEST_ENTRY_C(0xD89A0041, NULL, "lv.q R602, 0x40($a0)"), + TEST_ENTRY_C(0xD89B0041, NULL, "lv.q R603, 0x40($a0)"), + TEST_ENTRY_C(0xD89C0041, NULL, "lv.q R700, 0x40($a0)"), + TEST_ENTRY_C(0xD89D0041, NULL, "lv.q R701, 0x40($a0)"), + TEST_ENTRY_C(0xD89E0041, NULL, "lv.q R702, 0x40($a0)"), + TEST_ENTRY_C(0xD89F0041, NULL, "lv.q R703, 0x40($a0)"), + + // According to the manual those should be invalid, but the sn objdump is happy with them, so idk +#if 0 + TEST_ENTRY_C(0xD8800042, NULL, "lv.q C000, 0x40($a0)"), + TEST_ENTRY_C(0xD8810042, NULL, "lv.q C010, 0x40($a0)"), + TEST_ENTRY_C(0xD8820042, NULL, "lv.q C020, 0x40($a0)"), + TEST_ENTRY_C(0xD8830042, NULL, "lv.q C030, 0x40($a0)"), + TEST_ENTRY_C(0xD8840042, NULL, "lv.q C100, 0x40($a0)"), + TEST_ENTRY_C(0xD8850042, NULL, "lv.q C110, 0x40($a0)"), + TEST_ENTRY_C(0xD8860042, NULL, "lv.q C120, 0x40($a0)"), + TEST_ENTRY_C(0xD8870042, NULL, "lv.q C130, 0x40($a0)"), + TEST_ENTRY_C(0xD8880042, NULL, "lv.q C200, 0x40($a0)"), + TEST_ENTRY_C(0xD8890042, NULL, "lv.q C210, 0x40($a0)"), + TEST_ENTRY_C(0xD88A0042, NULL, "lv.q C220, 0x40($a0)"), + TEST_ENTRY_C(0xD88B0042, NULL, "lv.q C230, 0x40($a0)"), + TEST_ENTRY_C(0xD88C0042, NULL, "lv.q C300, 0x40($a0)"), + TEST_ENTRY_C(0xD88D0042, NULL, "lv.q C310, 0x40($a0)"), + TEST_ENTRY_C(0xD88E0042, NULL, "lv.q C320, 0x40($a0)"), + TEST_ENTRY_C(0xD88F0042, NULL, "lv.q C330, 0x40($a0)"), + TEST_ENTRY_C(0xD8900042, NULL, "lv.q C400, 0x40($a0)"), + TEST_ENTRY_C(0xD8910042, NULL, "lv.q C410, 0x40($a0)"), + TEST_ENTRY_C(0xD8920042, NULL, "lv.q C420, 0x40($a0)"), + TEST_ENTRY_C(0xD8930042, NULL, "lv.q C430, 0x40($a0)"), + TEST_ENTRY_C(0xD8940042, NULL, "lv.q C500, 0x40($a0)"), + TEST_ENTRY_C(0xD8950042, NULL, "lv.q C510, 0x40($a0)"), + TEST_ENTRY_C(0xD8960042, NULL, "lv.q C520, 0x40($a0)"), + TEST_ENTRY_C(0xD8970042, NULL, "lv.q C530, 0x40($a0)"), + TEST_ENTRY_C(0xD8980042, NULL, "lv.q C600, 0x40($a0)"), + TEST_ENTRY_C(0xD8990042, NULL, "lv.q C610, 0x40($a0)"), + TEST_ENTRY_C(0xD89A0042, NULL, "lv.q C620, 0x40($a0)"), + TEST_ENTRY_C(0xD89B0042, NULL, "lv.q C630, 0x40($a0)"), + TEST_ENTRY_C(0xD89C0042, NULL, "lv.q C700, 0x40($a0)"), + TEST_ENTRY_C(0xD89D0042, NULL, "lv.q C710, 0x40($a0)"), + TEST_ENTRY_C(0xD89E0042, NULL, "lv.q C720, 0x40($a0)"), + TEST_ENTRY_C(0xD89F0042, NULL, "lv.q C730, 0x40($a0)"), +#else + TEST_ENTRY_C(0xD8800042, NULL, ".word 0xD8800042 # lv.q C000, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8810042, NULL, ".word 0xD8810042 # lv.q C010, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8820042, NULL, ".word 0xD8820042 # lv.q C020, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8830042, NULL, ".word 0xD8830042 # lv.q C030, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8840042, NULL, ".word 0xD8840042 # lv.q C100, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8850042, NULL, ".word 0xD8850042 # lv.q C110, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8860042, NULL, ".word 0xD8860042 # lv.q C120, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8870042, NULL, ".word 0xD8870042 # lv.q C130, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8880042, NULL, ".word 0xD8880042 # lv.q C200, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8890042, NULL, ".word 0xD8890042 # lv.q C210, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD88A0042, NULL, ".word 0xD88A0042 # lv.q C220, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD88B0042, NULL, ".word 0xD88B0042 # lv.q C230, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD88C0042, NULL, ".word 0xD88C0042 # lv.q C300, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD88D0042, NULL, ".word 0xD88D0042 # lv.q C310, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD88E0042, NULL, ".word 0xD88E0042 # lv.q C320, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD88F0042, NULL, ".word 0xD88F0042 # lv.q C330, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8900042, NULL, ".word 0xD8900042 # lv.q C400, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8910042, NULL, ".word 0xD8910042 # lv.q C410, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8920042, NULL, ".word 0xD8920042 # lv.q C420, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8930042, NULL, ".word 0xD8930042 # lv.q C430, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8940042, NULL, ".word 0xD8940042 # lv.q C500, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8950042, NULL, ".word 0xD8950042 # lv.q C510, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8960042, NULL, ".word 0xD8960042 # lv.q C520, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8970042, NULL, ".word 0xD8970042 # lv.q C530, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8980042, NULL, ".word 0xD8980042 # lv.q C600, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD8990042, NULL, ".word 0xD8990042 # lv.q C610, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD89A0042, NULL, ".word 0xD89A0042 # lv.q C620, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD89B0042, NULL, ".word 0xD89B0042 # lv.q C630, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD89C0042, NULL, ".word 0xD89C0042 # lv.q C700, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD89D0042, NULL, ".word 0xD89D0042 # lv.q C710, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD89E0042, NULL, ".word 0xD89E0042 # lv.q C720, 0x40($a0) # 00000002 "), + TEST_ENTRY_C(0xD89F0042, NULL, ".word 0xD89F0042 # lv.q C730, 0x40($a0) # 00000002 "), +#endif + + TEST_ENTRY_C(0x48640004, NULL, "mfv $a0, S100"), + // TEST_ENTRY_C(0x48640080, NULL, "mfvc $a0, $128"), + // TEST_ENTRY_C(0x48640080, NULL, "mfvc $a0, VFPU_PFXS"), + // TEST_ENTRY_C(0x48640084, NULL, "mfvc $a0, $132"), + // TEST_ENTRY_C(0x48640084, NULL, "mfvc $a0, VFPU_INF4"), + TEST_ENTRY_C(0x48E40004, NULL, "mtv $a0, S100"), + TEST_ENTRY_C(0x48E40084, NULL, "mtvc $a0, $132"), + // TEST_ENTRY_C(0x48E40084, NULL, "mtvc $a0, VFPU_INF4"), + TEST_ENTRY_C(0xE8800040, NULL, "sv.s S000, 0x40($a0)"), + TEST_ENTRY_C(0xF8800040, NULL, "sv.q C000, 0x40($a0)"), + TEST_ENTRY_C(0xF8800042, NULL, "sv.q C000, 0x40($a0), wb"), + TEST_ENTRY_C(0xF4800040, NULL, "svl.q C000, 0x40($a0)"), + TEST_ENTRY_C(0xF4800042, NULL, "svr.q C000, 0x40($a0)"), + +#if 0 + // According to the manual, bit 1 should be zero. The compiler handles it fine, but objdump ignores this bit, so idk + TEST_ENTRY_C(0xD8800043, NULL, NULL), + TEST_ENTRY_C(0xD8810043, NULL, NULL), + TEST_ENTRY_C(0xD8820043, NULL, NULL), + TEST_ENTRY_C(0xD8830043, NULL, NULL), + TEST_ENTRY_C(0xD8840043, NULL, NULL), + TEST_ENTRY_C(0xD8850043, NULL, NULL), + TEST_ENTRY_C(0xD8860043, NULL, NULL), + TEST_ENTRY_C(0xD8870043, NULL, NULL), + TEST_ENTRY_C(0xD8880043, NULL, NULL), + TEST_ENTRY_C(0xD8890043, NULL, NULL), + TEST_ENTRY_C(0xD88A0043, NULL, NULL), + TEST_ENTRY_C(0xD88B0043, NULL, NULL), + TEST_ENTRY_C(0xD88C0043, NULL, NULL), + TEST_ENTRY_C(0xD88D0043, NULL, NULL), + TEST_ENTRY_C(0xD88E0043, NULL, NULL), + TEST_ENTRY_C(0xD88F0043, NULL, NULL), + TEST_ENTRY_C(0xD8900043, NULL, NULL), + TEST_ENTRY_C(0xD8910043, NULL, NULL), + TEST_ENTRY_C(0xD8920043, NULL, NULL), + TEST_ENTRY_C(0xD8930043, NULL, NULL), + TEST_ENTRY_C(0xD8940043, NULL, NULL), + TEST_ENTRY_C(0xD8950043, NULL, NULL), + TEST_ENTRY_C(0xD8960043, NULL, NULL), + TEST_ENTRY_C(0xD8970043, NULL, NULL), + TEST_ENTRY_C(0xD8980043, NULL, NULL), + TEST_ENTRY_C(0xD8990043, NULL, NULL), + TEST_ENTRY_C(0xD89A0043, NULL, NULL), + TEST_ENTRY_C(0xD89B0043, NULL, NULL), + TEST_ENTRY_C(0xD89C0043, NULL, NULL), + TEST_ENTRY_C(0xD89D0043, NULL, NULL), + TEST_ENTRY_C(0xD89E0043, NULL, NULL), + TEST_ENTRY_C(0xD89F0043, NULL, NULL), +#endif + + /* scale_quad_x_quad_matrix */ + TEST_ENTRY_C(0xF2008080, NULL, "vmscl.q M000, M000, S000"), + TEST_ENTRY_C(0xF2018080, NULL, "vmscl.q M000, M000, S010"), + TEST_ENTRY_C(0xF2028080, NULL, "vmscl.q M000, M000, S020"), + TEST_ENTRY_C(0xF2038080, NULL, "vmscl.q M000, M000, S030"), + TEST_ENTRY_C(0xF2048080, NULL, "vmscl.q M000, M000, S100"), + TEST_ENTRY_C(0xF2058080, NULL, "vmscl.q M000, M000, S110"), + TEST_ENTRY_C(0xF2068080, NULL, "vmscl.q M000, M000, S120"), + TEST_ENTRY_C(0xF2078080, NULL, "vmscl.q M000, M000, S130"), + TEST_ENTRY_C(0xF2088080, NULL, "vmscl.q M000, M000, S200"), + TEST_ENTRY_C(0xF2098080, NULL, "vmscl.q M000, M000, S210"), + TEST_ENTRY_C(0xF20A8080, NULL, "vmscl.q M000, M000, S220"), + TEST_ENTRY_C(0xF20B8080, NULL, "vmscl.q M000, M000, S230"), + TEST_ENTRY_C(0xF20C8080, NULL, "vmscl.q M000, M000, S300"), + TEST_ENTRY_C(0xF20D8080, NULL, "vmscl.q M000, M000, S310"), + TEST_ENTRY_C(0xF20E8080, NULL, "vmscl.q M000, M000, S320"), + TEST_ENTRY_C(0xF20F8080, NULL, "vmscl.q M000, M000, S330"), + TEST_ENTRY_C(0xF2108080, NULL, "vmscl.q M000, M000, S400"), + TEST_ENTRY_C(0xF2118080, NULL, "vmscl.q M000, M000, S410"), + TEST_ENTRY_C(0xF2128080, NULL, "vmscl.q M000, M000, S420"), + TEST_ENTRY_C(0xF2138080, NULL, "vmscl.q M000, M000, S430"), + TEST_ENTRY_C(0xF2148080, NULL, "vmscl.q M000, M000, S500"), + TEST_ENTRY_C(0xF2158080, NULL, "vmscl.q M000, M000, S510"), + TEST_ENTRY_C(0xF2168080, NULL, "vmscl.q M000, M000, S520"), + TEST_ENTRY_C(0xF2178080, NULL, "vmscl.q M000, M000, S530"), + TEST_ENTRY_C(0xF2188080, NULL, "vmscl.q M000, M000, S600"), + TEST_ENTRY_C(0xF2198080, NULL, "vmscl.q M000, M000, S610"), + TEST_ENTRY_C(0xF21A8080, NULL, "vmscl.q M000, M000, S620"), + TEST_ENTRY_C(0xF21B8080, NULL, "vmscl.q M000, M000, S630"), + TEST_ENTRY_C(0xF21C8080, NULL, "vmscl.q M000, M000, S700"), + TEST_ENTRY_C(0xF21D8080, NULL, "vmscl.q M000, M000, S710"), + TEST_ENTRY_C(0xF21E8080, NULL, "vmscl.q M000, M000, S720"), + TEST_ENTRY_C(0xF21F8080, NULL, "vmscl.q M000, M000, S730"), + TEST_ENTRY_C(0xF2208080, NULL, "vmscl.q M000, M000, S001"), + TEST_ENTRY_C(0xF2218080, NULL, "vmscl.q M000, M000, S011"), + TEST_ENTRY_C(0xF2228080, NULL, "vmscl.q M000, M000, S021"), + TEST_ENTRY_C(0xF2238080, NULL, "vmscl.q M000, M000, S031"), + TEST_ENTRY_C(0xF2248080, NULL, "vmscl.q M000, M000, S101"), + TEST_ENTRY_C(0xF2258080, NULL, "vmscl.q M000, M000, S111"), + TEST_ENTRY_C(0xF2268080, NULL, "vmscl.q M000, M000, S121"), + TEST_ENTRY_C(0xF2278080, NULL, "vmscl.q M000, M000, S131"), + TEST_ENTRY_C(0xF2288080, NULL, "vmscl.q M000, M000, S201"), + TEST_ENTRY_C(0xF2298080, NULL, "vmscl.q M000, M000, S211"), + TEST_ENTRY_C(0xF22A8080, NULL, "vmscl.q M000, M000, S221"), + TEST_ENTRY_C(0xF22B8080, NULL, "vmscl.q M000, M000, S231"), + TEST_ENTRY_C(0xF22C8080, NULL, "vmscl.q M000, M000, S301"), + TEST_ENTRY_C(0xF22D8080, NULL, "vmscl.q M000, M000, S311"), + TEST_ENTRY_C(0xF22E8080, NULL, "vmscl.q M000, M000, S321"), + TEST_ENTRY_C(0xF22F8080, NULL, "vmscl.q M000, M000, S331"), + TEST_ENTRY_C(0xF2308080, NULL, "vmscl.q M000, M000, S401"), + TEST_ENTRY_C(0xF2318080, NULL, "vmscl.q M000, M000, S411"), + TEST_ENTRY_C(0xF2328080, NULL, "vmscl.q M000, M000, S421"), + TEST_ENTRY_C(0xF2338080, NULL, "vmscl.q M000, M000, S431"), + TEST_ENTRY_C(0xF2348080, NULL, "vmscl.q M000, M000, S501"), + TEST_ENTRY_C(0xF2358080, NULL, "vmscl.q M000, M000, S511"), + TEST_ENTRY_C(0xF2368080, NULL, "vmscl.q M000, M000, S521"), + TEST_ENTRY_C(0xF2378080, NULL, "vmscl.q M000, M000, S531"), + TEST_ENTRY_C(0xF2388080, NULL, "vmscl.q M000, M000, S601"), + TEST_ENTRY_C(0xF2398080, NULL, "vmscl.q M000, M000, S611"), + TEST_ENTRY_C(0xF23A8080, NULL, "vmscl.q M000, M000, S621"), + TEST_ENTRY_C(0xF23B8080, NULL, "vmscl.q M000, M000, S631"), + TEST_ENTRY_C(0xF23C8080, NULL, "vmscl.q M000, M000, S701"), + TEST_ENTRY_C(0xF23D8080, NULL, "vmscl.q M000, M000, S711"), + TEST_ENTRY_C(0xF23E8080, NULL, "vmscl.q M000, M000, S721"), + TEST_ENTRY_C(0xF23F8080, NULL, "vmscl.q M000, M000, S731"), + TEST_ENTRY_C(0xF2408080, NULL, "vmscl.q M000, M000, S002"), + TEST_ENTRY_C(0xF2418080, NULL, "vmscl.q M000, M000, S012"), + TEST_ENTRY_C(0xF2428080, NULL, "vmscl.q M000, M000, S022"), + TEST_ENTRY_C(0xF2438080, NULL, "vmscl.q M000, M000, S032"), + TEST_ENTRY_C(0xF2448080, NULL, "vmscl.q M000, M000, S102"), + TEST_ENTRY_C(0xF2458080, NULL, "vmscl.q M000, M000, S112"), + TEST_ENTRY_C(0xF2468080, NULL, "vmscl.q M000, M000, S122"), + TEST_ENTRY_C(0xF2478080, NULL, "vmscl.q M000, M000, S132"), + TEST_ENTRY_C(0xF2488080, NULL, "vmscl.q M000, M000, S202"), + TEST_ENTRY_C(0xF2498080, NULL, "vmscl.q M000, M000, S212"), + TEST_ENTRY_C(0xF24A8080, NULL, "vmscl.q M000, M000, S222"), + TEST_ENTRY_C(0xF24B8080, NULL, "vmscl.q M000, M000, S232"), + TEST_ENTRY_C(0xF24C8080, NULL, "vmscl.q M000, M000, S302"), + TEST_ENTRY_C(0xF24D8080, NULL, "vmscl.q M000, M000, S312"), + TEST_ENTRY_C(0xF24E8080, NULL, "vmscl.q M000, M000, S322"), + TEST_ENTRY_C(0xF24F8080, NULL, "vmscl.q M000, M000, S332"), + TEST_ENTRY_C(0xF2508080, NULL, "vmscl.q M000, M000, S402"), + TEST_ENTRY_C(0xF2518080, NULL, "vmscl.q M000, M000, S412"), + TEST_ENTRY_C(0xF2528080, NULL, "vmscl.q M000, M000, S422"), + TEST_ENTRY_C(0xF2538080, NULL, "vmscl.q M000, M000, S432"), + TEST_ENTRY_C(0xF2548080, NULL, "vmscl.q M000, M000, S502"), + TEST_ENTRY_C(0xF2558080, NULL, "vmscl.q M000, M000, S512"), + TEST_ENTRY_C(0xF2568080, NULL, "vmscl.q M000, M000, S522"), + TEST_ENTRY_C(0xF2578080, NULL, "vmscl.q M000, M000, S532"), + TEST_ENTRY_C(0xF2588080, NULL, "vmscl.q M000, M000, S602"), + TEST_ENTRY_C(0xF2598080, NULL, "vmscl.q M000, M000, S612"), + TEST_ENTRY_C(0xF25A8080, NULL, "vmscl.q M000, M000, S622"), + TEST_ENTRY_C(0xF25B8080, NULL, "vmscl.q M000, M000, S632"), + TEST_ENTRY_C(0xF25C8080, NULL, "vmscl.q M000, M000, S702"), + TEST_ENTRY_C(0xF25D8080, NULL, "vmscl.q M000, M000, S712"), + TEST_ENTRY_C(0xF25E8080, NULL, "vmscl.q M000, M000, S722"), + TEST_ENTRY_C(0xF25F8080, NULL, "vmscl.q M000, M000, S732"), + TEST_ENTRY_C(0xF2608080, NULL, "vmscl.q M000, M000, S003"), + TEST_ENTRY_C(0xF2618080, NULL, "vmscl.q M000, M000, S013"), + TEST_ENTRY_C(0xF2628080, NULL, "vmscl.q M000, M000, S023"), + TEST_ENTRY_C(0xF2638080, NULL, "vmscl.q M000, M000, S033"), + TEST_ENTRY_C(0xF2648080, NULL, "vmscl.q M000, M000, S103"), + TEST_ENTRY_C(0xF2658080, NULL, "vmscl.q M000, M000, S113"), + TEST_ENTRY_C(0xF2668080, NULL, "vmscl.q M000, M000, S123"), + TEST_ENTRY_C(0xF2678080, NULL, "vmscl.q M000, M000, S133"), + TEST_ENTRY_C(0xF2688080, NULL, "vmscl.q M000, M000, S203"), + TEST_ENTRY_C(0xF2698080, NULL, "vmscl.q M000, M000, S213"), + TEST_ENTRY_C(0xF26A8080, NULL, "vmscl.q M000, M000, S223"), + TEST_ENTRY_C(0xF26B8080, NULL, "vmscl.q M000, M000, S233"), + TEST_ENTRY_C(0xF26C8080, NULL, "vmscl.q M000, M000, S303"), + TEST_ENTRY_C(0xF26D8080, NULL, "vmscl.q M000, M000, S313"), + TEST_ENTRY_C(0xF26E8080, NULL, "vmscl.q M000, M000, S323"), + TEST_ENTRY_C(0xF26F8080, NULL, "vmscl.q M000, M000, S333"), + TEST_ENTRY_C(0xF2708080, NULL, "vmscl.q M000, M000, S403"), + TEST_ENTRY_C(0xF2718080, NULL, "vmscl.q M000, M000, S413"), + TEST_ENTRY_C(0xF2728080, NULL, "vmscl.q M000, M000, S423"), + TEST_ENTRY_C(0xF2738080, NULL, "vmscl.q M000, M000, S433"), + TEST_ENTRY_C(0xF2748080, NULL, "vmscl.q M000, M000, S503"), + TEST_ENTRY_C(0xF2758080, NULL, "vmscl.q M000, M000, S513"), + TEST_ENTRY_C(0xF2768080, NULL, "vmscl.q M000, M000, S523"), + TEST_ENTRY_C(0xF2778080, NULL, "vmscl.q M000, M000, S533"), + TEST_ENTRY_C(0xF2788080, NULL, "vmscl.q M000, M000, S603"), + TEST_ENTRY_C(0xF2798080, NULL, "vmscl.q M000, M000, S613"), + TEST_ENTRY_C(0xF27A8080, NULL, "vmscl.q M000, M000, S623"), + TEST_ENTRY_C(0xF27B8080, NULL, "vmscl.q M000, M000, S633"), + TEST_ENTRY_C(0xF27C8080, NULL, "vmscl.q M000, M000, S703"), + TEST_ENTRY_C(0xF27D8080, NULL, "vmscl.q M000, M000, S713"), + TEST_ENTRY_C(0xF27E8080, NULL, "vmscl.q M000, M000, S723"), + TEST_ENTRY_C(0xF27F8080, NULL, "vmscl.q M000, M000, S733"), + TEST_ENTRY_C(0xF2008081, NULL, "vmscl.q M010, M000, S000"), + TEST_ENTRY_C(0xF2008082, NULL, "vmscl.q M020, M000, S000"), + TEST_ENTRY_C(0xF2008083, NULL, "vmscl.q M030, M000, S000"), + TEST_ENTRY_C(0xF2008084, NULL, "vmscl.q M100, M000, S000"), + TEST_ENTRY_C(0xF2008085, NULL, "vmscl.q M110, M000, S000"), + TEST_ENTRY_C(0xF2008086, NULL, "vmscl.q M120, M000, S000"), + TEST_ENTRY_C(0xF2008087, NULL, "vmscl.q M130, M000, S000"), + TEST_ENTRY_C(0xF2008088, NULL, "vmscl.q M200, M000, S000"), + TEST_ENTRY_C(0xF2008089, NULL, "vmscl.q M210, M000, S000"), + TEST_ENTRY_C(0xF200808A, NULL, "vmscl.q M220, M000, S000"), + TEST_ENTRY_C(0xF200808B, NULL, "vmscl.q M230, M000, S000"), + TEST_ENTRY_C(0xF200808C, NULL, "vmscl.q M300, M000, S000"), + TEST_ENTRY_C(0xF200808D, NULL, "vmscl.q M310, M000, S000"), + TEST_ENTRY_C(0xF200808E, NULL, "vmscl.q M320, M000, S000"), + TEST_ENTRY_C(0xF200808F, NULL, "vmscl.q M330, M000, S000"), + TEST_ENTRY_C(0xF2008090, NULL, "vmscl.q M400, M000, S000"), + TEST_ENTRY_C(0xF2008091, NULL, "vmscl.q M410, M000, S000"), + TEST_ENTRY_C(0xF2008092, NULL, "vmscl.q M420, M000, S000"), + TEST_ENTRY_C(0xF2008093, NULL, "vmscl.q M430, M000, S000"), + TEST_ENTRY_C(0xF2008094, NULL, "vmscl.q M500, M000, S000"), + TEST_ENTRY_C(0xF2008095, NULL, "vmscl.q M510, M000, S000"), + TEST_ENTRY_C(0xF2008096, NULL, "vmscl.q M520, M000, S000"), + TEST_ENTRY_C(0xF2008097, NULL, "vmscl.q M530, M000, S000"), + TEST_ENTRY_C(0xF2008098, NULL, "vmscl.q M600, M000, S000"), + TEST_ENTRY_C(0xF2008099, NULL, "vmscl.q M610, M000, S000"), + TEST_ENTRY_C(0xF200809A, NULL, "vmscl.q M620, M000, S000"), + TEST_ENTRY_C(0xF200809B, NULL, "vmscl.q M630, M000, S000"), + TEST_ENTRY_C(0xF200809C, NULL, "vmscl.q M700, M000, S000"), + TEST_ENTRY_C(0xF200809D, NULL, "vmscl.q M710, M000, S000"), + TEST_ENTRY_C(0xF200809E, NULL, "vmscl.q M720, M000, S000"), + TEST_ENTRY_C(0xF200809F, NULL, "vmscl.q M730, M000, S000"), + TEST_ENTRY_C(0xF20080A0, NULL, "vmscl.q E000, M000, S000"), + TEST_ENTRY_C(0xF20080A1, NULL, "vmscl.q E001, M000, S000"), + TEST_ENTRY_C(0xF20080A2, NULL, "vmscl.q E002, M000, S000"), + TEST_ENTRY_C(0xF20080A3, NULL, "vmscl.q E003, M000, S000"), + TEST_ENTRY_C(0xF20080A4, NULL, "vmscl.q E100, M000, S000"), + TEST_ENTRY_C(0xF20080A5, NULL, "vmscl.q E101, M000, S000"), + TEST_ENTRY_C(0xF20080A6, NULL, "vmscl.q E102, M000, S000"), + TEST_ENTRY_C(0xF20080A7, NULL, "vmscl.q E103, M000, S000"), + TEST_ENTRY_C(0xF20080A8, NULL, "vmscl.q E200, M000, S000"), + TEST_ENTRY_C(0xF20080A9, NULL, "vmscl.q E201, M000, S000"), + TEST_ENTRY_C(0xF20080AA, NULL, "vmscl.q E202, M000, S000"), + TEST_ENTRY_C(0xF20080AB, NULL, "vmscl.q E203, M000, S000"), + TEST_ENTRY_C(0xF20080AC, NULL, "vmscl.q E300, M000, S000"), + TEST_ENTRY_C(0xF20080AD, NULL, "vmscl.q E301, M000, S000"), + TEST_ENTRY_C(0xF20080AE, NULL, "vmscl.q E302, M000, S000"), + TEST_ENTRY_C(0xF20080AF, NULL, "vmscl.q E303, M000, S000"), + TEST_ENTRY_C(0xF20080B0, NULL, "vmscl.q E400, M000, S000"), + TEST_ENTRY_C(0xF20080B1, NULL, "vmscl.q E401, M000, S000"), + TEST_ENTRY_C(0xF20080B2, NULL, "vmscl.q E402, M000, S000"), + TEST_ENTRY_C(0xF20080B3, NULL, "vmscl.q E403, M000, S000"), + TEST_ENTRY_C(0xF20080B4, NULL, "vmscl.q E500, M000, S000"), + TEST_ENTRY_C(0xF20080B5, NULL, "vmscl.q E501, M000, S000"), + TEST_ENTRY_C(0xF20080B6, NULL, "vmscl.q E502, M000, S000"), + TEST_ENTRY_C(0xF20080B7, NULL, "vmscl.q E503, M000, S000"), + TEST_ENTRY_C(0xF20080B8, NULL, "vmscl.q E600, M000, S000"), + TEST_ENTRY_C(0xF20080B9, NULL, "vmscl.q E601, M000, S000"), + TEST_ENTRY_C(0xF20080BA, NULL, "vmscl.q E602, M000, S000"), + TEST_ENTRY_C(0xF20080BB, NULL, "vmscl.q E603, M000, S000"), + TEST_ENTRY_C(0xF20080BC, NULL, "vmscl.q E700, M000, S000"), + TEST_ENTRY_C(0xF20080BD, NULL, "vmscl.q E701, M000, S000"), + TEST_ENTRY_C(0xF20080BE, NULL, "vmscl.q E702, M000, S000"), + TEST_ENTRY_C(0xF20080BF, NULL, "vmscl.q E703, M000, S000"), + TEST_ENTRY_C(0xF20080C0, NULL, "vmscl.q M002, M000, S000"), + TEST_ENTRY_C(0xF20080C1, NULL, "vmscl.q M012, M000, S000"), + TEST_ENTRY_C(0xF20080C2, NULL, "vmscl.q M022, M000, S000"), + TEST_ENTRY_C(0xF20080C3, NULL, "vmscl.q M032, M000, S000"), + TEST_ENTRY_C(0xF20080C4, NULL, "vmscl.q M102, M000, S000"), + TEST_ENTRY_C(0xF20080C5, NULL, "vmscl.q M112, M000, S000"), + TEST_ENTRY_C(0xF20080C6, NULL, "vmscl.q M122, M000, S000"), + TEST_ENTRY_C(0xF20080C7, NULL, "vmscl.q M132, M000, S000"), + TEST_ENTRY_C(0xF20080C8, NULL, "vmscl.q M202, M000, S000"), + TEST_ENTRY_C(0xF20080C9, NULL, "vmscl.q M212, M000, S000"), + TEST_ENTRY_C(0xF20080CA, NULL, "vmscl.q M222, M000, S000"), + TEST_ENTRY_C(0xF20080CB, NULL, "vmscl.q M232, M000, S000"), + TEST_ENTRY_C(0xF20080CC, NULL, "vmscl.q M302, M000, S000"), + TEST_ENTRY_C(0xF20080CD, NULL, "vmscl.q M312, M000, S000"), + TEST_ENTRY_C(0xF20080CE, NULL, "vmscl.q M322, M000, S000"), + TEST_ENTRY_C(0xF20080CF, NULL, "vmscl.q M332, M000, S000"), + TEST_ENTRY_C(0xF20080D0, NULL, "vmscl.q M402, M000, S000"), + TEST_ENTRY_C(0xF20080D1, NULL, "vmscl.q M412, M000, S000"), + TEST_ENTRY_C(0xF20080D2, NULL, "vmscl.q M422, M000, S000"), + TEST_ENTRY_C(0xF20080D3, NULL, "vmscl.q M432, M000, S000"), + TEST_ENTRY_C(0xF20080D4, NULL, "vmscl.q M502, M000, S000"), + TEST_ENTRY_C(0xF20080D5, NULL, "vmscl.q M512, M000, S000"), + TEST_ENTRY_C(0xF20080D6, NULL, "vmscl.q M522, M000, S000"), + TEST_ENTRY_C(0xF20080D7, NULL, "vmscl.q M532, M000, S000"), + TEST_ENTRY_C(0xF20080D8, NULL, "vmscl.q M602, M000, S000"), + TEST_ENTRY_C(0xF20080D9, NULL, "vmscl.q M612, M000, S000"), + TEST_ENTRY_C(0xF20080DA, NULL, "vmscl.q M622, M000, S000"), + TEST_ENTRY_C(0xF20080DB, NULL, "vmscl.q M632, M000, S000"), + TEST_ENTRY_C(0xF20080DC, NULL, "vmscl.q M702, M000, S000"), + TEST_ENTRY_C(0xF20080DD, NULL, "vmscl.q M712, M000, S000"), + TEST_ENTRY_C(0xF20080DE, NULL, "vmscl.q M722, M000, S000"), + TEST_ENTRY_C(0xF20080DF, NULL, "vmscl.q M732, M000, S000"), + TEST_ENTRY_C(0xF20080E0, NULL, "vmscl.q E020, M000, S000"), + TEST_ENTRY_C(0xF20080E1, NULL, "vmscl.q E021, M000, S000"), + TEST_ENTRY_C(0xF20080E2, NULL, "vmscl.q E022, M000, S000"), + TEST_ENTRY_C(0xF20080E3, NULL, "vmscl.q E023, M000, S000"), + TEST_ENTRY_C(0xF20080E4, NULL, "vmscl.q E120, M000, S000"), + TEST_ENTRY_C(0xF20080E5, NULL, "vmscl.q E121, M000, S000"), + TEST_ENTRY_C(0xF20080E6, NULL, "vmscl.q E122, M000, S000"), + TEST_ENTRY_C(0xF20080E7, NULL, "vmscl.q E123, M000, S000"), + TEST_ENTRY_C(0xF20080E8, NULL, "vmscl.q E220, M000, S000"), + TEST_ENTRY_C(0xF20080E9, NULL, "vmscl.q E221, M000, S000"), + TEST_ENTRY_C(0xF20080EA, NULL, "vmscl.q E222, M000, S000"), + TEST_ENTRY_C(0xF20080EB, NULL, "vmscl.q E223, M000, S000"), + TEST_ENTRY_C(0xF20080EC, NULL, "vmscl.q E320, M000, S000"), + TEST_ENTRY_C(0xF20080ED, NULL, "vmscl.q E321, M000, S000"), + TEST_ENTRY_C(0xF20080EE, NULL, "vmscl.q E322, M000, S000"), + TEST_ENTRY_C(0xF20080EF, NULL, "vmscl.q E323, M000, S000"), + TEST_ENTRY_C(0xF20080F0, NULL, "vmscl.q E420, M000, S000"), + TEST_ENTRY_C(0xF20080F1, NULL, "vmscl.q E421, M000, S000"), + TEST_ENTRY_C(0xF20080F2, NULL, "vmscl.q E422, M000, S000"), + TEST_ENTRY_C(0xF20080F3, NULL, "vmscl.q E423, M000, S000"), + TEST_ENTRY_C(0xF20080F4, NULL, "vmscl.q E520, M000, S000"), + TEST_ENTRY_C(0xF20080F5, NULL, "vmscl.q E521, M000, S000"), + TEST_ENTRY_C(0xF20080F6, NULL, "vmscl.q E522, M000, S000"), + TEST_ENTRY_C(0xF20080F7, NULL, "vmscl.q E523, M000, S000"), + TEST_ENTRY_C(0xF20080F8, NULL, "vmscl.q E620, M000, S000"), + TEST_ENTRY_C(0xF20080F9, NULL, "vmscl.q E621, M000, S000"), + TEST_ENTRY_C(0xF20080FA, NULL, "vmscl.q E622, M000, S000"), + TEST_ENTRY_C(0xF20080FB, NULL, "vmscl.q E623, M000, S000"), + TEST_ENTRY_C(0xF20080FC, NULL, "vmscl.q E720, M000, S000"), + TEST_ENTRY_C(0xF20080FD, NULL, "vmscl.q E721, M000, S000"), + TEST_ENTRY_C(0xF20080FE, NULL, "vmscl.q E722, M000, S000"), + TEST_ENTRY_C(0xF20080FF, NULL, "vmscl.q E723, M000, S000"), + + /* abs all */ + TEST_ENTRY_C(0xD0010000, NULL, "vabs.s S000, S000"), + TEST_ENTRY_C(0xD0010101, NULL, "vabs.s S010, S010"), + TEST_ENTRY_C(0xD0010202, NULL, "vabs.s S020, S020"), + TEST_ENTRY_C(0xD0010303, NULL, "vabs.s S030, S030"), + TEST_ENTRY_C(0xD0010404, NULL, "vabs.s S100, S100"), + TEST_ENTRY_C(0xD0010505, NULL, "vabs.s S110, S110"), + TEST_ENTRY_C(0xD0010606, NULL, "vabs.s S120, S120"), + TEST_ENTRY_C(0xD0010707, NULL, "vabs.s S130, S130"), + TEST_ENTRY_C(0xD0010808, NULL, "vabs.s S200, S200"), + TEST_ENTRY_C(0xD0010909, NULL, "vabs.s S210, S210"), + TEST_ENTRY_C(0xD0010A0A, NULL, "vabs.s S220, S220"), + TEST_ENTRY_C(0xD0010B0B, NULL, "vabs.s S230, S230"), + TEST_ENTRY_C(0xD0010C0C, NULL, "vabs.s S300, S300"), + TEST_ENTRY_C(0xD0010D0D, NULL, "vabs.s S310, S310"), + TEST_ENTRY_C(0xD0010E0E, NULL, "vabs.s S320, S320"), + TEST_ENTRY_C(0xD0010F0F, NULL, "vabs.s S330, S330"), + TEST_ENTRY_C(0xD0011010, NULL, "vabs.s S400, S400"), + TEST_ENTRY_C(0xD0011111, NULL, "vabs.s S410, S410"), + TEST_ENTRY_C(0xD0011212, NULL, "vabs.s S420, S420"), + TEST_ENTRY_C(0xD0011313, NULL, "vabs.s S430, S430"), + TEST_ENTRY_C(0xD0011414, NULL, "vabs.s S500, S500"), + TEST_ENTRY_C(0xD0011515, NULL, "vabs.s S510, S510"), + TEST_ENTRY_C(0xD0011616, NULL, "vabs.s S520, S520"), + TEST_ENTRY_C(0xD0011717, NULL, "vabs.s S530, S530"), + TEST_ENTRY_C(0xD0011818, NULL, "vabs.s S600, S600"), + TEST_ENTRY_C(0xD0011919, NULL, "vabs.s S610, S610"), + TEST_ENTRY_C(0xD0011A1A, NULL, "vabs.s S620, S620"), + TEST_ENTRY_C(0xD0011B1B, NULL, "vabs.s S630, S630"), + TEST_ENTRY_C(0xD0011C1C, NULL, "vabs.s S700, S700"), + TEST_ENTRY_C(0xD0011D1D, NULL, "vabs.s S710, S710"), + TEST_ENTRY_C(0xD0011E1E, NULL, "vabs.s S720, S720"), + TEST_ENTRY_C(0xD0011F1F, NULL, "vabs.s S730, S730"), + TEST_ENTRY_C(0xD0012020, NULL, "vabs.s S001, S001"), + TEST_ENTRY_C(0xD0012121, NULL, "vabs.s S011, S011"), + TEST_ENTRY_C(0xD0012222, NULL, "vabs.s S021, S021"), + TEST_ENTRY_C(0xD0012323, NULL, "vabs.s S031, S031"), + TEST_ENTRY_C(0xD0012424, NULL, "vabs.s S101, S101"), + TEST_ENTRY_C(0xD0012525, NULL, "vabs.s S111, S111"), + TEST_ENTRY_C(0xD0012626, NULL, "vabs.s S121, S121"), + TEST_ENTRY_C(0xD0012727, NULL, "vabs.s S131, S131"), + TEST_ENTRY_C(0xD0012828, NULL, "vabs.s S201, S201"), + TEST_ENTRY_C(0xD0012929, NULL, "vabs.s S211, S211"), + TEST_ENTRY_C(0xD0012A2A, NULL, "vabs.s S221, S221"), + TEST_ENTRY_C(0xD0012B2B, NULL, "vabs.s S231, S231"), + TEST_ENTRY_C(0xD0012C2C, NULL, "vabs.s S301, S301"), + TEST_ENTRY_C(0xD0012D2D, NULL, "vabs.s S311, S311"), + TEST_ENTRY_C(0xD0012E2E, NULL, "vabs.s S321, S321"), + TEST_ENTRY_C(0xD0012F2F, NULL, "vabs.s S331, S331"), + TEST_ENTRY_C(0xD0013030, NULL, "vabs.s S401, S401"), + TEST_ENTRY_C(0xD0013131, NULL, "vabs.s S411, S411"), + TEST_ENTRY_C(0xD0013232, NULL, "vabs.s S421, S421"), + TEST_ENTRY_C(0xD0013333, NULL, "vabs.s S431, S431"), + TEST_ENTRY_C(0xD0013434, NULL, "vabs.s S501, S501"), + TEST_ENTRY_C(0xD0013535, NULL, "vabs.s S511, S511"), + TEST_ENTRY_C(0xD0013636, NULL, "vabs.s S521, S521"), + TEST_ENTRY_C(0xD0013737, NULL, "vabs.s S531, S531"), + TEST_ENTRY_C(0xD0013838, NULL, "vabs.s S601, S601"), + TEST_ENTRY_C(0xD0013939, NULL, "vabs.s S611, S611"), + TEST_ENTRY_C(0xD0013A3A, NULL, "vabs.s S621, S621"), + TEST_ENTRY_C(0xD0013B3B, NULL, "vabs.s S631, S631"), + TEST_ENTRY_C(0xD0013C3C, NULL, "vabs.s S701, S701"), + TEST_ENTRY_C(0xD0013D3D, NULL, "vabs.s S711, S711"), + TEST_ENTRY_C(0xD0013E3E, NULL, "vabs.s S721, S721"), + TEST_ENTRY_C(0xD0013F3F, NULL, "vabs.s S731, S731"), + TEST_ENTRY_C(0xD0014040, NULL, "vabs.s S002, S002"), + TEST_ENTRY_C(0xD0014141, NULL, "vabs.s S012, S012"), + TEST_ENTRY_C(0xD0014242, NULL, "vabs.s S022, S022"), + TEST_ENTRY_C(0xD0014343, NULL, "vabs.s S032, S032"), + TEST_ENTRY_C(0xD0014444, NULL, "vabs.s S102, S102"), + TEST_ENTRY_C(0xD0014545, NULL, "vabs.s S112, S112"), + TEST_ENTRY_C(0xD0014646, NULL, "vabs.s S122, S122"), + TEST_ENTRY_C(0xD0014747, NULL, "vabs.s S132, S132"), + TEST_ENTRY_C(0xD0014848, NULL, "vabs.s S202, S202"), + TEST_ENTRY_C(0xD0014949, NULL, "vabs.s S212, S212"), + TEST_ENTRY_C(0xD0014A4A, NULL, "vabs.s S222, S222"), + TEST_ENTRY_C(0xD0014B4B, NULL, "vabs.s S232, S232"), + TEST_ENTRY_C(0xD0014C4C, NULL, "vabs.s S302, S302"), + TEST_ENTRY_C(0xD0014D4D, NULL, "vabs.s S312, S312"), + TEST_ENTRY_C(0xD0014E4E, NULL, "vabs.s S322, S322"), + TEST_ENTRY_C(0xD0014F4F, NULL, "vabs.s S332, S332"), + TEST_ENTRY_C(0xD0015050, NULL, "vabs.s S402, S402"), + TEST_ENTRY_C(0xD0015151, NULL, "vabs.s S412, S412"), + TEST_ENTRY_C(0xD0015252, NULL, "vabs.s S422, S422"), + TEST_ENTRY_C(0xD0015353, NULL, "vabs.s S432, S432"), + TEST_ENTRY_C(0xD0015454, NULL, "vabs.s S502, S502"), + TEST_ENTRY_C(0xD0015555, NULL, "vabs.s S512, S512"), + TEST_ENTRY_C(0xD0015656, NULL, "vabs.s S522, S522"), + TEST_ENTRY_C(0xD0015757, NULL, "vabs.s S532, S532"), + TEST_ENTRY_C(0xD0015858, NULL, "vabs.s S602, S602"), + TEST_ENTRY_C(0xD0015959, NULL, "vabs.s S612, S612"), + TEST_ENTRY_C(0xD0015A5A, NULL, "vabs.s S622, S622"), + TEST_ENTRY_C(0xD0015B5B, NULL, "vabs.s S632, S632"), + TEST_ENTRY_C(0xD0015C5C, NULL, "vabs.s S702, S702"), + TEST_ENTRY_C(0xD0015D5D, NULL, "vabs.s S712, S712"), + TEST_ENTRY_C(0xD0015E5E, NULL, "vabs.s S722, S722"), + TEST_ENTRY_C(0xD0015F5F, NULL, "vabs.s S732, S732"), + TEST_ENTRY_C(0xD0016060, NULL, "vabs.s S003, S003"), + TEST_ENTRY_C(0xD0016161, NULL, "vabs.s S013, S013"), + TEST_ENTRY_C(0xD0016262, NULL, "vabs.s S023, S023"), + TEST_ENTRY_C(0xD0016363, NULL, "vabs.s S033, S033"), + TEST_ENTRY_C(0xD0016464, NULL, "vabs.s S103, S103"), + TEST_ENTRY_C(0xD0016565, NULL, "vabs.s S113, S113"), + TEST_ENTRY_C(0xD0016666, NULL, "vabs.s S123, S123"), + TEST_ENTRY_C(0xD0016767, NULL, "vabs.s S133, S133"), + TEST_ENTRY_C(0xD0016868, NULL, "vabs.s S203, S203"), + TEST_ENTRY_C(0xD0016969, NULL, "vabs.s S213, S213"), + TEST_ENTRY_C(0xD0016A6A, NULL, "vabs.s S223, S223"), + TEST_ENTRY_C(0xD0016B6B, NULL, "vabs.s S233, S233"), + TEST_ENTRY_C(0xD0016C6C, NULL, "vabs.s S303, S303"), + TEST_ENTRY_C(0xD0016D6D, NULL, "vabs.s S313, S313"), + TEST_ENTRY_C(0xD0016E6E, NULL, "vabs.s S323, S323"), + TEST_ENTRY_C(0xD0016F6F, NULL, "vabs.s S333, S333"), + TEST_ENTRY_C(0xD0017070, NULL, "vabs.s S403, S403"), + TEST_ENTRY_C(0xD0017171, NULL, "vabs.s S413, S413"), + TEST_ENTRY_C(0xD0017272, NULL, "vabs.s S423, S423"), + TEST_ENTRY_C(0xD0017373, NULL, "vabs.s S433, S433"), + TEST_ENTRY_C(0xD0017474, NULL, "vabs.s S503, S503"), + TEST_ENTRY_C(0xD0017575, NULL, "vabs.s S513, S513"), + TEST_ENTRY_C(0xD0017676, NULL, "vabs.s S523, S523"), + TEST_ENTRY_C(0xD0017777, NULL, "vabs.s S533, S533"), + TEST_ENTRY_C(0xD0017878, NULL, "vabs.s S603, S603"), + TEST_ENTRY_C(0xD0017979, NULL, "vabs.s S613, S613"), + TEST_ENTRY_C(0xD0017A7A, NULL, "vabs.s S623, S623"), + TEST_ENTRY_C(0xD0017B7B, NULL, "vabs.s S633, S633"), + TEST_ENTRY_C(0xD0017C7C, NULL, "vabs.s S703, S703"), + TEST_ENTRY_C(0xD0017D7D, NULL, "vabs.s S713, S713"), + TEST_ENTRY_C(0xD0017E7E, NULL, "vabs.s S723, S723"), + TEST_ENTRY_C(0xD0017F7F, NULL, "vabs.s S733, S733"), + TEST_ENTRY_C(0xD0010080, NULL, "vabs.p C000, C000"), + TEST_ENTRY_C(0xD0010181, NULL, "vabs.p C010, C010"), + TEST_ENTRY_C(0xD0010282, NULL, "vabs.p C020, C020"), + TEST_ENTRY_C(0xD0010383, NULL, "vabs.p C030, C030"), + TEST_ENTRY_C(0xD0010484, NULL, "vabs.p C100, C100"), + TEST_ENTRY_C(0xD0010585, NULL, "vabs.p C110, C110"), + TEST_ENTRY_C(0xD0010686, NULL, "vabs.p C120, C120"), + TEST_ENTRY_C(0xD0010787, NULL, "vabs.p C130, C130"), + TEST_ENTRY_C(0xD0010888, NULL, "vabs.p C200, C200"), + TEST_ENTRY_C(0xD0010989, NULL, "vabs.p C210, C210"), + TEST_ENTRY_C(0xD0010A8A, NULL, "vabs.p C220, C220"), + TEST_ENTRY_C(0xD0010B8B, NULL, "vabs.p C230, C230"), + TEST_ENTRY_C(0xD0010C8C, NULL, "vabs.p C300, C300"), + TEST_ENTRY_C(0xD0010D8D, NULL, "vabs.p C310, C310"), + TEST_ENTRY_C(0xD0010E8E, NULL, "vabs.p C320, C320"), + TEST_ENTRY_C(0xD0010F8F, NULL, "vabs.p C330, C330"), + TEST_ENTRY_C(0xD0011090, NULL, "vabs.p C400, C400"), + TEST_ENTRY_C(0xD0011191, NULL, "vabs.p C410, C410"), + TEST_ENTRY_C(0xD0011292, NULL, "vabs.p C420, C420"), + TEST_ENTRY_C(0xD0011393, NULL, "vabs.p C430, C430"), + TEST_ENTRY_C(0xD0011494, NULL, "vabs.p C500, C500"), + TEST_ENTRY_C(0xD0011595, NULL, "vabs.p C510, C510"), + TEST_ENTRY_C(0xD0011696, NULL, "vabs.p C520, C520"), + TEST_ENTRY_C(0xD0011797, NULL, "vabs.p C530, C530"), + TEST_ENTRY_C(0xD0011898, NULL, "vabs.p C600, C600"), + TEST_ENTRY_C(0xD0011999, NULL, "vabs.p C610, C610"), + TEST_ENTRY_C(0xD0011A9A, NULL, "vabs.p C620, C620"), + TEST_ENTRY_C(0xD0011B9B, NULL, "vabs.p C630, C630"), + TEST_ENTRY_C(0xD0011C9C, NULL, "vabs.p C700, C700"), + TEST_ENTRY_C(0xD0011D9D, NULL, "vabs.p C710, C710"), + TEST_ENTRY_C(0xD0011E9E, NULL, "vabs.p C720, C720"), + TEST_ENTRY_C(0xD0011F9F, NULL, "vabs.p C730, C730"), + TEST_ENTRY_C(0xD00120A0, NULL, "vabs.p R000, R000"), + TEST_ENTRY_C(0xD00121A1, NULL, "vabs.p R001, R001"), + TEST_ENTRY_C(0xD00122A2, NULL, "vabs.p R002, R002"), + TEST_ENTRY_C(0xD00123A3, NULL, "vabs.p R003, R003"), + TEST_ENTRY_C(0xD00124A4, NULL, "vabs.p R100, R100"), + TEST_ENTRY_C(0xD00125A5, NULL, "vabs.p R101, R101"), + TEST_ENTRY_C(0xD00126A6, NULL, "vabs.p R102, R102"), + TEST_ENTRY_C(0xD00127A7, NULL, "vabs.p R103, R103"), + TEST_ENTRY_C(0xD00128A8, NULL, "vabs.p R200, R200"), + TEST_ENTRY_C(0xD00129A9, NULL, "vabs.p R201, R201"), + TEST_ENTRY_C(0xD0012AAA, NULL, "vabs.p R202, R202"), + TEST_ENTRY_C(0xD0012BAB, NULL, "vabs.p R203, R203"), + TEST_ENTRY_C(0xD0012CAC, NULL, "vabs.p R300, R300"), + TEST_ENTRY_C(0xD0012DAD, NULL, "vabs.p R301, R301"), + TEST_ENTRY_C(0xD0012EAE, NULL, "vabs.p R302, R302"), + TEST_ENTRY_C(0xD0012FAF, NULL, "vabs.p R303, R303"), + TEST_ENTRY_C(0xD00130B0, NULL, "vabs.p R400, R400"), + TEST_ENTRY_C(0xD00131B1, NULL, "vabs.p R401, R401"), + TEST_ENTRY_C(0xD00132B2, NULL, "vabs.p R402, R402"), + TEST_ENTRY_C(0xD00133B3, NULL, "vabs.p R403, R403"), + TEST_ENTRY_C(0xD00134B4, NULL, "vabs.p R500, R500"), + TEST_ENTRY_C(0xD00135B5, NULL, "vabs.p R501, R501"), + TEST_ENTRY_C(0xD00136B6, NULL, "vabs.p R502, R502"), + TEST_ENTRY_C(0xD00137B7, NULL, "vabs.p R503, R503"), + TEST_ENTRY_C(0xD00138B8, NULL, "vabs.p R600, R600"), + TEST_ENTRY_C(0xD00139B9, NULL, "vabs.p R601, R601"), + TEST_ENTRY_C(0xD0013ABA, NULL, "vabs.p R602, R602"), + TEST_ENTRY_C(0xD0013BBB, NULL, "vabs.p R603, R603"), + TEST_ENTRY_C(0xD0013CBC, NULL, "vabs.p R700, R700"), + TEST_ENTRY_C(0xD0013DBD, NULL, "vabs.p R701, R701"), + TEST_ENTRY_C(0xD0013EBE, NULL, "vabs.p R702, R702"), + TEST_ENTRY_C(0xD0013FBF, NULL, "vabs.p R703, R703"), + TEST_ENTRY_C(0xD00140C0, NULL, "vabs.p C002, C002"), + TEST_ENTRY_C(0xD00141C1, NULL, "vabs.p C012, C012"), + TEST_ENTRY_C(0xD00142C2, NULL, "vabs.p C022, C022"), + TEST_ENTRY_C(0xD00143C3, NULL, "vabs.p C032, C032"), + TEST_ENTRY_C(0xD00144C4, NULL, "vabs.p C102, C102"), + TEST_ENTRY_C(0xD00145C5, NULL, "vabs.p C112, C112"), + TEST_ENTRY_C(0xD00146C6, NULL, "vabs.p C122, C122"), + TEST_ENTRY_C(0xD00147C7, NULL, "vabs.p C132, C132"), + TEST_ENTRY_C(0xD00148C8, NULL, "vabs.p C202, C202"), + TEST_ENTRY_C(0xD00149C9, NULL, "vabs.p C212, C212"), + TEST_ENTRY_C(0xD0014ACA, NULL, "vabs.p C222, C222"), + TEST_ENTRY_C(0xD0014BCB, NULL, "vabs.p C232, C232"), + TEST_ENTRY_C(0xD0014CCC, NULL, "vabs.p C302, C302"), + TEST_ENTRY_C(0xD0014DCD, NULL, "vabs.p C312, C312"), + TEST_ENTRY_C(0xD0014ECE, NULL, "vabs.p C322, C322"), + TEST_ENTRY_C(0xD0014FCF, NULL, "vabs.p C332, C332"), + TEST_ENTRY_C(0xD00150D0, NULL, "vabs.p C402, C402"), + TEST_ENTRY_C(0xD00151D1, NULL, "vabs.p C412, C412"), + TEST_ENTRY_C(0xD00152D2, NULL, "vabs.p C422, C422"), + TEST_ENTRY_C(0xD00153D3, NULL, "vabs.p C432, C432"), + TEST_ENTRY_C(0xD00154D4, NULL, "vabs.p C502, C502"), + TEST_ENTRY_C(0xD00155D5, NULL, "vabs.p C512, C512"), + TEST_ENTRY_C(0xD00156D6, NULL, "vabs.p C522, C522"), + TEST_ENTRY_C(0xD00157D7, NULL, "vabs.p C532, C532"), + TEST_ENTRY_C(0xD00158D8, NULL, "vabs.p C602, C602"), + TEST_ENTRY_C(0xD00159D9, NULL, "vabs.p C612, C612"), + TEST_ENTRY_C(0xD0015ADA, NULL, "vabs.p C622, C622"), + TEST_ENTRY_C(0xD0015BDB, NULL, "vabs.p C632, C632"), + TEST_ENTRY_C(0xD0015CDC, NULL, "vabs.p C702, C702"), + TEST_ENTRY_C(0xD0015DDD, NULL, "vabs.p C712, C712"), + TEST_ENTRY_C(0xD0015EDE, NULL, "vabs.p C722, C722"), + TEST_ENTRY_C(0xD0015FDF, NULL, "vabs.p C732, C732"), + TEST_ENTRY_C(0xD00160E0, NULL, "vabs.p R020, R020"), + TEST_ENTRY_C(0xD00161E1, NULL, "vabs.p R021, R021"), + TEST_ENTRY_C(0xD00162E2, NULL, "vabs.p R022, R022"), + TEST_ENTRY_C(0xD00163E3, NULL, "vabs.p R023, R023"), + TEST_ENTRY_C(0xD00164E4, NULL, "vabs.p R120, R120"), + TEST_ENTRY_C(0xD00165E5, NULL, "vabs.p R121, R121"), + TEST_ENTRY_C(0xD00166E6, NULL, "vabs.p R122, R122"), + TEST_ENTRY_C(0xD00167E7, NULL, "vabs.p R123, R123"), + TEST_ENTRY_C(0xD00168E8, NULL, "vabs.p R220, R220"), + TEST_ENTRY_C(0xD00169E9, NULL, "vabs.p R221, R221"), + TEST_ENTRY_C(0xD0016AEA, NULL, "vabs.p R222, R222"), + TEST_ENTRY_C(0xD0016BEB, NULL, "vabs.p R223, R223"), + TEST_ENTRY_C(0xD0016CEC, NULL, "vabs.p R320, R320"), + TEST_ENTRY_C(0xD0016DED, NULL, "vabs.p R321, R321"), + TEST_ENTRY_C(0xD0016EEE, NULL, "vabs.p R322, R322"), + TEST_ENTRY_C(0xD0016FEF, NULL, "vabs.p R323, R323"), + TEST_ENTRY_C(0xD00170F0, NULL, "vabs.p R420, R420"), + TEST_ENTRY_C(0xD00171F1, NULL, "vabs.p R421, R421"), + TEST_ENTRY_C(0xD00172F2, NULL, "vabs.p R422, R422"), + TEST_ENTRY_C(0xD00173F3, NULL, "vabs.p R423, R423"), + TEST_ENTRY_C(0xD00174F4, NULL, "vabs.p R520, R520"), + TEST_ENTRY_C(0xD00175F5, NULL, "vabs.p R521, R521"), + TEST_ENTRY_C(0xD00176F6, NULL, "vabs.p R522, R522"), + TEST_ENTRY_C(0xD00177F7, NULL, "vabs.p R523, R523"), + TEST_ENTRY_C(0xD00178F8, NULL, "vabs.p R620, R620"), + TEST_ENTRY_C(0xD00179F9, NULL, "vabs.p R621, R621"), + TEST_ENTRY_C(0xD0017AFA, NULL, "vabs.p R622, R622"), + TEST_ENTRY_C(0xD0017BFB, NULL, "vabs.p R623, R623"), + TEST_ENTRY_C(0xD0017CFC, NULL, "vabs.p R720, R720"), + TEST_ENTRY_C(0xD0017DFD, NULL, "vabs.p R721, R721"), + TEST_ENTRY_C(0xD0017EFE, NULL, "vabs.p R722, R722"), + TEST_ENTRY_C(0xD0017FFF, NULL, "vabs.p R723, R723"), + TEST_ENTRY_C(0xD0018000, NULL, "vabs.t C000, C000"), + TEST_ENTRY_C(0xD0018101, NULL, "vabs.t C010, C010"), + TEST_ENTRY_C(0xD0018202, NULL, "vabs.t C020, C020"), + TEST_ENTRY_C(0xD0018303, NULL, "vabs.t C030, C030"), + TEST_ENTRY_C(0xD0018404, NULL, "vabs.t C100, C100"), + TEST_ENTRY_C(0xD0018505, NULL, "vabs.t C110, C110"), + TEST_ENTRY_C(0xD0018606, NULL, "vabs.t C120, C120"), + TEST_ENTRY_C(0xD0018707, NULL, "vabs.t C130, C130"), + TEST_ENTRY_C(0xD0018808, NULL, "vabs.t C200, C200"), + TEST_ENTRY_C(0xD0018909, NULL, "vabs.t C210, C210"), + TEST_ENTRY_C(0xD0018A0A, NULL, "vabs.t C220, C220"), + TEST_ENTRY_C(0xD0018B0B, NULL, "vabs.t C230, C230"), + TEST_ENTRY_C(0xD0018C0C, NULL, "vabs.t C300, C300"), + TEST_ENTRY_C(0xD0018D0D, NULL, "vabs.t C310, C310"), + TEST_ENTRY_C(0xD0018E0E, NULL, "vabs.t C320, C320"), + TEST_ENTRY_C(0xD0018F0F, NULL, "vabs.t C330, C330"), + TEST_ENTRY_C(0xD0019010, NULL, "vabs.t C400, C400"), + TEST_ENTRY_C(0xD0019111, NULL, "vabs.t C410, C410"), + TEST_ENTRY_C(0xD0019212, NULL, "vabs.t C420, C420"), + TEST_ENTRY_C(0xD0019313, NULL, "vabs.t C430, C430"), + TEST_ENTRY_C(0xD0019414, NULL, "vabs.t C500, C500"), + TEST_ENTRY_C(0xD0019515, NULL, "vabs.t C510, C510"), + TEST_ENTRY_C(0xD0019616, NULL, "vabs.t C520, C520"), + TEST_ENTRY_C(0xD0019717, NULL, "vabs.t C530, C530"), + TEST_ENTRY_C(0xD0019818, NULL, "vabs.t C600, C600"), + TEST_ENTRY_C(0xD0019919, NULL, "vabs.t C610, C610"), + TEST_ENTRY_C(0xD0019A1A, NULL, "vabs.t C620, C620"), + TEST_ENTRY_C(0xD0019B1B, NULL, "vabs.t C630, C630"), + TEST_ENTRY_C(0xD0019C1C, NULL, "vabs.t C700, C700"), + TEST_ENTRY_C(0xD0019D1D, NULL, "vabs.t C710, C710"), + TEST_ENTRY_C(0xD0019E1E, NULL, "vabs.t C720, C720"), + TEST_ENTRY_C(0xD0019F1F, NULL, "vabs.t C730, C730"), + TEST_ENTRY_C(0xD001A020, NULL, "vabs.t R000, R000"), + TEST_ENTRY_C(0xD001A121, NULL, "vabs.t R001, R001"), + TEST_ENTRY_C(0xD001A222, NULL, "vabs.t R002, R002"), + TEST_ENTRY_C(0xD001A323, NULL, "vabs.t R003, R003"), + TEST_ENTRY_C(0xD001A424, NULL, "vabs.t R100, R100"), + TEST_ENTRY_C(0xD001A525, NULL, "vabs.t R101, R101"), + TEST_ENTRY_C(0xD001A626, NULL, "vabs.t R102, R102"), + TEST_ENTRY_C(0xD001A727, NULL, "vabs.t R103, R103"), + TEST_ENTRY_C(0xD001A828, NULL, "vabs.t R200, R200"), + TEST_ENTRY_C(0xD001A929, NULL, "vabs.t R201, R201"), + TEST_ENTRY_C(0xD001AA2A, NULL, "vabs.t R202, R202"), + TEST_ENTRY_C(0xD001AB2B, NULL, "vabs.t R203, R203"), + TEST_ENTRY_C(0xD001AC2C, NULL, "vabs.t R300, R300"), + TEST_ENTRY_C(0xD001AD2D, NULL, "vabs.t R301, R301"), + TEST_ENTRY_C(0xD001AE2E, NULL, "vabs.t R302, R302"), + TEST_ENTRY_C(0xD001AF2F, NULL, "vabs.t R303, R303"), + TEST_ENTRY_C(0xD001B030, NULL, "vabs.t R400, R400"), + TEST_ENTRY_C(0xD001B131, NULL, "vabs.t R401, R401"), + TEST_ENTRY_C(0xD001B232, NULL, "vabs.t R402, R402"), + TEST_ENTRY_C(0xD001B333, NULL, "vabs.t R403, R403"), + TEST_ENTRY_C(0xD001B434, NULL, "vabs.t R500, R500"), + TEST_ENTRY_C(0xD001B535, NULL, "vabs.t R501, R501"), + TEST_ENTRY_C(0xD001B636, NULL, "vabs.t R502, R502"), + TEST_ENTRY_C(0xD001B737, NULL, "vabs.t R503, R503"), + TEST_ENTRY_C(0xD001B838, NULL, "vabs.t R600, R600"), + TEST_ENTRY_C(0xD001B939, NULL, "vabs.t R601, R601"), + TEST_ENTRY_C(0xD001BA3A, NULL, "vabs.t R602, R602"), + TEST_ENTRY_C(0xD001BB3B, NULL, "vabs.t R603, R603"), + TEST_ENTRY_C(0xD001BC3C, NULL, "vabs.t R700, R700"), + TEST_ENTRY_C(0xD001BD3D, NULL, "vabs.t R701, R701"), + TEST_ENTRY_C(0xD001BE3E, NULL, "vabs.t R702, R702"), + TEST_ENTRY_C(0xD001BF3F, NULL, "vabs.t R703, R703"), + TEST_ENTRY_C(0xD001C040, NULL, "vabs.t C001, C001"), + TEST_ENTRY_C(0xD001C141, NULL, "vabs.t C011, C011"), + TEST_ENTRY_C(0xD001C242, NULL, "vabs.t C021, C021"), + TEST_ENTRY_C(0xD001C343, NULL, "vabs.t C031, C031"), + TEST_ENTRY_C(0xD001C444, NULL, "vabs.t C101, C101"), + TEST_ENTRY_C(0xD001C545, NULL, "vabs.t C111, C111"), + TEST_ENTRY_C(0xD001C646, NULL, "vabs.t C121, C121"), + TEST_ENTRY_C(0xD001C747, NULL, "vabs.t C131, C131"), + TEST_ENTRY_C(0xD001C848, NULL, "vabs.t C201, C201"), + TEST_ENTRY_C(0xD001C949, NULL, "vabs.t C211, C211"), + TEST_ENTRY_C(0xD001CA4A, NULL, "vabs.t C221, C221"), + TEST_ENTRY_C(0xD001CB4B, NULL, "vabs.t C231, C231"), + TEST_ENTRY_C(0xD001CC4C, NULL, "vabs.t C301, C301"), + TEST_ENTRY_C(0xD001CD4D, NULL, "vabs.t C311, C311"), + TEST_ENTRY_C(0xD001CE4E, NULL, "vabs.t C321, C321"), + TEST_ENTRY_C(0xD001CF4F, NULL, "vabs.t C331, C331"), + TEST_ENTRY_C(0xD001D050, NULL, "vabs.t C401, C401"), + TEST_ENTRY_C(0xD001D151, NULL, "vabs.t C411, C411"), + TEST_ENTRY_C(0xD001D252, NULL, "vabs.t C421, C421"), + TEST_ENTRY_C(0xD001D353, NULL, "vabs.t C431, C431"), + TEST_ENTRY_C(0xD001D454, NULL, "vabs.t C501, C501"), + TEST_ENTRY_C(0xD001D555, NULL, "vabs.t C511, C511"), + TEST_ENTRY_C(0xD001D656, NULL, "vabs.t C521, C521"), + TEST_ENTRY_C(0xD001D757, NULL, "vabs.t C531, C531"), + TEST_ENTRY_C(0xD001D858, NULL, "vabs.t C601, C601"), + TEST_ENTRY_C(0xD001D959, NULL, "vabs.t C611, C611"), + TEST_ENTRY_C(0xD001DA5A, NULL, "vabs.t C621, C621"), + TEST_ENTRY_C(0xD001DB5B, NULL, "vabs.t C631, C631"), + TEST_ENTRY_C(0xD001DC5C, NULL, "vabs.t C701, C701"), + TEST_ENTRY_C(0xD001DD5D, NULL, "vabs.t C711, C711"), + TEST_ENTRY_C(0xD001DE5E, NULL, "vabs.t C721, C721"), + TEST_ENTRY_C(0xD001DF5F, NULL, "vabs.t C731, C731"), + TEST_ENTRY_C(0xD001E060, NULL, "vabs.t R010, R010"), + TEST_ENTRY_C(0xD001E161, NULL, "vabs.t R011, R011"), + TEST_ENTRY_C(0xD001E262, NULL, "vabs.t R012, R012"), + TEST_ENTRY_C(0xD001E363, NULL, "vabs.t R013, R013"), + TEST_ENTRY_C(0xD001E464, NULL, "vabs.t R110, R110"), + TEST_ENTRY_C(0xD001E565, NULL, "vabs.t R111, R111"), + TEST_ENTRY_C(0xD001E666, NULL, "vabs.t R112, R112"), + TEST_ENTRY_C(0xD001E767, NULL, "vabs.t R113, R113"), + TEST_ENTRY_C(0xD001E868, NULL, "vabs.t R210, R210"), + TEST_ENTRY_C(0xD001E969, NULL, "vabs.t R211, R211"), + TEST_ENTRY_C(0xD001EA6A, NULL, "vabs.t R212, R212"), + TEST_ENTRY_C(0xD001EB6B, NULL, "vabs.t R213, R213"), + TEST_ENTRY_C(0xD001EC6C, NULL, "vabs.t R310, R310"), + TEST_ENTRY_C(0xD001ED6D, NULL, "vabs.t R311, R311"), + TEST_ENTRY_C(0xD001EE6E, NULL, "vabs.t R312, R312"), + TEST_ENTRY_C(0xD001EF6F, NULL, "vabs.t R313, R313"), + TEST_ENTRY_C(0xD001F070, NULL, "vabs.t R410, R410"), + TEST_ENTRY_C(0xD001F171, NULL, "vabs.t R411, R411"), + TEST_ENTRY_C(0xD001F272, NULL, "vabs.t R412, R412"), + TEST_ENTRY_C(0xD001F373, NULL, "vabs.t R413, R413"), + TEST_ENTRY_C(0xD001F474, NULL, "vabs.t R510, R510"), + TEST_ENTRY_C(0xD001F575, NULL, "vabs.t R511, R511"), + TEST_ENTRY_C(0xD001F676, NULL, "vabs.t R512, R512"), + TEST_ENTRY_C(0xD001F777, NULL, "vabs.t R513, R513"), + TEST_ENTRY_C(0xD001F878, NULL, "vabs.t R610, R610"), + TEST_ENTRY_C(0xD001F979, NULL, "vabs.t R611, R611"), + TEST_ENTRY_C(0xD001FA7A, NULL, "vabs.t R612, R612"), + TEST_ENTRY_C(0xD001FB7B, NULL, "vabs.t R613, R613"), + TEST_ENTRY_C(0xD001FC7C, NULL, "vabs.t R710, R710"), + TEST_ENTRY_C(0xD001FD7D, NULL, "vabs.t R711, R711"), + TEST_ENTRY_C(0xD001FE7E, NULL, "vabs.t R712, R712"), + TEST_ENTRY_C(0xD001FF7F, NULL, "vabs.t R713, R713"), + TEST_ENTRY_C(0xD0018080, NULL, "vabs.q C000, C000"), + TEST_ENTRY_C(0xD0018181, NULL, "vabs.q C010, C010"), + TEST_ENTRY_C(0xD0018282, NULL, "vabs.q C020, C020"), + TEST_ENTRY_C(0xD0018383, NULL, "vabs.q C030, C030"), + TEST_ENTRY_C(0xD0018484, NULL, "vabs.q C100, C100"), + TEST_ENTRY_C(0xD0018585, NULL, "vabs.q C110, C110"), + TEST_ENTRY_C(0xD0018686, NULL, "vabs.q C120, C120"), + TEST_ENTRY_C(0xD0018787, NULL, "vabs.q C130, C130"), + TEST_ENTRY_C(0xD0018888, NULL, "vabs.q C200, C200"), + TEST_ENTRY_C(0xD0018989, NULL, "vabs.q C210, C210"), + TEST_ENTRY_C(0xD0018A8A, NULL, "vabs.q C220, C220"), + TEST_ENTRY_C(0xD0018B8B, NULL, "vabs.q C230, C230"), + TEST_ENTRY_C(0xD0018C8C, NULL, "vabs.q C300, C300"), + TEST_ENTRY_C(0xD0018D8D, NULL, "vabs.q C310, C310"), + TEST_ENTRY_C(0xD0018E8E, NULL, "vabs.q C320, C320"), + TEST_ENTRY_C(0xD0018F8F, NULL, "vabs.q C330, C330"), + TEST_ENTRY_C(0xD0019090, NULL, "vabs.q C400, C400"), + TEST_ENTRY_C(0xD0019191, NULL, "vabs.q C410, C410"), + TEST_ENTRY_C(0xD0019292, NULL, "vabs.q C420, C420"), + TEST_ENTRY_C(0xD0019393, NULL, "vabs.q C430, C430"), + TEST_ENTRY_C(0xD0019494, NULL, "vabs.q C500, C500"), + TEST_ENTRY_C(0xD0019595, NULL, "vabs.q C510, C510"), + TEST_ENTRY_C(0xD0019696, NULL, "vabs.q C520, C520"), + TEST_ENTRY_C(0xD0019797, NULL, "vabs.q C530, C530"), + TEST_ENTRY_C(0xD0019898, NULL, "vabs.q C600, C600"), + TEST_ENTRY_C(0xD0019999, NULL, "vabs.q C610, C610"), + TEST_ENTRY_C(0xD0019A9A, NULL, "vabs.q C620, C620"), + TEST_ENTRY_C(0xD0019B9B, NULL, "vabs.q C630, C630"), + TEST_ENTRY_C(0xD0019C9C, NULL, "vabs.q C700, C700"), + TEST_ENTRY_C(0xD0019D9D, NULL, "vabs.q C710, C710"), + TEST_ENTRY_C(0xD0019E9E, NULL, "vabs.q C720, C720"), + TEST_ENTRY_C(0xD0019F9F, NULL, "vabs.q C730, C730"), + TEST_ENTRY_C(0xD001A0A0, NULL, "vabs.q R000, R000"), + TEST_ENTRY_C(0xD001A1A1, NULL, "vabs.q R001, R001"), + TEST_ENTRY_C(0xD001A2A2, NULL, "vabs.q R002, R002"), + TEST_ENTRY_C(0xD001A3A3, NULL, "vabs.q R003, R003"), + TEST_ENTRY_C(0xD001A4A4, NULL, "vabs.q R100, R100"), + TEST_ENTRY_C(0xD001A5A5, NULL, "vabs.q R101, R101"), + TEST_ENTRY_C(0xD001A6A6, NULL, "vabs.q R102, R102"), + TEST_ENTRY_C(0xD001A7A7, NULL, "vabs.q R103, R103"), + TEST_ENTRY_C(0xD001A8A8, NULL, "vabs.q R200, R200"), + TEST_ENTRY_C(0xD001A9A9, NULL, "vabs.q R201, R201"), + TEST_ENTRY_C(0xD001AAAA, NULL, "vabs.q R202, R202"), + TEST_ENTRY_C(0xD001ABAB, NULL, "vabs.q R203, R203"), + TEST_ENTRY_C(0xD001ACAC, NULL, "vabs.q R300, R300"), + TEST_ENTRY_C(0xD001ADAD, NULL, "vabs.q R301, R301"), + TEST_ENTRY_C(0xD001AEAE, NULL, "vabs.q R302, R302"), + TEST_ENTRY_C(0xD001AFAF, NULL, "vabs.q R303, R303"), + TEST_ENTRY_C(0xD001B0B0, NULL, "vabs.q R400, R400"), + TEST_ENTRY_C(0xD001B1B1, NULL, "vabs.q R401, R401"), + TEST_ENTRY_C(0xD001B2B2, NULL, "vabs.q R402, R402"), + TEST_ENTRY_C(0xD001B3B3, NULL, "vabs.q R403, R403"), + TEST_ENTRY_C(0xD001B4B4, NULL, "vabs.q R500, R500"), + TEST_ENTRY_C(0xD001B5B5, NULL, "vabs.q R501, R501"), + TEST_ENTRY_C(0xD001B6B6, NULL, "vabs.q R502, R502"), + TEST_ENTRY_C(0xD001B7B7, NULL, "vabs.q R503, R503"), + TEST_ENTRY_C(0xD001B8B8, NULL, "vabs.q R600, R600"), + TEST_ENTRY_C(0xD001B9B9, NULL, "vabs.q R601, R601"), + TEST_ENTRY_C(0xD001BABA, NULL, "vabs.q R602, R602"), + TEST_ENTRY_C(0xD001BBBB, NULL, "vabs.q R603, R603"), + TEST_ENTRY_C(0xD001BCBC, NULL, "vabs.q R700, R700"), + TEST_ENTRY_C(0xD001BDBD, NULL, "vabs.q R701, R701"), + TEST_ENTRY_C(0xD001BEBE, NULL, "vabs.q R702, R702"), + TEST_ENTRY_C(0xD001BFBF, NULL, "vabs.q R703, R703"), + TEST_ENTRY_C(0xD001C0C0, NULL, "vabs.q C002, C002"), + TEST_ENTRY_C(0xD001C1C1, NULL, "vabs.q C012, C012"), + TEST_ENTRY_C(0xD001C2C2, NULL, "vabs.q C022, C022"), + TEST_ENTRY_C(0xD001C3C3, NULL, "vabs.q C032, C032"), + TEST_ENTRY_C(0xD001C4C4, NULL, "vabs.q C102, C102"), + TEST_ENTRY_C(0xD001C5C5, NULL, "vabs.q C112, C112"), + TEST_ENTRY_C(0xD001C6C6, NULL, "vabs.q C122, C122"), + TEST_ENTRY_C(0xD001C7C7, NULL, "vabs.q C132, C132"), + TEST_ENTRY_C(0xD001C8C8, NULL, "vabs.q C202, C202"), + TEST_ENTRY_C(0xD001C9C9, NULL, "vabs.q C212, C212"), + TEST_ENTRY_C(0xD001CACA, NULL, "vabs.q C222, C222"), + TEST_ENTRY_C(0xD001CBCB, NULL, "vabs.q C232, C232"), + TEST_ENTRY_C(0xD001CCCC, NULL, "vabs.q C302, C302"), + TEST_ENTRY_C(0xD001CDCD, NULL, "vabs.q C312, C312"), + TEST_ENTRY_C(0xD001CECE, NULL, "vabs.q C322, C322"), + TEST_ENTRY_C(0xD001CFCF, NULL, "vabs.q C332, C332"), + TEST_ENTRY_C(0xD001D0D0, NULL, "vabs.q C402, C402"), + TEST_ENTRY_C(0xD001D1D1, NULL, "vabs.q C412, C412"), + TEST_ENTRY_C(0xD001D2D2, NULL, "vabs.q C422, C422"), + TEST_ENTRY_C(0xD001D3D3, NULL, "vabs.q C432, C432"), + TEST_ENTRY_C(0xD001D4D4, NULL, "vabs.q C502, C502"), + TEST_ENTRY_C(0xD001D5D5, NULL, "vabs.q C512, C512"), + TEST_ENTRY_C(0xD001D6D6, NULL, "vabs.q C522, C522"), + TEST_ENTRY_C(0xD001D7D7, NULL, "vabs.q C532, C532"), + TEST_ENTRY_C(0xD001D8D8, NULL, "vabs.q C602, C602"), + TEST_ENTRY_C(0xD001D9D9, NULL, "vabs.q C612, C612"), + TEST_ENTRY_C(0xD001DADA, NULL, "vabs.q C622, C622"), + TEST_ENTRY_C(0xD001DBDB, NULL, "vabs.q C632, C632"), + TEST_ENTRY_C(0xD001DCDC, NULL, "vabs.q C702, C702"), + TEST_ENTRY_C(0xD001DDDD, NULL, "vabs.q C712, C712"), + TEST_ENTRY_C(0xD001DEDE, NULL, "vabs.q C722, C722"), + TEST_ENTRY_C(0xD001DFDF, NULL, "vabs.q C732, C732"), + TEST_ENTRY_C(0xD001E0E0, NULL, "vabs.q R020, R020"), + TEST_ENTRY_C(0xD001E1E1, NULL, "vabs.q R021, R021"), + TEST_ENTRY_C(0xD001E2E2, NULL, "vabs.q R022, R022"), + TEST_ENTRY_C(0xD001E3E3, NULL, "vabs.q R023, R023"), + TEST_ENTRY_C(0xD001E4E4, NULL, "vabs.q R120, R120"), + TEST_ENTRY_C(0xD001E5E5, NULL, "vabs.q R121, R121"), + TEST_ENTRY_C(0xD001E6E6, NULL, "vabs.q R122, R122"), + TEST_ENTRY_C(0xD001E7E7, NULL, "vabs.q R123, R123"), + TEST_ENTRY_C(0xD001E8E8, NULL, "vabs.q R220, R220"), + TEST_ENTRY_C(0xD001E9E9, NULL, "vabs.q R221, R221"), + TEST_ENTRY_C(0xD001EAEA, NULL, "vabs.q R222, R222"), + TEST_ENTRY_C(0xD001EBEB, NULL, "vabs.q R223, R223"), + TEST_ENTRY_C(0xD001ECEC, NULL, "vabs.q R320, R320"), + TEST_ENTRY_C(0xD001EDED, NULL, "vabs.q R321, R321"), + TEST_ENTRY_C(0xD001EEEE, NULL, "vabs.q R322, R322"), + TEST_ENTRY_C(0xD001EFEF, NULL, "vabs.q R323, R323"), + TEST_ENTRY_C(0xD001F0F0, NULL, "vabs.q R420, R420"), + TEST_ENTRY_C(0xD001F1F1, NULL, "vabs.q R421, R421"), + TEST_ENTRY_C(0xD001F2F2, NULL, "vabs.q R422, R422"), + TEST_ENTRY_C(0xD001F3F3, NULL, "vabs.q R423, R423"), + TEST_ENTRY_C(0xD001F4F4, NULL, "vabs.q R520, R520"), + TEST_ENTRY_C(0xD001F5F5, NULL, "vabs.q R521, R521"), + TEST_ENTRY_C(0xD001F6F6, NULL, "vabs.q R522, R522"), + TEST_ENTRY_C(0xD001F7F7, NULL, "vabs.q R523, R523"), + TEST_ENTRY_C(0xD001F8F8, NULL, "vabs.q R620, R620"), + TEST_ENTRY_C(0xD001F9F9, NULL, "vabs.q R621, R621"), + TEST_ENTRY_C(0xD001FAFA, NULL, "vabs.q R622, R622"), + TEST_ENTRY_C(0xD001FBFB, NULL, "vabs.q R623, R623"), + TEST_ENTRY_C(0xD001FCFC, NULL, "vabs.q R720, R720"), + TEST_ENTRY_C(0xD001FDFD, NULL, "vabs.q R721, R721"), + TEST_ENTRY_C(0xD001FEFE, NULL, "vabs.q R722, R722"), + TEST_ENTRY_C(0xD001FFFF, NULL, "vabs.q R723, R723"), + + /* VFPU0 */ + TEST_ENTRY_C(0x60001040, NULL, "vadd.s S002, S400, S000"), + TEST_ENTRY_C(0x600010C0, NULL, "vadd.p C002, C400, C000"), + TEST_ENTRY_C(0x60009040, NULL, "vadd.t C001, C400, C000"), + TEST_ENTRY_C(0x600090C0, NULL, "vadd.q C002, C400, C000"), + TEST_ENTRY_C(0x60801040, NULL, "vsub.s S002, S400, S000"), + TEST_ENTRY_C(0x608010C0, NULL, "vsub.p C002, C400, C000"), + TEST_ENTRY_C(0x60809040, NULL, "vsub.t C001, C400, C000"), + TEST_ENTRY_C(0x608090C0, NULL, "vsub.q C002, C400, C000"), + TEST_ENTRY_C(0x61001040, NULL, "vsbn.s S002, S400, S000"), + TEST_ENTRY_C(0x610010C0, NULL, ".word 0x610010C0 # INVALID $t0, $zero, 0x10C0 # 00000000 "), + TEST_ENTRY_C(0x61009040, NULL, ".word 0x61009040 # INVALID $t0, $zero, -0x6FC0 # 00000000 "), + TEST_ENTRY_C(0x610090C0, NULL, ".word 0x610090C0 # INVALID $t0, $zero, -0x6F40 # 00000000 "), + TEST_ENTRY_C(0x61801040, NULL, ".word 0x61801040 # INVALID $t4, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0x618010C0, NULL, ".word 0x618010C0 # INVALID $t4, $zero, 0x10C0 # 00000000 "), + TEST_ENTRY_C(0x61809040, NULL, ".word 0x61809040 # INVALID $t4, $zero, -0x6FC0 # 00000000 "), + TEST_ENTRY_C(0x618090C0, NULL, ".word 0x618090C0 # INVALID $t4, $zero, -0x6F40 # 00000000 "), + TEST_ENTRY_C(0x62001040, NULL, ".word 0x62001040 # INVALID $s0, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0x620010C0, NULL, ".word 0x620010C0 # INVALID $s0, $zero, 0x10C0 # 00000000 "), + TEST_ENTRY_C(0x62009040, NULL, ".word 0x62009040 # INVALID $s0, $zero, -0x6FC0 # 00000000 "), + TEST_ENTRY_C(0x620090C0, NULL, ".word 0x620090C0 # INVALID $s0, $zero, -0x6F40 # 00000000 "), + TEST_ENTRY_C(0x62801040, NULL, ".word 0x62801040 # INVALID $s4, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0x628010C0, NULL, ".word 0x628010C0 # INVALID $s4, $zero, 0x10C0 # 00000000 "), + TEST_ENTRY_C(0x62809040, NULL, ".word 0x62809040 # INVALID $s4, $zero, -0x6FC0 # 00000000 "), + TEST_ENTRY_C(0x628090C0, NULL, ".word 0x628090C0 # INVALID $s4, $zero, -0x6F40 # 00000000 "), + TEST_ENTRY_C(0x63001040, NULL, ".word 0x63001040 # INVALID $t8, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0x630010C0, NULL, ".word 0x630010C0 # INVALID $t8, $zero, 0x10C0 # 00000000 "), + TEST_ENTRY_C(0x63009040, NULL, ".word 0x63009040 # INVALID $t8, $zero, -0x6FC0 # 00000000 "), + TEST_ENTRY_C(0x630090C0, NULL, ".word 0x630090C0 # INVALID $t8, $zero, -0x6F40 # 00000000 "), + TEST_ENTRY_C(0x63801040, NULL, "vdiv.s S002, S400, S000"), + TEST_ENTRY_C(0x63801084, NULL, "vdiv.p C100, C400, C000"), + TEST_ENTRY_C(0x63809004, NULL, "vdiv.t C100, C400, C000"), + TEST_ENTRY_C(0x63809084, NULL, "vdiv.q C100, C400, C000"), + + /* VFPU1 */ + TEST_ENTRY_C(0x64001040, NULL, "vmul.s S002, S400, S000"), + TEST_ENTRY_C(0x640010C0, NULL, "vmul.p C002, C400, C000"), + TEST_ENTRY_C(0x64009040, NULL, "vmul.t C001, C400, C000"), + TEST_ENTRY_C(0x640090C0, NULL, "vmul.q C002, C400, C000"), + TEST_ENTRY_C(0x64801040, NULL, ".word 0x64801040 # INVALID $a0, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0x648010C0, NULL, "vdot.p S002, C400, C000"), + TEST_ENTRY_C(0x64809040, NULL, "vdot.t S002, C400, C000"), + TEST_ENTRY_C(0x648090C0, NULL, "vdot.q S002, C400, C000"), + TEST_ENTRY_C(0x65001040, NULL, ".word 0x65001040 # INVALID $t0, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0x650010C0, NULL, "vscl.p C002, C400, S000"), + TEST_ENTRY_C(0x65009040, NULL, "vscl.t C001, C400, S000"), + TEST_ENTRY_C(0x650090C0, NULL, "vscl.q C002, C400, S000"), + TEST_ENTRY_C(0x65801040, NULL, ".word 0x65801040 # INVALID $t4, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0x658010C0, NULL, ".word 0x658010C0 # INVALID $t4, $zero, 0x10C0 # 00000000 "), + TEST_ENTRY_C(0x65809040, NULL, ".word 0x65809040 # INVALID $t4, $zero, -0x6FC0 # 00000000 "), + TEST_ENTRY_C(0x658090C0, NULL, ".word 0x658090C0 # INVALID $t4, $zero, -0x6F40 # 00000000 "), + TEST_ENTRY_C(0x66001040, NULL, ".word 0x66001040 # INVALID $s0, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0x660010C0, NULL, "vhdp.p S002, C400, C000"), + TEST_ENTRY_C(0x66009040, NULL, "vhdp.t S002, C400, C000"), + TEST_ENTRY_C(0x660090C0, NULL, "vhdp.q S002, C400, C000"), + TEST_ENTRY_C(0x66801040, NULL, ".word 0x66801040 # INVALID $s4, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0x668010C0, NULL, ".word 0x668010C0 # INVALID $s4, $zero, 0x10C0 # 00000000 "), + TEST_ENTRY_C(0x66809040, NULL, "vcrs.t C001, C400, C000"), + TEST_ENTRY_C(0x668090C0, NULL, ".word 0x668090C0 # INVALID $s4, $zero, -0x6F40 # 00000000 "), + TEST_ENTRY_C(0x67001040, NULL, ".word 0x67001040 # INVALID $t8, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0x670010C0, NULL, "vdet.p S002, C400, C000"), + TEST_ENTRY_C(0x67009040, NULL, ".word 0x67009040 # INVALID $t8, $zero, -0x6FC0 # 00000000 "), + TEST_ENTRY_C(0x670090C0, NULL, ".word 0x670090C0 # INVALID $t8, $zero, -0x6F40 # 00000000 "), + TEST_ENTRY_C(0x67801040, NULL, ".word 0x67801040 # INVALID $gp, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0x678010C0, NULL, ".word 0x678010C0 # INVALID $gp, $zero, 0x10C0 # 00000000 "), + TEST_ENTRY_C(0x67809040, NULL, ".word 0x67809040 # INVALID $gp, $zero, -0x6FC0 # 00000000 "), + TEST_ENTRY_C(0x678090C0, NULL, ".word 0x678090C0 # INVALID $gp, $zero, -0x6F40 # 00000000 "), + + /* VFPU3 */ + TEST_ENTRY_C(0x6C401001, NULL, "vcmp.s eq, S400, S002"), + TEST_ENTRY_C(0x6C401081, NULL, "vcmp.p eq, C400, C002"), + TEST_ENTRY_C(0x6C409001, NULL, "vcmp.t eq, C400, C001"), + TEST_ENTRY_C(0x6C409081, NULL, "vcmp.q eq, C400, C002"), + TEST_ENTRY_C(0x6CC01001, NULL, ".word 0x6CC01001 # INVALID $a2, $zero, 0x1001 # 00000000 "), + TEST_ENTRY_C(0x6CC01081, NULL, ".word 0x6CC01081 # INVALID $a2, $zero, 0x1081 # 00000000 "), + TEST_ENTRY_C(0x6CC09001, NULL, ".word 0x6CC09001 # INVALID $a2, $zero, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0x6CC09081, NULL, ".word 0x6CC09081 # INVALID $a2, $zero, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0x6D401001, NULL, "vmin.s S010, S400, S002"), + TEST_ENTRY_C(0x6D401081, NULL, "vmin.p C010, C400, C002"), + TEST_ENTRY_C(0x6D409001, NULL, "vmin.t C010, C400, C001"), + TEST_ENTRY_C(0x6D409081, NULL, "vmin.q C010, C400, C002"), + TEST_ENTRY_C(0x6DC01001, NULL, "vmax.s S010, S400, S002"), + TEST_ENTRY_C(0x6DC01081, NULL, "vmax.p C010, C400, C002"), + TEST_ENTRY_C(0x6DC09001, NULL, "vmax.t C010, C400, C001"), + TEST_ENTRY_C(0x6DC09081, NULL, "vmax.q C010, C400, C002"), + TEST_ENTRY_C(0x6E401001, NULL, ".word 0x6E401001 # INVALID $s2, $zero, 0x1001 # 00000000 "), + TEST_ENTRY_C(0x6E401081, NULL, ".word 0x6E401081 # INVALID $s2, $zero, 0x1081 # 00000000 "), + TEST_ENTRY_C(0x6E409001, NULL, ".word 0x6E409001 # INVALID $s2, $zero, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0x6E409081, NULL, ".word 0x6E409081 # INVALID $s2, $zero, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0x6EC01001, NULL, "vscmp.s S010, S400, S002"), + TEST_ENTRY_C(0x6EC01081, NULL, "vscmp.p C010, C400, C002"), + TEST_ENTRY_C(0x6EC09001, NULL, "vscmp.t C010, C400, C001"), + TEST_ENTRY_C(0x6EC09081, NULL, "vscmp.q C010, C400, C002"), + TEST_ENTRY_C(0x6F401001, NULL, "vsge.s S010, S400, S002"), + TEST_ENTRY_C(0x6F401081, NULL, "vsge.p C010, C400, C002"), + TEST_ENTRY_C(0x6F409001, NULL, "vsge.t C010, C400, C001"), + TEST_ENTRY_C(0x6F409081, NULL, "vsge.q C010, C400, C002"), + TEST_ENTRY_C(0x6FC01001, NULL, "vslt.s S010, S400, S002"), + TEST_ENTRY_C(0x6FC01081, NULL, "vslt.p C010, C400, C002"), + TEST_ENTRY_C(0x6FC09001, NULL, "vslt.t C010, C400, C001"), + TEST_ENTRY_C(0x6FC09081, NULL, "vslt.q C010, C400, C002"), + + /* vcmp all conds */ + TEST_ENTRY_C(0x6C400800, NULL, "vcmp.s fl, S200, S002"), + TEST_ENTRY_C(0x6C400880, NULL, "vcmp.p fl, C200, C002"), + TEST_ENTRY_C(0x6C408800, NULL, "vcmp.t fl, C200, C001"), + TEST_ENTRY_C(0x6C408880, NULL, "vcmp.q fl, C200, C002"), + TEST_ENTRY_C(0x6C400801, NULL, "vcmp.s eq, S200, S002"), + TEST_ENTRY_C(0x6C400881, NULL, "vcmp.p eq, C200, C002"), + TEST_ENTRY_C(0x6C408801, NULL, "vcmp.t eq, C200, C001"), + TEST_ENTRY_C(0x6C408881, NULL, "vcmp.q eq, C200, C002"), + TEST_ENTRY_C(0x6C400802, NULL, "vcmp.s lt, S200, S002"), + TEST_ENTRY_C(0x6C400882, NULL, "vcmp.p lt, C200, C002"), + TEST_ENTRY_C(0x6C408802, NULL, "vcmp.t lt, C200, C001"), + TEST_ENTRY_C(0x6C408882, NULL, "vcmp.q lt, C200, C002"), + TEST_ENTRY_C(0x6C400803, NULL, "vcmp.s le, S200, S002"), + TEST_ENTRY_C(0x6C400883, NULL, "vcmp.p le, C200, C002"), + TEST_ENTRY_C(0x6C408803, NULL, "vcmp.t le, C200, C001"), + TEST_ENTRY_C(0x6C408883, NULL, "vcmp.q le, C200, C002"), + TEST_ENTRY_C(0x6C400804, NULL, "vcmp.s tr, S200, S002"), + TEST_ENTRY_C(0x6C400884, NULL, "vcmp.p tr, C200, C002"), + TEST_ENTRY_C(0x6C408804, NULL, "vcmp.t tr, C200, C001"), + TEST_ENTRY_C(0x6C408884, NULL, "vcmp.q tr, C200, C002"), + TEST_ENTRY_C(0x6C400805, NULL, "vcmp.s ne, S200, S002"), + TEST_ENTRY_C(0x6C400885, NULL, "vcmp.p ne, C200, C002"), + TEST_ENTRY_C(0x6C408805, NULL, "vcmp.t ne, C200, C001"), + TEST_ENTRY_C(0x6C408885, NULL, "vcmp.q ne, C200, C002"), + TEST_ENTRY_C(0x6C400806, NULL, "vcmp.s ge, S200, S002"), + TEST_ENTRY_C(0x6C400886, NULL, "vcmp.p ge, C200, C002"), + TEST_ENTRY_C(0x6C408806, NULL, "vcmp.t ge, C200, C001"), + TEST_ENTRY_C(0x6C408886, NULL, "vcmp.q ge, C200, C002"), + TEST_ENTRY_C(0x6C400807, NULL, "vcmp.s gt, S200, S002"), + TEST_ENTRY_C(0x6C400887, NULL, "vcmp.p gt, C200, C002"), + TEST_ENTRY_C(0x6C408807, NULL, "vcmp.t gt, C200, C001"), + TEST_ENTRY_C(0x6C408887, NULL, "vcmp.q gt, C200, C002"), + TEST_ENTRY_C(0x6C400808, NULL, "vcmp.s ez, S200, S002"), + TEST_ENTRY_C(0x6C400888, NULL, "vcmp.p ez, C200, C002"), + TEST_ENTRY_C(0x6C408808, NULL, "vcmp.t ez, C200, C001"), + TEST_ENTRY_C(0x6C408888, NULL, "vcmp.q ez, C200, C002"), + TEST_ENTRY_C(0x6C400809, NULL, "vcmp.s en, S200, S002"), + TEST_ENTRY_C(0x6C400889, NULL, "vcmp.p en, C200, C002"), + TEST_ENTRY_C(0x6C408809, NULL, "vcmp.t en, C200, C001"), + TEST_ENTRY_C(0x6C408889, NULL, "vcmp.q en, C200, C002"), + TEST_ENTRY_C(0x6C40080A, NULL, "vcmp.s ei, S200, S002"), + TEST_ENTRY_C(0x6C40088A, NULL, "vcmp.p ei, C200, C002"), + TEST_ENTRY_C(0x6C40880A, NULL, "vcmp.t ei, C200, C001"), + TEST_ENTRY_C(0x6C40888A, NULL, "vcmp.q ei, C200, C002"), + TEST_ENTRY_C(0x6C40080B, NULL, "vcmp.s es, S200, S002"), + TEST_ENTRY_C(0x6C40088B, NULL, "vcmp.p es, C200, C002"), + TEST_ENTRY_C(0x6C40880B, NULL, "vcmp.t es, C200, C001"), + TEST_ENTRY_C(0x6C40888B, NULL, "vcmp.q es, C200, C002"), + TEST_ENTRY_C(0x6C40080C, NULL, "vcmp.s nz, S200, S002"), + TEST_ENTRY_C(0x6C40088C, NULL, "vcmp.p nz, C200, C002"), + TEST_ENTRY_C(0x6C40880C, NULL, "vcmp.t nz, C200, C001"), + TEST_ENTRY_C(0x6C40888C, NULL, "vcmp.q nz, C200, C002"), + TEST_ENTRY_C(0x6C40080D, NULL, "vcmp.s nn, S200, S002"), + TEST_ENTRY_C(0x6C40088D, NULL, "vcmp.p nn, C200, C002"), + TEST_ENTRY_C(0x6C40880D, NULL, "vcmp.t nn, C200, C001"), + TEST_ENTRY_C(0x6C40888D, NULL, "vcmp.q nn, C200, C002"), + TEST_ENTRY_C(0x6C40080E, NULL, "vcmp.s ni, S200, S002"), + TEST_ENTRY_C(0x6C40088E, NULL, "vcmp.p ni, C200, C002"), + TEST_ENTRY_C(0x6C40880E, NULL, "vcmp.t ni, C200, C001"), + TEST_ENTRY_C(0x6C40888E, NULL, "vcmp.q ni, C200, C002"), + TEST_ENTRY_C(0x6C40080F, NULL, "vcmp.s ns, S200, S002"), + TEST_ENTRY_C(0x6C40088F, NULL, "vcmp.p ns, C200, C002"), + TEST_ENTRY_C(0x6C40880F, NULL, "vcmp.t ns, C200, C001"), + TEST_ENTRY_C(0x6C40888F, NULL, "vcmp.q ns, C200, C002"), + + /* vcmp_zero */ + TEST_ENTRY_C(0x6C000000, NULL, "vcmp.s fl"), + TEST_ENTRY_C(0x6C000080, NULL, "vcmp.p fl"), + TEST_ENTRY_C(0x6C008000, NULL, "vcmp.t fl"), + TEST_ENTRY_C(0x6C008080, NULL, "vcmp.q fl"), + TEST_ENTRY_C(0x6C000001, NULL, "vcmp.s eq, S000, S000"), + TEST_ENTRY_C(0x6C000081, NULL, "vcmp.p eq, C000, C000"), + TEST_ENTRY_C(0x6C008001, NULL, "vcmp.t eq, C000, C000"), + TEST_ENTRY_C(0x6C008081, NULL, "vcmp.q eq, C000, C000"), + TEST_ENTRY_C(0x6C000002, NULL, "vcmp.s lt, S000, S000"), + TEST_ENTRY_C(0x6C000082, NULL, "vcmp.p lt, C000, C000"), + TEST_ENTRY_C(0x6C008002, NULL, "vcmp.t lt, C000, C000"), + TEST_ENTRY_C(0x6C008082, NULL, "vcmp.q lt, C000, C000"), + TEST_ENTRY_C(0x6C000003, NULL, "vcmp.s le, S000, S000"), + TEST_ENTRY_C(0x6C000083, NULL, "vcmp.p le, C000, C000"), + TEST_ENTRY_C(0x6C008003, NULL, "vcmp.t le, C000, C000"), + TEST_ENTRY_C(0x6C008083, NULL, "vcmp.q le, C000, C000"), + TEST_ENTRY_C(0x6C000004, NULL, "vcmp.s tr"), + TEST_ENTRY_C(0x6C000084, NULL, "vcmp.p tr"), + TEST_ENTRY_C(0x6C008004, NULL, "vcmp.t tr"), + TEST_ENTRY_C(0x6C008084, NULL, "vcmp.q tr"), + TEST_ENTRY_C(0x6C000005, NULL, "vcmp.s ne, S000, S000"), + TEST_ENTRY_C(0x6C000085, NULL, "vcmp.p ne, C000, C000"), + TEST_ENTRY_C(0x6C008005, NULL, "vcmp.t ne, C000, C000"), + TEST_ENTRY_C(0x6C008085, NULL, "vcmp.q ne, C000, C000"), + TEST_ENTRY_C(0x6C000006, NULL, "vcmp.s ge, S000, S000"), + TEST_ENTRY_C(0x6C000086, NULL, "vcmp.p ge, C000, C000"), + TEST_ENTRY_C(0x6C008006, NULL, "vcmp.t ge, C000, C000"), + TEST_ENTRY_C(0x6C008086, NULL, "vcmp.q ge, C000, C000"), + TEST_ENTRY_C(0x6C000007, NULL, "vcmp.s gt, S000, S000"), + TEST_ENTRY_C(0x6C000087, NULL, "vcmp.p gt, C000, C000"), + TEST_ENTRY_C(0x6C008007, NULL, "vcmp.t gt, C000, C000"), + TEST_ENTRY_C(0x6C008087, NULL, "vcmp.q gt, C000, C000"), + TEST_ENTRY_C(0x6C000008, NULL, "vcmp.s ez, S000"), + TEST_ENTRY_C(0x6C000088, NULL, "vcmp.p ez, C000"), + TEST_ENTRY_C(0x6C008008, NULL, "vcmp.t ez, C000"), + TEST_ENTRY_C(0x6C008088, NULL, "vcmp.q ez, C000"), + TEST_ENTRY_C(0x6C000009, NULL, "vcmp.s en, S000"), + TEST_ENTRY_C(0x6C000089, NULL, "vcmp.p en, C000"), + TEST_ENTRY_C(0x6C008009, NULL, "vcmp.t en, C000"), + TEST_ENTRY_C(0x6C008089, NULL, "vcmp.q en, C000"), + TEST_ENTRY_C(0x6C00000A, NULL, "vcmp.s ei, S000"), + TEST_ENTRY_C(0x6C00008A, NULL, "vcmp.p ei, C000"), + TEST_ENTRY_C(0x6C00800A, NULL, "vcmp.t ei, C000"), + TEST_ENTRY_C(0x6C00808A, NULL, "vcmp.q ei, C000"), + TEST_ENTRY_C(0x6C00000B, NULL, "vcmp.s es, S000"), + TEST_ENTRY_C(0x6C00008B, NULL, "vcmp.p es, C000"), + TEST_ENTRY_C(0x6C00800B, NULL, "vcmp.t es, C000"), + TEST_ENTRY_C(0x6C00808B, NULL, "vcmp.q es, C000"), + TEST_ENTRY_C(0x6C00000C, NULL, "vcmp.s nz, S000"), + TEST_ENTRY_C(0x6C00008C, NULL, "vcmp.p nz, C000"), + TEST_ENTRY_C(0x6C00800C, NULL, "vcmp.t nz, C000"), + TEST_ENTRY_C(0x6C00808C, NULL, "vcmp.q nz, C000"), + TEST_ENTRY_C(0x6C00000D, NULL, "vcmp.s nn, S000"), + TEST_ENTRY_C(0x6C00008D, NULL, "vcmp.p nn, C000"), + TEST_ENTRY_C(0x6C00800D, NULL, "vcmp.t nn, C000"), + TEST_ENTRY_C(0x6C00808D, NULL, "vcmp.q nn, C000"), + TEST_ENTRY_C(0x6C00000E, NULL, "vcmp.s ni, S000"), + TEST_ENTRY_C(0x6C00008E, NULL, "vcmp.p ni, C000"), + TEST_ENTRY_C(0x6C00800E, NULL, "vcmp.t ni, C000"), + TEST_ENTRY_C(0x6C00808E, NULL, "vcmp.q ni, C000"), + TEST_ENTRY_C(0x6C00000F, NULL, "vcmp.s ns, S000"), + TEST_ENTRY_C(0x6C00008F, NULL, "vcmp.p ns, C000"), + TEST_ENTRY_C(0x6C00800F, NULL, "vcmp.t ns, C000"), + TEST_ENTRY_C(0x6C00808F, NULL, "vcmp.q ns, C000"), + + /* COP2 */ + TEST_ENTRY_C(0x48640080, NULL, "mfvc $a0, $128"), + TEST_ENTRY_C(0x48640081, NULL, "mfvc $a0, $129"), + TEST_ENTRY_C(0x48640082, NULL, "mfvc $a0, $130"), + TEST_ENTRY_C(0x48640083, NULL, "mfvc $a0, $131"), + TEST_ENTRY_C(0x48640084, NULL, "mfvc $a0, $132"), + TEST_ENTRY_C(0x48640085, NULL, "mfvc $a0, $133"), + TEST_ENTRY_C(0x48640086, NULL, "mfvc $a0, $134"), + TEST_ENTRY_C(0x48640087, NULL, "mfvc $a0, $135"), + TEST_ENTRY_C(0x48640088, NULL, "mfvc $a0, $136"), + TEST_ENTRY_C(0x48640089, NULL, "mfvc $a0, $137"), + TEST_ENTRY_C(0x4864008A, NULL, "mfvc $a0, $138"), + TEST_ENTRY_C(0x4864008B, NULL, "mfvc $a0, $139"), + TEST_ENTRY_C(0x4864008C, NULL, "mfvc $a0, $140"), + TEST_ENTRY_C(0x4864008D, NULL, "mfvc $a0, $141"), + TEST_ENTRY_C(0x4864008E, NULL, "mfvc $a0, $142"), + TEST_ENTRY_C(0x4864008F, NULL, "mfvc $a0, $143"), + TEST_ENTRY_C(0x48640090, NULL, ".word 0x48640090 # INVALID $v1, $a0, 0x90 # 00000000 "), + TEST_ENTRY_C(0x48640091, NULL, ".word 0x48640091 # INVALID $v1, $a0, 0x91 # 00000000 "), + TEST_ENTRY_C(0x48640092, NULL, ".word 0x48640092 # INVALID $v1, $a0, 0x92 # 00000000 "), + TEST_ENTRY_C(0x486000FF, NULL, "vsync2"), + TEST_ENTRY_C(0x48650000, NULL, "mfv $a1, S000"), + TEST_ENTRY_C(0x48650081, NULL, "mfvc $a1, $129"), + TEST_ENTRY_C(0x48E50000, NULL, "mtv $a1, S000"), + TEST_ENTRY_C(0x48E50081, NULL, "mtvc $a1, $129"), + + /* VFPU4 FMT0 */ + TEST_ENTRY_C(0xD0001001, NULL, "vmov.s S010, S400"), + TEST_ENTRY_C(0xD0001081, NULL, "vmov.p C010, C400"), + TEST_ENTRY_C(0xD0009001, NULL, "vmov.t C010, C400"), + TEST_ENTRY_C(0xD0009081, NULL, "vmov.q C010, C400"), + TEST_ENTRY_C(0xD0011001, NULL, "vabs.s S010, S400"), + TEST_ENTRY_C(0xD0011081, NULL, "vabs.p C010, C400"), + TEST_ENTRY_C(0xD0019001, NULL, "vabs.t C010, C400"), + TEST_ENTRY_C(0xD0019081, NULL, "vabs.q C010, C400"), + TEST_ENTRY_C(0xD0021001, NULL, "vneg.s S010, S400"), + TEST_ENTRY_C(0xD0021081, NULL, "vneg.p C010, C400"), + TEST_ENTRY_C(0xD0029001, NULL, "vneg.t C010, C400"), + TEST_ENTRY_C(0xD0029081, NULL, "vneg.q C010, C400"), + TEST_ENTRY_C(0xD0031001, NULL, ".word 0xD0031001 # INVALID $zero, $v1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0031081, NULL, ".word 0xD0031081 # vidt.p C010 # 00001000 "), + TEST_ENTRY_C(0xD0030081, NULL, "vidt.p C010"), + TEST_ENTRY_C(0xD0039001, NULL, ".word 0xD0039001 # INVALID $zero, $v1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0039081, NULL, ".word 0xD0039081 # vidt.q C010 # 00001000 "), + TEST_ENTRY_C(0xD0038081, NULL, "vidt.q C010"), + TEST_ENTRY_C(0xD0041001, NULL, "vsat0.s S010, S400"), + TEST_ENTRY_C(0xD0041081, NULL, "vsat0.p C010, C400"), + TEST_ENTRY_C(0xD0049001, NULL, "vsat0.t C010, C400"), + TEST_ENTRY_C(0xD0049081, NULL, "vsat0.q C010, C400"), + TEST_ENTRY_C(0xD0051001, NULL, "vsat1.s S010, S400"), + TEST_ENTRY_C(0xD0051081, NULL, "vsat1.p C010, C400"), + TEST_ENTRY_C(0xD0059001, NULL, "vsat1.t C010, C400"), + TEST_ENTRY_C(0xD0059081, NULL, "vsat1.q C010, C400"), + TEST_ENTRY_C(0xD0061001, NULL, ".word 0xD0061001 # vzero.s S010 # 00001000 "), + TEST_ENTRY_C(0xD0061081, NULL, ".word 0xD0061081 # vzero.p C010 # 00001000 "), + TEST_ENTRY_C(0xD0069001, NULL, ".word 0xD0069001 # vzero.t C010 # 00001000 "), + TEST_ENTRY_C(0xD0069081, NULL, ".word 0xD0069081 # vzero.q C010 # 00001000 "), + TEST_ENTRY_C(0xD0070001, NULL, "vone.s S010"), + TEST_ENTRY_C(0xD0070081, NULL, "vone.p C010"), + TEST_ENTRY_C(0xD0078001, NULL, "vone.t C010"), + TEST_ENTRY_C(0xD0078081, NULL, "vone.q C010"), + TEST_ENTRY_C(0xD0081001, NULL, ".word 0xD0081001 # INVALID $zero, $t0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0081081, NULL, ".word 0xD0081081 # INVALID $zero, $t0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0089001, NULL, ".word 0xD0089001 # INVALID $zero, $t0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0089081, NULL, ".word 0xD0089081 # INVALID $zero, $t0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0091001, NULL, ".word 0xD0091001 # INVALID $zero, $t1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0091081, NULL, ".word 0xD0091081 # INVALID $zero, $t1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0099001, NULL, ".word 0xD0099001 # INVALID $zero, $t1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0099081, NULL, ".word 0xD0099081 # INVALID $zero, $t1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD00A1001, NULL, ".word 0xD00A1001 # INVALID $zero, $t2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD00A1081, NULL, ".word 0xD00A1081 # INVALID $zero, $t2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD00A9001, NULL, ".word 0xD00A9001 # INVALID $zero, $t2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD00A9081, NULL, ".word 0xD00A9081 # INVALID $zero, $t2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD00B1001, NULL, ".word 0xD00B1001 # INVALID $zero, $t3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD00B1081, NULL, ".word 0xD00B1081 # INVALID $zero, $t3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD00B9001, NULL, ".word 0xD00B9001 # INVALID $zero, $t3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD00B9081, NULL, ".word 0xD00B9081 # INVALID $zero, $t3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD00C1001, NULL, ".word 0xD00C1001 # INVALID $zero, $t4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD00C1081, NULL, ".word 0xD00C1081 # INVALID $zero, $t4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD00C9001, NULL, ".word 0xD00C9001 # INVALID $zero, $t4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD00C9081, NULL, ".word 0xD00C9081 # INVALID $zero, $t4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD00D1001, NULL, ".word 0xD00D1001 # INVALID $zero, $t5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD00D1081, NULL, ".word 0xD00D1081 # INVALID $zero, $t5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD00D9001, NULL, ".word 0xD00D9001 # INVALID $zero, $t5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD00D9081, NULL, ".word 0xD00D9081 # INVALID $zero, $t5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD00E1001, NULL, ".word 0xD00E1001 # INVALID $zero, $t6, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD00E1081, NULL, ".word 0xD00E1081 # INVALID $zero, $t6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD00E9001, NULL, ".word 0xD00E9001 # INVALID $zero, $t6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD00E9081, NULL, ".word 0xD00E9081 # INVALID $zero, $t6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD00F1001, NULL, ".word 0xD00F1001 # INVALID $zero, $t7, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD00F1081, NULL, ".word 0xD00F1081 # INVALID $zero, $t7, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD00F9001, NULL, ".word 0xD00F9001 # INVALID $zero, $t7, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD00F9081, NULL, ".word 0xD00F9081 # INVALID $zero, $t7, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0101001, NULL, "vrcp.s S010, S400"), + TEST_ENTRY_C(0xD0101081, NULL, "vrcp.p C010, C400"), + TEST_ENTRY_C(0xD0109001, NULL, "vrcp.t C010, C400"), + TEST_ENTRY_C(0xD0109081, NULL, "vrcp.q C010, C400"), + TEST_ENTRY_C(0xD0111001, NULL, "vrsq.s S010, S400"), + TEST_ENTRY_C(0xD0111081, NULL, "vrsq.p C010, C400"), + TEST_ENTRY_C(0xD0119001, NULL, "vrsq.t C010, C400"), + TEST_ENTRY_C(0xD0119081, NULL, "vrsq.q C010, C400"), + TEST_ENTRY_C(0xD0121001, NULL, "vsin.s S010, S400"), + TEST_ENTRY_C(0xD0121081, NULL, "vsin.p C010, C400"), + TEST_ENTRY_C(0xD0129001, NULL, "vsin.t C010, C400"), + TEST_ENTRY_C(0xD0129081, NULL, "vsin.q C010, C400"), + TEST_ENTRY_C(0xD0131001, NULL, "vcos.s S010, S400"), + TEST_ENTRY_C(0xD0131081, NULL, "vcos.p C010, C400"), + TEST_ENTRY_C(0xD0139001, NULL, "vcos.t C010, C400"), + TEST_ENTRY_C(0xD0139081, NULL, "vcos.q C010, C400"), + TEST_ENTRY_C(0xD0141001, NULL, "vexp2.s S010, S400"), + TEST_ENTRY_C(0xD0141081, NULL, "vexp2.p C010, C400"), + TEST_ENTRY_C(0xD0149001, NULL, "vexp2.t C010, C400"), + TEST_ENTRY_C(0xD0149081, NULL, "vexp2.q C010, C400"), + TEST_ENTRY_C(0xD0151001, NULL, "vlog2.s S010, S400"), + TEST_ENTRY_C(0xD0151081, NULL, "vlog2.p C010, C400"), + TEST_ENTRY_C(0xD0159001, NULL, "vlog2.t C010, C400"), + TEST_ENTRY_C(0xD0159081, NULL, "vlog2.q C010, C400"), + TEST_ENTRY_C(0xD0161001, NULL, "vsqrt.s S010, S400"), + TEST_ENTRY_C(0xD0161081, NULL, "vsqrt.p C010, C400"), + TEST_ENTRY_C(0xD0169001, NULL, "vsqrt.t C010, C400"), + TEST_ENTRY_C(0xD0169081, NULL, "vsqrt.q C010, C400"), + TEST_ENTRY_C(0xD0171001, NULL, "vasin.s S010, S400"), + TEST_ENTRY_C(0xD0171081, NULL, "vasin.p C010, C400"), + TEST_ENTRY_C(0xD0179001, NULL, "vasin.t C010, C400"), + TEST_ENTRY_C(0xD0179081, NULL, "vasin.q C010, C400"), + TEST_ENTRY_C(0xD0181001, NULL, "vnrcp.s S010, S400"), + TEST_ENTRY_C(0xD0181081, NULL, "vnrcp.p C010, C400"), + TEST_ENTRY_C(0xD0189001, NULL, "vnrcp.t C010, C400"), + TEST_ENTRY_C(0xD0189081, NULL, "vnrcp.q C010, C400"), + TEST_ENTRY_C(0xD0191001, NULL, ".word 0xD0191001 # INVALID $zero, $t9, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0191081, NULL, ".word 0xD0191081 # INVALID $zero, $t9, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0199001, NULL, ".word 0xD0199001 # INVALID $zero, $t9, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0199081, NULL, ".word 0xD0199081 # INVALID $zero, $t9, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD01A1001, NULL, "vnsin.s S010, S400"), + TEST_ENTRY_C(0xD01A1081, NULL, "vnsin.p C010, C400"), + TEST_ENTRY_C(0xD01A9001, NULL, "vnsin.t C010, C400"), + TEST_ENTRY_C(0xD01A9081, NULL, "vnsin.q C010, C400"), + TEST_ENTRY_C(0xD01B1001, NULL, ".word 0xD01B1001 # INVALID $zero, $k1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD01B1081, NULL, ".word 0xD01B1081 # INVALID $zero, $k1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD01B9001, NULL, ".word 0xD01B9001 # INVALID $zero, $k1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD01B9081, NULL, ".word 0xD01B9081 # INVALID $zero, $k1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD01C1001, NULL, "vrexp2.s S010, S400"), + TEST_ENTRY_C(0xD01C1081, NULL, "vrexp2.p C010, C400"), + TEST_ENTRY_C(0xD01C9001, NULL, "vrexp2.t C010, C400"), + TEST_ENTRY_C(0xD01C9081, NULL, "vrexp2.q C010, C400"), + TEST_ENTRY_C(0xD01D1001, NULL, ".word 0xD01D1001 # INVALID $zero, $sp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD01D1081, NULL, ".word 0xD01D1081 # INVALID $zero, $sp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD01D9001, NULL, ".word 0xD01D9001 # INVALID $zero, $sp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD01D9081, NULL, ".word 0xD01D9081 # INVALID $zero, $sp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD01E1001, NULL, ".word 0xD01E1001 # INVALID $zero, $fp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD01E1081, NULL, ".word 0xD01E1081 # INVALID $zero, $fp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD01E9001, NULL, ".word 0xD01E9001 # INVALID $zero, $fp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD01E9081, NULL, ".word 0xD01E9081 # INVALID $zero, $fp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD01F1001, NULL, ".word 0xD01F1001 # INVALID $zero, $ra, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD01F1081, NULL, ".word 0xD01F1081 # INVALID $zero, $ra, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD01F9001, NULL, ".word 0xD01F9001 # INVALID $zero, $ra, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD01F9081, NULL, ".word 0xD01F9081 # INVALID $zero, $ra, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0201000, NULL, "vrnds.s S400"), + TEST_ENTRY_C(0xD0201001, NULL, ".word 0xD0201001 # vrnds.s S400 # 00000001 "), + TEST_ENTRY_C(0xD0201081, NULL, ".word 0xD0201081 # INVALID $at, $zero, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0209001, NULL, ".word 0xD0209001 # INVALID $at, $zero, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0209081, NULL, ".word 0xD0209081 # INVALID $at, $zero, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0210001, NULL, "vrndi.s S010"), + TEST_ENTRY_C(0xD0210081, NULL, "vrndi.p C010"), + TEST_ENTRY_C(0xD0218001, NULL, "vrndi.t C010"), + TEST_ENTRY_C(0xD0218081, NULL, "vrndi.q C010"), + TEST_ENTRY_C(0xD0211001, NULL, ".word 0xD0211001 # vrndi.s S010 # 00001000 "), + TEST_ENTRY_C(0xD0211081, NULL, ".word 0xD0211081 # vrndi.p C010 # 00001000 "), + TEST_ENTRY_C(0xD0219001, NULL, ".word 0xD0219001 # vrndi.t C010 # 00001000 "), + TEST_ENTRY_C(0xD0219081, NULL, ".word 0xD0219081 # vrndi.q C010 # 00001000 "), + TEST_ENTRY_C(0xD0220001, NULL, "vrndf1.s S010"), + TEST_ENTRY_C(0xD0220081, NULL, "vrndf1.p C010"), + TEST_ENTRY_C(0xD0228001, NULL, "vrndf1.t C010"), + TEST_ENTRY_C(0xD0228081, NULL, "vrndf1.q C010"), + TEST_ENTRY_C(0xD0221001, NULL, ".word 0xD0221001 # vrndf1.s S010 # 00001000 "), + TEST_ENTRY_C(0xD0221081, NULL, ".word 0xD0221081 # vrndf1.p C010 # 00001000 "), + TEST_ENTRY_C(0xD0229001, NULL, ".word 0xD0229001 # vrndf1.t C010 # 00001000 "), + TEST_ENTRY_C(0xD0229081, NULL, ".word 0xD0229081 # vrndf1.q C010 # 00001000 "), + TEST_ENTRY_C(0xD0230001, NULL, "vrndf2.s S010"), + TEST_ENTRY_C(0xD0230081, NULL, "vrndf2.p C010"), + TEST_ENTRY_C(0xD0238001, NULL, "vrndf2.t C010"), + TEST_ENTRY_C(0xD0238081, NULL, "vrndf2.q C010"), + TEST_ENTRY_C(0xD0231001, NULL, ".word 0xD0231001 # vrndf2.s S010 # 00001000 "), + TEST_ENTRY_C(0xD0231081, NULL, ".word 0xD0231081 # vrndf2.p C010 # 00001000 "), + TEST_ENTRY_C(0xD0239001, NULL, ".word 0xD0239001 # vrndf2.t C010 # 00001000 "), + TEST_ENTRY_C(0xD0239081, NULL, ".word 0xD0239081 # vrndf2.q C010 # 00001000 "), + TEST_ENTRY_C(0xD0241001, NULL, ".word 0xD0241001 # INVALID $at, $a0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0241081, NULL, ".word 0xD0241081 # INVALID $at, $a0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0249001, NULL, ".word 0xD0249001 # INVALID $at, $a0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0249081, NULL, ".word 0xD0249081 # INVALID $at, $a0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0251001, NULL, ".word 0xD0251001 # INVALID $at, $a1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0251081, NULL, ".word 0xD0251081 # INVALID $at, $a1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0259001, NULL, ".word 0xD0259001 # INVALID $at, $a1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0259081, NULL, ".word 0xD0259081 # INVALID $at, $a1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0261001, NULL, ".word 0xD0261001 # INVALID $at, $a2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0261081, NULL, ".word 0xD0261081 # INVALID $at, $a2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0269001, NULL, ".word 0xD0269001 # INVALID $at, $a2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0269081, NULL, ".word 0xD0269081 # INVALID $at, $a2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0271001, NULL, ".word 0xD0271001 # INVALID $at, $a3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0271081, NULL, ".word 0xD0271081 # INVALID $at, $a3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0279001, NULL, ".word 0xD0279001 # INVALID $at, $a3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0279081, NULL, ".word 0xD0279081 # INVALID $at, $a3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0281001, NULL, ".word 0xD0281001 # INVALID $at, $t0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0281081, NULL, ".word 0xD0281081 # INVALID $at, $t0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0289001, NULL, ".word 0xD0289001 # INVALID $at, $t0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0289081, NULL, ".word 0xD0289081 # INVALID $at, $t0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0291001, NULL, ".word 0xD0291001 # INVALID $at, $t1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0291081, NULL, ".word 0xD0291081 # INVALID $at, $t1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0299001, NULL, ".word 0xD0299001 # INVALID $at, $t1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0299081, NULL, ".word 0xD0299081 # INVALID $at, $t1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD02A1001, NULL, ".word 0xD02A1001 # INVALID $at, $t2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD02A1081, NULL, ".word 0xD02A1081 # INVALID $at, $t2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD02A9001, NULL, ".word 0xD02A9001 # INVALID $at, $t2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD02A9081, NULL, ".word 0xD02A9081 # INVALID $at, $t2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD02B1001, NULL, ".word 0xD02B1001 # INVALID $at, $t3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD02B1081, NULL, ".word 0xD02B1081 # INVALID $at, $t3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD02B9001, NULL, ".word 0xD02B9001 # INVALID $at, $t3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD02B9081, NULL, ".word 0xD02B9081 # INVALID $at, $t3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD02C1001, NULL, ".word 0xD02C1001 # INVALID $at, $t4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD02C1081, NULL, ".word 0xD02C1081 # INVALID $at, $t4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD02C9001, NULL, ".word 0xD02C9001 # INVALID $at, $t4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD02C9081, NULL, ".word 0xD02C9081 # INVALID $at, $t4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD02D1001, NULL, ".word 0xD02D1001 # INVALID $at, $t5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD02D1081, NULL, ".word 0xD02D1081 # INVALID $at, $t5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD02D9001, NULL, ".word 0xD02D9001 # INVALID $at, $t5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD02D9081, NULL, ".word 0xD02D9081 # INVALID $at, $t5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD02E1001, NULL, ".word 0xD02E1001 # INVALID $at, $t6, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD02E1081, NULL, ".word 0xD02E1081 # INVALID $at, $t6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD02E9001, NULL, ".word 0xD02E9001 # INVALID $at, $t6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD02E9081, NULL, ".word 0xD02E9081 # INVALID $at, $t6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD02F1001, NULL, ".word 0xD02F1001 # INVALID $at, $t7, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD02F1081, NULL, ".word 0xD02F1081 # INVALID $at, $t7, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD02F9001, NULL, ".word 0xD02F9001 # INVALID $at, $t7, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD02F9081, NULL, ".word 0xD02F9081 # INVALID $at, $t7, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0301001, NULL, ".word 0xD0301001 # INVALID $at, $s0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0301081, NULL, ".word 0xD0301081 # INVALID $at, $s0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0309001, NULL, ".word 0xD0309001 # INVALID $at, $s0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0309081, NULL, ".word 0xD0309081 # INVALID $at, $s0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0311001, NULL, ".word 0xD0311001 # INVALID $at, $s1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0311081, NULL, ".word 0xD0311081 # INVALID $at, $s1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0319001, NULL, ".word 0xD0319001 # INVALID $at, $s1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0319081, NULL, ".word 0xD0319081 # INVALID $at, $s1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0321001, NULL, ".word 0xD0321001 # INVALID $at, $s2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0321081, NULL, "vf2h.p S010, C400"), + TEST_ENTRY_C(0xD0329001, NULL, ".word 0xD0329001 # INVALID $at, $s2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0329081, NULL, "vf2h.q C010, C400"), + TEST_ENTRY_C(0xD0331001, NULL, "vh2f.s C010, S400"), + TEST_ENTRY_C(0xD0331081, NULL, "vh2f.p C010, C400"), + TEST_ENTRY_C(0xD0339001, NULL, ".word 0xD0339001 # INVALID $at, $s3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0339081, NULL, ".word 0xD0339081 # INVALID $at, $s3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0341001, NULL, ".word 0xD0341001 # INVALID $at, $s4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0341081, NULL, ".word 0xD0341081 # INVALID $at, $s4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0349001, NULL, ".word 0xD0349001 # INVALID $at, $s4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0349081, NULL, ".word 0xD0349081 # INVALID $at, $s4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0351001, NULL, ".word 0xD0351001 # INVALID $at, $s5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0351081, NULL, ".word 0xD0351081 # INVALID $at, $s5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0359001, NULL, ".word 0xD0359001 # INVALID $at, $s5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0359081, NULL, ".word 0xD0359081 # INVALID $at, $s5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0361001, NULL, "vsbz.s S010, S400"), + TEST_ENTRY_C(0xD0361081, NULL, ".word 0xD0361081 # INVALID $at, $s6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0369001, NULL, ".word 0xD0369001 # INVALID $at, $s6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0369081, NULL, ".word 0xD0369081 # INVALID $at, $s6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0371001, NULL, "vlgb.s S010, S400"), + TEST_ENTRY_C(0xD0371081, NULL, ".word 0xD0371081 # INVALID $at, $s7, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0379001, NULL, ".word 0xD0379001 # INVALID $at, $s7, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0379081, NULL, ".word 0xD0379081 # INVALID $at, $s7, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0381001, NULL, "vuc2ifs.s C010, S400"), + TEST_ENTRY_C(0xD0381081, NULL, ".word 0xD0381081 # INVALID $at, $t8, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0389001, NULL, ".word 0xD0389001 # INVALID $at, $t8, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0389081, NULL, ".word 0xD0389081 # INVALID $at, $t8, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0391001, NULL, "vc2i.s C010, S400"), + TEST_ENTRY_C(0xD0391081, NULL, ".word 0xD0391081 # INVALID $at, $t9, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0399001, NULL, ".word 0xD0399001 # INVALID $at, $t9, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0399081, NULL, ".word 0xD0399081 # INVALID $at, $t9, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD03A1001, NULL, "vus2i.s C010, S400"), + TEST_ENTRY_C(0xD03A1081, NULL, "vus2i.p C010, C400"), + TEST_ENTRY_C(0xD03A9001, NULL, ".word 0xD03A9001 # INVALID $at, $k0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD03A9081, NULL, ".word 0xD03A9081 # INVALID $at, $k0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD03B1001, NULL, "vs2i.s C010, S400"), + TEST_ENTRY_C(0xD03B1081, NULL, "vs2i.p C010, C400"), + TEST_ENTRY_C(0xD03B9001, NULL, ".word 0xD03B9001 # INVALID $at, $k1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD03B9081, NULL, ".word 0xD03B9081 # INVALID $at, $k1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD03C1001, NULL, ".word 0xD03C1001 # INVALID $at, $gp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD03C1081, NULL, ".word 0xD03C1081 # INVALID $at, $gp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD03C9001, NULL, ".word 0xD03C9001 # INVALID $at, $gp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD03C9081, NULL, "vi2uc.q S010, C400"), + TEST_ENTRY_C(0xD03D1001, NULL, ".word 0xD03D1001 # INVALID $at, $sp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD03D1081, NULL, ".word 0xD03D1081 # INVALID $at, $sp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD03D9001, NULL, ".word 0xD03D9001 # INVALID $at, $sp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD03D9081, NULL, "vi2c.q S010, C400"), + TEST_ENTRY_C(0xD03E1001, NULL, ".word 0xD03E1001 # INVALID $at, $fp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD03E1081, NULL, "vi2us.p S010, C400"), + TEST_ENTRY_C(0xD03E9001, NULL, ".word 0xD03E9001 # INVALID $at, $fp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD03E9081, NULL, "vi2us.q C010, C400"), + TEST_ENTRY_C(0xD03F1001, NULL, ".word 0xD03F1001 # INVALID $at, $ra, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD03F1081, NULL, "vi2s.p S010, C400"), + TEST_ENTRY_C(0xD03F9001, NULL, ".word 0xD03F9001 # INVALID $at, $ra, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD03F9081, NULL, "vi2s.q C010, C400"), + TEST_ENTRY_C(0xD0401001, NULL, ".word 0xD0401001 # INVALID $v0, $zero, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0401081, NULL, ".word 0xD0401081 # INVALID $v0, $zero, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0409001, NULL, ".word 0xD0409001 # INVALID $v0, $zero, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0409081, NULL, "vsrt1.q C010, C400"), + TEST_ENTRY_C(0xD0411001, NULL, ".word 0xD0411001 # INVALID $v0, $at, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0411081, NULL, ".word 0xD0411081 # INVALID $v0, $at, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0419001, NULL, ".word 0xD0419001 # INVALID $v0, $at, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0419081, NULL, "vsrt2.q C010, C400"), + TEST_ENTRY_C(0xD0421001, NULL, ".word 0xD0421001 # INVALID $v0, $v0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0421081, NULL, "vbfy1.p C010, C400"), + TEST_ENTRY_C(0xD0429001, NULL, ".word 0xD0429001 # INVALID $v0, $v0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0429081, NULL, "vbfy1.q C010, C400"), + TEST_ENTRY_C(0xD0431001, NULL, ".word 0xD0431001 # INVALID $v0, $v1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0431081, NULL, ".word 0xD0431081 # INVALID $v0, $v1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0439001, NULL, ".word 0xD0439001 # INVALID $v0, $v1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0439081, NULL, "vbfy2.q C010, C400"), + TEST_ENTRY_C(0xD0441001, NULL, "vocp.s S010, S400"), + TEST_ENTRY_C(0xD0441081, NULL, "vocp.p C010, C400"), + TEST_ENTRY_C(0xD0449001, NULL, "vocp.t C010, C400"), + TEST_ENTRY_C(0xD0449081, NULL, "vocp.q C010, C400"), + TEST_ENTRY_C(0xD0451001, NULL, "vsocp.s C010, S400"), + TEST_ENTRY_C(0xD0451081, NULL, "vsocp.p C010, C400"), + TEST_ENTRY_C(0xD0459001, NULL, ".word 0xD0459001 # INVALID $v0, $a1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0459081, NULL, ".word 0xD0459081 # INVALID $v0, $a1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0461001, NULL, ".word 0xD0461001 # INVALID $v0, $a2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0461081, NULL, "vfad.p S010, C400"), + TEST_ENTRY_C(0xD0469001, NULL, "vfad.t S010, C400"), + TEST_ENTRY_C(0xD0469081, NULL, "vfad.q S010, C400"), + TEST_ENTRY_C(0xD0471001, NULL, ".word 0xD0471001 # INVALID $v0, $a3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0471081, NULL, "vavg.p S010, C400"), + TEST_ENTRY_C(0xD0479001, NULL, "vavg.t S010, C400"), + TEST_ENTRY_C(0xD0479081, NULL, "vavg.q S010, C400"), + TEST_ENTRY_C(0xD0481001, NULL, ".word 0xD0481001 # INVALID $v0, $t0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0481081, NULL, ".word 0xD0481081 # INVALID $v0, $t0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0489001, NULL, ".word 0xD0489001 # INVALID $v0, $t0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0489081, NULL, "vsrt3.q C010, C400"), + TEST_ENTRY_C(0xD0491001, NULL, ".word 0xD0491001 # INVALID $v0, $t1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0491081, NULL, ".word 0xD0491081 # INVALID $v0, $t1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0499001, NULL, ".word 0xD0499001 # INVALID $v0, $t1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0499081, NULL, "vsrt4.q C010, C400"), + TEST_ENTRY_C(0xD04A1001, NULL, "vsgn.s S010, S400"), + TEST_ENTRY_C(0xD04A1081, NULL, "vsgn.p C010, C400"), + TEST_ENTRY_C(0xD04A9001, NULL, "vsgn.t C010, C400"), + TEST_ENTRY_C(0xD04A9081, NULL, "vsgn.q C010, C400"), + TEST_ENTRY_C(0xD04B1001, NULL, ".word 0xD04B1001 # INVALID $v0, $t3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD04B1081, NULL, ".word 0xD04B1081 # INVALID $v0, $t3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD04B9001, NULL, ".word 0xD04B9001 # INVALID $v0, $t3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD04B9081, NULL, ".word 0xD04B9081 # INVALID $v0, $t3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD04C1001, NULL, ".word 0xD04C1001 # INVALID $v0, $t4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD04C1081, NULL, ".word 0xD04C1081 # INVALID $v0, $t4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD04C9001, NULL, ".word 0xD04C9001 # INVALID $v0, $t4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD04C9081, NULL, ".word 0xD04C9081 # INVALID $v0, $t4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD04D1001, NULL, ".word 0xD04D1001 # INVALID $v0, $t5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD04D1081, NULL, ".word 0xD04D1081 # INVALID $v0, $t5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD04D9001, NULL, ".word 0xD04D9001 # INVALID $v0, $t5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD04D9081, NULL, ".word 0xD04D9081 # INVALID $v0, $t5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD04E1001, NULL, ".word 0xD04E1001 # INVALID $v0, $t6, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD04E1081, NULL, ".word 0xD04E1081 # INVALID $v0, $t6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD04E9001, NULL, ".word 0xD04E9001 # INVALID $v0, $t6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD04E9081, NULL, ".word 0xD04E9081 # INVALID $v0, $t6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD04F1001, NULL, ".word 0xD04F1001 # INVALID $v0, $t7, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD04F1081, NULL, ".word 0xD04F1081 # INVALID $v0, $t7, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD04F9001, NULL, ".word 0xD04F9001 # INVALID $v0, $t7, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD04F9081, NULL, ".word 0xD04F9081 # INVALID $v0, $t7, -0x6F7F # 00000000 "), + + TEST_ENTRY_C(0xD0508001, NULL, "vmfvc S010, $128"), + TEST_ENTRY_C(0xD0508101, NULL, "vmfvc S010, $129"), + TEST_ENTRY_C(0xD0508201, NULL, "vmfvc S010, $130"), + TEST_ENTRY_C(0xD0508301, NULL, "vmfvc S010, $131"), + TEST_ENTRY_C(0xD0508401, NULL, "vmfvc S010, $132"), + TEST_ENTRY_C(0xD0508501, NULL, "vmfvc S010, $133"), + TEST_ENTRY_C(0xD0508601, NULL, "vmfvc S010, $134"), + TEST_ENTRY_C(0xD0508701, NULL, "vmfvc S010, $135"), + TEST_ENTRY_C(0xD0508801, NULL, "vmfvc S010, $136"), + TEST_ENTRY_C(0xD0508901, NULL, "vmfvc S010, $137"), + TEST_ENTRY_C(0xD0508A01, NULL, "vmfvc S010, $138"), + TEST_ENTRY_C(0xD0508B01, NULL, "vmfvc S010, $139"), + TEST_ENTRY_C(0xD0508C01, NULL, "vmfvc S010, $140"), + TEST_ENTRY_C(0xD0508D01, NULL, "vmfvc S010, $141"), + TEST_ENTRY_C(0xD0508E01, NULL, "vmfvc S010, $142"), + TEST_ENTRY_C(0xD0508F01, NULL, "vmfvc S010, $143"), + TEST_ENTRY_C(0xD0509001, NULL, "vmfvc S010, $144"), + TEST_ENTRY_C(0xD0509101, NULL, "vmfvc S010, $145"), + TEST_ENTRY_C(0xD0509201, NULL, "vmfvc S010, $146"), + TEST_ENTRY_C(0xD0509301, NULL, "vmfvc S010, $147"), + TEST_ENTRY_C(0xD0509401, NULL, "vmfvc S010, $148"), + TEST_ENTRY_C(0xD0509501, NULL, "vmfvc S010, $149"), + TEST_ENTRY_C(0xD0509601, NULL, "vmfvc S010, $150"), + TEST_ENTRY_C(0xD0509701, NULL, "vmfvc S010, $151"), + TEST_ENTRY_C(0xD0509801, NULL, "vmfvc S010, $152"), + TEST_ENTRY_C(0xD0509901, NULL, "vmfvc S010, $153"), + TEST_ENTRY_C(0xD0509A01, NULL, "vmfvc S010, $154"), + TEST_ENTRY_C(0xD0509B01, NULL, "vmfvc S010, $155"), + TEST_ENTRY_C(0xD0509C01, NULL, "vmfvc S010, $156"), + TEST_ENTRY_C(0xD0509D01, NULL, "vmfvc S010, $157"), + TEST_ENTRY_C(0xD0509E01, NULL, "vmfvc S010, $158"), + TEST_ENTRY_C(0xD0509F01, NULL, "vmfvc S010, $159"), + TEST_ENTRY_C(0xD050A001, NULL, "vmfvc S010, $160"), + TEST_ENTRY_C(0xD050A101, NULL, "vmfvc S010, $161"), + TEST_ENTRY_C(0xD050A201, NULL, "vmfvc S010, $162"), + TEST_ENTRY_C(0xD050A301, NULL, "vmfvc S010, $163"), + TEST_ENTRY_C(0xD050A401, NULL, "vmfvc S010, $164"), + TEST_ENTRY_C(0xD050A501, NULL, "vmfvc S010, $165"), + TEST_ENTRY_C(0xD050A601, NULL, "vmfvc S010, $166"), + TEST_ENTRY_C(0xD050A701, NULL, "vmfvc S010, $167"), + TEST_ENTRY_C(0xD050A801, NULL, "vmfvc S010, $168"), + TEST_ENTRY_C(0xD050A901, NULL, "vmfvc S010, $169"), + TEST_ENTRY_C(0xD050AA01, NULL, "vmfvc S010, $170"), + TEST_ENTRY_C(0xD050AB01, NULL, "vmfvc S010, $171"), + TEST_ENTRY_C(0xD050AC01, NULL, "vmfvc S010, $172"), + TEST_ENTRY_C(0xD050AD01, NULL, "vmfvc S010, $173"), + TEST_ENTRY_C(0xD050AE01, NULL, "vmfvc S010, $174"), + TEST_ENTRY_C(0xD050AF01, NULL, "vmfvc S010, $175"), + TEST_ENTRY_C(0xD050B001, NULL, "vmfvc S010, $176"), + TEST_ENTRY_C(0xD050B101, NULL, "vmfvc S010, $177"), + TEST_ENTRY_C(0xD050B201, NULL, "vmfvc S010, $178"), + TEST_ENTRY_C(0xD050B301, NULL, "vmfvc S010, $179"), + TEST_ENTRY_C(0xD050B401, NULL, "vmfvc S010, $180"), + TEST_ENTRY_C(0xD050B501, NULL, "vmfvc S010, $181"), + TEST_ENTRY_C(0xD050B601, NULL, "vmfvc S010, $182"), + TEST_ENTRY_C(0xD050B701, NULL, "vmfvc S010, $183"), + TEST_ENTRY_C(0xD050B801, NULL, "vmfvc S010, $184"), + TEST_ENTRY_C(0xD050B901, NULL, "vmfvc S010, $185"), + TEST_ENTRY_C(0xD050BA01, NULL, "vmfvc S010, $186"), + TEST_ENTRY_C(0xD050BB01, NULL, "vmfvc S010, $187"), + TEST_ENTRY_C(0xD050BC01, NULL, "vmfvc S010, $188"), + TEST_ENTRY_C(0xD050BD01, NULL, "vmfvc S010, $189"), + TEST_ENTRY_C(0xD050BE01, NULL, "vmfvc S010, $190"), + TEST_ENTRY_C(0xD050BF01, NULL, "vmfvc S010, $191"), + TEST_ENTRY_C(0xD050C001, NULL, "vmfvc S010, $192"), + TEST_ENTRY_C(0xD050C101, NULL, "vmfvc S010, $193"), + TEST_ENTRY_C(0xD050C201, NULL, "vmfvc S010, $194"), + TEST_ENTRY_C(0xD050C301, NULL, "vmfvc S010, $195"), + TEST_ENTRY_C(0xD050C401, NULL, "vmfvc S010, $196"), + TEST_ENTRY_C(0xD050C501, NULL, "vmfvc S010, $197"), + TEST_ENTRY_C(0xD050C601, NULL, "vmfvc S010, $198"), + TEST_ENTRY_C(0xD050C701, NULL, "vmfvc S010, $199"), + TEST_ENTRY_C(0xD050C801, NULL, "vmfvc S010, $200"), + TEST_ENTRY_C(0xD050C901, NULL, "vmfvc S010, $201"), + TEST_ENTRY_C(0xD050CA01, NULL, "vmfvc S010, $202"), + TEST_ENTRY_C(0xD050CB01, NULL, "vmfvc S010, $203"), + TEST_ENTRY_C(0xD050CC01, NULL, "vmfvc S010, $204"), + TEST_ENTRY_C(0xD050CD01, NULL, "vmfvc S010, $205"), + TEST_ENTRY_C(0xD050CE01, NULL, "vmfvc S010, $206"), + TEST_ENTRY_C(0xD050CF01, NULL, "vmfvc S010, $207"), + TEST_ENTRY_C(0xD050D001, NULL, "vmfvc S010, $208"), + TEST_ENTRY_C(0xD050D101, NULL, "vmfvc S010, $209"), + TEST_ENTRY_C(0xD050D201, NULL, "vmfvc S010, $210"), + TEST_ENTRY_C(0xD050D301, NULL, "vmfvc S010, $211"), + TEST_ENTRY_C(0xD050D401, NULL, "vmfvc S010, $212"), + TEST_ENTRY_C(0xD050D501, NULL, "vmfvc S010, $213"), + TEST_ENTRY_C(0xD050D601, NULL, "vmfvc S010, $214"), + TEST_ENTRY_C(0xD050D701, NULL, "vmfvc S010, $215"), + TEST_ENTRY_C(0xD050D801, NULL, "vmfvc S010, $216"), + TEST_ENTRY_C(0xD050D901, NULL, "vmfvc S010, $217"), + TEST_ENTRY_C(0xD050DA01, NULL, "vmfvc S010, $218"), + TEST_ENTRY_C(0xD050DB01, NULL, "vmfvc S010, $219"), + TEST_ENTRY_C(0xD050DC01, NULL, "vmfvc S010, $220"), + TEST_ENTRY_C(0xD050DD01, NULL, "vmfvc S010, $221"), + TEST_ENTRY_C(0xD050DE01, NULL, "vmfvc S010, $222"), + TEST_ENTRY_C(0xD050DF01, NULL, "vmfvc S010, $223"), + TEST_ENTRY_C(0xD050E001, NULL, "vmfvc S010, $224"), + TEST_ENTRY_C(0xD050E101, NULL, "vmfvc S010, $225"), + TEST_ENTRY_C(0xD050E201, NULL, "vmfvc S010, $226"), + TEST_ENTRY_C(0xD050E301, NULL, "vmfvc S010, $227"), + TEST_ENTRY_C(0xD050E401, NULL, "vmfvc S010, $228"), + TEST_ENTRY_C(0xD050E501, NULL, "vmfvc S010, $229"), + TEST_ENTRY_C(0xD050E601, NULL, "vmfvc S010, $230"), + TEST_ENTRY_C(0xD050E701, NULL, "vmfvc S010, $231"), + TEST_ENTRY_C(0xD050E801, NULL, "vmfvc S010, $232"), + TEST_ENTRY_C(0xD050E901, NULL, "vmfvc S010, $233"), + TEST_ENTRY_C(0xD050EA01, NULL, "vmfvc S010, $234"), + TEST_ENTRY_C(0xD050EB01, NULL, "vmfvc S010, $235"), + TEST_ENTRY_C(0xD050EC01, NULL, "vmfvc S010, $236"), + TEST_ENTRY_C(0xD050ED01, NULL, "vmfvc S010, $237"), + TEST_ENTRY_C(0xD050EE01, NULL, "vmfvc S010, $238"), + TEST_ENTRY_C(0xD050EF01, NULL, "vmfvc S010, $239"), + TEST_ENTRY_C(0xD050F001, NULL, "vmfvc S010, $240"), + TEST_ENTRY_C(0xD050F101, NULL, "vmfvc S010, $241"), + TEST_ENTRY_C(0xD050F201, NULL, "vmfvc S010, $242"), + TEST_ENTRY_C(0xD050F301, NULL, "vmfvc S010, $243"), + TEST_ENTRY_C(0xD050F401, NULL, "vmfvc S010, $244"), + TEST_ENTRY_C(0xD050F501, NULL, "vmfvc S010, $245"), + TEST_ENTRY_C(0xD050F601, NULL, "vmfvc S010, $246"), + TEST_ENTRY_C(0xD050F701, NULL, "vmfvc S010, $247"), + TEST_ENTRY_C(0xD050F801, NULL, "vmfvc S010, $248"), + TEST_ENTRY_C(0xD050F901, NULL, "vmfvc S010, $249"), + TEST_ENTRY_C(0xD050FA01, NULL, "vmfvc S010, $250"), + TEST_ENTRY_C(0xD050FB01, NULL, "vmfvc S010, $251"), + TEST_ENTRY_C(0xD050FC01, NULL, "vmfvc S010, $252"), + TEST_ENTRY_C(0xD050FD01, NULL, "vmfvc S010, $253"), + TEST_ENTRY_C(0xD050FE01, NULL, "vmfvc S010, $254"), + TEST_ENTRY_C(0xD050FF01, NULL, "vmfvc S010, $255"), + + TEST_ENTRY_C(0xD0510180, NULL, "vmtvc $128, S010"), + TEST_ENTRY_C(0xD0510181, NULL, "vmtvc $129, S010"), + TEST_ENTRY_C(0xD0510182, NULL, "vmtvc $130, S010"), + TEST_ENTRY_C(0xD0510183, NULL, "vmtvc $131, S010"), + TEST_ENTRY_C(0xD0510184, NULL, "vmtvc $132, S010"), + TEST_ENTRY_C(0xD0510185, NULL, "vmtvc $133, S010"), + TEST_ENTRY_C(0xD0510186, NULL, "vmtvc $134, S010"), + TEST_ENTRY_C(0xD0510187, NULL, "vmtvc $135, S010"), + TEST_ENTRY_C(0xD0510188, NULL, "vmtvc $136, S010"), + TEST_ENTRY_C(0xD0510189, NULL, "vmtvc $137, S010"), + TEST_ENTRY_C(0xD051018A, NULL, "vmtvc $138, S010"), + TEST_ENTRY_C(0xD051018B, NULL, "vmtvc $139, S010"), + TEST_ENTRY_C(0xD051018C, NULL, "vmtvc $140, S010"), + TEST_ENTRY_C(0xD051018D, NULL, "vmtvc $141, S010"), + TEST_ENTRY_C(0xD051018E, NULL, "vmtvc $142, S010"), + TEST_ENTRY_C(0xD051018F, NULL, "vmtvc $143, S010"), + TEST_ENTRY_C(0xD0510190, NULL, "vmtvc $144, S010"), + TEST_ENTRY_C(0xD0510191, NULL, "vmtvc $145, S010"), + TEST_ENTRY_C(0xD0510192, NULL, "vmtvc $146, S010"), + TEST_ENTRY_C(0xD0510193, NULL, "vmtvc $147, S010"), + TEST_ENTRY_C(0xD0510194, NULL, "vmtvc $148, S010"), + TEST_ENTRY_C(0xD0510195, NULL, "vmtvc $149, S010"), + TEST_ENTRY_C(0xD0510196, NULL, "vmtvc $150, S010"), + TEST_ENTRY_C(0xD0510197, NULL, "vmtvc $151, S010"), + TEST_ENTRY_C(0xD0510198, NULL, "vmtvc $152, S010"), + TEST_ENTRY_C(0xD0510199, NULL, "vmtvc $153, S010"), + TEST_ENTRY_C(0xD051019A, NULL, "vmtvc $154, S010"), + TEST_ENTRY_C(0xD051019B, NULL, "vmtvc $155, S010"), + TEST_ENTRY_C(0xD051019C, NULL, "vmtvc $156, S010"), + TEST_ENTRY_C(0xD051019D, NULL, "vmtvc $157, S010"), + TEST_ENTRY_C(0xD051019E, NULL, "vmtvc $158, S010"), + TEST_ENTRY_C(0xD051019F, NULL, "vmtvc $159, S010"), + TEST_ENTRY_C(0xD05101A0, NULL, "vmtvc $160, S010"), + TEST_ENTRY_C(0xD05101A1, NULL, "vmtvc $161, S010"), + TEST_ENTRY_C(0xD05101A2, NULL, "vmtvc $162, S010"), + TEST_ENTRY_C(0xD05101A3, NULL, "vmtvc $163, S010"), + TEST_ENTRY_C(0xD05101A4, NULL, "vmtvc $164, S010"), + TEST_ENTRY_C(0xD05101A5, NULL, "vmtvc $165, S010"), + TEST_ENTRY_C(0xD05101A6, NULL, "vmtvc $166, S010"), + TEST_ENTRY_C(0xD05101A7, NULL, "vmtvc $167, S010"), + TEST_ENTRY_C(0xD05101A8, NULL, "vmtvc $168, S010"), + TEST_ENTRY_C(0xD05101A9, NULL, "vmtvc $169, S010"), + TEST_ENTRY_C(0xD05101AA, NULL, "vmtvc $170, S010"), + TEST_ENTRY_C(0xD05101AB, NULL, "vmtvc $171, S010"), + TEST_ENTRY_C(0xD05101AC, NULL, "vmtvc $172, S010"), + TEST_ENTRY_C(0xD05101AD, NULL, "vmtvc $173, S010"), + TEST_ENTRY_C(0xD05101AE, NULL, "vmtvc $174, S010"), + TEST_ENTRY_C(0xD05101AF, NULL, "vmtvc $175, S010"), + TEST_ENTRY_C(0xD05101B0, NULL, "vmtvc $176, S010"), + TEST_ENTRY_C(0xD05101B1, NULL, "vmtvc $177, S010"), + TEST_ENTRY_C(0xD05101B2, NULL, "vmtvc $178, S010"), + TEST_ENTRY_C(0xD05101B3, NULL, "vmtvc $179, S010"), + TEST_ENTRY_C(0xD05101B4, NULL, "vmtvc $180, S010"), + TEST_ENTRY_C(0xD05101B5, NULL, "vmtvc $181, S010"), + TEST_ENTRY_C(0xD05101B6, NULL, "vmtvc $182, S010"), + TEST_ENTRY_C(0xD05101B7, NULL, "vmtvc $183, S010"), + TEST_ENTRY_C(0xD05101B8, NULL, "vmtvc $184, S010"), + TEST_ENTRY_C(0xD05101B9, NULL, "vmtvc $185, S010"), + TEST_ENTRY_C(0xD05101BA, NULL, "vmtvc $186, S010"), + TEST_ENTRY_C(0xD05101BB, NULL, "vmtvc $187, S010"), + TEST_ENTRY_C(0xD05101BC, NULL, "vmtvc $188, S010"), + TEST_ENTRY_C(0xD05101BD, NULL, "vmtvc $189, S010"), + TEST_ENTRY_C(0xD05101BE, NULL, "vmtvc $190, S010"), + TEST_ENTRY_C(0xD05101BF, NULL, "vmtvc $191, S010"), + TEST_ENTRY_C(0xD05101C0, NULL, "vmtvc $192, S010"), + TEST_ENTRY_C(0xD05101C1, NULL, "vmtvc $193, S010"), + TEST_ENTRY_C(0xD05101C2, NULL, "vmtvc $194, S010"), + TEST_ENTRY_C(0xD05101C3, NULL, "vmtvc $195, S010"), + TEST_ENTRY_C(0xD05101C4, NULL, "vmtvc $196, S010"), + TEST_ENTRY_C(0xD05101C5, NULL, "vmtvc $197, S010"), + TEST_ENTRY_C(0xD05101C6, NULL, "vmtvc $198, S010"), + TEST_ENTRY_C(0xD05101C7, NULL, "vmtvc $199, S010"), + TEST_ENTRY_C(0xD05101C8, NULL, "vmtvc $200, S010"), + TEST_ENTRY_C(0xD05101C9, NULL, "vmtvc $201, S010"), + TEST_ENTRY_C(0xD05101CA, NULL, "vmtvc $202, S010"), + TEST_ENTRY_C(0xD05101CB, NULL, "vmtvc $203, S010"), + TEST_ENTRY_C(0xD05101CC, NULL, "vmtvc $204, S010"), + TEST_ENTRY_C(0xD05101CD, NULL, "vmtvc $205, S010"), + TEST_ENTRY_C(0xD05101CE, NULL, "vmtvc $206, S010"), + TEST_ENTRY_C(0xD05101CF, NULL, "vmtvc $207, S010"), + TEST_ENTRY_C(0xD05101D0, NULL, "vmtvc $208, S010"), + TEST_ENTRY_C(0xD05101D1, NULL, "vmtvc $209, S010"), + TEST_ENTRY_C(0xD05101D2, NULL, "vmtvc $210, S010"), + TEST_ENTRY_C(0xD05101D3, NULL, "vmtvc $211, S010"), + TEST_ENTRY_C(0xD05101D4, NULL, "vmtvc $212, S010"), + TEST_ENTRY_C(0xD05101D5, NULL, "vmtvc $213, S010"), + TEST_ENTRY_C(0xD05101D6, NULL, "vmtvc $214, S010"), + TEST_ENTRY_C(0xD05101D7, NULL, "vmtvc $215, S010"), + TEST_ENTRY_C(0xD05101D8, NULL, "vmtvc $216, S010"), + TEST_ENTRY_C(0xD05101D9, NULL, "vmtvc $217, S010"), + TEST_ENTRY_C(0xD05101DA, NULL, "vmtvc $218, S010"), + TEST_ENTRY_C(0xD05101DB, NULL, "vmtvc $219, S010"), + TEST_ENTRY_C(0xD05101DC, NULL, "vmtvc $220, S010"), + TEST_ENTRY_C(0xD05101DD, NULL, "vmtvc $221, S010"), + TEST_ENTRY_C(0xD05101DE, NULL, "vmtvc $222, S010"), + TEST_ENTRY_C(0xD05101DF, NULL, "vmtvc $223, S010"), + TEST_ENTRY_C(0xD05101E0, NULL, "vmtvc $224, S010"), + TEST_ENTRY_C(0xD05101E1, NULL, "vmtvc $225, S010"), + TEST_ENTRY_C(0xD05101E2, NULL, "vmtvc $226, S010"), + TEST_ENTRY_C(0xD05101E3, NULL, "vmtvc $227, S010"), + TEST_ENTRY_C(0xD05101E4, NULL, "vmtvc $228, S010"), + TEST_ENTRY_C(0xD05101E5, NULL, "vmtvc $229, S010"), + TEST_ENTRY_C(0xD05101E6, NULL, "vmtvc $230, S010"), + TEST_ENTRY_C(0xD05101E7, NULL, "vmtvc $231, S010"), + TEST_ENTRY_C(0xD05101E8, NULL, "vmtvc $232, S010"), + TEST_ENTRY_C(0xD05101E9, NULL, "vmtvc $233, S010"), + TEST_ENTRY_C(0xD05101EA, NULL, "vmtvc $234, S010"), + TEST_ENTRY_C(0xD05101EB, NULL, "vmtvc $235, S010"), + TEST_ENTRY_C(0xD05101EC, NULL, "vmtvc $236, S010"), + TEST_ENTRY_C(0xD05101ED, NULL, "vmtvc $237, S010"), + TEST_ENTRY_C(0xD05101EE, NULL, "vmtvc $238, S010"), + TEST_ENTRY_C(0xD05101EF, NULL, "vmtvc $239, S010"), + TEST_ENTRY_C(0xD05101F0, NULL, "vmtvc $240, S010"), + TEST_ENTRY_C(0xD05101F1, NULL, "vmtvc $241, S010"), + TEST_ENTRY_C(0xD05101F2, NULL, "vmtvc $242, S010"), + TEST_ENTRY_C(0xD05101F3, NULL, "vmtvc $243, S010"), + TEST_ENTRY_C(0xD05101F4, NULL, "vmtvc $244, S010"), + TEST_ENTRY_C(0xD05101F5, NULL, "vmtvc $245, S010"), + TEST_ENTRY_C(0xD05101F6, NULL, "vmtvc $246, S010"), + TEST_ENTRY_C(0xD05101F7, NULL, "vmtvc $247, S010"), + TEST_ENTRY_C(0xD05101F8, NULL, "vmtvc $248, S010"), + TEST_ENTRY_C(0xD05101F9, NULL, "vmtvc $249, S010"), + TEST_ENTRY_C(0xD05101FA, NULL, "vmtvc $250, S010"), + TEST_ENTRY_C(0xD05101FB, NULL, "vmtvc $251, S010"), + TEST_ENTRY_C(0xD05101FC, NULL, "vmtvc $252, S010"), + TEST_ENTRY_C(0xD05101FD, NULL, "vmtvc $253, S010"), + TEST_ENTRY_C(0xD05101FE, NULL, "vmtvc $254, S010"), + TEST_ENTRY_C(0xD05101FF, NULL, "vmtvc $255, S010"), + + TEST_ENTRY_C(0xD0521001, NULL, ".word 0xD0521001 # INVALID $v0, $s2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0521081, NULL, ".word 0xD0521081 # INVALID $v0, $s2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0529001, NULL, ".word 0xD0529001 # INVALID $v0, $s2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0529081, NULL, ".word 0xD0529081 # INVALID $v0, $s2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0531001, NULL, ".word 0xD0531001 # INVALID $v0, $s3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0531081, NULL, ".word 0xD0531081 # INVALID $v0, $s3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0539001, NULL, ".word 0xD0539001 # INVALID $v0, $s3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0539081, NULL, ".word 0xD0539081 # INVALID $v0, $s3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0541001, NULL, ".word 0xD0541001 # INVALID $v0, $s4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0541081, NULL, ".word 0xD0541081 # INVALID $v0, $s4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0549001, NULL, ".word 0xD0549001 # INVALID $v0, $s4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0549081, NULL, ".word 0xD0549081 # INVALID $v0, $s4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0551001, NULL, ".word 0xD0551001 # INVALID $v0, $s5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0551081, NULL, ".word 0xD0551081 # INVALID $v0, $s5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0559001, NULL, ".word 0xD0559001 # INVALID $v0, $s5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0559081, NULL, ".word 0xD0559081 # INVALID $v0, $s5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0561001, NULL, ".word 0xD0561001 # INVALID $v0, $s6, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0561081, NULL, ".word 0xD0561081 # INVALID $v0, $s6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0569001, NULL, ".word 0xD0569001 # INVALID $v0, $s6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0569081, NULL, ".word 0xD0569081 # INVALID $v0, $s6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0571001, NULL, ".word 0xD0571001 # INVALID $v0, $s7, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0571081, NULL, ".word 0xD0571081 # INVALID $v0, $s7, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0579001, NULL, ".word 0xD0579001 # INVALID $v0, $s7, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0579081, NULL, ".word 0xD0579081 # INVALID $v0, $s7, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0581001, NULL, ".word 0xD0581001 # INVALID $v0, $t8, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0581081, NULL, ".word 0xD0581081 # INVALID $v0, $t8, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0589001, NULL, ".word 0xD0589001 # INVALID $v0, $t8, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0589081, NULL, ".word 0xD0589081 # INVALID $v0, $t8, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0591001, NULL, ".word 0xD0591001 # INVALID $v0, $t9, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0591081, NULL, ".word 0xD0591081 # INVALID $v0, $t9, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0599001, NULL, ".word 0xD0599001 # INVALID $v0, $t9, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0599081, NULL, "vt4444.q C010, C400"), + TEST_ENTRY_C(0xD05A1001, NULL, ".word 0xD05A1001 # INVALID $v0, $k0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD05A1081, NULL, ".word 0xD05A1081 # INVALID $v0, $k0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD05A9001, NULL, ".word 0xD05A9001 # INVALID $v0, $k0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD05A9081, NULL, "vt5551.q C010, C400"), + TEST_ENTRY_C(0xD05B1001, NULL, ".word 0xD05B1001 # INVALID $v0, $k1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD05B1081, NULL, ".word 0xD05B1081 # INVALID $v0, $k1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD05B9001, NULL, ".word 0xD05B9001 # INVALID $v0, $k1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD05B9081, NULL, "vt5650.q C010, C400"), + TEST_ENTRY_C(0xD05C1001, NULL, ".word 0xD05C1001 # INVALID $v0, $gp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD05C1081, NULL, ".word 0xD05C1081 # INVALID $v0, $gp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD05C9001, NULL, ".word 0xD05C9001 # INVALID $v0, $gp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD05C9081, NULL, ".word 0xD05C9081 # INVALID $v0, $gp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD05D1001, NULL, ".word 0xD05D1001 # INVALID $v0, $sp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD05D1081, NULL, ".word 0xD05D1081 # INVALID $v0, $sp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD05D9001, NULL, ".word 0xD05D9001 # INVALID $v0, $sp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD05D9081, NULL, ".word 0xD05D9081 # INVALID $v0, $sp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD05E1001, NULL, ".word 0xD05E1001 # INVALID $v0, $fp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD05E1081, NULL, ".word 0xD05E1081 # INVALID $v0, $fp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD05E9001, NULL, ".word 0xD05E9001 # INVALID $v0, $fp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD05E9081, NULL, ".word 0xD05E9081 # INVALID $v0, $fp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD05F1001, NULL, ".word 0xD05F1001 # INVALID $v0, $ra, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD05F1081, NULL, ".word 0xD05F1081 # INVALID $v0, $ra, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD05F9001, NULL, ".word 0xD05F9001 # INVALID $v0, $ra, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD05F9081, NULL, ".word 0xD05F9081 # INVALID $v0, $ra, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0600001, NULL, "vcst.s S010, INVALID_0"), + TEST_ENTRY_C(0xD0600081, NULL, "vcst.p C010, INVALID_0"), + TEST_ENTRY_C(0xD0608001, NULL, "vcst.t C010, INVALID_0"), + TEST_ENTRY_C(0xD0608081, NULL, "vcst.q C010, INVALID_0"), + TEST_ENTRY_C(0xD0610001, NULL, "vcst.s S010, VFPU_HUGE"), + TEST_ENTRY_C(0xD0610081, NULL, "vcst.p C010, VFPU_HUGE"), + TEST_ENTRY_C(0xD0618001, NULL, "vcst.t C010, VFPU_HUGE"), + TEST_ENTRY_C(0xD0618081, NULL, "vcst.q C010, VFPU_HUGE"), + TEST_ENTRY_C(0xD0620001, NULL, "vcst.s S010, VFPU_SQRT2"), + TEST_ENTRY_C(0xD0620081, NULL, "vcst.p C010, VFPU_SQRT2"), + TEST_ENTRY_C(0xD0628001, NULL, "vcst.t C010, VFPU_SQRT2"), + TEST_ENTRY_C(0xD0628081, NULL, "vcst.q C010, VFPU_SQRT2"), + TEST_ENTRY_C(0xD0630001, NULL, "vcst.s S010, VFPU_SQRT1_2"), + TEST_ENTRY_C(0xD0630081, NULL, "vcst.p C010, VFPU_SQRT1_2"), + TEST_ENTRY_C(0xD0638001, NULL, "vcst.t C010, VFPU_SQRT1_2"), + TEST_ENTRY_C(0xD0638081, NULL, "vcst.q C010, VFPU_SQRT1_2"), + TEST_ENTRY_C(0xD0640001, NULL, "vcst.s S010, VFPU_2_SQRTPI"), + TEST_ENTRY_C(0xD0640081, NULL, "vcst.p C010, VFPU_2_SQRTPI"), + TEST_ENTRY_C(0xD0648001, NULL, "vcst.t C010, VFPU_2_SQRTPI"), + TEST_ENTRY_C(0xD0648081, NULL, "vcst.q C010, VFPU_2_SQRTPI"), + TEST_ENTRY_C(0xD0650001, NULL, "vcst.s S010, VFPU_2_PI"), + TEST_ENTRY_C(0xD0650081, NULL, "vcst.p C010, VFPU_2_PI"), + TEST_ENTRY_C(0xD0658001, NULL, "vcst.t C010, VFPU_2_PI"), + TEST_ENTRY_C(0xD0658081, NULL, "vcst.q C010, VFPU_2_PI"), + TEST_ENTRY_C(0xD0660001, NULL, "vcst.s S010, VFPU_1_PI"), + TEST_ENTRY_C(0xD0660081, NULL, "vcst.p C010, VFPU_1_PI"), + TEST_ENTRY_C(0xD0668001, NULL, "vcst.t C010, VFPU_1_PI"), + TEST_ENTRY_C(0xD0668081, NULL, "vcst.q C010, VFPU_1_PI"), + TEST_ENTRY_C(0xD0670001, NULL, "vcst.s S010, VFPU_PI_4"), + TEST_ENTRY_C(0xD0670081, NULL, "vcst.p C010, VFPU_PI_4"), + TEST_ENTRY_C(0xD0678001, NULL, "vcst.t C010, VFPU_PI_4"), + TEST_ENTRY_C(0xD0678081, NULL, "vcst.q C010, VFPU_PI_4"), + TEST_ENTRY_C(0xD0680001, NULL, "vcst.s S010, VFPU_PI_2"), + TEST_ENTRY_C(0xD0680081, NULL, "vcst.p C010, VFPU_PI_2"), + TEST_ENTRY_C(0xD0688001, NULL, "vcst.t C010, VFPU_PI_2"), + TEST_ENTRY_C(0xD0688081, NULL, "vcst.q C010, VFPU_PI_2"), + TEST_ENTRY_C(0xD0690001, NULL, "vcst.s S010, VFPU_PI"), + TEST_ENTRY_C(0xD0690081, NULL, "vcst.p C010, VFPU_PI"), + TEST_ENTRY_C(0xD0698001, NULL, "vcst.t C010, VFPU_PI"), + TEST_ENTRY_C(0xD0698081, NULL, "vcst.q C010, VFPU_PI"), + TEST_ENTRY_C(0xD06A0001, NULL, "vcst.s S010, VFPU_E"), + TEST_ENTRY_C(0xD06A0081, NULL, "vcst.p C010, VFPU_E"), + TEST_ENTRY_C(0xD06A8001, NULL, "vcst.t C010, VFPU_E"), + TEST_ENTRY_C(0xD06A8081, NULL, "vcst.q C010, VFPU_E"), + TEST_ENTRY_C(0xD06B0001, NULL, "vcst.s S010, VFPU_LOG2E"), + TEST_ENTRY_C(0xD06B0081, NULL, "vcst.p C010, VFPU_LOG2E"), + TEST_ENTRY_C(0xD06B8001, NULL, "vcst.t C010, VFPU_LOG2E"), + TEST_ENTRY_C(0xD06B8081, NULL, "vcst.q C010, VFPU_LOG2E"), + TEST_ENTRY_C(0xD06C0001, NULL, "vcst.s S010, VFPU_LOG10E"), + TEST_ENTRY_C(0xD06C0081, NULL, "vcst.p C010, VFPU_LOG10E"), + TEST_ENTRY_C(0xD06C8001, NULL, "vcst.t C010, VFPU_LOG10E"), + TEST_ENTRY_C(0xD06C8081, NULL, "vcst.q C010, VFPU_LOG10E"), + TEST_ENTRY_C(0xD06D0001, NULL, "vcst.s S010, VFPU_LN2"), + TEST_ENTRY_C(0xD06D0081, NULL, "vcst.p C010, VFPU_LN2"), + TEST_ENTRY_C(0xD06D8001, NULL, "vcst.t C010, VFPU_LN2"), + TEST_ENTRY_C(0xD06D8081, NULL, "vcst.q C010, VFPU_LN2"), + TEST_ENTRY_C(0xD06E0001, NULL, "vcst.s S010, VFPU_LN10"), + TEST_ENTRY_C(0xD06E0081, NULL, "vcst.p C010, VFPU_LN10"), + TEST_ENTRY_C(0xD06E8001, NULL, "vcst.t C010, VFPU_LN10"), + TEST_ENTRY_C(0xD06E8081, NULL, "vcst.q C010, VFPU_LN10"), + TEST_ENTRY_C(0xD06F0001, NULL, "vcst.s S010, VFPU_2PI"), + TEST_ENTRY_C(0xD06F0081, NULL, "vcst.p C010, VFPU_2PI"), + TEST_ENTRY_C(0xD06F8001, NULL, "vcst.t C010, VFPU_2PI"), + TEST_ENTRY_C(0xD06F8081, NULL, "vcst.q C010, VFPU_2PI"), + TEST_ENTRY_C(0xD0700001, NULL, "vcst.s S010, VFPU_PI_6"), + TEST_ENTRY_C(0xD0700081, NULL, "vcst.p C010, VFPU_PI_6"), + TEST_ENTRY_C(0xD0708001, NULL, "vcst.t C010, VFPU_PI_6"), + TEST_ENTRY_C(0xD0708081, NULL, "vcst.q C010, VFPU_PI_6"), + TEST_ENTRY_C(0xD0710001, NULL, "vcst.s S010, VFPU_LOG10TWO"), + TEST_ENTRY_C(0xD0710081, NULL, "vcst.p C010, VFPU_LOG10TWO"), + TEST_ENTRY_C(0xD0718001, NULL, "vcst.t C010, VFPU_LOG10TWO"), + TEST_ENTRY_C(0xD0718081, NULL, "vcst.q C010, VFPU_LOG10TWO"), + TEST_ENTRY_C(0xD0720001, NULL, "vcst.s S010, VFPU_LOG2TEN"), + TEST_ENTRY_C(0xD0720081, NULL, "vcst.p C010, VFPU_LOG2TEN"), + TEST_ENTRY_C(0xD0728001, NULL, "vcst.t C010, VFPU_LOG2TEN"), + TEST_ENTRY_C(0xD0728081, NULL, "vcst.q C010, VFPU_LOG2TEN"), + TEST_ENTRY_C(0xD0730001, NULL, "vcst.s S010, VFPU_SQRT3_2"), + TEST_ENTRY_C(0xD0730081, NULL, "vcst.p C010, VFPU_SQRT3_2"), + TEST_ENTRY_C(0xD0738001, NULL, "vcst.t C010, VFPU_SQRT3_2"), + TEST_ENTRY_C(0xD0738081, NULL, "vcst.q C010, VFPU_SQRT3_2"), + TEST_ENTRY_C(0xD0740001, NULL, "vcst.s S010, INVALID_20"), + TEST_ENTRY_C(0xD0740081, NULL, "vcst.p C010, INVALID_20"), + TEST_ENTRY_C(0xD0748001, NULL, "vcst.t C010, INVALID_20"), + TEST_ENTRY_C(0xD0748081, NULL, "vcst.q C010, INVALID_20"), + TEST_ENTRY_C(0xD0750001, NULL, "vcst.s S010, INVALID_21"), + TEST_ENTRY_C(0xD0750081, NULL, "vcst.p C010, INVALID_21"), + TEST_ENTRY_C(0xD0758001, NULL, "vcst.t C010, INVALID_21"), + TEST_ENTRY_C(0xD0758081, NULL, "vcst.q C010, INVALID_21"), + TEST_ENTRY_C(0xD0760001, NULL, "vcst.s S010, INVALID_22"), + TEST_ENTRY_C(0xD0760081, NULL, "vcst.p C010, INVALID_22"), + TEST_ENTRY_C(0xD0768001, NULL, "vcst.t C010, INVALID_22"), + TEST_ENTRY_C(0xD0768081, NULL, "vcst.q C010, INVALID_22"), + TEST_ENTRY_C(0xD0770001, NULL, "vcst.s S010, INVALID_23"), + TEST_ENTRY_C(0xD0770081, NULL, "vcst.p C010, INVALID_23"), + TEST_ENTRY_C(0xD0778001, NULL, "vcst.t C010, INVALID_23"), + TEST_ENTRY_C(0xD0778081, NULL, "vcst.q C010, INVALID_23"), + TEST_ENTRY_C(0xD0780001, NULL, "vcst.s S010, INVALID_24"), + TEST_ENTRY_C(0xD0780081, NULL, "vcst.p C010, INVALID_24"), + TEST_ENTRY_C(0xD0788001, NULL, "vcst.t C010, INVALID_24"), + TEST_ENTRY_C(0xD0788081, NULL, "vcst.q C010, INVALID_24"), + TEST_ENTRY_C(0xD0790001, NULL, "vcst.s S010, INVALID_25"), + TEST_ENTRY_C(0xD0790081, NULL, "vcst.p C010, INVALID_25"), + TEST_ENTRY_C(0xD0798001, NULL, "vcst.t C010, INVALID_25"), + TEST_ENTRY_C(0xD0798081, NULL, "vcst.q C010, INVALID_25"), + TEST_ENTRY_C(0xD07A0001, NULL, "vcst.s S010, INVALID_26"), + TEST_ENTRY_C(0xD07A0081, NULL, "vcst.p C010, INVALID_26"), + TEST_ENTRY_C(0xD07A8001, NULL, "vcst.t C010, INVALID_26"), + TEST_ENTRY_C(0xD07A8081, NULL, "vcst.q C010, INVALID_26"), + TEST_ENTRY_C(0xD07B0001, NULL, "vcst.s S010, INVALID_27"), + TEST_ENTRY_C(0xD07B0081, NULL, "vcst.p C010, INVALID_27"), + TEST_ENTRY_C(0xD07B8001, NULL, "vcst.t C010, INVALID_27"), + TEST_ENTRY_C(0xD07B8081, NULL, "vcst.q C010, INVALID_27"), + TEST_ENTRY_C(0xD07C0001, NULL, "vcst.s S010, INVALID_28"), + TEST_ENTRY_C(0xD07C0081, NULL, "vcst.p C010, INVALID_28"), + TEST_ENTRY_C(0xD07C8001, NULL, "vcst.t C010, INVALID_28"), + TEST_ENTRY_C(0xD07C8081, NULL, "vcst.q C010, INVALID_28"), + TEST_ENTRY_C(0xD07D0001, NULL, "vcst.s S010, INVALID_29"), + TEST_ENTRY_C(0xD07D0081, NULL, "vcst.p C010, INVALID_29"), + TEST_ENTRY_C(0xD07D8001, NULL, "vcst.t C010, INVALID_29"), + TEST_ENTRY_C(0xD07D8081, NULL, "vcst.q C010, INVALID_29"), + TEST_ENTRY_C(0xD07E0001, NULL, "vcst.s S010, INVALID_30"), + TEST_ENTRY_C(0xD07E0081, NULL, "vcst.p C010, INVALID_30"), + TEST_ENTRY_C(0xD07E8001, NULL, "vcst.t C010, INVALID_30"), + TEST_ENTRY_C(0xD07E8081, NULL, "vcst.q C010, INVALID_30"), + TEST_ENTRY_C(0xD07F0001, NULL, "vcst.s S010, INVALID_31"), + TEST_ENTRY_C(0xD07F0081, NULL, "vcst.p C010, INVALID_31"), + TEST_ENTRY_C(0xD07F8001, NULL, "vcst.t C010, INVALID_31"), + TEST_ENTRY_C(0xD07F8081, NULL, "vcst.q C010, INVALID_31"), + TEST_ENTRY_C(0xD0801001, NULL, ".word 0xD0801001 # INVALID $a0, $zero, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0801081, NULL, ".word 0xD0801081 # INVALID $a0, $zero, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0809001, NULL, ".word 0xD0809001 # INVALID $a0, $zero, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0809081, NULL, ".word 0xD0809081 # INVALID $a0, $zero, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0811001, NULL, ".word 0xD0811001 # INVALID $a0, $at, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0811081, NULL, ".word 0xD0811081 # INVALID $a0, $at, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0819001, NULL, ".word 0xD0819001 # INVALID $a0, $at, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0819081, NULL, ".word 0xD0819081 # INVALID $a0, $at, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0821001, NULL, ".word 0xD0821001 # INVALID $a0, $v0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0821081, NULL, ".word 0xD0821081 # INVALID $a0, $v0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0829001, NULL, ".word 0xD0829001 # INVALID $a0, $v0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0829081, NULL, ".word 0xD0829081 # INVALID $a0, $v0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0831001, NULL, ".word 0xD0831001 # INVALID $a0, $v1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0831081, NULL, ".word 0xD0831081 # INVALID $a0, $v1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0839001, NULL, ".word 0xD0839001 # INVALID $a0, $v1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0839081, NULL, ".word 0xD0839081 # INVALID $a0, $v1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0841001, NULL, ".word 0xD0841001 # INVALID $a0, $a0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0841081, NULL, ".word 0xD0841081 # INVALID $a0, $a0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0849001, NULL, ".word 0xD0849001 # INVALID $a0, $a0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0849081, NULL, ".word 0xD0849081 # INVALID $a0, $a0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0851001, NULL, ".word 0xD0851001 # INVALID $a0, $a1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0851081, NULL, ".word 0xD0851081 # INVALID $a0, $a1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0859001, NULL, ".word 0xD0859001 # INVALID $a0, $a1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0859081, NULL, ".word 0xD0859081 # INVALID $a0, $a1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0861001, NULL, ".word 0xD0861001 # INVALID $a0, $a2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0861081, NULL, ".word 0xD0861081 # INVALID $a0, $a2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0869001, NULL, ".word 0xD0869001 # INVALID $a0, $a2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0869081, NULL, ".word 0xD0869081 # INVALID $a0, $a2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0871001, NULL, ".word 0xD0871001 # INVALID $a0, $a3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0871081, NULL, ".word 0xD0871081 # INVALID $a0, $a3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0879001, NULL, ".word 0xD0879001 # INVALID $a0, $a3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0879081, NULL, ".word 0xD0879081 # INVALID $a0, $a3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0881001, NULL, ".word 0xD0881001 # INVALID $a0, $t0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0881081, NULL, ".word 0xD0881081 # INVALID $a0, $t0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0889001, NULL, ".word 0xD0889001 # INVALID $a0, $t0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0889081, NULL, ".word 0xD0889081 # INVALID $a0, $t0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0891001, NULL, ".word 0xD0891001 # INVALID $a0, $t1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0891081, NULL, ".word 0xD0891081 # INVALID $a0, $t1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0899001, NULL, ".word 0xD0899001 # INVALID $a0, $t1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0899081, NULL, ".word 0xD0899081 # INVALID $a0, $t1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD08A1001, NULL, ".word 0xD08A1001 # INVALID $a0, $t2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD08A1081, NULL, ".word 0xD08A1081 # INVALID $a0, $t2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD08A9001, NULL, ".word 0xD08A9001 # INVALID $a0, $t2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD08A9081, NULL, ".word 0xD08A9081 # INVALID $a0, $t2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD08B1001, NULL, ".word 0xD08B1001 # INVALID $a0, $t3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD08B1081, NULL, ".word 0xD08B1081 # INVALID $a0, $t3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD08B9001, NULL, ".word 0xD08B9001 # INVALID $a0, $t3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD08B9081, NULL, ".word 0xD08B9081 # INVALID $a0, $t3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD08C1001, NULL, ".word 0xD08C1001 # INVALID $a0, $t4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD08C1081, NULL, ".word 0xD08C1081 # INVALID $a0, $t4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD08C9001, NULL, ".word 0xD08C9001 # INVALID $a0, $t4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD08C9081, NULL, ".word 0xD08C9081 # INVALID $a0, $t4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD08D1001, NULL, ".word 0xD08D1001 # INVALID $a0, $t5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD08D1081, NULL, ".word 0xD08D1081 # INVALID $a0, $t5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD08D9001, NULL, ".word 0xD08D9001 # INVALID $a0, $t5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD08D9081, NULL, ".word 0xD08D9081 # INVALID $a0, $t5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD08E1001, NULL, ".word 0xD08E1001 # INVALID $a0, $t6, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD08E1081, NULL, ".word 0xD08E1081 # INVALID $a0, $t6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD08E9001, NULL, ".word 0xD08E9001 # INVALID $a0, $t6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD08E9081, NULL, ".word 0xD08E9081 # INVALID $a0, $t6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD08F1001, NULL, ".word 0xD08F1001 # INVALID $a0, $t7, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD08F1081, NULL, ".word 0xD08F1081 # INVALID $a0, $t7, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD08F9001, NULL, ".word 0xD08F9001 # INVALID $a0, $t7, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD08F9081, NULL, ".word 0xD08F9081 # INVALID $a0, $t7, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0901001, NULL, ".word 0xD0901001 # INVALID $a0, $s0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0901081, NULL, ".word 0xD0901081 # INVALID $a0, $s0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0909001, NULL, ".word 0xD0909001 # INVALID $a0, $s0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0909081, NULL, ".word 0xD0909081 # INVALID $a0, $s0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0911001, NULL, ".word 0xD0911001 # INVALID $a0, $s1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0911081, NULL, ".word 0xD0911081 # INVALID $a0, $s1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0919001, NULL, ".word 0xD0919001 # INVALID $a0, $s1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0919081, NULL, ".word 0xD0919081 # INVALID $a0, $s1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0921001, NULL, ".word 0xD0921001 # INVALID $a0, $s2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0921081, NULL, ".word 0xD0921081 # INVALID $a0, $s2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0929001, NULL, ".word 0xD0929001 # INVALID $a0, $s2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0929081, NULL, ".word 0xD0929081 # INVALID $a0, $s2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0931001, NULL, ".word 0xD0931001 # INVALID $a0, $s3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0931081, NULL, ".word 0xD0931081 # INVALID $a0, $s3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0939001, NULL, ".word 0xD0939001 # INVALID $a0, $s3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0939081, NULL, ".word 0xD0939081 # INVALID $a0, $s3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0941001, NULL, ".word 0xD0941001 # INVALID $a0, $s4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0941081, NULL, ".word 0xD0941081 # INVALID $a0, $s4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0949001, NULL, ".word 0xD0949001 # INVALID $a0, $s4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0949081, NULL, ".word 0xD0949081 # INVALID $a0, $s4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0951001, NULL, ".word 0xD0951001 # INVALID $a0, $s5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0951081, NULL, ".word 0xD0951081 # INVALID $a0, $s5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0959001, NULL, ".word 0xD0959001 # INVALID $a0, $s5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0959081, NULL, ".word 0xD0959081 # INVALID $a0, $s5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0961001, NULL, ".word 0xD0961001 # INVALID $a0, $s6, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0961081, NULL, ".word 0xD0961081 # INVALID $a0, $s6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0969001, NULL, ".word 0xD0969001 # INVALID $a0, $s6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0969081, NULL, ".word 0xD0969081 # INVALID $a0, $s6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0971001, NULL, ".word 0xD0971001 # INVALID $a0, $s7, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0971081, NULL, ".word 0xD0971081 # INVALID $a0, $s7, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0979001, NULL, ".word 0xD0979001 # INVALID $a0, $s7, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0979081, NULL, ".word 0xD0979081 # INVALID $a0, $s7, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0981001, NULL, ".word 0xD0981001 # INVALID $a0, $t8, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0981081, NULL, ".word 0xD0981081 # INVALID $a0, $t8, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0989001, NULL, ".word 0xD0989001 # INVALID $a0, $t8, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0989081, NULL, ".word 0xD0989081 # INVALID $a0, $t8, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0991001, NULL, ".word 0xD0991001 # INVALID $a0, $t9, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0991081, NULL, ".word 0xD0991081 # INVALID $a0, $t9, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0999001, NULL, ".word 0xD0999001 # INVALID $a0, $t9, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0999081, NULL, ".word 0xD0999081 # INVALID $a0, $t9, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD09A1001, NULL, ".word 0xD09A1001 # INVALID $a0, $k0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD09A1081, NULL, ".word 0xD09A1081 # INVALID $a0, $k0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD09A9001, NULL, ".word 0xD09A9001 # INVALID $a0, $k0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD09A9081, NULL, ".word 0xD09A9081 # INVALID $a0, $k0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD09B1001, NULL, ".word 0xD09B1001 # INVALID $a0, $k1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD09B1081, NULL, ".word 0xD09B1081 # INVALID $a0, $k1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD09B9001, NULL, ".word 0xD09B9001 # INVALID $a0, $k1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD09B9081, NULL, ".word 0xD09B9081 # INVALID $a0, $k1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD09C1001, NULL, ".word 0xD09C1001 # INVALID $a0, $gp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD09C1081, NULL, ".word 0xD09C1081 # INVALID $a0, $gp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD09C9001, NULL, ".word 0xD09C9001 # INVALID $a0, $gp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD09C9081, NULL, ".word 0xD09C9081 # INVALID $a0, $gp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD09D1001, NULL, ".word 0xD09D1001 # INVALID $a0, $sp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD09D1081, NULL, ".word 0xD09D1081 # INVALID $a0, $sp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD09D9001, NULL, ".word 0xD09D9001 # INVALID $a0, $sp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD09D9081, NULL, ".word 0xD09D9081 # INVALID $a0, $sp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD09E1001, NULL, ".word 0xD09E1001 # INVALID $a0, $fp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD09E1081, NULL, ".word 0xD09E1081 # INVALID $a0, $fp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD09E9001, NULL, ".word 0xD09E9001 # INVALID $a0, $fp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD09E9081, NULL, ".word 0xD09E9081 # INVALID $a0, $fp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD09F1001, NULL, ".word 0xD09F1001 # INVALID $a0, $ra, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD09F1081, NULL, ".word 0xD09F1081 # INVALID $a0, $ra, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD09F9001, NULL, ".word 0xD09F9001 # INVALID $a0, $ra, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD09F9081, NULL, ".word 0xD09F9081 # INVALID $a0, $ra, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0A01001, NULL, ".word 0xD0A01001 # INVALID $a1, $zero, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0A01081, NULL, ".word 0xD0A01081 # INVALID $a1, $zero, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0A09001, NULL, ".word 0xD0A09001 # INVALID $a1, $zero, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0A09081, NULL, ".word 0xD0A09081 # INVALID $a1, $zero, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0A11001, NULL, ".word 0xD0A11001 # INVALID $a1, $at, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0A11081, NULL, ".word 0xD0A11081 # INVALID $a1, $at, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0A19001, NULL, ".word 0xD0A19001 # INVALID $a1, $at, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0A19081, NULL, ".word 0xD0A19081 # INVALID $a1, $at, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0A21001, NULL, ".word 0xD0A21001 # INVALID $a1, $v0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0A21081, NULL, ".word 0xD0A21081 # INVALID $a1, $v0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0A29001, NULL, ".word 0xD0A29001 # INVALID $a1, $v0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0A29081, NULL, ".word 0xD0A29081 # INVALID $a1, $v0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0A31001, NULL, ".word 0xD0A31001 # INVALID $a1, $v1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0A31081, NULL, ".word 0xD0A31081 # INVALID $a1, $v1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0A39001, NULL, ".word 0xD0A39001 # INVALID $a1, $v1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0A39081, NULL, ".word 0xD0A39081 # INVALID $a1, $v1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0A41001, NULL, ".word 0xD0A41001 # INVALID $a1, $a0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0A41081, NULL, ".word 0xD0A41081 # INVALID $a1, $a0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0A49001, NULL, ".word 0xD0A49001 # INVALID $a1, $a0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0A49081, NULL, ".word 0xD0A49081 # INVALID $a1, $a0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0A51001, NULL, ".word 0xD0A51001 # INVALID $a1, $a1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0A51081, NULL, ".word 0xD0A51081 # INVALID $a1, $a1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0A59001, NULL, ".word 0xD0A59001 # INVALID $a1, $a1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0A59081, NULL, ".word 0xD0A59081 # INVALID $a1, $a1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0A61001, NULL, ".word 0xD0A61001 # INVALID $a1, $a2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0A61081, NULL, ".word 0xD0A61081 # INVALID $a1, $a2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0A69001, NULL, ".word 0xD0A69001 # INVALID $a1, $a2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0A69081, NULL, ".word 0xD0A69081 # INVALID $a1, $a2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0A71001, NULL, ".word 0xD0A71001 # INVALID $a1, $a3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0A71081, NULL, ".word 0xD0A71081 # INVALID $a1, $a3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0A79001, NULL, ".word 0xD0A79001 # INVALID $a1, $a3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0A79081, NULL, ".word 0xD0A79081 # INVALID $a1, $a3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0A81001, NULL, ".word 0xD0A81001 # INVALID $a1, $t0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0A81081, NULL, ".word 0xD0A81081 # INVALID $a1, $t0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0A89001, NULL, ".word 0xD0A89001 # INVALID $a1, $t0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0A89081, NULL, ".word 0xD0A89081 # INVALID $a1, $t0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0A91001, NULL, ".word 0xD0A91001 # INVALID $a1, $t1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0A91081, NULL, ".word 0xD0A91081 # INVALID $a1, $t1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0A99001, NULL, ".word 0xD0A99001 # INVALID $a1, $t1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0A99081, NULL, ".word 0xD0A99081 # INVALID $a1, $t1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0AA1001, NULL, ".word 0xD0AA1001 # INVALID $a1, $t2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0AA1081, NULL, ".word 0xD0AA1081 # INVALID $a1, $t2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0AA9001, NULL, ".word 0xD0AA9001 # INVALID $a1, $t2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0AA9081, NULL, ".word 0xD0AA9081 # INVALID $a1, $t2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0AB1001, NULL, ".word 0xD0AB1001 # INVALID $a1, $t3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0AB1081, NULL, ".word 0xD0AB1081 # INVALID $a1, $t3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0AB9001, NULL, ".word 0xD0AB9001 # INVALID $a1, $t3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0AB9081, NULL, ".word 0xD0AB9081 # INVALID $a1, $t3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0AC1001, NULL, ".word 0xD0AC1001 # INVALID $a1, $t4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0AC1081, NULL, ".word 0xD0AC1081 # INVALID $a1, $t4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0AC9001, NULL, ".word 0xD0AC9001 # INVALID $a1, $t4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0AC9081, NULL, ".word 0xD0AC9081 # INVALID $a1, $t4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0AD1001, NULL, ".word 0xD0AD1001 # INVALID $a1, $t5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0AD1081, NULL, ".word 0xD0AD1081 # INVALID $a1, $t5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0AD9001, NULL, ".word 0xD0AD9001 # INVALID $a1, $t5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0AD9081, NULL, ".word 0xD0AD9081 # INVALID $a1, $t5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0AE1001, NULL, ".word 0xD0AE1001 # INVALID $a1, $t6, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0AE1081, NULL, ".word 0xD0AE1081 # INVALID $a1, $t6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0AE9001, NULL, ".word 0xD0AE9001 # INVALID $a1, $t6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0AE9081, NULL, ".word 0xD0AE9081 # INVALID $a1, $t6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0AF1001, NULL, ".word 0xD0AF1001 # INVALID $a1, $t7, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0AF1081, NULL, ".word 0xD0AF1081 # INVALID $a1, $t7, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0AF9001, NULL, ".word 0xD0AF9001 # INVALID $a1, $t7, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0AF9081, NULL, ".word 0xD0AF9081 # INVALID $a1, $t7, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0B01001, NULL, ".word 0xD0B01001 # INVALID $a1, $s0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0B01081, NULL, ".word 0xD0B01081 # INVALID $a1, $s0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0B09001, NULL, ".word 0xD0B09001 # INVALID $a1, $s0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0B09081, NULL, ".word 0xD0B09081 # INVALID $a1, $s0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0B11001, NULL, ".word 0xD0B11001 # INVALID $a1, $s1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0B11081, NULL, ".word 0xD0B11081 # INVALID $a1, $s1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0B19001, NULL, ".word 0xD0B19001 # INVALID $a1, $s1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0B19081, NULL, ".word 0xD0B19081 # INVALID $a1, $s1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0B21001, NULL, ".word 0xD0B21001 # INVALID $a1, $s2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0B21081, NULL, ".word 0xD0B21081 # INVALID $a1, $s2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0B29001, NULL, ".word 0xD0B29001 # INVALID $a1, $s2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0B29081, NULL, ".word 0xD0B29081 # INVALID $a1, $s2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0B31001, NULL, ".word 0xD0B31001 # INVALID $a1, $s3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0B31081, NULL, ".word 0xD0B31081 # INVALID $a1, $s3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0B39001, NULL, ".word 0xD0B39001 # INVALID $a1, $s3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0B39081, NULL, ".word 0xD0B39081 # INVALID $a1, $s3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0B41001, NULL, ".word 0xD0B41001 # INVALID $a1, $s4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0B41081, NULL, ".word 0xD0B41081 # INVALID $a1, $s4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0B49001, NULL, ".word 0xD0B49001 # INVALID $a1, $s4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0B49081, NULL, ".word 0xD0B49081 # INVALID $a1, $s4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0B51001, NULL, ".word 0xD0B51001 # INVALID $a1, $s5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0B51081, NULL, ".word 0xD0B51081 # INVALID $a1, $s5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0B59001, NULL, ".word 0xD0B59001 # INVALID $a1, $s5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0B59081, NULL, ".word 0xD0B59081 # INVALID $a1, $s5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0B61001, NULL, ".word 0xD0B61001 # INVALID $a1, $s6, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0B61081, NULL, ".word 0xD0B61081 # INVALID $a1, $s6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0B69001, NULL, ".word 0xD0B69001 # INVALID $a1, $s6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0B69081, NULL, ".word 0xD0B69081 # INVALID $a1, $s6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0B71001, NULL, ".word 0xD0B71001 # INVALID $a1, $s7, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0B71081, NULL, ".word 0xD0B71081 # INVALID $a1, $s7, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0B79001, NULL, ".word 0xD0B79001 # INVALID $a1, $s7, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0B79081, NULL, ".word 0xD0B79081 # INVALID $a1, $s7, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0B81001, NULL, ".word 0xD0B81001 # INVALID $a1, $t8, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0B81081, NULL, ".word 0xD0B81081 # INVALID $a1, $t8, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0B89001, NULL, ".word 0xD0B89001 # INVALID $a1, $t8, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0B89081, NULL, ".word 0xD0B89081 # INVALID $a1, $t8, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0B91001, NULL, ".word 0xD0B91001 # INVALID $a1, $t9, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0B91081, NULL, ".word 0xD0B91081 # INVALID $a1, $t9, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0B99001, NULL, ".word 0xD0B99001 # INVALID $a1, $t9, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0B99081, NULL, ".word 0xD0B99081 # INVALID $a1, $t9, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0BA1001, NULL, ".word 0xD0BA1001 # INVALID $a1, $k0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0BA1081, NULL, ".word 0xD0BA1081 # INVALID $a1, $k0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0BA9001, NULL, ".word 0xD0BA9001 # INVALID $a1, $k0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0BA9081, NULL, ".word 0xD0BA9081 # INVALID $a1, $k0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0BB1001, NULL, ".word 0xD0BB1001 # INVALID $a1, $k1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0BB1081, NULL, ".word 0xD0BB1081 # INVALID $a1, $k1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0BB9001, NULL, ".word 0xD0BB9001 # INVALID $a1, $k1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0BB9081, NULL, ".word 0xD0BB9081 # INVALID $a1, $k1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0BC1001, NULL, ".word 0xD0BC1001 # INVALID $a1, $gp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0BC1081, NULL, ".word 0xD0BC1081 # INVALID $a1, $gp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0BC9001, NULL, ".word 0xD0BC9001 # INVALID $a1, $gp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0BC9081, NULL, ".word 0xD0BC9081 # INVALID $a1, $gp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0BD1001, NULL, ".word 0xD0BD1001 # INVALID $a1, $sp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0BD1081, NULL, ".word 0xD0BD1081 # INVALID $a1, $sp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0BD9001, NULL, ".word 0xD0BD9001 # INVALID $a1, $sp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0BD9081, NULL, ".word 0xD0BD9081 # INVALID $a1, $sp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0BE1001, NULL, ".word 0xD0BE1001 # INVALID $a1, $fp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0BE1081, NULL, ".word 0xD0BE1081 # INVALID $a1, $fp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0BE9001, NULL, ".word 0xD0BE9001 # INVALID $a1, $fp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0BE9081, NULL, ".word 0xD0BE9081 # INVALID $a1, $fp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0BF1001, NULL, ".word 0xD0BF1001 # INVALID $a1, $ra, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0BF1081, NULL, ".word 0xD0BF1081 # INVALID $a1, $ra, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0BF9001, NULL, ".word 0xD0BF9001 # INVALID $a1, $ra, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0BF9081, NULL, ".word 0xD0BF9081 # INVALID $a1, $ra, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0C01001, NULL, ".word 0xD0C01001 # INVALID $a2, $zero, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0C01081, NULL, ".word 0xD0C01081 # INVALID $a2, $zero, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0C09001, NULL, ".word 0xD0C09001 # INVALID $a2, $zero, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0C09081, NULL, ".word 0xD0C09081 # INVALID $a2, $zero, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0C11001, NULL, ".word 0xD0C11001 # INVALID $a2, $at, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0C11081, NULL, ".word 0xD0C11081 # INVALID $a2, $at, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0C19001, NULL, ".word 0xD0C19001 # INVALID $a2, $at, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0C19081, NULL, ".word 0xD0C19081 # INVALID $a2, $at, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0C21001, NULL, ".word 0xD0C21001 # INVALID $a2, $v0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0C21081, NULL, ".word 0xD0C21081 # INVALID $a2, $v0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0C29001, NULL, ".word 0xD0C29001 # INVALID $a2, $v0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0C29081, NULL, ".word 0xD0C29081 # INVALID $a2, $v0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0C31001, NULL, ".word 0xD0C31001 # INVALID $a2, $v1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0C31081, NULL, ".word 0xD0C31081 # INVALID $a2, $v1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0C39001, NULL, ".word 0xD0C39001 # INVALID $a2, $v1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0C39081, NULL, ".word 0xD0C39081 # INVALID $a2, $v1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0C41001, NULL, ".word 0xD0C41001 # INVALID $a2, $a0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0C41081, NULL, ".word 0xD0C41081 # INVALID $a2, $a0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0C49001, NULL, ".word 0xD0C49001 # INVALID $a2, $a0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0C49081, NULL, ".word 0xD0C49081 # INVALID $a2, $a0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0C51001, NULL, ".word 0xD0C51001 # INVALID $a2, $a1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0C51081, NULL, ".word 0xD0C51081 # INVALID $a2, $a1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0C59001, NULL, ".word 0xD0C59001 # INVALID $a2, $a1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0C59081, NULL, ".word 0xD0C59081 # INVALID $a2, $a1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0C61001, NULL, ".word 0xD0C61001 # INVALID $a2, $a2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0C61081, NULL, ".word 0xD0C61081 # INVALID $a2, $a2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0C69001, NULL, ".word 0xD0C69001 # INVALID $a2, $a2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0C69081, NULL, ".word 0xD0C69081 # INVALID $a2, $a2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0C71001, NULL, ".word 0xD0C71001 # INVALID $a2, $a3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0C71081, NULL, ".word 0xD0C71081 # INVALID $a2, $a3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0C79001, NULL, ".word 0xD0C79001 # INVALID $a2, $a3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0C79081, NULL, ".word 0xD0C79081 # INVALID $a2, $a3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0C81001, NULL, ".word 0xD0C81001 # INVALID $a2, $t0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0C81081, NULL, ".word 0xD0C81081 # INVALID $a2, $t0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0C89001, NULL, ".word 0xD0C89001 # INVALID $a2, $t0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0C89081, NULL, ".word 0xD0C89081 # INVALID $a2, $t0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0C91001, NULL, ".word 0xD0C91001 # INVALID $a2, $t1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0C91081, NULL, ".word 0xD0C91081 # INVALID $a2, $t1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0C99001, NULL, ".word 0xD0C99001 # INVALID $a2, $t1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0C99081, NULL, ".word 0xD0C99081 # INVALID $a2, $t1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0CA1001, NULL, ".word 0xD0CA1001 # INVALID $a2, $t2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0CA1081, NULL, ".word 0xD0CA1081 # INVALID $a2, $t2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0CA9001, NULL, ".word 0xD0CA9001 # INVALID $a2, $t2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0CA9081, NULL, ".word 0xD0CA9081 # INVALID $a2, $t2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0CB1001, NULL, ".word 0xD0CB1001 # INVALID $a2, $t3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0CB1081, NULL, ".word 0xD0CB1081 # INVALID $a2, $t3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0CB9001, NULL, ".word 0xD0CB9001 # INVALID $a2, $t3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0CB9081, NULL, ".word 0xD0CB9081 # INVALID $a2, $t3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0CC1001, NULL, ".word 0xD0CC1001 # INVALID $a2, $t4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0CC1081, NULL, ".word 0xD0CC1081 # INVALID $a2, $t4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0CC9001, NULL, ".word 0xD0CC9001 # INVALID $a2, $t4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0CC9081, NULL, ".word 0xD0CC9081 # INVALID $a2, $t4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0CD1001, NULL, ".word 0xD0CD1001 # INVALID $a2, $t5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0CD1081, NULL, ".word 0xD0CD1081 # INVALID $a2, $t5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0CD9001, NULL, ".word 0xD0CD9001 # INVALID $a2, $t5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0CD9081, NULL, ".word 0xD0CD9081 # INVALID $a2, $t5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0CE1001, NULL, ".word 0xD0CE1001 # INVALID $a2, $t6, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0CE1081, NULL, ".word 0xD0CE1081 # INVALID $a2, $t6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0CE9001, NULL, ".word 0xD0CE9001 # INVALID $a2, $t6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0CE9081, NULL, ".word 0xD0CE9081 # INVALID $a2, $t6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0CF1001, NULL, ".word 0xD0CF1001 # INVALID $a2, $t7, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0CF1081, NULL, ".word 0xD0CF1081 # INVALID $a2, $t7, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0CF9001, NULL, ".word 0xD0CF9001 # INVALID $a2, $t7, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0CF9081, NULL, ".word 0xD0CF9081 # INVALID $a2, $t7, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0D01001, NULL, ".word 0xD0D01001 # INVALID $a2, $s0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0D01081, NULL, ".word 0xD0D01081 # INVALID $a2, $s0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0D09001, NULL, ".word 0xD0D09001 # INVALID $a2, $s0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0D09081, NULL, ".word 0xD0D09081 # INVALID $a2, $s0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0D11001, NULL, ".word 0xD0D11001 # INVALID $a2, $s1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0D11081, NULL, ".word 0xD0D11081 # INVALID $a2, $s1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0D19001, NULL, ".word 0xD0D19001 # INVALID $a2, $s1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0D19081, NULL, ".word 0xD0D19081 # INVALID $a2, $s1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0D21001, NULL, ".word 0xD0D21001 # INVALID $a2, $s2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0D21081, NULL, ".word 0xD0D21081 # INVALID $a2, $s2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0D29001, NULL, ".word 0xD0D29001 # INVALID $a2, $s2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0D29081, NULL, ".word 0xD0D29081 # INVALID $a2, $s2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0D31001, NULL, ".word 0xD0D31001 # INVALID $a2, $s3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0D31081, NULL, ".word 0xD0D31081 # INVALID $a2, $s3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0D39001, NULL, ".word 0xD0D39001 # INVALID $a2, $s3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0D39081, NULL, ".word 0xD0D39081 # INVALID $a2, $s3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0D41001, NULL, ".word 0xD0D41001 # INVALID $a2, $s4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0D41081, NULL, ".word 0xD0D41081 # INVALID $a2, $s4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0D49001, NULL, ".word 0xD0D49001 # INVALID $a2, $s4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0D49081, NULL, ".word 0xD0D49081 # INVALID $a2, $s4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0D51001, NULL, ".word 0xD0D51001 # INVALID $a2, $s5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0D51081, NULL, ".word 0xD0D51081 # INVALID $a2, $s5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0D59001, NULL, ".word 0xD0D59001 # INVALID $a2, $s5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0D59081, NULL, ".word 0xD0D59081 # INVALID $a2, $s5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0D61001, NULL, ".word 0xD0D61001 # INVALID $a2, $s6, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0D61081, NULL, ".word 0xD0D61081 # INVALID $a2, $s6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0D69001, NULL, ".word 0xD0D69001 # INVALID $a2, $s6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0D69081, NULL, ".word 0xD0D69081 # INVALID $a2, $s6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0D71001, NULL, ".word 0xD0D71001 # INVALID $a2, $s7, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0D71081, NULL, ".word 0xD0D71081 # INVALID $a2, $s7, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0D79001, NULL, ".word 0xD0D79001 # INVALID $a2, $s7, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0D79081, NULL, ".word 0xD0D79081 # INVALID $a2, $s7, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0D81001, NULL, ".word 0xD0D81001 # INVALID $a2, $t8, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0D81081, NULL, ".word 0xD0D81081 # INVALID $a2, $t8, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0D89001, NULL, ".word 0xD0D89001 # INVALID $a2, $t8, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0D89081, NULL, ".word 0xD0D89081 # INVALID $a2, $t8, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0D91001, NULL, ".word 0xD0D91001 # INVALID $a2, $t9, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0D91081, NULL, ".word 0xD0D91081 # INVALID $a2, $t9, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0D99001, NULL, ".word 0xD0D99001 # INVALID $a2, $t9, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0D99081, NULL, ".word 0xD0D99081 # INVALID $a2, $t9, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0DA1001, NULL, ".word 0xD0DA1001 # INVALID $a2, $k0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0DA1081, NULL, ".word 0xD0DA1081 # INVALID $a2, $k0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0DA9001, NULL, ".word 0xD0DA9001 # INVALID $a2, $k0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0DA9081, NULL, ".word 0xD0DA9081 # INVALID $a2, $k0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0DB1001, NULL, ".word 0xD0DB1001 # INVALID $a2, $k1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0DB1081, NULL, ".word 0xD0DB1081 # INVALID $a2, $k1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0DB9001, NULL, ".word 0xD0DB9001 # INVALID $a2, $k1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0DB9081, NULL, ".word 0xD0DB9081 # INVALID $a2, $k1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0DC1001, NULL, ".word 0xD0DC1001 # INVALID $a2, $gp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0DC1081, NULL, ".word 0xD0DC1081 # INVALID $a2, $gp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0DC9001, NULL, ".word 0xD0DC9001 # INVALID $a2, $gp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0DC9081, NULL, ".word 0xD0DC9081 # INVALID $a2, $gp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0DD1001, NULL, ".word 0xD0DD1001 # INVALID $a2, $sp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0DD1081, NULL, ".word 0xD0DD1081 # INVALID $a2, $sp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0DD9001, NULL, ".word 0xD0DD9001 # INVALID $a2, $sp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0DD9081, NULL, ".word 0xD0DD9081 # INVALID $a2, $sp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0DE1001, NULL, ".word 0xD0DE1001 # INVALID $a2, $fp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0DE1081, NULL, ".word 0xD0DE1081 # INVALID $a2, $fp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0DE9001, NULL, ".word 0xD0DE9001 # INVALID $a2, $fp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0DE9081, NULL, ".word 0xD0DE9081 # INVALID $a2, $fp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0DF1001, NULL, ".word 0xD0DF1001 # INVALID $a2, $ra, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0DF1081, NULL, ".word 0xD0DF1081 # INVALID $a2, $ra, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0DF9001, NULL, ".word 0xD0DF9001 # INVALID $a2, $ra, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0DF9081, NULL, ".word 0xD0DF9081 # INVALID $a2, $ra, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0E01001, NULL, ".word 0xD0E01001 # INVALID $a3, $zero, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0E01081, NULL, ".word 0xD0E01081 # INVALID $a3, $zero, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0E09001, NULL, ".word 0xD0E09001 # INVALID $a3, $zero, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0E09081, NULL, ".word 0xD0E09081 # INVALID $a3, $zero, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0E11001, NULL, ".word 0xD0E11001 # INVALID $a3, $at, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0E11081, NULL, ".word 0xD0E11081 # INVALID $a3, $at, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0E19001, NULL, ".word 0xD0E19001 # INVALID $a3, $at, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0E19081, NULL, ".word 0xD0E19081 # INVALID $a3, $at, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0E21001, NULL, ".word 0xD0E21001 # INVALID $a3, $v0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0E21081, NULL, ".word 0xD0E21081 # INVALID $a3, $v0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0E29001, NULL, ".word 0xD0E29001 # INVALID $a3, $v0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0E29081, NULL, ".word 0xD0E29081 # INVALID $a3, $v0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0E31001, NULL, ".word 0xD0E31001 # INVALID $a3, $v1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0E31081, NULL, ".word 0xD0E31081 # INVALID $a3, $v1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0E39001, NULL, ".word 0xD0E39001 # INVALID $a3, $v1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0E39081, NULL, ".word 0xD0E39081 # INVALID $a3, $v1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0E41001, NULL, ".word 0xD0E41001 # INVALID $a3, $a0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0E41081, NULL, ".word 0xD0E41081 # INVALID $a3, $a0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0E49001, NULL, ".word 0xD0E49001 # INVALID $a3, $a0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0E49081, NULL, ".word 0xD0E49081 # INVALID $a3, $a0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0E51001, NULL, ".word 0xD0E51001 # INVALID $a3, $a1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0E51081, NULL, ".word 0xD0E51081 # INVALID $a3, $a1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0E59001, NULL, ".word 0xD0E59001 # INVALID $a3, $a1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0E59081, NULL, ".word 0xD0E59081 # INVALID $a3, $a1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0E61001, NULL, ".word 0xD0E61001 # INVALID $a3, $a2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0E61081, NULL, ".word 0xD0E61081 # INVALID $a3, $a2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0E69001, NULL, ".word 0xD0E69001 # INVALID $a3, $a2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0E69081, NULL, ".word 0xD0E69081 # INVALID $a3, $a2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0E71001, NULL, ".word 0xD0E71001 # INVALID $a3, $a3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0E71081, NULL, ".word 0xD0E71081 # INVALID $a3, $a3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0E79001, NULL, ".word 0xD0E79001 # INVALID $a3, $a3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0E79081, NULL, ".word 0xD0E79081 # INVALID $a3, $a3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0E81001, NULL, ".word 0xD0E81001 # INVALID $a3, $t0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0E81081, NULL, ".word 0xD0E81081 # INVALID $a3, $t0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0E89001, NULL, ".word 0xD0E89001 # INVALID $a3, $t0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0E89081, NULL, ".word 0xD0E89081 # INVALID $a3, $t0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0E91001, NULL, ".word 0xD0E91001 # INVALID $a3, $t1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0E91081, NULL, ".word 0xD0E91081 # INVALID $a3, $t1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0E99001, NULL, ".word 0xD0E99001 # INVALID $a3, $t1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0E99081, NULL, ".word 0xD0E99081 # INVALID $a3, $t1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0EA1001, NULL, ".word 0xD0EA1001 # INVALID $a3, $t2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0EA1081, NULL, ".word 0xD0EA1081 # INVALID $a3, $t2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0EA9001, NULL, ".word 0xD0EA9001 # INVALID $a3, $t2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0EA9081, NULL, ".word 0xD0EA9081 # INVALID $a3, $t2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0EB1001, NULL, ".word 0xD0EB1001 # INVALID $a3, $t3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0EB1081, NULL, ".word 0xD0EB1081 # INVALID $a3, $t3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0EB9001, NULL, ".word 0xD0EB9001 # INVALID $a3, $t3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0EB9081, NULL, ".word 0xD0EB9081 # INVALID $a3, $t3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0EC1001, NULL, ".word 0xD0EC1001 # INVALID $a3, $t4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0EC1081, NULL, ".word 0xD0EC1081 # INVALID $a3, $t4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0EC9001, NULL, ".word 0xD0EC9001 # INVALID $a3, $t4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0EC9081, NULL, ".word 0xD0EC9081 # INVALID $a3, $t4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0ED1001, NULL, ".word 0xD0ED1001 # INVALID $a3, $t5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0ED1081, NULL, ".word 0xD0ED1081 # INVALID $a3, $t5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0ED9001, NULL, ".word 0xD0ED9001 # INVALID $a3, $t5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0ED9081, NULL, ".word 0xD0ED9081 # INVALID $a3, $t5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0EE1001, NULL, ".word 0xD0EE1001 # INVALID $a3, $t6, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0EE1081, NULL, ".word 0xD0EE1081 # INVALID $a3, $t6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0EE9001, NULL, ".word 0xD0EE9001 # INVALID $a3, $t6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0EE9081, NULL, ".word 0xD0EE9081 # INVALID $a3, $t6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0EF1001, NULL, ".word 0xD0EF1001 # INVALID $a3, $t7, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0EF1081, NULL, ".word 0xD0EF1081 # INVALID $a3, $t7, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0EF9001, NULL, ".word 0xD0EF9001 # INVALID $a3, $t7, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0EF9081, NULL, ".word 0xD0EF9081 # INVALID $a3, $t7, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0F01001, NULL, ".word 0xD0F01001 # INVALID $a3, $s0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0F01081, NULL, ".word 0xD0F01081 # INVALID $a3, $s0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0F09001, NULL, ".word 0xD0F09001 # INVALID $a3, $s0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0F09081, NULL, ".word 0xD0F09081 # INVALID $a3, $s0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0F11001, NULL, ".word 0xD0F11001 # INVALID $a3, $s1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0F11081, NULL, ".word 0xD0F11081 # INVALID $a3, $s1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0F19001, NULL, ".word 0xD0F19001 # INVALID $a3, $s1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0F19081, NULL, ".word 0xD0F19081 # INVALID $a3, $s1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0F21001, NULL, ".word 0xD0F21001 # INVALID $a3, $s2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0F21081, NULL, ".word 0xD0F21081 # INVALID $a3, $s2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0F29001, NULL, ".word 0xD0F29001 # INVALID $a3, $s2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0F29081, NULL, ".word 0xD0F29081 # INVALID $a3, $s2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0F31001, NULL, ".word 0xD0F31001 # INVALID $a3, $s3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0F31081, NULL, ".word 0xD0F31081 # INVALID $a3, $s3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0F39001, NULL, ".word 0xD0F39001 # INVALID $a3, $s3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0F39081, NULL, ".word 0xD0F39081 # INVALID $a3, $s3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0F41001, NULL, ".word 0xD0F41001 # INVALID $a3, $s4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0F41081, NULL, ".word 0xD0F41081 # INVALID $a3, $s4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0F49001, NULL, ".word 0xD0F49001 # INVALID $a3, $s4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0F49081, NULL, ".word 0xD0F49081 # INVALID $a3, $s4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0F51001, NULL, ".word 0xD0F51001 # INVALID $a3, $s5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0F51081, NULL, ".word 0xD0F51081 # INVALID $a3, $s5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0F59001, NULL, ".word 0xD0F59001 # INVALID $a3, $s5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0F59081, NULL, ".word 0xD0F59081 # INVALID $a3, $s5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0F61001, NULL, ".word 0xD0F61001 # INVALID $a3, $s6, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0F61081, NULL, ".word 0xD0F61081 # INVALID $a3, $s6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0F69001, NULL, ".word 0xD0F69001 # INVALID $a3, $s6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0F69081, NULL, ".word 0xD0F69081 # INVALID $a3, $s6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0F71001, NULL, ".word 0xD0F71001 # INVALID $a3, $s7, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0F71081, NULL, ".word 0xD0F71081 # INVALID $a3, $s7, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0F79001, NULL, ".word 0xD0F79001 # INVALID $a3, $s7, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0F79081, NULL, ".word 0xD0F79081 # INVALID $a3, $s7, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0F81001, NULL, ".word 0xD0F81001 # INVALID $a3, $t8, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0F81081, NULL, ".word 0xD0F81081 # INVALID $a3, $t8, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0F89001, NULL, ".word 0xD0F89001 # INVALID $a3, $t8, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0F89081, NULL, ".word 0xD0F89081 # INVALID $a3, $t8, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0F91001, NULL, ".word 0xD0F91001 # INVALID $a3, $t9, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0F91081, NULL, ".word 0xD0F91081 # INVALID $a3, $t9, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0F99001, NULL, ".word 0xD0F99001 # INVALID $a3, $t9, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0F99081, NULL, ".word 0xD0F99081 # INVALID $a3, $t9, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0FA1001, NULL, ".word 0xD0FA1001 # INVALID $a3, $k0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0FA1081, NULL, ".word 0xD0FA1081 # INVALID $a3, $k0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0FA9001, NULL, ".word 0xD0FA9001 # INVALID $a3, $k0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0FA9081, NULL, ".word 0xD0FA9081 # INVALID $a3, $k0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0FB1001, NULL, ".word 0xD0FB1001 # INVALID $a3, $k1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0FB1081, NULL, ".word 0xD0FB1081 # INVALID $a3, $k1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0FB9001, NULL, ".word 0xD0FB9001 # INVALID $a3, $k1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0FB9081, NULL, ".word 0xD0FB9081 # INVALID $a3, $k1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0FC1001, NULL, ".word 0xD0FC1001 # INVALID $a3, $gp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0FC1081, NULL, ".word 0xD0FC1081 # INVALID $a3, $gp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0FC9001, NULL, ".word 0xD0FC9001 # INVALID $a3, $gp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0FC9081, NULL, ".word 0xD0FC9081 # INVALID $a3, $gp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0FD1001, NULL, ".word 0xD0FD1001 # INVALID $a3, $sp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0FD1081, NULL, ".word 0xD0FD1081 # INVALID $a3, $sp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0FD9001, NULL, ".word 0xD0FD9001 # INVALID $a3, $sp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0FD9081, NULL, ".word 0xD0FD9081 # INVALID $a3, $sp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0FE1001, NULL, ".word 0xD0FE1001 # INVALID $a3, $fp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0FE1081, NULL, ".word 0xD0FE1081 # INVALID $a3, $fp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0FE9001, NULL, ".word 0xD0FE9001 # INVALID $a3, $fp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0FE9081, NULL, ".word 0xD0FE9081 # INVALID $a3, $fp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD0FF1001, NULL, ".word 0xD0FF1001 # INVALID $a3, $ra, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD0FF1081, NULL, ".word 0xD0FF1081 # INVALID $a3, $ra, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD0FF9001, NULL, ".word 0xD0FF9001 # INVALID $a3, $ra, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD0FF9081, NULL, ".word 0xD0FF9081 # INVALID $a3, $ra, -0x6F7F # 00000000 "), + + /* VFPU4 FMT2 */ + TEST_ENTRY_C(0xD2001001, NULL, "vf2in.s S010, S400, 0"), + TEST_ENTRY_C(0xD2001081, NULL, "vf2in.p C010, C400, 0"), + TEST_ENTRY_C(0xD2009001, NULL, "vf2in.t C010, C400, 0"), + TEST_ENTRY_C(0xD2009081, NULL, "vf2in.q C010, C400, 0"), + TEST_ENTRY_C(0xD2011001, NULL, "vf2in.s S010, S400, 1"), + TEST_ENTRY_C(0xD2011081, NULL, "vf2in.p C010, C400, 1"), + TEST_ENTRY_C(0xD2019001, NULL, "vf2in.t C010, C400, 1"), + TEST_ENTRY_C(0xD2019081, NULL, "vf2in.q C010, C400, 1"), + TEST_ENTRY_C(0xD2021001, NULL, "vf2in.s S010, S400, 2"), + TEST_ENTRY_C(0xD2021081, NULL, "vf2in.p C010, C400, 2"), + TEST_ENTRY_C(0xD2029001, NULL, "vf2in.t C010, C400, 2"), + TEST_ENTRY_C(0xD2029081, NULL, "vf2in.q C010, C400, 2"), + TEST_ENTRY_C(0xD2031001, NULL, "vf2in.s S010, S400, 3"), + TEST_ENTRY_C(0xD2031081, NULL, "vf2in.p C010, C400, 3"), + TEST_ENTRY_C(0xD2039001, NULL, "vf2in.t C010, C400, 3"), + TEST_ENTRY_C(0xD2039081, NULL, "vf2in.q C010, C400, 3"), + TEST_ENTRY_C(0xD2041001, NULL, "vf2in.s S010, S400, 4"), + TEST_ENTRY_C(0xD2041081, NULL, "vf2in.p C010, C400, 4"), + TEST_ENTRY_C(0xD2049001, NULL, "vf2in.t C010, C400, 4"), + TEST_ENTRY_C(0xD2049081, NULL, "vf2in.q C010, C400, 4"), + TEST_ENTRY_C(0xD2051001, NULL, "vf2in.s S010, S400, 5"), + TEST_ENTRY_C(0xD2051081, NULL, "vf2in.p C010, C400, 5"), + TEST_ENTRY_C(0xD2059001, NULL, "vf2in.t C010, C400, 5"), + TEST_ENTRY_C(0xD2059081, NULL, "vf2in.q C010, C400, 5"), + TEST_ENTRY_C(0xD2061001, NULL, "vf2in.s S010, S400, 6"), + TEST_ENTRY_C(0xD2061081, NULL, "vf2in.p C010, C400, 6"), + TEST_ENTRY_C(0xD2069001, NULL, "vf2in.t C010, C400, 6"), + TEST_ENTRY_C(0xD2069081, NULL, "vf2in.q C010, C400, 6"), + TEST_ENTRY_C(0xD2071001, NULL, "vf2in.s S010, S400, 7"), + TEST_ENTRY_C(0xD2071081, NULL, "vf2in.p C010, C400, 7"), + TEST_ENTRY_C(0xD2079001, NULL, "vf2in.t C010, C400, 7"), + TEST_ENTRY_C(0xD2079081, NULL, "vf2in.q C010, C400, 7"), + TEST_ENTRY_C(0xD2081001, NULL, "vf2in.s S010, S400, 8"), + TEST_ENTRY_C(0xD2081081, NULL, "vf2in.p C010, C400, 8"), + TEST_ENTRY_C(0xD2089001, NULL, "vf2in.t C010, C400, 8"), + TEST_ENTRY_C(0xD2089081, NULL, "vf2in.q C010, C400, 8"), + TEST_ENTRY_C(0xD2091001, NULL, "vf2in.s S010, S400, 9"), + TEST_ENTRY_C(0xD2091081, NULL, "vf2in.p C010, C400, 9"), + TEST_ENTRY_C(0xD2099001, NULL, "vf2in.t C010, C400, 9"), + TEST_ENTRY_C(0xD2099081, NULL, "vf2in.q C010, C400, 9"), + TEST_ENTRY_C(0xD20A1001, NULL, "vf2in.s S010, S400, 10"), + TEST_ENTRY_C(0xD20A1081, NULL, "vf2in.p C010, C400, 10"), + TEST_ENTRY_C(0xD20A9001, NULL, "vf2in.t C010, C400, 10"), + TEST_ENTRY_C(0xD20A9081, NULL, "vf2in.q C010, C400, 10"), + TEST_ENTRY_C(0xD20B1001, NULL, "vf2in.s S010, S400, 11"), + TEST_ENTRY_C(0xD20B1081, NULL, "vf2in.p C010, C400, 11"), + TEST_ENTRY_C(0xD20B9001, NULL, "vf2in.t C010, C400, 11"), + TEST_ENTRY_C(0xD20B9081, NULL, "vf2in.q C010, C400, 11"), + TEST_ENTRY_C(0xD20C1001, NULL, "vf2in.s S010, S400, 12"), + TEST_ENTRY_C(0xD20C1081, NULL, "vf2in.p C010, C400, 12"), + TEST_ENTRY_C(0xD20C9001, NULL, "vf2in.t C010, C400, 12"), + TEST_ENTRY_C(0xD20C9081, NULL, "vf2in.q C010, C400, 12"), + TEST_ENTRY_C(0xD20D1001, NULL, "vf2in.s S010, S400, 13"), + TEST_ENTRY_C(0xD20D1081, NULL, "vf2in.p C010, C400, 13"), + TEST_ENTRY_C(0xD20D9001, NULL, "vf2in.t C010, C400, 13"), + TEST_ENTRY_C(0xD20D9081, NULL, "vf2in.q C010, C400, 13"), + TEST_ENTRY_C(0xD20E1001, NULL, "vf2in.s S010, S400, 14"), + TEST_ENTRY_C(0xD20E1081, NULL, "vf2in.p C010, C400, 14"), + TEST_ENTRY_C(0xD20E9001, NULL, "vf2in.t C010, C400, 14"), + TEST_ENTRY_C(0xD20E9081, NULL, "vf2in.q C010, C400, 14"), + TEST_ENTRY_C(0xD20F1001, NULL, "vf2in.s S010, S400, 15"), + TEST_ENTRY_C(0xD20F1081, NULL, "vf2in.p C010, C400, 15"), + TEST_ENTRY_C(0xD20F9001, NULL, "vf2in.t C010, C400, 15"), + TEST_ENTRY_C(0xD20F9081, NULL, "vf2in.q C010, C400, 15"), + TEST_ENTRY_C(0xD2101001, NULL, "vf2in.s S010, S400, 16"), + TEST_ENTRY_C(0xD2101081, NULL, "vf2in.p C010, C400, 16"), + TEST_ENTRY_C(0xD2109001, NULL, "vf2in.t C010, C400, 16"), + TEST_ENTRY_C(0xD2109081, NULL, "vf2in.q C010, C400, 16"), + TEST_ENTRY_C(0xD2111001, NULL, "vf2in.s S010, S400, 17"), + TEST_ENTRY_C(0xD2111081, NULL, "vf2in.p C010, C400, 17"), + TEST_ENTRY_C(0xD2119001, NULL, "vf2in.t C010, C400, 17"), + TEST_ENTRY_C(0xD2119081, NULL, "vf2in.q C010, C400, 17"), + TEST_ENTRY_C(0xD2121001, NULL, "vf2in.s S010, S400, 18"), + TEST_ENTRY_C(0xD2121081, NULL, "vf2in.p C010, C400, 18"), + TEST_ENTRY_C(0xD2129001, NULL, "vf2in.t C010, C400, 18"), + TEST_ENTRY_C(0xD2129081, NULL, "vf2in.q C010, C400, 18"), + TEST_ENTRY_C(0xD2131001, NULL, "vf2in.s S010, S400, 19"), + TEST_ENTRY_C(0xD2131081, NULL, "vf2in.p C010, C400, 19"), + TEST_ENTRY_C(0xD2139001, NULL, "vf2in.t C010, C400, 19"), + TEST_ENTRY_C(0xD2139081, NULL, "vf2in.q C010, C400, 19"), + TEST_ENTRY_C(0xD2141001, NULL, "vf2in.s S010, S400, 20"), + TEST_ENTRY_C(0xD2141081, NULL, "vf2in.p C010, C400, 20"), + TEST_ENTRY_C(0xD2149001, NULL, "vf2in.t C010, C400, 20"), + TEST_ENTRY_C(0xD2149081, NULL, "vf2in.q C010, C400, 20"), + TEST_ENTRY_C(0xD2151001, NULL, "vf2in.s S010, S400, 21"), + TEST_ENTRY_C(0xD2151081, NULL, "vf2in.p C010, C400, 21"), + TEST_ENTRY_C(0xD2159001, NULL, "vf2in.t C010, C400, 21"), + TEST_ENTRY_C(0xD2159081, NULL, "vf2in.q C010, C400, 21"), + TEST_ENTRY_C(0xD2161001, NULL, "vf2in.s S010, S400, 22"), + TEST_ENTRY_C(0xD2161081, NULL, "vf2in.p C010, C400, 22"), + TEST_ENTRY_C(0xD2169001, NULL, "vf2in.t C010, C400, 22"), + TEST_ENTRY_C(0xD2169081, NULL, "vf2in.q C010, C400, 22"), + TEST_ENTRY_C(0xD2171001, NULL, "vf2in.s S010, S400, 23"), + TEST_ENTRY_C(0xD2171081, NULL, "vf2in.p C010, C400, 23"), + TEST_ENTRY_C(0xD2179001, NULL, "vf2in.t C010, C400, 23"), + TEST_ENTRY_C(0xD2179081, NULL, "vf2in.q C010, C400, 23"), + TEST_ENTRY_C(0xD2181001, NULL, "vf2in.s S010, S400, 24"), + TEST_ENTRY_C(0xD2181081, NULL, "vf2in.p C010, C400, 24"), + TEST_ENTRY_C(0xD2189001, NULL, "vf2in.t C010, C400, 24"), + TEST_ENTRY_C(0xD2189081, NULL, "vf2in.q C010, C400, 24"), + TEST_ENTRY_C(0xD2191001, NULL, "vf2in.s S010, S400, 25"), + TEST_ENTRY_C(0xD2191081, NULL, "vf2in.p C010, C400, 25"), + TEST_ENTRY_C(0xD2199001, NULL, "vf2in.t C010, C400, 25"), + TEST_ENTRY_C(0xD2199081, NULL, "vf2in.q C010, C400, 25"), + TEST_ENTRY_C(0xD21A1001, NULL, "vf2in.s S010, S400, 26"), + TEST_ENTRY_C(0xD21A1081, NULL, "vf2in.p C010, C400, 26"), + TEST_ENTRY_C(0xD21A9001, NULL, "vf2in.t C010, C400, 26"), + TEST_ENTRY_C(0xD21A9081, NULL, "vf2in.q C010, C400, 26"), + TEST_ENTRY_C(0xD21B1001, NULL, "vf2in.s S010, S400, 27"), + TEST_ENTRY_C(0xD21B1081, NULL, "vf2in.p C010, C400, 27"), + TEST_ENTRY_C(0xD21B9001, NULL, "vf2in.t C010, C400, 27"), + TEST_ENTRY_C(0xD21B9081, NULL, "vf2in.q C010, C400, 27"), + TEST_ENTRY_C(0xD21C1001, NULL, "vf2in.s S010, S400, 28"), + TEST_ENTRY_C(0xD21C1081, NULL, "vf2in.p C010, C400, 28"), + TEST_ENTRY_C(0xD21C9001, NULL, "vf2in.t C010, C400, 28"), + TEST_ENTRY_C(0xD21C9081, NULL, "vf2in.q C010, C400, 28"), + TEST_ENTRY_C(0xD21D1001, NULL, "vf2in.s S010, S400, 29"), + TEST_ENTRY_C(0xD21D1081, NULL, "vf2in.p C010, C400, 29"), + TEST_ENTRY_C(0xD21D9001, NULL, "vf2in.t C010, C400, 29"), + TEST_ENTRY_C(0xD21D9081, NULL, "vf2in.q C010, C400, 29"), + TEST_ENTRY_C(0xD21E1001, NULL, "vf2in.s S010, S400, 30"), + TEST_ENTRY_C(0xD21E1081, NULL, "vf2in.p C010, C400, 30"), + TEST_ENTRY_C(0xD21E9001, NULL, "vf2in.t C010, C400, 30"), + TEST_ENTRY_C(0xD21E9081, NULL, "vf2in.q C010, C400, 30"), + TEST_ENTRY_C(0xD21F1001, NULL, "vf2in.s S010, S400, 31"), + TEST_ENTRY_C(0xD21F1081, NULL, "vf2in.p C010, C400, 31"), + TEST_ENTRY_C(0xD21F9001, NULL, "vf2in.t C010, C400, 31"), + TEST_ENTRY_C(0xD21F9081, NULL, "vf2in.q C010, C400, 31"), + TEST_ENTRY_C(0xD2201001, NULL, "vf2iz.s S010, S400, 0"), + TEST_ENTRY_C(0xD2201081, NULL, "vf2iz.p C010, C400, 0"), + TEST_ENTRY_C(0xD2209001, NULL, "vf2iz.t C010, C400, 0"), + TEST_ENTRY_C(0xD2209081, NULL, "vf2iz.q C010, C400, 0"), + TEST_ENTRY_C(0xD2211001, NULL, "vf2iz.s S010, S400, 1"), + TEST_ENTRY_C(0xD2211081, NULL, "vf2iz.p C010, C400, 1"), + TEST_ENTRY_C(0xD2219001, NULL, "vf2iz.t C010, C400, 1"), + TEST_ENTRY_C(0xD2219081, NULL, "vf2iz.q C010, C400, 1"), + TEST_ENTRY_C(0xD2221001, NULL, "vf2iz.s S010, S400, 2"), + TEST_ENTRY_C(0xD2221081, NULL, "vf2iz.p C010, C400, 2"), + TEST_ENTRY_C(0xD2229001, NULL, "vf2iz.t C010, C400, 2"), + TEST_ENTRY_C(0xD2229081, NULL, "vf2iz.q C010, C400, 2"), + TEST_ENTRY_C(0xD2231001, NULL, "vf2iz.s S010, S400, 3"), + TEST_ENTRY_C(0xD2231081, NULL, "vf2iz.p C010, C400, 3"), + TEST_ENTRY_C(0xD2239001, NULL, "vf2iz.t C010, C400, 3"), + TEST_ENTRY_C(0xD2239081, NULL, "vf2iz.q C010, C400, 3"), + TEST_ENTRY_C(0xD2241001, NULL, "vf2iz.s S010, S400, 4"), + TEST_ENTRY_C(0xD2241081, NULL, "vf2iz.p C010, C400, 4"), + TEST_ENTRY_C(0xD2249001, NULL, "vf2iz.t C010, C400, 4"), + TEST_ENTRY_C(0xD2249081, NULL, "vf2iz.q C010, C400, 4"), + TEST_ENTRY_C(0xD2251001, NULL, "vf2iz.s S010, S400, 5"), + TEST_ENTRY_C(0xD2251081, NULL, "vf2iz.p C010, C400, 5"), + TEST_ENTRY_C(0xD2259001, NULL, "vf2iz.t C010, C400, 5"), + TEST_ENTRY_C(0xD2259081, NULL, "vf2iz.q C010, C400, 5"), + TEST_ENTRY_C(0xD2261001, NULL, "vf2iz.s S010, S400, 6"), + TEST_ENTRY_C(0xD2261081, NULL, "vf2iz.p C010, C400, 6"), + TEST_ENTRY_C(0xD2269001, NULL, "vf2iz.t C010, C400, 6"), + TEST_ENTRY_C(0xD2269081, NULL, "vf2iz.q C010, C400, 6"), + TEST_ENTRY_C(0xD2271001, NULL, "vf2iz.s S010, S400, 7"), + TEST_ENTRY_C(0xD2271081, NULL, "vf2iz.p C010, C400, 7"), + TEST_ENTRY_C(0xD2279001, NULL, "vf2iz.t C010, C400, 7"), + TEST_ENTRY_C(0xD2279081, NULL, "vf2iz.q C010, C400, 7"), + TEST_ENTRY_C(0xD2281001, NULL, "vf2iz.s S010, S400, 8"), + TEST_ENTRY_C(0xD2281081, NULL, "vf2iz.p C010, C400, 8"), + TEST_ENTRY_C(0xD2289001, NULL, "vf2iz.t C010, C400, 8"), + TEST_ENTRY_C(0xD2289081, NULL, "vf2iz.q C010, C400, 8"), + TEST_ENTRY_C(0xD2291001, NULL, "vf2iz.s S010, S400, 9"), + TEST_ENTRY_C(0xD2291081, NULL, "vf2iz.p C010, C400, 9"), + TEST_ENTRY_C(0xD2299001, NULL, "vf2iz.t C010, C400, 9"), + TEST_ENTRY_C(0xD2299081, NULL, "vf2iz.q C010, C400, 9"), + TEST_ENTRY_C(0xD22A1001, NULL, "vf2iz.s S010, S400, 10"), + TEST_ENTRY_C(0xD22A1081, NULL, "vf2iz.p C010, C400, 10"), + TEST_ENTRY_C(0xD22A9001, NULL, "vf2iz.t C010, C400, 10"), + TEST_ENTRY_C(0xD22A9081, NULL, "vf2iz.q C010, C400, 10"), + TEST_ENTRY_C(0xD22B1001, NULL, "vf2iz.s S010, S400, 11"), + TEST_ENTRY_C(0xD22B1081, NULL, "vf2iz.p C010, C400, 11"), + TEST_ENTRY_C(0xD22B9001, NULL, "vf2iz.t C010, C400, 11"), + TEST_ENTRY_C(0xD22B9081, NULL, "vf2iz.q C010, C400, 11"), + TEST_ENTRY_C(0xD22C1001, NULL, "vf2iz.s S010, S400, 12"), + TEST_ENTRY_C(0xD22C1081, NULL, "vf2iz.p C010, C400, 12"), + TEST_ENTRY_C(0xD22C9001, NULL, "vf2iz.t C010, C400, 12"), + TEST_ENTRY_C(0xD22C9081, NULL, "vf2iz.q C010, C400, 12"), + TEST_ENTRY_C(0xD22D1001, NULL, "vf2iz.s S010, S400, 13"), + TEST_ENTRY_C(0xD22D1081, NULL, "vf2iz.p C010, C400, 13"), + TEST_ENTRY_C(0xD22D9001, NULL, "vf2iz.t C010, C400, 13"), + TEST_ENTRY_C(0xD22D9081, NULL, "vf2iz.q C010, C400, 13"), + TEST_ENTRY_C(0xD22E1001, NULL, "vf2iz.s S010, S400, 14"), + TEST_ENTRY_C(0xD22E1081, NULL, "vf2iz.p C010, C400, 14"), + TEST_ENTRY_C(0xD22E9001, NULL, "vf2iz.t C010, C400, 14"), + TEST_ENTRY_C(0xD22E9081, NULL, "vf2iz.q C010, C400, 14"), + TEST_ENTRY_C(0xD22F1001, NULL, "vf2iz.s S010, S400, 15"), + TEST_ENTRY_C(0xD22F1081, NULL, "vf2iz.p C010, C400, 15"), + TEST_ENTRY_C(0xD22F9001, NULL, "vf2iz.t C010, C400, 15"), + TEST_ENTRY_C(0xD22F9081, NULL, "vf2iz.q C010, C400, 15"), + TEST_ENTRY_C(0xD2301001, NULL, "vf2iz.s S010, S400, 16"), + TEST_ENTRY_C(0xD2301081, NULL, "vf2iz.p C010, C400, 16"), + TEST_ENTRY_C(0xD2309001, NULL, "vf2iz.t C010, C400, 16"), + TEST_ENTRY_C(0xD2309081, NULL, "vf2iz.q C010, C400, 16"), + TEST_ENTRY_C(0xD2311001, NULL, "vf2iz.s S010, S400, 17"), + TEST_ENTRY_C(0xD2311081, NULL, "vf2iz.p C010, C400, 17"), + TEST_ENTRY_C(0xD2319001, NULL, "vf2iz.t C010, C400, 17"), + TEST_ENTRY_C(0xD2319081, NULL, "vf2iz.q C010, C400, 17"), + TEST_ENTRY_C(0xD2321001, NULL, "vf2iz.s S010, S400, 18"), + TEST_ENTRY_C(0xD2321081, NULL, "vf2iz.p C010, C400, 18"), + TEST_ENTRY_C(0xD2329001, NULL, "vf2iz.t C010, C400, 18"), + TEST_ENTRY_C(0xD2329081, NULL, "vf2iz.q C010, C400, 18"), + TEST_ENTRY_C(0xD2331001, NULL, "vf2iz.s S010, S400, 19"), + TEST_ENTRY_C(0xD2331081, NULL, "vf2iz.p C010, C400, 19"), + TEST_ENTRY_C(0xD2339001, NULL, "vf2iz.t C010, C400, 19"), + TEST_ENTRY_C(0xD2339081, NULL, "vf2iz.q C010, C400, 19"), + TEST_ENTRY_C(0xD2341001, NULL, "vf2iz.s S010, S400, 20"), + TEST_ENTRY_C(0xD2341081, NULL, "vf2iz.p C010, C400, 20"), + TEST_ENTRY_C(0xD2349001, NULL, "vf2iz.t C010, C400, 20"), + TEST_ENTRY_C(0xD2349081, NULL, "vf2iz.q C010, C400, 20"), + TEST_ENTRY_C(0xD2351001, NULL, "vf2iz.s S010, S400, 21"), + TEST_ENTRY_C(0xD2351081, NULL, "vf2iz.p C010, C400, 21"), + TEST_ENTRY_C(0xD2359001, NULL, "vf2iz.t C010, C400, 21"), + TEST_ENTRY_C(0xD2359081, NULL, "vf2iz.q C010, C400, 21"), + TEST_ENTRY_C(0xD2361001, NULL, "vf2iz.s S010, S400, 22"), + TEST_ENTRY_C(0xD2361081, NULL, "vf2iz.p C010, C400, 22"), + TEST_ENTRY_C(0xD2369001, NULL, "vf2iz.t C010, C400, 22"), + TEST_ENTRY_C(0xD2369081, NULL, "vf2iz.q C010, C400, 22"), + TEST_ENTRY_C(0xD2371001, NULL, "vf2iz.s S010, S400, 23"), + TEST_ENTRY_C(0xD2371081, NULL, "vf2iz.p C010, C400, 23"), + TEST_ENTRY_C(0xD2379001, NULL, "vf2iz.t C010, C400, 23"), + TEST_ENTRY_C(0xD2379081, NULL, "vf2iz.q C010, C400, 23"), + TEST_ENTRY_C(0xD2381001, NULL, "vf2iz.s S010, S400, 24"), + TEST_ENTRY_C(0xD2381081, NULL, "vf2iz.p C010, C400, 24"), + TEST_ENTRY_C(0xD2389001, NULL, "vf2iz.t C010, C400, 24"), + TEST_ENTRY_C(0xD2389081, NULL, "vf2iz.q C010, C400, 24"), + TEST_ENTRY_C(0xD2391001, NULL, "vf2iz.s S010, S400, 25"), + TEST_ENTRY_C(0xD2391081, NULL, "vf2iz.p C010, C400, 25"), + TEST_ENTRY_C(0xD2399001, NULL, "vf2iz.t C010, C400, 25"), + TEST_ENTRY_C(0xD2399081, NULL, "vf2iz.q C010, C400, 25"), + TEST_ENTRY_C(0xD23A1001, NULL, "vf2iz.s S010, S400, 26"), + TEST_ENTRY_C(0xD23A1081, NULL, "vf2iz.p C010, C400, 26"), + TEST_ENTRY_C(0xD23A9001, NULL, "vf2iz.t C010, C400, 26"), + TEST_ENTRY_C(0xD23A9081, NULL, "vf2iz.q C010, C400, 26"), + TEST_ENTRY_C(0xD23B1001, NULL, "vf2iz.s S010, S400, 27"), + TEST_ENTRY_C(0xD23B1081, NULL, "vf2iz.p C010, C400, 27"), + TEST_ENTRY_C(0xD23B9001, NULL, "vf2iz.t C010, C400, 27"), + TEST_ENTRY_C(0xD23B9081, NULL, "vf2iz.q C010, C400, 27"), + TEST_ENTRY_C(0xD23C1001, NULL, "vf2iz.s S010, S400, 28"), + TEST_ENTRY_C(0xD23C1081, NULL, "vf2iz.p C010, C400, 28"), + TEST_ENTRY_C(0xD23C9001, NULL, "vf2iz.t C010, C400, 28"), + TEST_ENTRY_C(0xD23C9081, NULL, "vf2iz.q C010, C400, 28"), + TEST_ENTRY_C(0xD23D1001, NULL, "vf2iz.s S010, S400, 29"), + TEST_ENTRY_C(0xD23D1081, NULL, "vf2iz.p C010, C400, 29"), + TEST_ENTRY_C(0xD23D9001, NULL, "vf2iz.t C010, C400, 29"), + TEST_ENTRY_C(0xD23D9081, NULL, "vf2iz.q C010, C400, 29"), + TEST_ENTRY_C(0xD23E1001, NULL, "vf2iz.s S010, S400, 30"), + TEST_ENTRY_C(0xD23E1081, NULL, "vf2iz.p C010, C400, 30"), + TEST_ENTRY_C(0xD23E9001, NULL, "vf2iz.t C010, C400, 30"), + TEST_ENTRY_C(0xD23E9081, NULL, "vf2iz.q C010, C400, 30"), + TEST_ENTRY_C(0xD23F1001, NULL, "vf2iz.s S010, S400, 31"), + TEST_ENTRY_C(0xD23F1081, NULL, "vf2iz.p C010, C400, 31"), + TEST_ENTRY_C(0xD23F9001, NULL, "vf2iz.t C010, C400, 31"), + TEST_ENTRY_C(0xD23F9081, NULL, "vf2iz.q C010, C400, 31"), + TEST_ENTRY_C(0xD2401001, NULL, "vf2iu.s S010, S400, 0"), + TEST_ENTRY_C(0xD2401081, NULL, "vf2iu.p C010, C400, 0"), + TEST_ENTRY_C(0xD2409001, NULL, "vf2iu.t C010, C400, 0"), + TEST_ENTRY_C(0xD2409081, NULL, "vf2iu.q C010, C400, 0"), + TEST_ENTRY_C(0xD2411001, NULL, "vf2iu.s S010, S400, 1"), + TEST_ENTRY_C(0xD2411081, NULL, "vf2iu.p C010, C400, 1"), + TEST_ENTRY_C(0xD2419001, NULL, "vf2iu.t C010, C400, 1"), + TEST_ENTRY_C(0xD2419081, NULL, "vf2iu.q C010, C400, 1"), + TEST_ENTRY_C(0xD2421001, NULL, "vf2iu.s S010, S400, 2"), + TEST_ENTRY_C(0xD2421081, NULL, "vf2iu.p C010, C400, 2"), + TEST_ENTRY_C(0xD2429001, NULL, "vf2iu.t C010, C400, 2"), + TEST_ENTRY_C(0xD2429081, NULL, "vf2iu.q C010, C400, 2"), + TEST_ENTRY_C(0xD2431001, NULL, "vf2iu.s S010, S400, 3"), + TEST_ENTRY_C(0xD2431081, NULL, "vf2iu.p C010, C400, 3"), + TEST_ENTRY_C(0xD2439001, NULL, "vf2iu.t C010, C400, 3"), + TEST_ENTRY_C(0xD2439081, NULL, "vf2iu.q C010, C400, 3"), + TEST_ENTRY_C(0xD2441001, NULL, "vf2iu.s S010, S400, 4"), + TEST_ENTRY_C(0xD2441081, NULL, "vf2iu.p C010, C400, 4"), + TEST_ENTRY_C(0xD2449001, NULL, "vf2iu.t C010, C400, 4"), + TEST_ENTRY_C(0xD2449081, NULL, "vf2iu.q C010, C400, 4"), + TEST_ENTRY_C(0xD2451001, NULL, "vf2iu.s S010, S400, 5"), + TEST_ENTRY_C(0xD2451081, NULL, "vf2iu.p C010, C400, 5"), + TEST_ENTRY_C(0xD2459001, NULL, "vf2iu.t C010, C400, 5"), + TEST_ENTRY_C(0xD2459081, NULL, "vf2iu.q C010, C400, 5"), + TEST_ENTRY_C(0xD2461001, NULL, "vf2iu.s S010, S400, 6"), + TEST_ENTRY_C(0xD2461081, NULL, "vf2iu.p C010, C400, 6"), + TEST_ENTRY_C(0xD2469001, NULL, "vf2iu.t C010, C400, 6"), + TEST_ENTRY_C(0xD2469081, NULL, "vf2iu.q C010, C400, 6"), + TEST_ENTRY_C(0xD2471001, NULL, "vf2iu.s S010, S400, 7"), + TEST_ENTRY_C(0xD2471081, NULL, "vf2iu.p C010, C400, 7"), + TEST_ENTRY_C(0xD2479001, NULL, "vf2iu.t C010, C400, 7"), + TEST_ENTRY_C(0xD2479081, NULL, "vf2iu.q C010, C400, 7"), + TEST_ENTRY_C(0xD2481001, NULL, "vf2iu.s S010, S400, 8"), + TEST_ENTRY_C(0xD2481081, NULL, "vf2iu.p C010, C400, 8"), + TEST_ENTRY_C(0xD2489001, NULL, "vf2iu.t C010, C400, 8"), + TEST_ENTRY_C(0xD2489081, NULL, "vf2iu.q C010, C400, 8"), + TEST_ENTRY_C(0xD2491001, NULL, "vf2iu.s S010, S400, 9"), + TEST_ENTRY_C(0xD2491081, NULL, "vf2iu.p C010, C400, 9"), + TEST_ENTRY_C(0xD2499001, NULL, "vf2iu.t C010, C400, 9"), + TEST_ENTRY_C(0xD2499081, NULL, "vf2iu.q C010, C400, 9"), + TEST_ENTRY_C(0xD24A1001, NULL, "vf2iu.s S010, S400, 10"), + TEST_ENTRY_C(0xD24A1081, NULL, "vf2iu.p C010, C400, 10"), + TEST_ENTRY_C(0xD24A9001, NULL, "vf2iu.t C010, C400, 10"), + TEST_ENTRY_C(0xD24A9081, NULL, "vf2iu.q C010, C400, 10"), + TEST_ENTRY_C(0xD24B1001, NULL, "vf2iu.s S010, S400, 11"), + TEST_ENTRY_C(0xD24B1081, NULL, "vf2iu.p C010, C400, 11"), + TEST_ENTRY_C(0xD24B9001, NULL, "vf2iu.t C010, C400, 11"), + TEST_ENTRY_C(0xD24B9081, NULL, "vf2iu.q C010, C400, 11"), + TEST_ENTRY_C(0xD24C1001, NULL, "vf2iu.s S010, S400, 12"), + TEST_ENTRY_C(0xD24C1081, NULL, "vf2iu.p C010, C400, 12"), + TEST_ENTRY_C(0xD24C9001, NULL, "vf2iu.t C010, C400, 12"), + TEST_ENTRY_C(0xD24C9081, NULL, "vf2iu.q C010, C400, 12"), + TEST_ENTRY_C(0xD24D1001, NULL, "vf2iu.s S010, S400, 13"), + TEST_ENTRY_C(0xD24D1081, NULL, "vf2iu.p C010, C400, 13"), + TEST_ENTRY_C(0xD24D9001, NULL, "vf2iu.t C010, C400, 13"), + TEST_ENTRY_C(0xD24D9081, NULL, "vf2iu.q C010, C400, 13"), + TEST_ENTRY_C(0xD24E1001, NULL, "vf2iu.s S010, S400, 14"), + TEST_ENTRY_C(0xD24E1081, NULL, "vf2iu.p C010, C400, 14"), + TEST_ENTRY_C(0xD24E9001, NULL, "vf2iu.t C010, C400, 14"), + TEST_ENTRY_C(0xD24E9081, NULL, "vf2iu.q C010, C400, 14"), + TEST_ENTRY_C(0xD24F1001, NULL, "vf2iu.s S010, S400, 15"), + TEST_ENTRY_C(0xD24F1081, NULL, "vf2iu.p C010, C400, 15"), + TEST_ENTRY_C(0xD24F9001, NULL, "vf2iu.t C010, C400, 15"), + TEST_ENTRY_C(0xD24F9081, NULL, "vf2iu.q C010, C400, 15"), + TEST_ENTRY_C(0xD2501001, NULL, "vf2iu.s S010, S400, 16"), + TEST_ENTRY_C(0xD2501081, NULL, "vf2iu.p C010, C400, 16"), + TEST_ENTRY_C(0xD2509001, NULL, "vf2iu.t C010, C400, 16"), + TEST_ENTRY_C(0xD2509081, NULL, "vf2iu.q C010, C400, 16"), + TEST_ENTRY_C(0xD2511001, NULL, "vf2iu.s S010, S400, 17"), + TEST_ENTRY_C(0xD2511081, NULL, "vf2iu.p C010, C400, 17"), + TEST_ENTRY_C(0xD2519001, NULL, "vf2iu.t C010, C400, 17"), + TEST_ENTRY_C(0xD2519081, NULL, "vf2iu.q C010, C400, 17"), + TEST_ENTRY_C(0xD2521001, NULL, "vf2iu.s S010, S400, 18"), + TEST_ENTRY_C(0xD2521081, NULL, "vf2iu.p C010, C400, 18"), + TEST_ENTRY_C(0xD2529001, NULL, "vf2iu.t C010, C400, 18"), + TEST_ENTRY_C(0xD2529081, NULL, "vf2iu.q C010, C400, 18"), + TEST_ENTRY_C(0xD2531001, NULL, "vf2iu.s S010, S400, 19"), + TEST_ENTRY_C(0xD2531081, NULL, "vf2iu.p C010, C400, 19"), + TEST_ENTRY_C(0xD2539001, NULL, "vf2iu.t C010, C400, 19"), + TEST_ENTRY_C(0xD2539081, NULL, "vf2iu.q C010, C400, 19"), + TEST_ENTRY_C(0xD2541001, NULL, "vf2iu.s S010, S400, 20"), + TEST_ENTRY_C(0xD2541081, NULL, "vf2iu.p C010, C400, 20"), + TEST_ENTRY_C(0xD2549001, NULL, "vf2iu.t C010, C400, 20"), + TEST_ENTRY_C(0xD2549081, NULL, "vf2iu.q C010, C400, 20"), + TEST_ENTRY_C(0xD2551001, NULL, "vf2iu.s S010, S400, 21"), + TEST_ENTRY_C(0xD2551081, NULL, "vf2iu.p C010, C400, 21"), + TEST_ENTRY_C(0xD2559001, NULL, "vf2iu.t C010, C400, 21"), + TEST_ENTRY_C(0xD2559081, NULL, "vf2iu.q C010, C400, 21"), + TEST_ENTRY_C(0xD2561001, NULL, "vf2iu.s S010, S400, 22"), + TEST_ENTRY_C(0xD2561081, NULL, "vf2iu.p C010, C400, 22"), + TEST_ENTRY_C(0xD2569001, NULL, "vf2iu.t C010, C400, 22"), + TEST_ENTRY_C(0xD2569081, NULL, "vf2iu.q C010, C400, 22"), + TEST_ENTRY_C(0xD2571001, NULL, "vf2iu.s S010, S400, 23"), + TEST_ENTRY_C(0xD2571081, NULL, "vf2iu.p C010, C400, 23"), + TEST_ENTRY_C(0xD2579001, NULL, "vf2iu.t C010, C400, 23"), + TEST_ENTRY_C(0xD2579081, NULL, "vf2iu.q C010, C400, 23"), + TEST_ENTRY_C(0xD2581001, NULL, "vf2iu.s S010, S400, 24"), + TEST_ENTRY_C(0xD2581081, NULL, "vf2iu.p C010, C400, 24"), + TEST_ENTRY_C(0xD2589001, NULL, "vf2iu.t C010, C400, 24"), + TEST_ENTRY_C(0xD2589081, NULL, "vf2iu.q C010, C400, 24"), + TEST_ENTRY_C(0xD2591001, NULL, "vf2iu.s S010, S400, 25"), + TEST_ENTRY_C(0xD2591081, NULL, "vf2iu.p C010, C400, 25"), + TEST_ENTRY_C(0xD2599001, NULL, "vf2iu.t C010, C400, 25"), + TEST_ENTRY_C(0xD2599081, NULL, "vf2iu.q C010, C400, 25"), + TEST_ENTRY_C(0xD25A1001, NULL, "vf2iu.s S010, S400, 26"), + TEST_ENTRY_C(0xD25A1081, NULL, "vf2iu.p C010, C400, 26"), + TEST_ENTRY_C(0xD25A9001, NULL, "vf2iu.t C010, C400, 26"), + TEST_ENTRY_C(0xD25A9081, NULL, "vf2iu.q C010, C400, 26"), + TEST_ENTRY_C(0xD25B1001, NULL, "vf2iu.s S010, S400, 27"), + TEST_ENTRY_C(0xD25B1081, NULL, "vf2iu.p C010, C400, 27"), + TEST_ENTRY_C(0xD25B9001, NULL, "vf2iu.t C010, C400, 27"), + TEST_ENTRY_C(0xD25B9081, NULL, "vf2iu.q C010, C400, 27"), + TEST_ENTRY_C(0xD25C1001, NULL, "vf2iu.s S010, S400, 28"), + TEST_ENTRY_C(0xD25C1081, NULL, "vf2iu.p C010, C400, 28"), + TEST_ENTRY_C(0xD25C9001, NULL, "vf2iu.t C010, C400, 28"), + TEST_ENTRY_C(0xD25C9081, NULL, "vf2iu.q C010, C400, 28"), + TEST_ENTRY_C(0xD25D1001, NULL, "vf2iu.s S010, S400, 29"), + TEST_ENTRY_C(0xD25D1081, NULL, "vf2iu.p C010, C400, 29"), + TEST_ENTRY_C(0xD25D9001, NULL, "vf2iu.t C010, C400, 29"), + TEST_ENTRY_C(0xD25D9081, NULL, "vf2iu.q C010, C400, 29"), + TEST_ENTRY_C(0xD25E1001, NULL, "vf2iu.s S010, S400, 30"), + TEST_ENTRY_C(0xD25E1081, NULL, "vf2iu.p C010, C400, 30"), + TEST_ENTRY_C(0xD25E9001, NULL, "vf2iu.t C010, C400, 30"), + TEST_ENTRY_C(0xD25E9081, NULL, "vf2iu.q C010, C400, 30"), + TEST_ENTRY_C(0xD25F1001, NULL, "vf2iu.s S010, S400, 31"), + TEST_ENTRY_C(0xD25F1081, NULL, "vf2iu.p C010, C400, 31"), + TEST_ENTRY_C(0xD25F9001, NULL, "vf2iu.t C010, C400, 31"), + TEST_ENTRY_C(0xD25F9081, NULL, "vf2iu.q C010, C400, 31"), + TEST_ENTRY_C(0xD2601001, NULL, "vf2id.s S010, S400, 0"), + TEST_ENTRY_C(0xD2601081, NULL, "vf2id.p C010, C400, 0"), + TEST_ENTRY_C(0xD2609001, NULL, "vf2id.t C010, C400, 0"), + TEST_ENTRY_C(0xD2609081, NULL, "vf2id.q C010, C400, 0"), + TEST_ENTRY_C(0xD2611001, NULL, "vf2id.s S010, S400, 1"), + TEST_ENTRY_C(0xD2611081, NULL, "vf2id.p C010, C400, 1"), + TEST_ENTRY_C(0xD2619001, NULL, "vf2id.t C010, C400, 1"), + TEST_ENTRY_C(0xD2619081, NULL, "vf2id.q C010, C400, 1"), + TEST_ENTRY_C(0xD2621001, NULL, "vf2id.s S010, S400, 2"), + TEST_ENTRY_C(0xD2621081, NULL, "vf2id.p C010, C400, 2"), + TEST_ENTRY_C(0xD2629001, NULL, "vf2id.t C010, C400, 2"), + TEST_ENTRY_C(0xD2629081, NULL, "vf2id.q C010, C400, 2"), + TEST_ENTRY_C(0xD2631001, NULL, "vf2id.s S010, S400, 3"), + TEST_ENTRY_C(0xD2631081, NULL, "vf2id.p C010, C400, 3"), + TEST_ENTRY_C(0xD2639001, NULL, "vf2id.t C010, C400, 3"), + TEST_ENTRY_C(0xD2639081, NULL, "vf2id.q C010, C400, 3"), + TEST_ENTRY_C(0xD2641001, NULL, "vf2id.s S010, S400, 4"), + TEST_ENTRY_C(0xD2641081, NULL, "vf2id.p C010, C400, 4"), + TEST_ENTRY_C(0xD2649001, NULL, "vf2id.t C010, C400, 4"), + TEST_ENTRY_C(0xD2649081, NULL, "vf2id.q C010, C400, 4"), + TEST_ENTRY_C(0xD2651001, NULL, "vf2id.s S010, S400, 5"), + TEST_ENTRY_C(0xD2651081, NULL, "vf2id.p C010, C400, 5"), + TEST_ENTRY_C(0xD2659001, NULL, "vf2id.t C010, C400, 5"), + TEST_ENTRY_C(0xD2659081, NULL, "vf2id.q C010, C400, 5"), + TEST_ENTRY_C(0xD2661001, NULL, "vf2id.s S010, S400, 6"), + TEST_ENTRY_C(0xD2661081, NULL, "vf2id.p C010, C400, 6"), + TEST_ENTRY_C(0xD2669001, NULL, "vf2id.t C010, C400, 6"), + TEST_ENTRY_C(0xD2669081, NULL, "vf2id.q C010, C400, 6"), + TEST_ENTRY_C(0xD2671001, NULL, "vf2id.s S010, S400, 7"), + TEST_ENTRY_C(0xD2671081, NULL, "vf2id.p C010, C400, 7"), + TEST_ENTRY_C(0xD2679001, NULL, "vf2id.t C010, C400, 7"), + TEST_ENTRY_C(0xD2679081, NULL, "vf2id.q C010, C400, 7"), + TEST_ENTRY_C(0xD2681001, NULL, "vf2id.s S010, S400, 8"), + TEST_ENTRY_C(0xD2681081, NULL, "vf2id.p C010, C400, 8"), + TEST_ENTRY_C(0xD2689001, NULL, "vf2id.t C010, C400, 8"), + TEST_ENTRY_C(0xD2689081, NULL, "vf2id.q C010, C400, 8"), + TEST_ENTRY_C(0xD2691001, NULL, "vf2id.s S010, S400, 9"), + TEST_ENTRY_C(0xD2691081, NULL, "vf2id.p C010, C400, 9"), + TEST_ENTRY_C(0xD2699001, NULL, "vf2id.t C010, C400, 9"), + TEST_ENTRY_C(0xD2699081, NULL, "vf2id.q C010, C400, 9"), + TEST_ENTRY_C(0xD26A1001, NULL, "vf2id.s S010, S400, 10"), + TEST_ENTRY_C(0xD26A1081, NULL, "vf2id.p C010, C400, 10"), + TEST_ENTRY_C(0xD26A9001, NULL, "vf2id.t C010, C400, 10"), + TEST_ENTRY_C(0xD26A9081, NULL, "vf2id.q C010, C400, 10"), + TEST_ENTRY_C(0xD26B1001, NULL, "vf2id.s S010, S400, 11"), + TEST_ENTRY_C(0xD26B1081, NULL, "vf2id.p C010, C400, 11"), + TEST_ENTRY_C(0xD26B9001, NULL, "vf2id.t C010, C400, 11"), + TEST_ENTRY_C(0xD26B9081, NULL, "vf2id.q C010, C400, 11"), + TEST_ENTRY_C(0xD26C1001, NULL, "vf2id.s S010, S400, 12"), + TEST_ENTRY_C(0xD26C1081, NULL, "vf2id.p C010, C400, 12"), + TEST_ENTRY_C(0xD26C9001, NULL, "vf2id.t C010, C400, 12"), + TEST_ENTRY_C(0xD26C9081, NULL, "vf2id.q C010, C400, 12"), + TEST_ENTRY_C(0xD26D1001, NULL, "vf2id.s S010, S400, 13"), + TEST_ENTRY_C(0xD26D1081, NULL, "vf2id.p C010, C400, 13"), + TEST_ENTRY_C(0xD26D9001, NULL, "vf2id.t C010, C400, 13"), + TEST_ENTRY_C(0xD26D9081, NULL, "vf2id.q C010, C400, 13"), + TEST_ENTRY_C(0xD26E1001, NULL, "vf2id.s S010, S400, 14"), + TEST_ENTRY_C(0xD26E1081, NULL, "vf2id.p C010, C400, 14"), + TEST_ENTRY_C(0xD26E9001, NULL, "vf2id.t C010, C400, 14"), + TEST_ENTRY_C(0xD26E9081, NULL, "vf2id.q C010, C400, 14"), + TEST_ENTRY_C(0xD26F1001, NULL, "vf2id.s S010, S400, 15"), + TEST_ENTRY_C(0xD26F1081, NULL, "vf2id.p C010, C400, 15"), + TEST_ENTRY_C(0xD26F9001, NULL, "vf2id.t C010, C400, 15"), + TEST_ENTRY_C(0xD26F9081, NULL, "vf2id.q C010, C400, 15"), + TEST_ENTRY_C(0xD2701001, NULL, "vf2id.s S010, S400, 16"), + TEST_ENTRY_C(0xD2701081, NULL, "vf2id.p C010, C400, 16"), + TEST_ENTRY_C(0xD2709001, NULL, "vf2id.t C010, C400, 16"), + TEST_ENTRY_C(0xD2709081, NULL, "vf2id.q C010, C400, 16"), + TEST_ENTRY_C(0xD2711001, NULL, "vf2id.s S010, S400, 17"), + TEST_ENTRY_C(0xD2711081, NULL, "vf2id.p C010, C400, 17"), + TEST_ENTRY_C(0xD2719001, NULL, "vf2id.t C010, C400, 17"), + TEST_ENTRY_C(0xD2719081, NULL, "vf2id.q C010, C400, 17"), + TEST_ENTRY_C(0xD2721001, NULL, "vf2id.s S010, S400, 18"), + TEST_ENTRY_C(0xD2721081, NULL, "vf2id.p C010, C400, 18"), + TEST_ENTRY_C(0xD2729001, NULL, "vf2id.t C010, C400, 18"), + TEST_ENTRY_C(0xD2729081, NULL, "vf2id.q C010, C400, 18"), + TEST_ENTRY_C(0xD2731001, NULL, "vf2id.s S010, S400, 19"), + TEST_ENTRY_C(0xD2731081, NULL, "vf2id.p C010, C400, 19"), + TEST_ENTRY_C(0xD2739001, NULL, "vf2id.t C010, C400, 19"), + TEST_ENTRY_C(0xD2739081, NULL, "vf2id.q C010, C400, 19"), + TEST_ENTRY_C(0xD2741001, NULL, "vf2id.s S010, S400, 20"), + TEST_ENTRY_C(0xD2741081, NULL, "vf2id.p C010, C400, 20"), + TEST_ENTRY_C(0xD2749001, NULL, "vf2id.t C010, C400, 20"), + TEST_ENTRY_C(0xD2749081, NULL, "vf2id.q C010, C400, 20"), + TEST_ENTRY_C(0xD2751001, NULL, "vf2id.s S010, S400, 21"), + TEST_ENTRY_C(0xD2751081, NULL, "vf2id.p C010, C400, 21"), + TEST_ENTRY_C(0xD2759001, NULL, "vf2id.t C010, C400, 21"), + TEST_ENTRY_C(0xD2759081, NULL, "vf2id.q C010, C400, 21"), + TEST_ENTRY_C(0xD2761001, NULL, "vf2id.s S010, S400, 22"), + TEST_ENTRY_C(0xD2761081, NULL, "vf2id.p C010, C400, 22"), + TEST_ENTRY_C(0xD2769001, NULL, "vf2id.t C010, C400, 22"), + TEST_ENTRY_C(0xD2769081, NULL, "vf2id.q C010, C400, 22"), + TEST_ENTRY_C(0xD2771001, NULL, "vf2id.s S010, S400, 23"), + TEST_ENTRY_C(0xD2771081, NULL, "vf2id.p C010, C400, 23"), + TEST_ENTRY_C(0xD2779001, NULL, "vf2id.t C010, C400, 23"), + TEST_ENTRY_C(0xD2779081, NULL, "vf2id.q C010, C400, 23"), + TEST_ENTRY_C(0xD2781001, NULL, "vf2id.s S010, S400, 24"), + TEST_ENTRY_C(0xD2781081, NULL, "vf2id.p C010, C400, 24"), + TEST_ENTRY_C(0xD2789001, NULL, "vf2id.t C010, C400, 24"), + TEST_ENTRY_C(0xD2789081, NULL, "vf2id.q C010, C400, 24"), + TEST_ENTRY_C(0xD2791001, NULL, "vf2id.s S010, S400, 25"), + TEST_ENTRY_C(0xD2791081, NULL, "vf2id.p C010, C400, 25"), + TEST_ENTRY_C(0xD2799001, NULL, "vf2id.t C010, C400, 25"), + TEST_ENTRY_C(0xD2799081, NULL, "vf2id.q C010, C400, 25"), + TEST_ENTRY_C(0xD27A1001, NULL, "vf2id.s S010, S400, 26"), + TEST_ENTRY_C(0xD27A1081, NULL, "vf2id.p C010, C400, 26"), + TEST_ENTRY_C(0xD27A9001, NULL, "vf2id.t C010, C400, 26"), + TEST_ENTRY_C(0xD27A9081, NULL, "vf2id.q C010, C400, 26"), + TEST_ENTRY_C(0xD27B1001, NULL, "vf2id.s S010, S400, 27"), + TEST_ENTRY_C(0xD27B1081, NULL, "vf2id.p C010, C400, 27"), + TEST_ENTRY_C(0xD27B9001, NULL, "vf2id.t C010, C400, 27"), + TEST_ENTRY_C(0xD27B9081, NULL, "vf2id.q C010, C400, 27"), + TEST_ENTRY_C(0xD27C1001, NULL, "vf2id.s S010, S400, 28"), + TEST_ENTRY_C(0xD27C1081, NULL, "vf2id.p C010, C400, 28"), + TEST_ENTRY_C(0xD27C9001, NULL, "vf2id.t C010, C400, 28"), + TEST_ENTRY_C(0xD27C9081, NULL, "vf2id.q C010, C400, 28"), + TEST_ENTRY_C(0xD27D1001, NULL, "vf2id.s S010, S400, 29"), + TEST_ENTRY_C(0xD27D1081, NULL, "vf2id.p C010, C400, 29"), + TEST_ENTRY_C(0xD27D9001, NULL, "vf2id.t C010, C400, 29"), + TEST_ENTRY_C(0xD27D9081, NULL, "vf2id.q C010, C400, 29"), + TEST_ENTRY_C(0xD27E1001, NULL, "vf2id.s S010, S400, 30"), + TEST_ENTRY_C(0xD27E1081, NULL, "vf2id.p C010, C400, 30"), + TEST_ENTRY_C(0xD27E9001, NULL, "vf2id.t C010, C400, 30"), + TEST_ENTRY_C(0xD27E9081, NULL, "vf2id.q C010, C400, 30"), + TEST_ENTRY_C(0xD27F1001, NULL, "vf2id.s S010, S400, 31"), + TEST_ENTRY_C(0xD27F1081, NULL, "vf2id.p C010, C400, 31"), + TEST_ENTRY_C(0xD27F9001, NULL, "vf2id.t C010, C400, 31"), + TEST_ENTRY_C(0xD27F9081, NULL, "vf2id.q C010, C400, 31"), + TEST_ENTRY_C(0xD2801001, NULL, "vi2f.s S010, S400, 0"), + TEST_ENTRY_C(0xD2801081, NULL, "vi2f.p C010, C400, 0"), + TEST_ENTRY_C(0xD2809001, NULL, "vi2f.t C010, C400, 0"), + TEST_ENTRY_C(0xD2809081, NULL, "vi2f.q C010, C400, 0"), + TEST_ENTRY_C(0xD2811001, NULL, "vi2f.s S010, S400, 1"), + TEST_ENTRY_C(0xD2811081, NULL, "vi2f.p C010, C400, 1"), + TEST_ENTRY_C(0xD2819001, NULL, "vi2f.t C010, C400, 1"), + TEST_ENTRY_C(0xD2819081, NULL, "vi2f.q C010, C400, 1"), + TEST_ENTRY_C(0xD2821001, NULL, "vi2f.s S010, S400, 2"), + TEST_ENTRY_C(0xD2821081, NULL, "vi2f.p C010, C400, 2"), + TEST_ENTRY_C(0xD2829001, NULL, "vi2f.t C010, C400, 2"), + TEST_ENTRY_C(0xD2829081, NULL, "vi2f.q C010, C400, 2"), + TEST_ENTRY_C(0xD2831001, NULL, "vi2f.s S010, S400, 3"), + TEST_ENTRY_C(0xD2831081, NULL, "vi2f.p C010, C400, 3"), + TEST_ENTRY_C(0xD2839001, NULL, "vi2f.t C010, C400, 3"), + TEST_ENTRY_C(0xD2839081, NULL, "vi2f.q C010, C400, 3"), + TEST_ENTRY_C(0xD2841001, NULL, "vi2f.s S010, S400, 4"), + TEST_ENTRY_C(0xD2841081, NULL, "vi2f.p C010, C400, 4"), + TEST_ENTRY_C(0xD2849001, NULL, "vi2f.t C010, C400, 4"), + TEST_ENTRY_C(0xD2849081, NULL, "vi2f.q C010, C400, 4"), + TEST_ENTRY_C(0xD2851001, NULL, "vi2f.s S010, S400, 5"), + TEST_ENTRY_C(0xD2851081, NULL, "vi2f.p C010, C400, 5"), + TEST_ENTRY_C(0xD2859001, NULL, "vi2f.t C010, C400, 5"), + TEST_ENTRY_C(0xD2859081, NULL, "vi2f.q C010, C400, 5"), + TEST_ENTRY_C(0xD2861001, NULL, "vi2f.s S010, S400, 6"), + TEST_ENTRY_C(0xD2861081, NULL, "vi2f.p C010, C400, 6"), + TEST_ENTRY_C(0xD2869001, NULL, "vi2f.t C010, C400, 6"), + TEST_ENTRY_C(0xD2869081, NULL, "vi2f.q C010, C400, 6"), + TEST_ENTRY_C(0xD2871001, NULL, "vi2f.s S010, S400, 7"), + TEST_ENTRY_C(0xD2871081, NULL, "vi2f.p C010, C400, 7"), + TEST_ENTRY_C(0xD2879001, NULL, "vi2f.t C010, C400, 7"), + TEST_ENTRY_C(0xD2879081, NULL, "vi2f.q C010, C400, 7"), + TEST_ENTRY_C(0xD2881001, NULL, "vi2f.s S010, S400, 8"), + TEST_ENTRY_C(0xD2881081, NULL, "vi2f.p C010, C400, 8"), + TEST_ENTRY_C(0xD2889001, NULL, "vi2f.t C010, C400, 8"), + TEST_ENTRY_C(0xD2889081, NULL, "vi2f.q C010, C400, 8"), + TEST_ENTRY_C(0xD2891001, NULL, "vi2f.s S010, S400, 9"), + TEST_ENTRY_C(0xD2891081, NULL, "vi2f.p C010, C400, 9"), + TEST_ENTRY_C(0xD2899001, NULL, "vi2f.t C010, C400, 9"), + TEST_ENTRY_C(0xD2899081, NULL, "vi2f.q C010, C400, 9"), + TEST_ENTRY_C(0xD28A1001, NULL, "vi2f.s S010, S400, 10"), + TEST_ENTRY_C(0xD28A1081, NULL, "vi2f.p C010, C400, 10"), + TEST_ENTRY_C(0xD28A9001, NULL, "vi2f.t C010, C400, 10"), + TEST_ENTRY_C(0xD28A9081, NULL, "vi2f.q C010, C400, 10"), + TEST_ENTRY_C(0xD28B1001, NULL, "vi2f.s S010, S400, 11"), + TEST_ENTRY_C(0xD28B1081, NULL, "vi2f.p C010, C400, 11"), + TEST_ENTRY_C(0xD28B9001, NULL, "vi2f.t C010, C400, 11"), + TEST_ENTRY_C(0xD28B9081, NULL, "vi2f.q C010, C400, 11"), + TEST_ENTRY_C(0xD28C1001, NULL, "vi2f.s S010, S400, 12"), + TEST_ENTRY_C(0xD28C1081, NULL, "vi2f.p C010, C400, 12"), + TEST_ENTRY_C(0xD28C9001, NULL, "vi2f.t C010, C400, 12"), + TEST_ENTRY_C(0xD28C9081, NULL, "vi2f.q C010, C400, 12"), + TEST_ENTRY_C(0xD28D1001, NULL, "vi2f.s S010, S400, 13"), + TEST_ENTRY_C(0xD28D1081, NULL, "vi2f.p C010, C400, 13"), + TEST_ENTRY_C(0xD28D9001, NULL, "vi2f.t C010, C400, 13"), + TEST_ENTRY_C(0xD28D9081, NULL, "vi2f.q C010, C400, 13"), + TEST_ENTRY_C(0xD28E1001, NULL, "vi2f.s S010, S400, 14"), + TEST_ENTRY_C(0xD28E1081, NULL, "vi2f.p C010, C400, 14"), + TEST_ENTRY_C(0xD28E9001, NULL, "vi2f.t C010, C400, 14"), + TEST_ENTRY_C(0xD28E9081, NULL, "vi2f.q C010, C400, 14"), + TEST_ENTRY_C(0xD28F1001, NULL, "vi2f.s S010, S400, 15"), + TEST_ENTRY_C(0xD28F1081, NULL, "vi2f.p C010, C400, 15"), + TEST_ENTRY_C(0xD28F9001, NULL, "vi2f.t C010, C400, 15"), + TEST_ENTRY_C(0xD28F9081, NULL, "vi2f.q C010, C400, 15"), + TEST_ENTRY_C(0xD2901001, NULL, "vi2f.s S010, S400, 16"), + TEST_ENTRY_C(0xD2901081, NULL, "vi2f.p C010, C400, 16"), + TEST_ENTRY_C(0xD2909001, NULL, "vi2f.t C010, C400, 16"), + TEST_ENTRY_C(0xD2909081, NULL, "vi2f.q C010, C400, 16"), + TEST_ENTRY_C(0xD2911001, NULL, "vi2f.s S010, S400, 17"), + TEST_ENTRY_C(0xD2911081, NULL, "vi2f.p C010, C400, 17"), + TEST_ENTRY_C(0xD2919001, NULL, "vi2f.t C010, C400, 17"), + TEST_ENTRY_C(0xD2919081, NULL, "vi2f.q C010, C400, 17"), + TEST_ENTRY_C(0xD2921001, NULL, "vi2f.s S010, S400, 18"), + TEST_ENTRY_C(0xD2921081, NULL, "vi2f.p C010, C400, 18"), + TEST_ENTRY_C(0xD2929001, NULL, "vi2f.t C010, C400, 18"), + TEST_ENTRY_C(0xD2929081, NULL, "vi2f.q C010, C400, 18"), + TEST_ENTRY_C(0xD2931001, NULL, "vi2f.s S010, S400, 19"), + TEST_ENTRY_C(0xD2931081, NULL, "vi2f.p C010, C400, 19"), + TEST_ENTRY_C(0xD2939001, NULL, "vi2f.t C010, C400, 19"), + TEST_ENTRY_C(0xD2939081, NULL, "vi2f.q C010, C400, 19"), + TEST_ENTRY_C(0xD2941001, NULL, "vi2f.s S010, S400, 20"), + TEST_ENTRY_C(0xD2941081, NULL, "vi2f.p C010, C400, 20"), + TEST_ENTRY_C(0xD2949001, NULL, "vi2f.t C010, C400, 20"), + TEST_ENTRY_C(0xD2949081, NULL, "vi2f.q C010, C400, 20"), + TEST_ENTRY_C(0xD2951001, NULL, "vi2f.s S010, S400, 21"), + TEST_ENTRY_C(0xD2951081, NULL, "vi2f.p C010, C400, 21"), + TEST_ENTRY_C(0xD2959001, NULL, "vi2f.t C010, C400, 21"), + TEST_ENTRY_C(0xD2959081, NULL, "vi2f.q C010, C400, 21"), + TEST_ENTRY_C(0xD2961001, NULL, "vi2f.s S010, S400, 22"), + TEST_ENTRY_C(0xD2961081, NULL, "vi2f.p C010, C400, 22"), + TEST_ENTRY_C(0xD2969001, NULL, "vi2f.t C010, C400, 22"), + TEST_ENTRY_C(0xD2969081, NULL, "vi2f.q C010, C400, 22"), + TEST_ENTRY_C(0xD2971001, NULL, "vi2f.s S010, S400, 23"), + TEST_ENTRY_C(0xD2971081, NULL, "vi2f.p C010, C400, 23"), + TEST_ENTRY_C(0xD2979001, NULL, "vi2f.t C010, C400, 23"), + TEST_ENTRY_C(0xD2979081, NULL, "vi2f.q C010, C400, 23"), + TEST_ENTRY_C(0xD2981001, NULL, "vi2f.s S010, S400, 24"), + TEST_ENTRY_C(0xD2981081, NULL, "vi2f.p C010, C400, 24"), + TEST_ENTRY_C(0xD2989001, NULL, "vi2f.t C010, C400, 24"), + TEST_ENTRY_C(0xD2989081, NULL, "vi2f.q C010, C400, 24"), + TEST_ENTRY_C(0xD2991001, NULL, "vi2f.s S010, S400, 25"), + TEST_ENTRY_C(0xD2991081, NULL, "vi2f.p C010, C400, 25"), + TEST_ENTRY_C(0xD2999001, NULL, "vi2f.t C010, C400, 25"), + TEST_ENTRY_C(0xD2999081, NULL, "vi2f.q C010, C400, 25"), + TEST_ENTRY_C(0xD29A1001, NULL, "vi2f.s S010, S400, 26"), + TEST_ENTRY_C(0xD29A1081, NULL, "vi2f.p C010, C400, 26"), + TEST_ENTRY_C(0xD29A9001, NULL, "vi2f.t C010, C400, 26"), + TEST_ENTRY_C(0xD29A9081, NULL, "vi2f.q C010, C400, 26"), + TEST_ENTRY_C(0xD29B1001, NULL, "vi2f.s S010, S400, 27"), + TEST_ENTRY_C(0xD29B1081, NULL, "vi2f.p C010, C400, 27"), + TEST_ENTRY_C(0xD29B9001, NULL, "vi2f.t C010, C400, 27"), + TEST_ENTRY_C(0xD29B9081, NULL, "vi2f.q C010, C400, 27"), + TEST_ENTRY_C(0xD29C1001, NULL, "vi2f.s S010, S400, 28"), + TEST_ENTRY_C(0xD29C1081, NULL, "vi2f.p C010, C400, 28"), + TEST_ENTRY_C(0xD29C9001, NULL, "vi2f.t C010, C400, 28"), + TEST_ENTRY_C(0xD29C9081, NULL, "vi2f.q C010, C400, 28"), + TEST_ENTRY_C(0xD29D1001, NULL, "vi2f.s S010, S400, 29"), + TEST_ENTRY_C(0xD29D1081, NULL, "vi2f.p C010, C400, 29"), + TEST_ENTRY_C(0xD29D9001, NULL, "vi2f.t C010, C400, 29"), + TEST_ENTRY_C(0xD29D9081, NULL, "vi2f.q C010, C400, 29"), + TEST_ENTRY_C(0xD29E1001, NULL, "vi2f.s S010, S400, 30"), + TEST_ENTRY_C(0xD29E1081, NULL, "vi2f.p C010, C400, 30"), + TEST_ENTRY_C(0xD29E9001, NULL, "vi2f.t C010, C400, 30"), + TEST_ENTRY_C(0xD29E9081, NULL, "vi2f.q C010, C400, 30"), + TEST_ENTRY_C(0xD29F1001, NULL, "vi2f.s S010, S400, 31"), + TEST_ENTRY_C(0xD29F1081, NULL, "vi2f.p C010, C400, 31"), + TEST_ENTRY_C(0xD29F9001, NULL, "vi2f.t C010, C400, 31"), + TEST_ENTRY_C(0xD29F9081, NULL, "vi2f.q C010, C400, 31"), + TEST_ENTRY_C(0xD2A01001, NULL, "vcmovt.s S010, S400, 0"), + TEST_ENTRY_C(0xD2A01081, NULL, "vcmovt.p C010, C400, 0"), + TEST_ENTRY_C(0xD2A09001, NULL, "vcmovt.t C010, C400, 0"), + TEST_ENTRY_C(0xD2A09081, NULL, "vcmovt.q C010, C400, 0"), + TEST_ENTRY_C(0xD2A11001, NULL, "vcmovt.s S010, S400, 1"), + TEST_ENTRY_C(0xD2A11081, NULL, "vcmovt.p C010, C400, 1"), + TEST_ENTRY_C(0xD2A19001, NULL, "vcmovt.t C010, C400, 1"), + TEST_ENTRY_C(0xD2A19081, NULL, "vcmovt.q C010, C400, 1"), + TEST_ENTRY_C(0xD2A21001, NULL, "vcmovt.s S010, S400, 2"), + TEST_ENTRY_C(0xD2A21081, NULL, "vcmovt.p C010, C400, 2"), + TEST_ENTRY_C(0xD2A29001, NULL, "vcmovt.t C010, C400, 2"), + TEST_ENTRY_C(0xD2A29081, NULL, "vcmovt.q C010, C400, 2"), + TEST_ENTRY_C(0xD2A31001, NULL, "vcmovt.s S010, S400, 3"), + TEST_ENTRY_C(0xD2A31081, NULL, "vcmovt.p C010, C400, 3"), + TEST_ENTRY_C(0xD2A39001, NULL, "vcmovt.t C010, C400, 3"), + TEST_ENTRY_C(0xD2A39081, NULL, "vcmovt.q C010, C400, 3"), + TEST_ENTRY_C(0xD2A41001, NULL, "vcmovt.s S010, S400, 4"), + TEST_ENTRY_C(0xD2A41081, NULL, "vcmovt.p C010, C400, 4"), + TEST_ENTRY_C(0xD2A49001, NULL, "vcmovt.t C010, C400, 4"), + TEST_ENTRY_C(0xD2A49081, NULL, "vcmovt.q C010, C400, 4"), + TEST_ENTRY_C(0xD2A51001, NULL, "vcmovt.s S010, S400, 5"), + TEST_ENTRY_C(0xD2A51081, NULL, "vcmovt.p C010, C400, 5"), + TEST_ENTRY_C(0xD2A59001, NULL, "vcmovt.t C010, C400, 5"), + TEST_ENTRY_C(0xD2A59081, NULL, "vcmovt.q C010, C400, 5"), + TEST_ENTRY_C(0xD2A61001, NULL, "vcmovt.s S010, S400, 6"), + TEST_ENTRY_C(0xD2A61081, NULL, "vcmovt.p C010, C400, 6"), + TEST_ENTRY_C(0xD2A69001, NULL, "vcmovt.t C010, C400, 6"), + TEST_ENTRY_C(0xD2A69081, NULL, "vcmovt.q C010, C400, 6"), + TEST_ENTRY_C(0xD2A81001, NULL, "vcmovf.s S010, S400, 0"), + TEST_ENTRY_C(0xD2A81081, NULL, "vcmovf.p C010, C400, 0"), + TEST_ENTRY_C(0xD2A89001, NULL, "vcmovf.t C010, C400, 0"), + TEST_ENTRY_C(0xD2A89081, NULL, "vcmovf.q C010, C400, 0"), + TEST_ENTRY_C(0xD2A91001, NULL, "vcmovf.s S010, S400, 1"), + TEST_ENTRY_C(0xD2A91081, NULL, "vcmovf.p C010, C400, 1"), + TEST_ENTRY_C(0xD2A99001, NULL, "vcmovf.t C010, C400, 1"), + TEST_ENTRY_C(0xD2A99081, NULL, "vcmovf.q C010, C400, 1"), + TEST_ENTRY_C(0xD2AA1001, NULL, "vcmovf.s S010, S400, 2"), + TEST_ENTRY_C(0xD2AA1081, NULL, "vcmovf.p C010, C400, 2"), + TEST_ENTRY_C(0xD2AA9001, NULL, "vcmovf.t C010, C400, 2"), + TEST_ENTRY_C(0xD2AA9081, NULL, "vcmovf.q C010, C400, 2"), + TEST_ENTRY_C(0xD2AB1001, NULL, "vcmovf.s S010, S400, 3"), + TEST_ENTRY_C(0xD2AB1081, NULL, "vcmovf.p C010, C400, 3"), + TEST_ENTRY_C(0xD2AB9001, NULL, "vcmovf.t C010, C400, 3"), + TEST_ENTRY_C(0xD2AB9081, NULL, "vcmovf.q C010, C400, 3"), + TEST_ENTRY_C(0xD2AC1001, NULL, "vcmovf.s S010, S400, 4"), + TEST_ENTRY_C(0xD2AC1081, NULL, "vcmovf.p C010, C400, 4"), + TEST_ENTRY_C(0xD2AC9001, NULL, "vcmovf.t C010, C400, 4"), + TEST_ENTRY_C(0xD2AC9081, NULL, "vcmovf.q C010, C400, 4"), + TEST_ENTRY_C(0xD2AD1001, NULL, "vcmovf.s S010, S400, 5"), + TEST_ENTRY_C(0xD2AD1081, NULL, "vcmovf.p C010, C400, 5"), + TEST_ENTRY_C(0xD2AD9001, NULL, "vcmovf.t C010, C400, 5"), + TEST_ENTRY_C(0xD2AD9081, NULL, "vcmovf.q C010, C400, 5"), + TEST_ENTRY_C(0xD2AE1001, NULL, "vcmovf.s S010, S400, 6"), + TEST_ENTRY_C(0xD2AE1081, NULL, "vcmovf.p C010, C400, 6"), + TEST_ENTRY_C(0xD2AE9001, NULL, "vcmovf.t C010, C400, 6"), + TEST_ENTRY_C(0xD2AE9081, NULL, "vcmovf.q C010, C400, 6"), + TEST_ENTRY_C(0xD2B01001, NULL, ".word 0xD2B01001 # INVALID $s5, $s0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2B01081, NULL, ".word 0xD2B01081 # INVALID $s5, $s0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2B09001, NULL, ".word 0xD2B09001 # INVALID $s5, $s0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2B09081, NULL, ".word 0xD2B09081 # INVALID $s5, $s0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2B11001, NULL, ".word 0xD2B11001 # INVALID $s5, $s1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2B11081, NULL, ".word 0xD2B11081 # INVALID $s5, $s1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2B19001, NULL, ".word 0xD2B19001 # INVALID $s5, $s1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2B19081, NULL, ".word 0xD2B19081 # INVALID $s5, $s1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2B21001, NULL, ".word 0xD2B21001 # INVALID $s5, $s2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2B21081, NULL, ".word 0xD2B21081 # INVALID $s5, $s2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2B29001, NULL, ".word 0xD2B29001 # INVALID $s5, $s2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2B29081, NULL, ".word 0xD2B29081 # INVALID $s5, $s2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2B31001, NULL, ".word 0xD2B31001 # INVALID $s5, $s3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2B31081, NULL, ".word 0xD2B31081 # INVALID $s5, $s3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2B39001, NULL, ".word 0xD2B39001 # INVALID $s5, $s3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2B39081, NULL, ".word 0xD2B39081 # INVALID $s5, $s3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2B41001, NULL, ".word 0xD2B41001 # INVALID $s5, $s4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2B41081, NULL, ".word 0xD2B41081 # INVALID $s5, $s4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2B49001, NULL, ".word 0xD2B49001 # INVALID $s5, $s4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2B49081, NULL, ".word 0xD2B49081 # INVALID $s5, $s4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2B51001, NULL, ".word 0xD2B51001 # INVALID $s5, $s5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2B51081, NULL, ".word 0xD2B51081 # INVALID $s5, $s5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2B59001, NULL, ".word 0xD2B59001 # INVALID $s5, $s5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2B59081, NULL, ".word 0xD2B59081 # INVALID $s5, $s5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2B61001, NULL, ".word 0xD2B61001 # INVALID $s5, $s6, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2B61081, NULL, ".word 0xD2B61081 # INVALID $s5, $s6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2B69001, NULL, ".word 0xD2B69001 # INVALID $s5, $s6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2B69081, NULL, ".word 0xD2B69081 # INVALID $s5, $s6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2B81001, NULL, ".word 0xD2B81001 # INVALID $s5, $t8, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2B81081, NULL, ".word 0xD2B81081 # INVALID $s5, $t8, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2B89001, NULL, ".word 0xD2B89001 # INVALID $s5, $t8, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2B89081, NULL, ".word 0xD2B89081 # INVALID $s5, $t8, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2B91001, NULL, ".word 0xD2B91001 # INVALID $s5, $t9, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2B91081, NULL, ".word 0xD2B91081 # INVALID $s5, $t9, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2B99001, NULL, ".word 0xD2B99001 # INVALID $s5, $t9, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2B99081, NULL, ".word 0xD2B99081 # INVALID $s5, $t9, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2BA1001, NULL, ".word 0xD2BA1001 # INVALID $s5, $k0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2BA1081, NULL, ".word 0xD2BA1081 # INVALID $s5, $k0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2BA9001, NULL, ".word 0xD2BA9001 # INVALID $s5, $k0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2BA9081, NULL, ".word 0xD2BA9081 # INVALID $s5, $k0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2BB1001, NULL, ".word 0xD2BB1001 # INVALID $s5, $k1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2BB1081, NULL, ".word 0xD2BB1081 # INVALID $s5, $k1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2BB9001, NULL, ".word 0xD2BB9001 # INVALID $s5, $k1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2BB9081, NULL, ".word 0xD2BB9081 # INVALID $s5, $k1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2BC1001, NULL, ".word 0xD2BC1001 # INVALID $s5, $gp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2BC1081, NULL, ".word 0xD2BC1081 # INVALID $s5, $gp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2BC9001, NULL, ".word 0xD2BC9001 # INVALID $s5, $gp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2BC9081, NULL, ".word 0xD2BC9081 # INVALID $s5, $gp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2BD1001, NULL, ".word 0xD2BD1001 # INVALID $s5, $sp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2BD1081, NULL, ".word 0xD2BD1081 # INVALID $s5, $sp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2BD9001, NULL, ".word 0xD2BD9001 # INVALID $s5, $sp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2BD9081, NULL, ".word 0xD2BD9081 # INVALID $s5, $sp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2BE1001, NULL, ".word 0xD2BE1001 # INVALID $s5, $fp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2BE1081, NULL, ".word 0xD2BE1081 # INVALID $s5, $fp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2BE9001, NULL, ".word 0xD2BE9001 # INVALID $s5, $fp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2BE9081, NULL, ".word 0xD2BE9081 # INVALID $s5, $fp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2C01001, NULL, ".word 0xD2C01001 # INVALID $s6, $zero, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2C01081, NULL, ".word 0xD2C01081 # INVALID $s6, $zero, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2C09001, NULL, ".word 0xD2C09001 # INVALID $s6, $zero, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2C09081, NULL, ".word 0xD2C09081 # INVALID $s6, $zero, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2C11001, NULL, ".word 0xD2C11001 # INVALID $s6, $at, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2C11081, NULL, ".word 0xD2C11081 # INVALID $s6, $at, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2C19001, NULL, ".word 0xD2C19001 # INVALID $s6, $at, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2C19081, NULL, ".word 0xD2C19081 # INVALID $s6, $at, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2C21001, NULL, ".word 0xD2C21001 # INVALID $s6, $v0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2C21081, NULL, ".word 0xD2C21081 # INVALID $s6, $v0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2C29001, NULL, ".word 0xD2C29001 # INVALID $s6, $v0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2C29081, NULL, ".word 0xD2C29081 # INVALID $s6, $v0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2C31001, NULL, ".word 0xD2C31001 # INVALID $s6, $v1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2C31081, NULL, ".word 0xD2C31081 # INVALID $s6, $v1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2C39001, NULL, ".word 0xD2C39001 # INVALID $s6, $v1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2C39081, NULL, ".word 0xD2C39081 # INVALID $s6, $v1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2C41001, NULL, ".word 0xD2C41001 # INVALID $s6, $a0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2C41081, NULL, ".word 0xD2C41081 # INVALID $s6, $a0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2C49001, NULL, ".word 0xD2C49001 # INVALID $s6, $a0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2C49081, NULL, ".word 0xD2C49081 # INVALID $s6, $a0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2C51001, NULL, ".word 0xD2C51001 # INVALID $s6, $a1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2C51081, NULL, ".word 0xD2C51081 # INVALID $s6, $a1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2C59001, NULL, ".word 0xD2C59001 # INVALID $s6, $a1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2C59081, NULL, ".word 0xD2C59081 # INVALID $s6, $a1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2C61001, NULL, ".word 0xD2C61001 # INVALID $s6, $a2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2C61081, NULL, ".word 0xD2C61081 # INVALID $s6, $a2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2C69001, NULL, ".word 0xD2C69001 # INVALID $s6, $a2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2C69081, NULL, ".word 0xD2C69081 # INVALID $s6, $a2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2C71001, NULL, ".word 0xD2C71001 # INVALID $s6, $a3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2C71081, NULL, ".word 0xD2C71081 # INVALID $s6, $a3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2C79001, NULL, ".word 0xD2C79001 # INVALID $s6, $a3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2C79081, NULL, ".word 0xD2C79081 # INVALID $s6, $a3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2C81001, NULL, ".word 0xD2C81001 # INVALID $s6, $t0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2C81081, NULL, ".word 0xD2C81081 # INVALID $s6, $t0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2C89001, NULL, ".word 0xD2C89001 # INVALID $s6, $t0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2C89081, NULL, ".word 0xD2C89081 # INVALID $s6, $t0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2C91001, NULL, ".word 0xD2C91001 # INVALID $s6, $t1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2C91081, NULL, ".word 0xD2C91081 # INVALID $s6, $t1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2C99001, NULL, ".word 0xD2C99001 # INVALID $s6, $t1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2C99081, NULL, ".word 0xD2C99081 # INVALID $s6, $t1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2CA1001, NULL, ".word 0xD2CA1001 # INVALID $s6, $t2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2CA1081, NULL, ".word 0xD2CA1081 # INVALID $s6, $t2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2CA9001, NULL, ".word 0xD2CA9001 # INVALID $s6, $t2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2CA9081, NULL, ".word 0xD2CA9081 # INVALID $s6, $t2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2CB1001, NULL, ".word 0xD2CB1001 # INVALID $s6, $t3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2CB1081, NULL, ".word 0xD2CB1081 # INVALID $s6, $t3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2CB9001, NULL, ".word 0xD2CB9001 # INVALID $s6, $t3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2CB9081, NULL, ".word 0xD2CB9081 # INVALID $s6, $t3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2CC1001, NULL, ".word 0xD2CC1001 # INVALID $s6, $t4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2CC1081, NULL, ".word 0xD2CC1081 # INVALID $s6, $t4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2CC9001, NULL, ".word 0xD2CC9001 # INVALID $s6, $t4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2CC9081, NULL, ".word 0xD2CC9081 # INVALID $s6, $t4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2CD1001, NULL, ".word 0xD2CD1001 # INVALID $s6, $t5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2CD1081, NULL, ".word 0xD2CD1081 # INVALID $s6, $t5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2CD9001, NULL, ".word 0xD2CD9001 # INVALID $s6, $t5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2CD9081, NULL, ".word 0xD2CD9081 # INVALID $s6, $t5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2CE1001, NULL, ".word 0xD2CE1001 # INVALID $s6, $t6, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2CE1081, NULL, ".word 0xD2CE1081 # INVALID $s6, $t6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2CE9001, NULL, ".word 0xD2CE9001 # INVALID $s6, $t6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2CE9081, NULL, ".word 0xD2CE9081 # INVALID $s6, $t6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2CF1001, NULL, ".word 0xD2CF1001 # INVALID $s6, $t7, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2CF1081, NULL, ".word 0xD2CF1081 # INVALID $s6, $t7, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2CF9001, NULL, ".word 0xD2CF9001 # INVALID $s6, $t7, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2CF9081, NULL, ".word 0xD2CF9081 # INVALID $s6, $t7, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2D01001, NULL, ".word 0xD2D01001 # INVALID $s6, $s0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2D01081, NULL, ".word 0xD2D01081 # INVALID $s6, $s0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2D09001, NULL, ".word 0xD2D09001 # INVALID $s6, $s0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2D09081, NULL, ".word 0xD2D09081 # INVALID $s6, $s0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2D11001, NULL, ".word 0xD2D11001 # INVALID $s6, $s1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2D11081, NULL, ".word 0xD2D11081 # INVALID $s6, $s1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2D19001, NULL, ".word 0xD2D19001 # INVALID $s6, $s1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2D19081, NULL, ".word 0xD2D19081 # INVALID $s6, $s1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2D21001, NULL, ".word 0xD2D21001 # INVALID $s6, $s2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2D21081, NULL, ".word 0xD2D21081 # INVALID $s6, $s2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2D29001, NULL, ".word 0xD2D29001 # INVALID $s6, $s2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2D29081, NULL, ".word 0xD2D29081 # INVALID $s6, $s2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2D31001, NULL, ".word 0xD2D31001 # INVALID $s6, $s3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2D31081, NULL, ".word 0xD2D31081 # INVALID $s6, $s3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2D39001, NULL, ".word 0xD2D39001 # INVALID $s6, $s3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2D39081, NULL, ".word 0xD2D39081 # INVALID $s6, $s3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2D41001, NULL, ".word 0xD2D41001 # INVALID $s6, $s4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2D41081, NULL, ".word 0xD2D41081 # INVALID $s6, $s4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2D49001, NULL, ".word 0xD2D49001 # INVALID $s6, $s4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2D49081, NULL, ".word 0xD2D49081 # INVALID $s6, $s4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2D51001, NULL, ".word 0xD2D51001 # INVALID $s6, $s5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2D51081, NULL, ".word 0xD2D51081 # INVALID $s6, $s5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2D59001, NULL, ".word 0xD2D59001 # INVALID $s6, $s5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2D59081, NULL, ".word 0xD2D59081 # INVALID $s6, $s5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2D61001, NULL, ".word 0xD2D61001 # INVALID $s6, $s6, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2D61081, NULL, ".word 0xD2D61081 # INVALID $s6, $s6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2D69001, NULL, ".word 0xD2D69001 # INVALID $s6, $s6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2D69081, NULL, ".word 0xD2D69081 # INVALID $s6, $s6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2D71001, NULL, ".word 0xD2D71001 # INVALID $s6, $s7, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2D71081, NULL, ".word 0xD2D71081 # INVALID $s6, $s7, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2D79001, NULL, ".word 0xD2D79001 # INVALID $s6, $s7, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2D79081, NULL, ".word 0xD2D79081 # INVALID $s6, $s7, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2D81001, NULL, ".word 0xD2D81001 # INVALID $s6, $t8, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2D81081, NULL, ".word 0xD2D81081 # INVALID $s6, $t8, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2D89001, NULL, ".word 0xD2D89001 # INVALID $s6, $t8, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2D89081, NULL, ".word 0xD2D89081 # INVALID $s6, $t8, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2D91001, NULL, ".word 0xD2D91001 # INVALID $s6, $t9, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2D91081, NULL, ".word 0xD2D91081 # INVALID $s6, $t9, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2D99001, NULL, ".word 0xD2D99001 # INVALID $s6, $t9, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2D99081, NULL, ".word 0xD2D99081 # INVALID $s6, $t9, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2DA1001, NULL, ".word 0xD2DA1001 # INVALID $s6, $k0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2DA1081, NULL, ".word 0xD2DA1081 # INVALID $s6, $k0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2DA9001, NULL, ".word 0xD2DA9001 # INVALID $s6, $k0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2DA9081, NULL, ".word 0xD2DA9081 # INVALID $s6, $k0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2DB1001, NULL, ".word 0xD2DB1001 # INVALID $s6, $k1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2DB1081, NULL, ".word 0xD2DB1081 # INVALID $s6, $k1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2DB9001, NULL, ".word 0xD2DB9001 # INVALID $s6, $k1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2DB9081, NULL, ".word 0xD2DB9081 # INVALID $s6, $k1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2DC1001, NULL, ".word 0xD2DC1001 # INVALID $s6, $gp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2DC1081, NULL, ".word 0xD2DC1081 # INVALID $s6, $gp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2DC9001, NULL, ".word 0xD2DC9001 # INVALID $s6, $gp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2DC9081, NULL, ".word 0xD2DC9081 # INVALID $s6, $gp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2DD1001, NULL, ".word 0xD2DD1001 # INVALID $s6, $sp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2DD1081, NULL, ".word 0xD2DD1081 # INVALID $s6, $sp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2DD9001, NULL, ".word 0xD2DD9001 # INVALID $s6, $sp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2DD9081, NULL, ".word 0xD2DD9081 # INVALID $s6, $sp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2DE1001, NULL, ".word 0xD2DE1001 # INVALID $s6, $fp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2DE1081, NULL, ".word 0xD2DE1081 # INVALID $s6, $fp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2DE9001, NULL, ".word 0xD2DE9001 # INVALID $s6, $fp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2DE9081, NULL, ".word 0xD2DE9081 # INVALID $s6, $fp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2DF1001, NULL, ".word 0xD2DF1001 # INVALID $s6, $ra, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2DF1081, NULL, ".word 0xD2DF1081 # INVALID $s6, $ra, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2DF9001, NULL, ".word 0xD2DF9001 # INVALID $s6, $ra, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2DF9081, NULL, ".word 0xD2DF9081 # INVALID $s6, $ra, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2E01001, NULL, ".word 0xD2E01001 # INVALID $s7, $zero, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2E01081, NULL, ".word 0xD2E01081 # INVALID $s7, $zero, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2E09001, NULL, ".word 0xD2E09001 # INVALID $s7, $zero, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2E09081, NULL, ".word 0xD2E09081 # INVALID $s7, $zero, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2E11001, NULL, ".word 0xD2E11001 # INVALID $s7, $at, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2E11081, NULL, ".word 0xD2E11081 # INVALID $s7, $at, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2E19001, NULL, ".word 0xD2E19001 # INVALID $s7, $at, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2E19081, NULL, ".word 0xD2E19081 # INVALID $s7, $at, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2E21001, NULL, ".word 0xD2E21001 # INVALID $s7, $v0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2E21081, NULL, ".word 0xD2E21081 # INVALID $s7, $v0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2E29001, NULL, ".word 0xD2E29001 # INVALID $s7, $v0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2E29081, NULL, ".word 0xD2E29081 # INVALID $s7, $v0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2E31001, NULL, ".word 0xD2E31001 # INVALID $s7, $v1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2E31081, NULL, ".word 0xD2E31081 # INVALID $s7, $v1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2E39001, NULL, ".word 0xD2E39001 # INVALID $s7, $v1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2E39081, NULL, ".word 0xD2E39081 # INVALID $s7, $v1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2E41001, NULL, ".word 0xD2E41001 # INVALID $s7, $a0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2E41081, NULL, ".word 0xD2E41081 # INVALID $s7, $a0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2E49001, NULL, ".word 0xD2E49001 # INVALID $s7, $a0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2E49081, NULL, ".word 0xD2E49081 # INVALID $s7, $a0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2E51001, NULL, ".word 0xD2E51001 # INVALID $s7, $a1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2E51081, NULL, ".word 0xD2E51081 # INVALID $s7, $a1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2E59001, NULL, ".word 0xD2E59001 # INVALID $s7, $a1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2E59081, NULL, ".word 0xD2E59081 # INVALID $s7, $a1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2E61001, NULL, ".word 0xD2E61001 # INVALID $s7, $a2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2E61081, NULL, ".word 0xD2E61081 # INVALID $s7, $a2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2E69001, NULL, ".word 0xD2E69001 # INVALID $s7, $a2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2E69081, NULL, ".word 0xD2E69081 # INVALID $s7, $a2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2E71001, NULL, ".word 0xD2E71001 # INVALID $s7, $a3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2E71081, NULL, ".word 0xD2E71081 # INVALID $s7, $a3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2E79001, NULL, ".word 0xD2E79001 # INVALID $s7, $a3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2E79081, NULL, ".word 0xD2E79081 # INVALID $s7, $a3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2E81001, NULL, ".word 0xD2E81001 # INVALID $s7, $t0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2E81081, NULL, ".word 0xD2E81081 # INVALID $s7, $t0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2E89001, NULL, ".word 0xD2E89001 # INVALID $s7, $t0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2E89081, NULL, ".word 0xD2E89081 # INVALID $s7, $t0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2E91001, NULL, ".word 0xD2E91001 # INVALID $s7, $t1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2E91081, NULL, ".word 0xD2E91081 # INVALID $s7, $t1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2E99001, NULL, ".word 0xD2E99001 # INVALID $s7, $t1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2E99081, NULL, ".word 0xD2E99081 # INVALID $s7, $t1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2EA1001, NULL, ".word 0xD2EA1001 # INVALID $s7, $t2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2EA1081, NULL, ".word 0xD2EA1081 # INVALID $s7, $t2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2EA9001, NULL, ".word 0xD2EA9001 # INVALID $s7, $t2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2EA9081, NULL, ".word 0xD2EA9081 # INVALID $s7, $t2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2EB1001, NULL, ".word 0xD2EB1001 # INVALID $s7, $t3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2EB1081, NULL, ".word 0xD2EB1081 # INVALID $s7, $t3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2EB9001, NULL, ".word 0xD2EB9001 # INVALID $s7, $t3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2EB9081, NULL, ".word 0xD2EB9081 # INVALID $s7, $t3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2EC1001, NULL, ".word 0xD2EC1001 # INVALID $s7, $t4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2EC1081, NULL, ".word 0xD2EC1081 # INVALID $s7, $t4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2EC9001, NULL, ".word 0xD2EC9001 # INVALID $s7, $t4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2EC9081, NULL, ".word 0xD2EC9081 # INVALID $s7, $t4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2ED1001, NULL, ".word 0xD2ED1001 # INVALID $s7, $t5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2ED1081, NULL, ".word 0xD2ED1081 # INVALID $s7, $t5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2ED9001, NULL, ".word 0xD2ED9001 # INVALID $s7, $t5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2ED9081, NULL, ".word 0xD2ED9081 # INVALID $s7, $t5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2EE1001, NULL, ".word 0xD2EE1001 # INVALID $s7, $t6, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2EE1081, NULL, ".word 0xD2EE1081 # INVALID $s7, $t6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2EE9001, NULL, ".word 0xD2EE9001 # INVALID $s7, $t6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2EE9081, NULL, ".word 0xD2EE9081 # INVALID $s7, $t6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2EF1001, NULL, ".word 0xD2EF1001 # INVALID $s7, $t7, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2EF1081, NULL, ".word 0xD2EF1081 # INVALID $s7, $t7, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2EF9001, NULL, ".word 0xD2EF9001 # INVALID $s7, $t7, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2EF9081, NULL, ".word 0xD2EF9081 # INVALID $s7, $t7, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2F01001, NULL, ".word 0xD2F01001 # INVALID $s7, $s0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2F01081, NULL, ".word 0xD2F01081 # INVALID $s7, $s0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2F09001, NULL, ".word 0xD2F09001 # INVALID $s7, $s0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2F09081, NULL, ".word 0xD2F09081 # INVALID $s7, $s0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2F11001, NULL, ".word 0xD2F11001 # INVALID $s7, $s1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2F11081, NULL, ".word 0xD2F11081 # INVALID $s7, $s1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2F19001, NULL, ".word 0xD2F19001 # INVALID $s7, $s1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2F19081, NULL, ".word 0xD2F19081 # INVALID $s7, $s1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2F21001, NULL, ".word 0xD2F21001 # INVALID $s7, $s2, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2F21081, NULL, ".word 0xD2F21081 # INVALID $s7, $s2, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2F29001, NULL, ".word 0xD2F29001 # INVALID $s7, $s2, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2F29081, NULL, ".word 0xD2F29081 # INVALID $s7, $s2, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2F31001, NULL, ".word 0xD2F31001 # INVALID $s7, $s3, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2F31081, NULL, ".word 0xD2F31081 # INVALID $s7, $s3, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2F39001, NULL, ".word 0xD2F39001 # INVALID $s7, $s3, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2F39081, NULL, ".word 0xD2F39081 # INVALID $s7, $s3, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2F41001, NULL, ".word 0xD2F41001 # INVALID $s7, $s4, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2F41081, NULL, ".word 0xD2F41081 # INVALID $s7, $s4, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2F49001, NULL, ".word 0xD2F49001 # INVALID $s7, $s4, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2F49081, NULL, ".word 0xD2F49081 # INVALID $s7, $s4, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2F51001, NULL, ".word 0xD2F51001 # INVALID $s7, $s5, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2F51081, NULL, ".word 0xD2F51081 # INVALID $s7, $s5, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2F59001, NULL, ".word 0xD2F59001 # INVALID $s7, $s5, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2F59081, NULL, ".word 0xD2F59081 # INVALID $s7, $s5, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2F61001, NULL, ".word 0xD2F61001 # INVALID $s7, $s6, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2F61081, NULL, ".word 0xD2F61081 # INVALID $s7, $s6, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2F69001, NULL, ".word 0xD2F69001 # INVALID $s7, $s6, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2F69081, NULL, ".word 0xD2F69081 # INVALID $s7, $s6, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2F71001, NULL, ".word 0xD2F71001 # INVALID $s7, $s7, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2F71081, NULL, ".word 0xD2F71081 # INVALID $s7, $s7, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2F79001, NULL, ".word 0xD2F79001 # INVALID $s7, $s7, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2F79081, NULL, ".word 0xD2F79081 # INVALID $s7, $s7, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2F81001, NULL, ".word 0xD2F81001 # INVALID $s7, $t8, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2F81081, NULL, ".word 0xD2F81081 # INVALID $s7, $t8, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2F89001, NULL, ".word 0xD2F89001 # INVALID $s7, $t8, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2F89081, NULL, ".word 0xD2F89081 # INVALID $s7, $t8, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2F91001, NULL, ".word 0xD2F91001 # INVALID $s7, $t9, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2F91081, NULL, ".word 0xD2F91081 # INVALID $s7, $t9, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2F99001, NULL, ".word 0xD2F99001 # INVALID $s7, $t9, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2F99081, NULL, ".word 0xD2F99081 # INVALID $s7, $t9, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2FA1001, NULL, ".word 0xD2FA1001 # INVALID $s7, $k0, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2FA1081, NULL, ".word 0xD2FA1081 # INVALID $s7, $k0, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2FA9001, NULL, ".word 0xD2FA9001 # INVALID $s7, $k0, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2FA9081, NULL, ".word 0xD2FA9081 # INVALID $s7, $k0, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2FB1001, NULL, ".word 0xD2FB1001 # INVALID $s7, $k1, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2FB1081, NULL, ".word 0xD2FB1081 # INVALID $s7, $k1, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2FB9001, NULL, ".word 0xD2FB9001 # INVALID $s7, $k1, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2FB9081, NULL, ".word 0xD2FB9081 # INVALID $s7, $k1, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2FC1001, NULL, ".word 0xD2FC1001 # INVALID $s7, $gp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2FC1081, NULL, ".word 0xD2FC1081 # INVALID $s7, $gp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2FC9001, NULL, ".word 0xD2FC9001 # INVALID $s7, $gp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2FC9081, NULL, ".word 0xD2FC9081 # INVALID $s7, $gp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2FD1001, NULL, ".word 0xD2FD1001 # INVALID $s7, $sp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2FD1081, NULL, ".word 0xD2FD1081 # INVALID $s7, $sp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2FD9001, NULL, ".word 0xD2FD9001 # INVALID $s7, $sp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2FD9081, NULL, ".word 0xD2FD9081 # INVALID $s7, $sp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2FE1001, NULL, ".word 0xD2FE1001 # INVALID $s7, $fp, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2FE1081, NULL, ".word 0xD2FE1081 # INVALID $s7, $fp, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2FE9001, NULL, ".word 0xD2FE9001 # INVALID $s7, $fp, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2FE9081, NULL, ".word 0xD2FE9081 # INVALID $s7, $fp, -0x6F7F # 00000000 "), + TEST_ENTRY_C(0xD2FF1001, NULL, ".word 0xD2FF1001 # INVALID $s7, $ra, 0x1001 # 00000000 "), + TEST_ENTRY_C(0xD2FF1081, NULL, ".word 0xD2FF1081 # INVALID $s7, $ra, 0x1081 # 00000000 "), + TEST_ENTRY_C(0xD2FF9001, NULL, ".word 0xD2FF9001 # INVALID $s7, $ra, -0x6FFF # 00000000 "), + TEST_ENTRY_C(0xD2FF9081, NULL, ".word 0xD2FF9081 # INVALID $s7, $ra, -0x6F7F # 00000000 "), + + + /* VFPU4 FMT3 */ + TEST_ENTRY_C(0xD3001001, NULL, "vwbn.s S010, S400, 0"), + TEST_ENTRY_C(0xD3011001, NULL, "vwbn.s S010, S400, 1"), + TEST_ENTRY_C(0xD3021001, NULL, "vwbn.s S010, S400, 2"), + TEST_ENTRY_C(0xD3031001, NULL, "vwbn.s S010, S400, 3"), + TEST_ENTRY_C(0xD3041001, NULL, "vwbn.s S010, S400, 4"), + TEST_ENTRY_C(0xD3051001, NULL, "vwbn.s S010, S400, 5"), + TEST_ENTRY_C(0xD3061001, NULL, "vwbn.s S010, S400, 6"), + TEST_ENTRY_C(0xD3071001, NULL, "vwbn.s S010, S400, 7"), + TEST_ENTRY_C(0xD3081001, NULL, "vwbn.s S010, S400, 8"), + TEST_ENTRY_C(0xD3091001, NULL, "vwbn.s S010, S400, 9"), + TEST_ENTRY_C(0xD30A1001, NULL, "vwbn.s S010, S400, 10"), + TEST_ENTRY_C(0xD30B1001, NULL, "vwbn.s S010, S400, 11"), + TEST_ENTRY_C(0xD30C1001, NULL, "vwbn.s S010, S400, 12"), + TEST_ENTRY_C(0xD30D1001, NULL, "vwbn.s S010, S400, 13"), + TEST_ENTRY_C(0xD30E1001, NULL, "vwbn.s S010, S400, 14"), + TEST_ENTRY_C(0xD30F1001, NULL, "vwbn.s S010, S400, 15"), + TEST_ENTRY_C(0xD3101001, NULL, "vwbn.s S010, S400, 16"), + TEST_ENTRY_C(0xD3111001, NULL, "vwbn.s S010, S400, 17"), + TEST_ENTRY_C(0xD3121001, NULL, "vwbn.s S010, S400, 18"), + TEST_ENTRY_C(0xD3131001, NULL, "vwbn.s S010, S400, 19"), + TEST_ENTRY_C(0xD3141001, NULL, "vwbn.s S010, S400, 20"), + TEST_ENTRY_C(0xD3151001, NULL, "vwbn.s S010, S400, 21"), + TEST_ENTRY_C(0xD3161001, NULL, "vwbn.s S010, S400, 22"), + TEST_ENTRY_C(0xD3171001, NULL, "vwbn.s S010, S400, 23"), + TEST_ENTRY_C(0xD3181001, NULL, "vwbn.s S010, S400, 24"), + TEST_ENTRY_C(0xD3191001, NULL, "vwbn.s S010, S400, 25"), + TEST_ENTRY_C(0xD31A1001, NULL, "vwbn.s S010, S400, 26"), + TEST_ENTRY_C(0xD31B1001, NULL, "vwbn.s S010, S400, 27"), + TEST_ENTRY_C(0xD31C1001, NULL, "vwbn.s S010, S400, 28"), + TEST_ENTRY_C(0xD31D1001, NULL, "vwbn.s S010, S400, 29"), + TEST_ENTRY_C(0xD31E1001, NULL, "vwbn.s S010, S400, 30"), + TEST_ENTRY_C(0xD31F1001, NULL, "vwbn.s S010, S400, 31"), + TEST_ENTRY_C(0xD3201001, NULL, "vwbn.s S010, S400, 32"), + TEST_ENTRY_C(0xD3211001, NULL, "vwbn.s S010, S400, 33"), + TEST_ENTRY_C(0xD3221001, NULL, "vwbn.s S010, S400, 34"), + TEST_ENTRY_C(0xD3231001, NULL, "vwbn.s S010, S400, 35"), + TEST_ENTRY_C(0xD3241001, NULL, "vwbn.s S010, S400, 36"), + TEST_ENTRY_C(0xD3251001, NULL, "vwbn.s S010, S400, 37"), + TEST_ENTRY_C(0xD3261001, NULL, "vwbn.s S010, S400, 38"), + TEST_ENTRY_C(0xD3271001, NULL, "vwbn.s S010, S400, 39"), + TEST_ENTRY_C(0xD3281001, NULL, "vwbn.s S010, S400, 40"), + TEST_ENTRY_C(0xD3291001, NULL, "vwbn.s S010, S400, 41"), + TEST_ENTRY_C(0xD32A1001, NULL, "vwbn.s S010, S400, 42"), + TEST_ENTRY_C(0xD32B1001, NULL, "vwbn.s S010, S400, 43"), + TEST_ENTRY_C(0xD32C1001, NULL, "vwbn.s S010, S400, 44"), + TEST_ENTRY_C(0xD32D1001, NULL, "vwbn.s S010, S400, 45"), + TEST_ENTRY_C(0xD32E1001, NULL, "vwbn.s S010, S400, 46"), + TEST_ENTRY_C(0xD32F1001, NULL, "vwbn.s S010, S400, 47"), + TEST_ENTRY_C(0xD3301001, NULL, "vwbn.s S010, S400, 48"), + TEST_ENTRY_C(0xD3311001, NULL, "vwbn.s S010, S400, 49"), + TEST_ENTRY_C(0xD3321001, NULL, "vwbn.s S010, S400, 50"), + TEST_ENTRY_C(0xD3331001, NULL, "vwbn.s S010, S400, 51"), + TEST_ENTRY_C(0xD3341001, NULL, "vwbn.s S010, S400, 52"), + TEST_ENTRY_C(0xD3351001, NULL, "vwbn.s S010, S400, 53"), + TEST_ENTRY_C(0xD3361001, NULL, "vwbn.s S010, S400, 54"), + TEST_ENTRY_C(0xD3371001, NULL, "vwbn.s S010, S400, 55"), + TEST_ENTRY_C(0xD3381001, NULL, "vwbn.s S010, S400, 56"), + TEST_ENTRY_C(0xD3391001, NULL, "vwbn.s S010, S400, 57"), + TEST_ENTRY_C(0xD33A1001, NULL, "vwbn.s S010, S400, 58"), + TEST_ENTRY_C(0xD33B1001, NULL, "vwbn.s S010, S400, 59"), + TEST_ENTRY_C(0xD33C1001, NULL, "vwbn.s S010, S400, 60"), + TEST_ENTRY_C(0xD33D1001, NULL, "vwbn.s S010, S400, 61"), + TEST_ENTRY_C(0xD33E1001, NULL, "vwbn.s S010, S400, 62"), + TEST_ENTRY_C(0xD33F1001, NULL, "vwbn.s S010, S400, 63"), + TEST_ENTRY_C(0xD3401001, NULL, "vwbn.s S010, S400, 64"), + TEST_ENTRY_C(0xD3411001, NULL, "vwbn.s S010, S400, 65"), + TEST_ENTRY_C(0xD3421001, NULL, "vwbn.s S010, S400, 66"), + TEST_ENTRY_C(0xD3431001, NULL, "vwbn.s S010, S400, 67"), + TEST_ENTRY_C(0xD3441001, NULL, "vwbn.s S010, S400, 68"), + TEST_ENTRY_C(0xD3451001, NULL, "vwbn.s S010, S400, 69"), + TEST_ENTRY_C(0xD3461001, NULL, "vwbn.s S010, S400, 70"), + TEST_ENTRY_C(0xD3471001, NULL, "vwbn.s S010, S400, 71"), + TEST_ENTRY_C(0xD3481001, NULL, "vwbn.s S010, S400, 72"), + TEST_ENTRY_C(0xD3491001, NULL, "vwbn.s S010, S400, 73"), + TEST_ENTRY_C(0xD34A1001, NULL, "vwbn.s S010, S400, 74"), + TEST_ENTRY_C(0xD34B1001, NULL, "vwbn.s S010, S400, 75"), + TEST_ENTRY_C(0xD34C1001, NULL, "vwbn.s S010, S400, 76"), + TEST_ENTRY_C(0xD34D1001, NULL, "vwbn.s S010, S400, 77"), + TEST_ENTRY_C(0xD34E1001, NULL, "vwbn.s S010, S400, 78"), + TEST_ENTRY_C(0xD34F1001, NULL, "vwbn.s S010, S400, 79"), + TEST_ENTRY_C(0xD3501001, NULL, "vwbn.s S010, S400, 80"), + TEST_ENTRY_C(0xD3511001, NULL, "vwbn.s S010, S400, 81"), + TEST_ENTRY_C(0xD3521001, NULL, "vwbn.s S010, S400, 82"), + TEST_ENTRY_C(0xD3531001, NULL, "vwbn.s S010, S400, 83"), + TEST_ENTRY_C(0xD3541001, NULL, "vwbn.s S010, S400, 84"), + TEST_ENTRY_C(0xD3551001, NULL, "vwbn.s S010, S400, 85"), + TEST_ENTRY_C(0xD3561001, NULL, "vwbn.s S010, S400, 86"), + TEST_ENTRY_C(0xD3571001, NULL, "vwbn.s S010, S400, 87"), + TEST_ENTRY_C(0xD3581001, NULL, "vwbn.s S010, S400, 88"), + TEST_ENTRY_C(0xD3591001, NULL, "vwbn.s S010, S400, 89"), + TEST_ENTRY_C(0xD35A1001, NULL, "vwbn.s S010, S400, 90"), + TEST_ENTRY_C(0xD35B1001, NULL, "vwbn.s S010, S400, 91"), + TEST_ENTRY_C(0xD35C1001, NULL, "vwbn.s S010, S400, 92"), + TEST_ENTRY_C(0xD35D1001, NULL, "vwbn.s S010, S400, 93"), + TEST_ENTRY_C(0xD35E1001, NULL, "vwbn.s S010, S400, 94"), + TEST_ENTRY_C(0xD35F1001, NULL, "vwbn.s S010, S400, 95"), + TEST_ENTRY_C(0xD3601001, NULL, "vwbn.s S010, S400, 96"), + TEST_ENTRY_C(0xD3611001, NULL, "vwbn.s S010, S400, 97"), + TEST_ENTRY_C(0xD3621001, NULL, "vwbn.s S010, S400, 98"), + TEST_ENTRY_C(0xD3631001, NULL, "vwbn.s S010, S400, 99"), + TEST_ENTRY_C(0xD3641001, NULL, "vwbn.s S010, S400, 100"), + TEST_ENTRY_C(0xD3651001, NULL, "vwbn.s S010, S400, 101"), + TEST_ENTRY_C(0xD3661001, NULL, "vwbn.s S010, S400, 102"), + TEST_ENTRY_C(0xD3671001, NULL, "vwbn.s S010, S400, 103"), + TEST_ENTRY_C(0xD3681001, NULL, "vwbn.s S010, S400, 104"), + TEST_ENTRY_C(0xD3691001, NULL, "vwbn.s S010, S400, 105"), + TEST_ENTRY_C(0xD36A1001, NULL, "vwbn.s S010, S400, 106"), + TEST_ENTRY_C(0xD36B1001, NULL, "vwbn.s S010, S400, 107"), + TEST_ENTRY_C(0xD36C1001, NULL, "vwbn.s S010, S400, 108"), + TEST_ENTRY_C(0xD36D1001, NULL, "vwbn.s S010, S400, 109"), + TEST_ENTRY_C(0xD36E1001, NULL, "vwbn.s S010, S400, 110"), + TEST_ENTRY_C(0xD36F1001, NULL, "vwbn.s S010, S400, 111"), + TEST_ENTRY_C(0xD3701001, NULL, "vwbn.s S010, S400, 112"), + TEST_ENTRY_C(0xD3711001, NULL, "vwbn.s S010, S400, 113"), + TEST_ENTRY_C(0xD3721001, NULL, "vwbn.s S010, S400, 114"), + TEST_ENTRY_C(0xD3731001, NULL, "vwbn.s S010, S400, 115"), + TEST_ENTRY_C(0xD3741001, NULL, "vwbn.s S010, S400, 116"), + TEST_ENTRY_C(0xD3751001, NULL, "vwbn.s S010, S400, 117"), + TEST_ENTRY_C(0xD3761001, NULL, "vwbn.s S010, S400, 118"), + TEST_ENTRY_C(0xD3771001, NULL, "vwbn.s S010, S400, 119"), + TEST_ENTRY_C(0xD3781001, NULL, "vwbn.s S010, S400, 120"), + TEST_ENTRY_C(0xD3791001, NULL, "vwbn.s S010, S400, 121"), + TEST_ENTRY_C(0xD37A1001, NULL, "vwbn.s S010, S400, 122"), + TEST_ENTRY_C(0xD37B1001, NULL, "vwbn.s S010, S400, 123"), + TEST_ENTRY_C(0xD37C1001, NULL, "vwbn.s S010, S400, 124"), + TEST_ENTRY_C(0xD37D1001, NULL, "vwbn.s S010, S400, 125"), + TEST_ENTRY_C(0xD37E1001, NULL, "vwbn.s S010, S400, 126"), + TEST_ENTRY_C(0xD37F1001, NULL, "vwbn.s S010, S400, 127"), + TEST_ENTRY_C(0xD3801001, NULL, "vwbn.s S010, S400, 128"), + TEST_ENTRY_C(0xD3811001, NULL, "vwbn.s S010, S400, 129"), + TEST_ENTRY_C(0xD3821001, NULL, "vwbn.s S010, S400, 130"), + TEST_ENTRY_C(0xD3831001, NULL, "vwbn.s S010, S400, 131"), + TEST_ENTRY_C(0xD3841001, NULL, "vwbn.s S010, S400, 132"), + TEST_ENTRY_C(0xD3851001, NULL, "vwbn.s S010, S400, 133"), + TEST_ENTRY_C(0xD3861001, NULL, "vwbn.s S010, S400, 134"), + TEST_ENTRY_C(0xD3871001, NULL, "vwbn.s S010, S400, 135"), + TEST_ENTRY_C(0xD3881001, NULL, "vwbn.s S010, S400, 136"), + TEST_ENTRY_C(0xD3891001, NULL, "vwbn.s S010, S400, 137"), + TEST_ENTRY_C(0xD38A1001, NULL, "vwbn.s S010, S400, 138"), + TEST_ENTRY_C(0xD38B1001, NULL, "vwbn.s S010, S400, 139"), + TEST_ENTRY_C(0xD38C1001, NULL, "vwbn.s S010, S400, 140"), + TEST_ENTRY_C(0xD38D1001, NULL, "vwbn.s S010, S400, 141"), + TEST_ENTRY_C(0xD38E1001, NULL, "vwbn.s S010, S400, 142"), + TEST_ENTRY_C(0xD38F1001, NULL, "vwbn.s S010, S400, 143"), + TEST_ENTRY_C(0xD3901001, NULL, "vwbn.s S010, S400, 144"), + TEST_ENTRY_C(0xD3911001, NULL, "vwbn.s S010, S400, 145"), + TEST_ENTRY_C(0xD3921001, NULL, "vwbn.s S010, S400, 146"), + TEST_ENTRY_C(0xD3931001, NULL, "vwbn.s S010, S400, 147"), + TEST_ENTRY_C(0xD3941001, NULL, "vwbn.s S010, S400, 148"), + TEST_ENTRY_C(0xD3951001, NULL, "vwbn.s S010, S400, 149"), + TEST_ENTRY_C(0xD3961001, NULL, "vwbn.s S010, S400, 150"), + TEST_ENTRY_C(0xD3971001, NULL, "vwbn.s S010, S400, 151"), + TEST_ENTRY_C(0xD3981001, NULL, "vwbn.s S010, S400, 152"), + TEST_ENTRY_C(0xD3991001, NULL, "vwbn.s S010, S400, 153"), + TEST_ENTRY_C(0xD39A1001, NULL, "vwbn.s S010, S400, 154"), + TEST_ENTRY_C(0xD39B1001, NULL, "vwbn.s S010, S400, 155"), + TEST_ENTRY_C(0xD39C1001, NULL, "vwbn.s S010, S400, 156"), + TEST_ENTRY_C(0xD39D1001, NULL, "vwbn.s S010, S400, 157"), + TEST_ENTRY_C(0xD39E1001, NULL, "vwbn.s S010, S400, 158"), + TEST_ENTRY_C(0xD39F1001, NULL, "vwbn.s S010, S400, 159"), + TEST_ENTRY_C(0xD3A01001, NULL, "vwbn.s S010, S400, 160"), + TEST_ENTRY_C(0xD3A11001, NULL, "vwbn.s S010, S400, 161"), + TEST_ENTRY_C(0xD3A21001, NULL, "vwbn.s S010, S400, 162"), + TEST_ENTRY_C(0xD3A31001, NULL, "vwbn.s S010, S400, 163"), + TEST_ENTRY_C(0xD3A41001, NULL, "vwbn.s S010, S400, 164"), + TEST_ENTRY_C(0xD3A51001, NULL, "vwbn.s S010, S400, 165"), + TEST_ENTRY_C(0xD3A61001, NULL, "vwbn.s S010, S400, 166"), + TEST_ENTRY_C(0xD3A71001, NULL, "vwbn.s S010, S400, 167"), + TEST_ENTRY_C(0xD3A81001, NULL, "vwbn.s S010, S400, 168"), + TEST_ENTRY_C(0xD3A91001, NULL, "vwbn.s S010, S400, 169"), + TEST_ENTRY_C(0xD3AA1001, NULL, "vwbn.s S010, S400, 170"), + TEST_ENTRY_C(0xD3AB1001, NULL, "vwbn.s S010, S400, 171"), + TEST_ENTRY_C(0xD3AC1001, NULL, "vwbn.s S010, S400, 172"), + TEST_ENTRY_C(0xD3AD1001, NULL, "vwbn.s S010, S400, 173"), + TEST_ENTRY_C(0xD3AE1001, NULL, "vwbn.s S010, S400, 174"), + TEST_ENTRY_C(0xD3AF1001, NULL, "vwbn.s S010, S400, 175"), + TEST_ENTRY_C(0xD3B01001, NULL, "vwbn.s S010, S400, 176"), + TEST_ENTRY_C(0xD3B11001, NULL, "vwbn.s S010, S400, 177"), + TEST_ENTRY_C(0xD3B21001, NULL, "vwbn.s S010, S400, 178"), + TEST_ENTRY_C(0xD3B31001, NULL, "vwbn.s S010, S400, 179"), + TEST_ENTRY_C(0xD3B41001, NULL, "vwbn.s S010, S400, 180"), + TEST_ENTRY_C(0xD3B51001, NULL, "vwbn.s S010, S400, 181"), + TEST_ENTRY_C(0xD3B61001, NULL, "vwbn.s S010, S400, 182"), + TEST_ENTRY_C(0xD3B71001, NULL, "vwbn.s S010, S400, 183"), + TEST_ENTRY_C(0xD3B81001, NULL, "vwbn.s S010, S400, 184"), + TEST_ENTRY_C(0xD3B91001, NULL, "vwbn.s S010, S400, 185"), + TEST_ENTRY_C(0xD3BA1001, NULL, "vwbn.s S010, S400, 186"), + TEST_ENTRY_C(0xD3BB1001, NULL, "vwbn.s S010, S400, 187"), + TEST_ENTRY_C(0xD3BC1001, NULL, "vwbn.s S010, S400, 188"), + TEST_ENTRY_C(0xD3BD1001, NULL, "vwbn.s S010, S400, 189"), + TEST_ENTRY_C(0xD3BE1001, NULL, "vwbn.s S010, S400, 190"), + TEST_ENTRY_C(0xD3BF1001, NULL, "vwbn.s S010, S400, 191"), + TEST_ENTRY_C(0xD3C01001, NULL, "vwbn.s S010, S400, 192"), + TEST_ENTRY_C(0xD3C11001, NULL, "vwbn.s S010, S400, 193"), + TEST_ENTRY_C(0xD3C21001, NULL, "vwbn.s S010, S400, 194"), + TEST_ENTRY_C(0xD3C31001, NULL, "vwbn.s S010, S400, 195"), + TEST_ENTRY_C(0xD3C41001, NULL, "vwbn.s S010, S400, 196"), + TEST_ENTRY_C(0xD3C51001, NULL, "vwbn.s S010, S400, 197"), + TEST_ENTRY_C(0xD3C61001, NULL, "vwbn.s S010, S400, 198"), + TEST_ENTRY_C(0xD3C71001, NULL, "vwbn.s S010, S400, 199"), + TEST_ENTRY_C(0xD3C81001, NULL, "vwbn.s S010, S400, 200"), + TEST_ENTRY_C(0xD3C91001, NULL, "vwbn.s S010, S400, 201"), + TEST_ENTRY_C(0xD3CA1001, NULL, "vwbn.s S010, S400, 202"), + TEST_ENTRY_C(0xD3CB1001, NULL, "vwbn.s S010, S400, 203"), + TEST_ENTRY_C(0xD3CC1001, NULL, "vwbn.s S010, S400, 204"), + TEST_ENTRY_C(0xD3CD1001, NULL, "vwbn.s S010, S400, 205"), + TEST_ENTRY_C(0xD3CE1001, NULL, "vwbn.s S010, S400, 206"), + TEST_ENTRY_C(0xD3CF1001, NULL, "vwbn.s S010, S400, 207"), + TEST_ENTRY_C(0xD3D01001, NULL, "vwbn.s S010, S400, 208"), + TEST_ENTRY_C(0xD3D11001, NULL, "vwbn.s S010, S400, 209"), + TEST_ENTRY_C(0xD3D21001, NULL, "vwbn.s S010, S400, 210"), + TEST_ENTRY_C(0xD3D31001, NULL, "vwbn.s S010, S400, 211"), + TEST_ENTRY_C(0xD3D41001, NULL, "vwbn.s S010, S400, 212"), + TEST_ENTRY_C(0xD3D51001, NULL, "vwbn.s S010, S400, 213"), + TEST_ENTRY_C(0xD3D61001, NULL, "vwbn.s S010, S400, 214"), + TEST_ENTRY_C(0xD3D71001, NULL, "vwbn.s S010, S400, 215"), + TEST_ENTRY_C(0xD3D81001, NULL, "vwbn.s S010, S400, 216"), + TEST_ENTRY_C(0xD3D91001, NULL, "vwbn.s S010, S400, 217"), + TEST_ENTRY_C(0xD3DA1001, NULL, "vwbn.s S010, S400, 218"), + TEST_ENTRY_C(0xD3DB1001, NULL, "vwbn.s S010, S400, 219"), + TEST_ENTRY_C(0xD3DC1001, NULL, "vwbn.s S010, S400, 220"), + TEST_ENTRY_C(0xD3DD1001, NULL, "vwbn.s S010, S400, 221"), + TEST_ENTRY_C(0xD3DE1001, NULL, "vwbn.s S010, S400, 222"), + TEST_ENTRY_C(0xD3DF1001, NULL, "vwbn.s S010, S400, 223"), + TEST_ENTRY_C(0xD3E01001, NULL, "vwbn.s S010, S400, 224"), + TEST_ENTRY_C(0xD3E11001, NULL, "vwbn.s S010, S400, 225"), + TEST_ENTRY_C(0xD3E21001, NULL, "vwbn.s S010, S400, 226"), + TEST_ENTRY_C(0xD3E31001, NULL, "vwbn.s S010, S400, 227"), + TEST_ENTRY_C(0xD3E41001, NULL, "vwbn.s S010, S400, 228"), + TEST_ENTRY_C(0xD3E51001, NULL, "vwbn.s S010, S400, 229"), + TEST_ENTRY_C(0xD3E61001, NULL, "vwbn.s S010, S400, 230"), + TEST_ENTRY_C(0xD3E71001, NULL, "vwbn.s S010, S400, 231"), + TEST_ENTRY_C(0xD3E81001, NULL, "vwbn.s S010, S400, 232"), + TEST_ENTRY_C(0xD3E91001, NULL, "vwbn.s S010, S400, 233"), + TEST_ENTRY_C(0xD3EA1001, NULL, "vwbn.s S010, S400, 234"), + TEST_ENTRY_C(0xD3EB1001, NULL, "vwbn.s S010, S400, 235"), + TEST_ENTRY_C(0xD3EC1001, NULL, "vwbn.s S010, S400, 236"), + TEST_ENTRY_C(0xD3ED1001, NULL, "vwbn.s S010, S400, 237"), + TEST_ENTRY_C(0xD3EE1001, NULL, "vwbn.s S010, S400, 238"), + TEST_ENTRY_C(0xD3EF1001, NULL, "vwbn.s S010, S400, 239"), + TEST_ENTRY_C(0xD3F01001, NULL, "vwbn.s S010, S400, 240"), + TEST_ENTRY_C(0xD3F11001, NULL, "vwbn.s S010, S400, 241"), + TEST_ENTRY_C(0xD3F21001, NULL, "vwbn.s S010, S400, 242"), + TEST_ENTRY_C(0xD3F31001, NULL, "vwbn.s S010, S400, 243"), + TEST_ENTRY_C(0xD3F41001, NULL, "vwbn.s S010, S400, 244"), + TEST_ENTRY_C(0xD3F51001, NULL, "vwbn.s S010, S400, 245"), + TEST_ENTRY_C(0xD3F61001, NULL, "vwbn.s S010, S400, 246"), + TEST_ENTRY_C(0xD3F71001, NULL, "vwbn.s S010, S400, 247"), + TEST_ENTRY_C(0xD3F81001, NULL, "vwbn.s S010, S400, 248"), + TEST_ENTRY_C(0xD3F91001, NULL, "vwbn.s S010, S400, 249"), + TEST_ENTRY_C(0xD3FA1001, NULL, "vwbn.s S010, S400, 250"), + TEST_ENTRY_C(0xD3FB1001, NULL, "vwbn.s S010, S400, 251"), + TEST_ENTRY_C(0xD3FC1001, NULL, "vwbn.s S010, S400, 252"), + TEST_ENTRY_C(0xD3FD1001, NULL, "vwbn.s S010, S400, 253"), + TEST_ENTRY_C(0xD3FE1001, NULL, "vwbn.s S010, S400, 254"), + TEST_ENTRY_C(0xD3FF1001, NULL, "vwbn.s S010, S400, 255"), + + /* VFPU5 */ + TEST_ENTRY_C(0xDC000000, NULL, "vpfxs X, X, X, X"), + TEST_ENTRY_C(0xDD000000, NULL, "vpfxt X, X, X, X"), + TEST_ENTRY_C(0xDE000000, NULL, "vpfxd , , , "), + TEST_ENTRY_C(0xDF400000, NULL, "viim.s S002, 0"), + TEST_ENTRY_C(0xDF400001, NULL, "viim.s S002, 1"), + TEST_ENTRY_C(0xDF400010, NULL, "viim.s S002, 16"), + TEST_ENTRY_C(0xDF400100, NULL, "viim.s S002, 256"), + TEST_ENTRY_C(0xDF401000, NULL, "viim.s S002, 4096"), + TEST_ENTRY_C(0xDF408000, NULL, "viim.s S002, -32768"), + TEST_ENTRY_C(0xDF40F000, NULL, "viim.s S002, -4096"), + TEST_ENTRY_C(0xDFC00000, NULL, "vfim.s S002, 0"), + TEST_ENTRY_C(0xDFC08000, NULL, "vfim.s S002, -0"), + TEST_ENTRY_C(0xDFC01000, NULL, "vfim.s S002, 0.00048828125"), + TEST_ENTRY_C(0xDFC0F000, NULL, "vfim.s S002, -8192"), + TEST_ENTRY_C(0xDFC05450, NULL, "vfim.s S002, 69"), + TEST_ENTRY_C(0xDFC0D450, NULL, "vfim.s S002, -69"), + TEST_ENTRY_C(0xDFC03C00, NULL, "vfim.s S002, 1"), + TEST_ENTRY_C(0xDFC0BC00, NULL, "vfim.s S002, -1"), + TEST_ENTRY_C(0xDFC07C00, NULL, "vfim.s S002, inf"), + TEST_ENTRY_C(0xDFC0FC00, NULL, "vfim.s S002, -inf"), + TEST_ENTRY_C(0xDFC07BFF, NULL, "vfim.s S002, 65504"), + TEST_ENTRY_C(0xDFC0FBFF, NULL, "vfim.s S002, -65504"), + TEST_ENTRY_C(0xDFC07EAA, NULL, "vfim.s S002, nan"), + TEST_ENTRY_C(0xDFC0FEAA, NULL, "vfim.s S002, -nan"), + + /* VFPU6 */ + TEST_ENTRY_C(0xF0001040, NULL, ".word 0xF0001040 # INVALID $zero, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0xF00010C0, NULL, "vmmul.p M002, E400, M000"), + TEST_ENTRY_C(0xF0009004, NULL, "vmmul.t M100, E400, M000"), + TEST_ENTRY_C(0xF00090C0, NULL, "vmmul.q M002, E400, M000"), + TEST_ENTRY_C(0xF0800440, NULL, "vhtfm2.p C002, M100, C000"), + TEST_ENTRY_C(0xF08010C0, NULL, "vtfm2.p C002, M400, C000"), + TEST_ENTRY_C(0xF0801084, NULL, "vtfm2.p C100, M400, C000"), + TEST_ENTRY_C(0xF1008004, NULL, "vtfm3.t C100, M000, C000"), + TEST_ENTRY_C(0xF1001084, NULL, "vhtfm3.t C100, M400, C000"), + TEST_ENTRY_C(0xF1009004, NULL, "vtfm3.t C100, M400, C000"), + TEST_ENTRY_C(0xF1808088, NULL, "vtfm4.q C200, M000, C000"), + TEST_ENTRY_C(0xF1809040, NULL, "vhtfm4.q C002, M400, C000"), + TEST_ENTRY_C(0xF18090C0, NULL, "vtfm4.q C002, M400, C000"), + TEST_ENTRY_C(0xF2001040, NULL, ".word 0xF2001040 # INVALID $s0, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0xF20010C0, NULL, "vmscl.p M002, M400, S000"), + TEST_ENTRY_C(0xF2009040, NULL, "vmscl.t M001, M400, S000"), + TEST_ENTRY_C(0xF20090C0, NULL, "vmscl.q M002, M400, S000"), + TEST_ENTRY_C(0xF2801040, NULL, ".word 0xF2801040 # INVALID $s4, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0xF28010C0, NULL, ".word 0xF28010C0 # INVALID $s4, $zero, 0x10C0 # 00000000 "), + TEST_ENTRY_C(0xF2809004, NULL, "vcrsp.t C100, C400, C000"), + TEST_ENTRY_C(0xF28090C0, NULL, "vqmul.q C002, C400, C000"), + TEST_ENTRY_C(0xF3001040, NULL, ".word 0xF3001040 # INVALID $t8, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0xF30010C0, NULL, ".word 0xF30010C0 # INVALID $t8, $zero, 0x10C0 # 00000000 "), + TEST_ENTRY_C(0xF3009040, NULL, ".word 0xF3009040 # INVALID $t8, $zero, -0x6FC0 # 00000000 "), + TEST_ENTRY_C(0xF30090C0, NULL, ".word 0xF30090C0 # INVALID $t8, $zero, -0x6F40 # 00000000 "), + TEST_ENTRY_C(0xF3801040, NULL, ".word 0xF3801040 # INVALID $gp, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0xF38010C0, NULL, "vmmov.p M002, M400"), + TEST_ENTRY_C(0xF3809040, NULL, "vmmov.t M001, M400"), + TEST_ENTRY_C(0xF38090C0, NULL, "vmmov.q M002, M400"), + TEST_ENTRY_C(0xF3811040, NULL, ".word 0xF3811040 # INVALID $gp, $at, 0x1040 # 00000000 "), + TEST_ENTRY_C(0xF38110C0, NULL, ".word 0xF38110C0 # INVALID $gp, $at, 0x10C0 # 00000000 "), + TEST_ENTRY_C(0xF3819040, NULL, ".word 0xF3819040 # INVALID $gp, $at, -0x6FC0 # 00000000 "), + TEST_ENTRY_C(0xF38190C0, NULL, ".word 0xF38190C0 # INVALID $gp, $at, -0x6F40 # 00000000 "), + TEST_ENTRY_C(0xF3821040, NULL, ".word 0xF3821040 # INVALID $gp, $v0, 0x1040 # 00000000 "), + TEST_ENTRY_C(0xF38210C0, NULL, ".word 0xF38210C0 # INVALID $gp, $v0, 0x10C0 # 00000000 "), + TEST_ENTRY_C(0xF3829040, NULL, ".word 0xF3829040 # INVALID $gp, $v0, -0x6FC0 # 00000000 "), + TEST_ENTRY_C(0xF38290C0, NULL, ".word 0xF38290C0 # INVALID $gp, $v0, -0x6F40 # 00000000 "), + TEST_ENTRY_C(0xF3831040, NULL, ".word 0xF3831040 # INVALID $gp, $v1, 0x1040 # 00000000 "), + TEST_ENTRY_C(0xF38300C0, NULL, "vmidt.p M002"), + TEST_ENTRY_C(0xF3838040, NULL, "vmidt.t M001"), + TEST_ENTRY_C(0xF38380C0, NULL, "vmidt.q M002"), + TEST_ENTRY_C(0xF3841040, NULL, ".word 0xF3841040 # INVALID $gp, $a0, 0x1040 # 00000000 "), + TEST_ENTRY_C(0xF38410C0, NULL, ".word 0xF38410C0 # INVALID $gp, $a0, 0x10C0 # 00000000 "), + TEST_ENTRY_C(0xF3849040, NULL, ".word 0xF3849040 # INVALID $gp, $a0, -0x6FC0 # 00000000 "), + TEST_ENTRY_C(0xF38490C0, NULL, ".word 0xF38490C0 # INVALID $gp, $a0, -0x6F40 # 00000000 "), + TEST_ENTRY_C(0xF3851040, NULL, ".word 0xF3851040 # INVALID $gp, $a1, 0x1040 # 00000000 "), + TEST_ENTRY_C(0xF38510C0, NULL, ".word 0xF38510C0 # INVALID $gp, $a1, 0x10C0 # 00000000 "), + TEST_ENTRY_C(0xF3859040, NULL, ".word 0xF3859040 # INVALID $gp, $a1, -0x6FC0 # 00000000 "), + TEST_ENTRY_C(0xF38590C0, NULL, ".word 0xF38590C0 # INVALID $gp, $a1, -0x6F40 # 00000000 "), + TEST_ENTRY_C(0xF3861040, NULL, ".word 0xF3861040 # INVALID $gp, $a2, 0x1040 # 00000000 "), + TEST_ENTRY_C(0xF38610C0, NULL, ".word 0xF38610C0 # vmzero.p M002 # 00001000 "), + TEST_ENTRY_C(0xF3869040, NULL, ".word 0xF3869040 # vmzero.t M001 # 00001000 "), + TEST_ENTRY_C(0xF38690C0, NULL, ".word 0xF38690C0 # vmzero.q M002 # 00001000 "), + TEST_ENTRY_C(0xF3871040, NULL, ".word 0xF3871040 # INVALID $gp, $a3, 0x1040 # 00000000 "), + TEST_ENTRY_C(0xF38710C0, NULL, ".word 0xF38710C0 # vmone.p M002 # 00001000 "), + TEST_ENTRY_C(0xF3879040, NULL, ".word 0xF3879040 # vmone.t M001 # 00001000 "), + TEST_ENTRY_C(0xF38790C0, NULL, ".word 0xF38790C0 # vmone.q M002 # 00001000 "), + TEST_ENTRY_C(0xF3A01040, NULL, ".word 0xF3A01040 # INVALID $sp, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0xF3A010C0, NULL, "vrot.p C002, S400, [C,S]"), + TEST_ENTRY_C(0xF3A09040, NULL, "vrot.t C001, S400, [C,S,S]"), + TEST_ENTRY_C(0xF3A090C0, NULL, "vrot.q C002, S400, [C,S,S,S]"), + TEST_ENTRY_C(0xF3C01040, NULL, ".word 0xF3C01040 # INVALID $fp, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0xF3C010C0, NULL, ".word 0xF3C010C0 # INVALID $fp, $zero, 0x10C0 # 00000000 "), + TEST_ENTRY_C(0xF3C09040, NULL, ".word 0xF3C09040 # INVALID $fp, $zero, -0x6FC0 # 00000000 "), + TEST_ENTRY_C(0xF3C090C0, NULL, ".word 0xF3C090C0 # INVALID $fp, $zero, -0x6F40 # 00000000 "), + TEST_ENTRY_C(0xF3E01040, NULL, ".word 0xF3E01040 # INVALID $ra, $zero, 0x1040 # 00000000 "), + TEST_ENTRY_C(0xF3E010C0, NULL, ".word 0xF3E010C0 # INVALID $ra, $zero, 0x10C0 # 00000000 "), + TEST_ENTRY_C(0xF3E09040, NULL, ".word 0xF3E09040 # INVALID $ra, $zero, -0x6FC0 # 00000000 "), + TEST_ENTRY_C(0xF3E090C0, NULL, ".word 0xF3E090C0 # INVALID $ra, $zero, -0x6F40 # 00000000 "), + + /* VFPU7 */ + TEST_ENTRY_C(0xFFFF040D, NULL, "vflush"), + TEST_ENTRY_C(0xFFFF0000, NULL, "vnop"), + TEST_ENTRY_C(0xFFFF0320, NULL, "vsync"), + + /* vmmul */ + TEST_ENTRY_C(0xF0000040, NULL, ".word 0xF0000040 # INVALID $zero, $zero, 0x40 # 00000000 "), + TEST_ENTRY_C(0xF0000140, NULL, ".word 0xF0000140 # INVALID $zero, $zero, 0x140 # 00000000 "), + TEST_ENTRY_C(0xF0000240, NULL, ".word 0xF0000240 # INVALID $zero, $zero, 0x240 # 00000000 "), + TEST_ENTRY_C(0xF0000340, NULL, ".word 0xF0000340 # INVALID $zero, $zero, 0x340 # 00000000 "), + TEST_ENTRY_C(0xF0000440, NULL, ".word 0xF0000440 # INVALID $zero, $zero, 0x440 # 00000000 "), + TEST_ENTRY_C(0xF0000540, NULL, ".word 0xF0000540 # INVALID $zero, $zero, 0x540 # 00000000 "), + TEST_ENTRY_C(0xF0000640, NULL, ".word 0xF0000640 # INVALID $zero, $zero, 0x640 # 00000000 "), + TEST_ENTRY_C(0xF0000740, NULL, ".word 0xF0000740 # INVALID $zero, $zero, 0x740 # 00000000 "), + TEST_ENTRY_C(0xF0000840, NULL, ".word 0xF0000840 # INVALID $zero, $zero, 0x840 # 00000000 "), + TEST_ENTRY_C(0xF0000940, NULL, ".word 0xF0000940 # INVALID $zero, $zero, 0x940 # 00000000 "), + TEST_ENTRY_C(0xF0000A40, NULL, ".word 0xF0000A40 # INVALID $zero, $zero, 0xA40 # 00000000 "), + TEST_ENTRY_C(0xF0000B40, NULL, ".word 0xF0000B40 # INVALID $zero, $zero, 0xB40 # 00000000 "), + TEST_ENTRY_C(0xF0000C40, NULL, ".word 0xF0000C40 # INVALID $zero, $zero, 0xC40 # 00000000 "), + TEST_ENTRY_C(0xF0000D40, NULL, ".word 0xF0000D40 # INVALID $zero, $zero, 0xD40 # 00000000 "), + TEST_ENTRY_C(0xF0000E40, NULL, ".word 0xF0000E40 # INVALID $zero, $zero, 0xE40 # 00000000 "), + TEST_ENTRY_C(0xF0000F40, NULL, ".word 0xF0000F40 # INVALID $zero, $zero, 0xF40 # 00000000 "), + TEST_ENTRY_C(0xF0001140, NULL, ".word 0xF0001140 # INVALID $zero, $zero, 0x1140 # 00000000 "), + TEST_ENTRY_C(0xF0001240, NULL, ".word 0xF0001240 # INVALID $zero, $zero, 0x1240 # 00000000 "), + TEST_ENTRY_C(0xF0001340, NULL, ".word 0xF0001340 # INVALID $zero, $zero, 0x1340 # 00000000 "), + TEST_ENTRY_C(0xF0001440, NULL, ".word 0xF0001440 # INVALID $zero, $zero, 0x1440 # 00000000 "), + TEST_ENTRY_C(0xF0001540, NULL, ".word 0xF0001540 # INVALID $zero, $zero, 0x1540 # 00000000 "), + TEST_ENTRY_C(0xF0001640, NULL, ".word 0xF0001640 # INVALID $zero, $zero, 0x1640 # 00000000 "), + TEST_ENTRY_C(0xF0001740, NULL, ".word 0xF0001740 # INVALID $zero, $zero, 0x1740 # 00000000 "), + TEST_ENTRY_C(0xF0001840, NULL, ".word 0xF0001840 # INVALID $zero, $zero, 0x1840 # 00000000 "), + TEST_ENTRY_C(0xF0001940, NULL, ".word 0xF0001940 # INVALID $zero, $zero, 0x1940 # 00000000 "), + TEST_ENTRY_C(0xF0001A40, NULL, ".word 0xF0001A40 # INVALID $zero, $zero, 0x1A40 # 00000000 "), + TEST_ENTRY_C(0xF0001B40, NULL, ".word 0xF0001B40 # INVALID $zero, $zero, 0x1B40 # 00000000 "), + TEST_ENTRY_C(0xF0001C40, NULL, ".word 0xF0001C40 # INVALID $zero, $zero, 0x1C40 # 00000000 "), + TEST_ENTRY_C(0xF0001D40, NULL, ".word 0xF0001D40 # INVALID $zero, $zero, 0x1D40 # 00000000 "), + TEST_ENTRY_C(0xF0001E40, NULL, ".word 0xF0001E40 # INVALID $zero, $zero, 0x1E40 # 00000000 "), + TEST_ENTRY_C(0xF0001F40, NULL, ".word 0xF0001F40 # INVALID $zero, $zero, 0x1F40 # 00000000 "), + TEST_ENTRY_C(0xF0002040, NULL, ".word 0xF0002040 # INVALID $zero, $zero, 0x2040 # 00000000 "), + TEST_ENTRY_C(0xF0002140, NULL, ".word 0xF0002140 # INVALID $zero, $zero, 0x2140 # 00000000 "), + TEST_ENTRY_C(0xF0002240, NULL, ".word 0xF0002240 # INVALID $zero, $zero, 0x2240 # 00000000 "), + TEST_ENTRY_C(0xF0002340, NULL, ".word 0xF0002340 # INVALID $zero, $zero, 0x2340 # 00000000 "), + TEST_ENTRY_C(0xF0002440, NULL, ".word 0xF0002440 # INVALID $zero, $zero, 0x2440 # 00000000 "), + TEST_ENTRY_C(0xF0002540, NULL, ".word 0xF0002540 # INVALID $zero, $zero, 0x2540 # 00000000 "), + TEST_ENTRY_C(0xF0002640, NULL, ".word 0xF0002640 # INVALID $zero, $zero, 0x2640 # 00000000 "), + TEST_ENTRY_C(0xF0002740, NULL, ".word 0xF0002740 # INVALID $zero, $zero, 0x2740 # 00000000 "), + TEST_ENTRY_C(0xF0002840, NULL, ".word 0xF0002840 # INVALID $zero, $zero, 0x2840 # 00000000 "), + TEST_ENTRY_C(0xF0002940, NULL, ".word 0xF0002940 # INVALID $zero, $zero, 0x2940 # 00000000 "), + TEST_ENTRY_C(0xF0002A40, NULL, ".word 0xF0002A40 # INVALID $zero, $zero, 0x2A40 # 00000000 "), + TEST_ENTRY_C(0xF0002B40, NULL, ".word 0xF0002B40 # INVALID $zero, $zero, 0x2B40 # 00000000 "), + TEST_ENTRY_C(0xF0002C40, NULL, ".word 0xF0002C40 # INVALID $zero, $zero, 0x2C40 # 00000000 "), + TEST_ENTRY_C(0xF0002D40, NULL, ".word 0xF0002D40 # INVALID $zero, $zero, 0x2D40 # 00000000 "), + TEST_ENTRY_C(0xF0002E40, NULL, ".word 0xF0002E40 # INVALID $zero, $zero, 0x2E40 # 00000000 "), + TEST_ENTRY_C(0xF0002F40, NULL, ".word 0xF0002F40 # INVALID $zero, $zero, 0x2F40 # 00000000 "), + TEST_ENTRY_C(0xF0003040, NULL, ".word 0xF0003040 # INVALID $zero, $zero, 0x3040 # 00000000 "), + TEST_ENTRY_C(0xF0003140, NULL, ".word 0xF0003140 # INVALID $zero, $zero, 0x3140 # 00000000 "), + TEST_ENTRY_C(0xF0003240, NULL, ".word 0xF0003240 # INVALID $zero, $zero, 0x3240 # 00000000 "), + TEST_ENTRY_C(0xF0003340, NULL, ".word 0xF0003340 # INVALID $zero, $zero, 0x3340 # 00000000 "), + TEST_ENTRY_C(0xF0003440, NULL, ".word 0xF0003440 # INVALID $zero, $zero, 0x3440 # 00000000 "), + TEST_ENTRY_C(0xF0003540, NULL, ".word 0xF0003540 # INVALID $zero, $zero, 0x3540 # 00000000 "), + TEST_ENTRY_C(0xF0003640, NULL, ".word 0xF0003640 # INVALID $zero, $zero, 0x3640 # 00000000 "), + TEST_ENTRY_C(0xF0003740, NULL, ".word 0xF0003740 # INVALID $zero, $zero, 0x3740 # 00000000 "), + TEST_ENTRY_C(0xF0003840, NULL, ".word 0xF0003840 # INVALID $zero, $zero, 0x3840 # 00000000 "), + TEST_ENTRY_C(0xF0003940, NULL, ".word 0xF0003940 # INVALID $zero, $zero, 0x3940 # 00000000 "), + TEST_ENTRY_C(0xF0003A40, NULL, ".word 0xF0003A40 # INVALID $zero, $zero, 0x3A40 # 00000000 "), + TEST_ENTRY_C(0xF0003B40, NULL, ".word 0xF0003B40 # INVALID $zero, $zero, 0x3B40 # 00000000 "), + TEST_ENTRY_C(0xF0003C40, NULL, ".word 0xF0003C40 # INVALID $zero, $zero, 0x3C40 # 00000000 "), + TEST_ENTRY_C(0xF0003D40, NULL, ".word 0xF0003D40 # INVALID $zero, $zero, 0x3D40 # 00000000 "), + TEST_ENTRY_C(0xF0003E40, NULL, ".word 0xF0003E40 # INVALID $zero, $zero, 0x3E40 # 00000000 "), + TEST_ENTRY_C(0xF0003F40, NULL, ".word 0xF0003F40 # INVALID $zero, $zero, 0x3F40 # 00000000 "), + TEST_ENTRY_C(0xF0004040, NULL, ".word 0xF0004040 # INVALID $zero, $zero, 0x4040 # 00000000 "), + TEST_ENTRY_C(0xF0004140, NULL, ".word 0xF0004140 # INVALID $zero, $zero, 0x4140 # 00000000 "), + TEST_ENTRY_C(0xF0004240, NULL, ".word 0xF0004240 # INVALID $zero, $zero, 0x4240 # 00000000 "), + TEST_ENTRY_C(0xF0004340, NULL, ".word 0xF0004340 # INVALID $zero, $zero, 0x4340 # 00000000 "), + TEST_ENTRY_C(0xF0004440, NULL, ".word 0xF0004440 # INVALID $zero, $zero, 0x4440 # 00000000 "), + TEST_ENTRY_C(0xF0004540, NULL, ".word 0xF0004540 # INVALID $zero, $zero, 0x4540 # 00000000 "), + TEST_ENTRY_C(0xF0004640, NULL, ".word 0xF0004640 # INVALID $zero, $zero, 0x4640 # 00000000 "), + TEST_ENTRY_C(0xF0004740, NULL, ".word 0xF0004740 # INVALID $zero, $zero, 0x4740 # 00000000 "), + TEST_ENTRY_C(0xF0004840, NULL, ".word 0xF0004840 # INVALID $zero, $zero, 0x4840 # 00000000 "), + TEST_ENTRY_C(0xF0004940, NULL, ".word 0xF0004940 # INVALID $zero, $zero, 0x4940 # 00000000 "), + TEST_ENTRY_C(0xF0004A40, NULL, ".word 0xF0004A40 # INVALID $zero, $zero, 0x4A40 # 00000000 "), + TEST_ENTRY_C(0xF0004B40, NULL, ".word 0xF0004B40 # INVALID $zero, $zero, 0x4B40 # 00000000 "), + TEST_ENTRY_C(0xF0004C40, NULL, ".word 0xF0004C40 # INVALID $zero, $zero, 0x4C40 # 00000000 "), + TEST_ENTRY_C(0xF0004D40, NULL, ".word 0xF0004D40 # INVALID $zero, $zero, 0x4D40 # 00000000 "), + TEST_ENTRY_C(0xF0004E40, NULL, ".word 0xF0004E40 # INVALID $zero, $zero, 0x4E40 # 00000000 "), + TEST_ENTRY_C(0xF0004F40, NULL, ".word 0xF0004F40 # INVALID $zero, $zero, 0x4F40 # 00000000 "), + TEST_ENTRY_C(0xF0005040, NULL, ".word 0xF0005040 # INVALID $zero, $zero, 0x5040 # 00000000 "), + TEST_ENTRY_C(0xF0005140, NULL, ".word 0xF0005140 # INVALID $zero, $zero, 0x5140 # 00000000 "), + TEST_ENTRY_C(0xF0005240, NULL, ".word 0xF0005240 # INVALID $zero, $zero, 0x5240 # 00000000 "), + TEST_ENTRY_C(0xF0005340, NULL, ".word 0xF0005340 # INVALID $zero, $zero, 0x5340 # 00000000 "), + TEST_ENTRY_C(0xF0005440, NULL, ".word 0xF0005440 # INVALID $zero, $zero, 0x5440 # 00000000 "), + TEST_ENTRY_C(0xF0005540, NULL, ".word 0xF0005540 # INVALID $zero, $zero, 0x5540 # 00000000 "), + TEST_ENTRY_C(0xF0005640, NULL, ".word 0xF0005640 # INVALID $zero, $zero, 0x5640 # 00000000 "), + TEST_ENTRY_C(0xF0005740, NULL, ".word 0xF0005740 # INVALID $zero, $zero, 0x5740 # 00000000 "), + TEST_ENTRY_C(0xF0005840, NULL, ".word 0xF0005840 # INVALID $zero, $zero, 0x5840 # 00000000 "), + TEST_ENTRY_C(0xF0005940, NULL, ".word 0xF0005940 # INVALID $zero, $zero, 0x5940 # 00000000 "), + TEST_ENTRY_C(0xF0005A40, NULL, ".word 0xF0005A40 # INVALID $zero, $zero, 0x5A40 # 00000000 "), + TEST_ENTRY_C(0xF0005B40, NULL, ".word 0xF0005B40 # INVALID $zero, $zero, 0x5B40 # 00000000 "), + TEST_ENTRY_C(0xF0005C40, NULL, ".word 0xF0005C40 # INVALID $zero, $zero, 0x5C40 # 00000000 "), + TEST_ENTRY_C(0xF0005D40, NULL, ".word 0xF0005D40 # INVALID $zero, $zero, 0x5D40 # 00000000 "), + TEST_ENTRY_C(0xF0005E40, NULL, ".word 0xF0005E40 # INVALID $zero, $zero, 0x5E40 # 00000000 "), + TEST_ENTRY_C(0xF0005F40, NULL, ".word 0xF0005F40 # INVALID $zero, $zero, 0x5F40 # 00000000 "), + TEST_ENTRY_C(0xF0006040, NULL, ".word 0xF0006040 # INVALID $zero, $zero, 0x6040 # 00000000 "), + TEST_ENTRY_C(0xF0006140, NULL, ".word 0xF0006140 # INVALID $zero, $zero, 0x6140 # 00000000 "), + TEST_ENTRY_C(0xF0006240, NULL, ".word 0xF0006240 # INVALID $zero, $zero, 0x6240 # 00000000 "), + TEST_ENTRY_C(0xF0006340, NULL, ".word 0xF0006340 # INVALID $zero, $zero, 0x6340 # 00000000 "), + TEST_ENTRY_C(0xF0006440, NULL, ".word 0xF0006440 # INVALID $zero, $zero, 0x6440 # 00000000 "), + TEST_ENTRY_C(0xF0006540, NULL, ".word 0xF0006540 # INVALID $zero, $zero, 0x6540 # 00000000 "), + TEST_ENTRY_C(0xF0006640, NULL, ".word 0xF0006640 # INVALID $zero, $zero, 0x6640 # 00000000 "), + TEST_ENTRY_C(0xF0006740, NULL, ".word 0xF0006740 # INVALID $zero, $zero, 0x6740 # 00000000 "), + TEST_ENTRY_C(0xF0006840, NULL, ".word 0xF0006840 # INVALID $zero, $zero, 0x6840 # 00000000 "), + TEST_ENTRY_C(0xF0006940, NULL, ".word 0xF0006940 # INVALID $zero, $zero, 0x6940 # 00000000 "), + TEST_ENTRY_C(0xF0006A40, NULL, ".word 0xF0006A40 # INVALID $zero, $zero, 0x6A40 # 00000000 "), + TEST_ENTRY_C(0xF0006B40, NULL, ".word 0xF0006B40 # INVALID $zero, $zero, 0x6B40 # 00000000 "), + TEST_ENTRY_C(0xF0006C40, NULL, ".word 0xF0006C40 # INVALID $zero, $zero, 0x6C40 # 00000000 "), + TEST_ENTRY_C(0xF0006D40, NULL, ".word 0xF0006D40 # INVALID $zero, $zero, 0x6D40 # 00000000 "), + TEST_ENTRY_C(0xF0006E40, NULL, ".word 0xF0006E40 # INVALID $zero, $zero, 0x6E40 # 00000000 "), + TEST_ENTRY_C(0xF0006F40, NULL, ".word 0xF0006F40 # INVALID $zero, $zero, 0x6F40 # 00000000 "), + TEST_ENTRY_C(0xF0007040, NULL, ".word 0xF0007040 # INVALID $zero, $zero, 0x7040 # 00000000 "), + TEST_ENTRY_C(0xF0007140, NULL, ".word 0xF0007140 # INVALID $zero, $zero, 0x7140 # 00000000 "), + TEST_ENTRY_C(0xF0007240, NULL, ".word 0xF0007240 # INVALID $zero, $zero, 0x7240 # 00000000 "), + TEST_ENTRY_C(0xF0007340, NULL, ".word 0xF0007340 # INVALID $zero, $zero, 0x7340 # 00000000 "), + TEST_ENTRY_C(0xF0007440, NULL, ".word 0xF0007440 # INVALID $zero, $zero, 0x7440 # 00000000 "), + TEST_ENTRY_C(0xF0007540, NULL, ".word 0xF0007540 # INVALID $zero, $zero, 0x7540 # 00000000 "), + TEST_ENTRY_C(0xF0007640, NULL, ".word 0xF0007640 # INVALID $zero, $zero, 0x7640 # 00000000 "), + TEST_ENTRY_C(0xF0007740, NULL, ".word 0xF0007740 # INVALID $zero, $zero, 0x7740 # 00000000 "), + TEST_ENTRY_C(0xF0007840, NULL, ".word 0xF0007840 # INVALID $zero, $zero, 0x7840 # 00000000 "), + TEST_ENTRY_C(0xF0007940, NULL, ".word 0xF0007940 # INVALID $zero, $zero, 0x7940 # 00000000 "), + TEST_ENTRY_C(0xF0007A40, NULL, ".word 0xF0007A40 # INVALID $zero, $zero, 0x7A40 # 00000000 "), + TEST_ENTRY_C(0xF0007B40, NULL, ".word 0xF0007B40 # INVALID $zero, $zero, 0x7B40 # 00000000 "), + TEST_ENTRY_C(0xF0007C40, NULL, ".word 0xF0007C40 # INVALID $zero, $zero, 0x7C40 # 00000000 "), + TEST_ENTRY_C(0xF0007D40, NULL, ".word 0xF0007D40 # INVALID $zero, $zero, 0x7D40 # 00000000 "), + TEST_ENTRY_C(0xF0007E40, NULL, ".word 0xF0007E40 # INVALID $zero, $zero, 0x7E40 # 00000000 "), + TEST_ENTRY_C(0xF0007F40, NULL, ".word 0xF0007F40 # INVALID $zero, $zero, 0x7F40 # 00000000 "), + TEST_ENTRY_C(0xF004009F, NULL, "vmmul.p M730, E000, M100"), + TEST_ENTRY_C(0xF004019F, NULL, "vmmul.p M730, E001, M100"), + TEST_ENTRY_C(0xF004029F, NULL, "vmmul.p M730, E002, M100"), + TEST_ENTRY_C(0xF004039F, NULL, "vmmul.p M730, E003, M100"), + TEST_ENTRY_C(0xF004049F, NULL, "vmmul.p M730, E100, M100"), + TEST_ENTRY_C(0xF004059F, NULL, "vmmul.p M730, E101, M100"), + TEST_ENTRY_C(0xF004069F, NULL, "vmmul.p M730, E102, M100"), + TEST_ENTRY_C(0xF004079F, NULL, "vmmul.p M730, E103, M100"), + TEST_ENTRY_C(0xF004089F, NULL, "vmmul.p M730, E200, M100"), + TEST_ENTRY_C(0xF004099F, NULL, "vmmul.p M730, E201, M100"), + TEST_ENTRY_C(0xF0040A9F, NULL, "vmmul.p M730, E202, M100"), + TEST_ENTRY_C(0xF0040B9F, NULL, "vmmul.p M730, E203, M100"), + TEST_ENTRY_C(0xF0040C9F, NULL, "vmmul.p M730, E300, M100"), + TEST_ENTRY_C(0xF0040D9F, NULL, "vmmul.p M730, E301, M100"), + TEST_ENTRY_C(0xF0040E9F, NULL, "vmmul.p M730, E302, M100"), + TEST_ENTRY_C(0xF0040F9F, NULL, "vmmul.p M730, E303, M100"), + TEST_ENTRY_C(0xF004109F, NULL, "vmmul.p M730, E400, M100"), + TEST_ENTRY_C(0xF004119F, NULL, "vmmul.p M730, E401, M100"), + TEST_ENTRY_C(0xF004129F, NULL, "vmmul.p M730, E402, M100"), + TEST_ENTRY_C(0xF004139F, NULL, "vmmul.p M730, E403, M100"), + TEST_ENTRY_C(0xF004149F, NULL, "vmmul.p M730, E500, M100"), + TEST_ENTRY_C(0xF004159F, NULL, "vmmul.p M730, E501, M100"), + TEST_ENTRY_C(0xF004169F, NULL, "vmmul.p M730, E502, M100"), + TEST_ENTRY_C(0xF004179F, NULL, "vmmul.p M730, E503, M100"), + TEST_ENTRY_C(0xF004189F, NULL, "vmmul.p M730, E600, M100"), + TEST_ENTRY_C(0xF004199F, NULL, "vmmul.p M730, E601, M100"), + TEST_ENTRY_C(0xF0041A9F, NULL, "vmmul.p M730, E602, M100"), + TEST_ENTRY_C(0xF0041B9F, NULL, "vmmul.p M730, E603, M100"), + TEST_ENTRY_C(0xF0041C88, NULL, "vmmul.p M200, E700, M100"), + TEST_ENTRY_C(0xF0041D88, NULL, "vmmul.p M200, E701, M100"), + TEST_ENTRY_C(0xF0041E88, NULL, "vmmul.p M200, E702, M100"), + TEST_ENTRY_C(0xF0041F88, NULL, "vmmul.p M200, E703, M100"), + TEST_ENTRY_C(0xF004209F, NULL, "vmmul.p M730, M000, M100"), + TEST_ENTRY_C(0xF004219F, NULL, "vmmul.p M730, M010, M100"), + TEST_ENTRY_C(0xF004229F, NULL, "vmmul.p M730, M020, M100"), + TEST_ENTRY_C(0xF004239F, NULL, "vmmul.p M730, M030, M100"), + TEST_ENTRY_C(0xF004249F, NULL, "vmmul.p M730, M100, M100"), + TEST_ENTRY_C(0xF004259F, NULL, "vmmul.p M730, M110, M100"), + TEST_ENTRY_C(0xF004269F, NULL, "vmmul.p M730, M120, M100"), + TEST_ENTRY_C(0xF004279F, NULL, "vmmul.p M730, M130, M100"), + TEST_ENTRY_C(0xF004289F, NULL, "vmmul.p M730, M200, M100"), + TEST_ENTRY_C(0xF004299F, NULL, "vmmul.p M730, M210, M100"), + TEST_ENTRY_C(0xF0042A9F, NULL, "vmmul.p M730, M220, M100"), + TEST_ENTRY_C(0xF0042B9F, NULL, "vmmul.p M730, M230, M100"), + TEST_ENTRY_C(0xF0042C9F, NULL, "vmmul.p M730, M300, M100"), + TEST_ENTRY_C(0xF0042D9F, NULL, "vmmul.p M730, M310, M100"), + TEST_ENTRY_C(0xF0042E9F, NULL, "vmmul.p M730, M320, M100"), + TEST_ENTRY_C(0xF0042F9F, NULL, "vmmul.p M730, M330, M100"), + TEST_ENTRY_C(0xF004309F, NULL, "vmmul.p M730, M400, M100"), + TEST_ENTRY_C(0xF004319F, NULL, "vmmul.p M730, M410, M100"), + TEST_ENTRY_C(0xF004329F, NULL, "vmmul.p M730, M420, M100"), + TEST_ENTRY_C(0xF004339F, NULL, "vmmul.p M730, M430, M100"), + TEST_ENTRY_C(0xF004349F, NULL, "vmmul.p M730, M500, M100"), + TEST_ENTRY_C(0xF004359F, NULL, "vmmul.p M730, M510, M100"), + TEST_ENTRY_C(0xF004369F, NULL, "vmmul.p M730, M520, M100"), + TEST_ENTRY_C(0xF004379F, NULL, "vmmul.p M730, M530, M100"), + TEST_ENTRY_C(0xF004389F, NULL, "vmmul.p M730, M600, M100"), + TEST_ENTRY_C(0xF004399F, NULL, "vmmul.p M730, M610, M100"), + TEST_ENTRY_C(0xF0043A9F, NULL, "vmmul.p M730, M620, M100"), + TEST_ENTRY_C(0xF0043B9F, NULL, "vmmul.p M730, M630, M100"), + TEST_ENTRY_C(0xF0043C88, NULL, "vmmul.p M200, M700, M100"), + TEST_ENTRY_C(0xF0043D88, NULL, "vmmul.p M200, M710, M100"), + TEST_ENTRY_C(0xF0043E88, NULL, "vmmul.p M200, M720, M100"), + TEST_ENTRY_C(0xF0043F88, NULL, "vmmul.p M200, M730, M100"), + TEST_ENTRY_C(0xF004409F, NULL, "vmmul.p M730, E020, M100"), + TEST_ENTRY_C(0xF004419F, NULL, "vmmul.p M730, E021, M100"), + TEST_ENTRY_C(0xF004429F, NULL, "vmmul.p M730, E022, M100"), + TEST_ENTRY_C(0xF004439F, NULL, "vmmul.p M730, E023, M100"), + TEST_ENTRY_C(0xF004449F, NULL, "vmmul.p M730, E120, M100"), + TEST_ENTRY_C(0xF004459F, NULL, "vmmul.p M730, E121, M100"), + TEST_ENTRY_C(0xF004469F, NULL, "vmmul.p M730, E122, M100"), + TEST_ENTRY_C(0xF004479F, NULL, "vmmul.p M730, E123, M100"), + TEST_ENTRY_C(0xF004489F, NULL, "vmmul.p M730, E220, M100"), + TEST_ENTRY_C(0xF004499F, NULL, "vmmul.p M730, E221, M100"), + TEST_ENTRY_C(0xF0044A9F, NULL, "vmmul.p M730, E222, M100"), + TEST_ENTRY_C(0xF0044B9F, NULL, "vmmul.p M730, E223, M100"), + TEST_ENTRY_C(0xF0044C9F, NULL, "vmmul.p M730, E320, M100"), + TEST_ENTRY_C(0xF0044D9F, NULL, "vmmul.p M730, E321, M100"), + TEST_ENTRY_C(0xF0044E9F, NULL, "vmmul.p M730, E322, M100"), + TEST_ENTRY_C(0xF0044F9F, NULL, "vmmul.p M730, E323, M100"), + TEST_ENTRY_C(0xF004509F, NULL, "vmmul.p M730, E420, M100"), + TEST_ENTRY_C(0xF004519F, NULL, "vmmul.p M730, E421, M100"), + TEST_ENTRY_C(0xF004529F, NULL, "vmmul.p M730, E422, M100"), + TEST_ENTRY_C(0xF004539F, NULL, "vmmul.p M730, E423, M100"), + TEST_ENTRY_C(0xF004549F, NULL, "vmmul.p M730, E520, M100"), + TEST_ENTRY_C(0xF004559F, NULL, "vmmul.p M730, E521, M100"), + TEST_ENTRY_C(0xF004569F, NULL, "vmmul.p M730, E522, M100"), + TEST_ENTRY_C(0xF004579F, NULL, "vmmul.p M730, E523, M100"), + TEST_ENTRY_C(0xF004589F, NULL, "vmmul.p M730, E620, M100"), + TEST_ENTRY_C(0xF004599F, NULL, "vmmul.p M730, E621, M100"), + TEST_ENTRY_C(0xF0045A9F, NULL, "vmmul.p M730, E622, M100"), + TEST_ENTRY_C(0xF0045B9F, NULL, "vmmul.p M730, E623, M100"), + TEST_ENTRY_C(0xF0045C88, NULL, "vmmul.p M200, E720, M100"), + TEST_ENTRY_C(0xF0045D88, NULL, "vmmul.p M200, E721, M100"), + TEST_ENTRY_C(0xF0045E88, NULL, "vmmul.p M200, E722, M100"), + TEST_ENTRY_C(0xF0045F88, NULL, "vmmul.p M200, E723, M100"), + TEST_ENTRY_C(0xF004609F, NULL, "vmmul.p M730, M002, M100"), + TEST_ENTRY_C(0xF004619F, NULL, "vmmul.p M730, M012, M100"), + TEST_ENTRY_C(0xF004629F, NULL, "vmmul.p M730, M022, M100"), + TEST_ENTRY_C(0xF004639F, NULL, "vmmul.p M730, M032, M100"), + TEST_ENTRY_C(0xF004649F, NULL, "vmmul.p M730, M102, M100"), + TEST_ENTRY_C(0xF004659F, NULL, "vmmul.p M730, M112, M100"), + TEST_ENTRY_C(0xF004669F, NULL, "vmmul.p M730, M122, M100"), + TEST_ENTRY_C(0xF004679F, NULL, "vmmul.p M730, M132, M100"), + TEST_ENTRY_C(0xF004689F, NULL, "vmmul.p M730, M202, M100"), + TEST_ENTRY_C(0xF004699F, NULL, "vmmul.p M730, M212, M100"), + TEST_ENTRY_C(0xF0046A9F, NULL, "vmmul.p M730, M222, M100"), + TEST_ENTRY_C(0xF0046B9F, NULL, "vmmul.p M730, M232, M100"), + TEST_ENTRY_C(0xF0046C9F, NULL, "vmmul.p M730, M302, M100"), + TEST_ENTRY_C(0xF0046D9F, NULL, "vmmul.p M730, M312, M100"), + TEST_ENTRY_C(0xF0046E9F, NULL, "vmmul.p M730, M322, M100"), + TEST_ENTRY_C(0xF0046F9F, NULL, "vmmul.p M730, M332, M100"), + TEST_ENTRY_C(0xF004709F, NULL, "vmmul.p M730, M402, M100"), + TEST_ENTRY_C(0xF004719F, NULL, "vmmul.p M730, M412, M100"), + TEST_ENTRY_C(0xF004729F, NULL, "vmmul.p M730, M422, M100"), + TEST_ENTRY_C(0xF004739F, NULL, "vmmul.p M730, M432, M100"), + TEST_ENTRY_C(0xF004749F, NULL, "vmmul.p M730, M502, M100"), + TEST_ENTRY_C(0xF004759F, NULL, "vmmul.p M730, M512, M100"), + TEST_ENTRY_C(0xF004769F, NULL, "vmmul.p M730, M522, M100"), + TEST_ENTRY_C(0xF004779F, NULL, "vmmul.p M730, M532, M100"), + TEST_ENTRY_C(0xF004789F, NULL, "vmmul.p M730, M602, M100"), + TEST_ENTRY_C(0xF004799F, NULL, "vmmul.p M730, M612, M100"), + TEST_ENTRY_C(0xF0047A9F, NULL, "vmmul.p M730, M622, M100"), + TEST_ENTRY_C(0xF0047B9F, NULL, "vmmul.p M730, M632, M100"), + TEST_ENTRY_C(0xF0047C88, NULL, "vmmul.p M200, M702, M100"), + TEST_ENTRY_C(0xF0047D88, NULL, "vmmul.p M200, M712, M100"), + TEST_ENTRY_C(0xF0047E88, NULL, "vmmul.p M200, M722, M100"), + TEST_ENTRY_C(0xF0047F88, NULL, "vmmul.p M200, M732, M100"), + TEST_ENTRY_C(0xF004801F, NULL, "vmmul.t M730, E000, M100"), + TEST_ENTRY_C(0xF004811F, NULL, "vmmul.t M730, E001, M100"), + TEST_ENTRY_C(0xF004821F, NULL, "vmmul.t M730, E002, M100"), + TEST_ENTRY_C(0xF004831F, NULL, "vmmul.t M730, E003, M100"), + TEST_ENTRY_C(0xF004841F, NULL, "vmmul.t M730, E100, M100"), + TEST_ENTRY_C(0xF004851F, NULL, "vmmul.t M730, E101, M100"), + TEST_ENTRY_C(0xF004861F, NULL, "vmmul.t M730, E102, M100"), + TEST_ENTRY_C(0xF004871F, NULL, "vmmul.t M730, E103, M100"), + TEST_ENTRY_C(0xF004881F, NULL, "vmmul.t M730, E200, M100"), + TEST_ENTRY_C(0xF004891F, NULL, "vmmul.t M730, E201, M100"), + TEST_ENTRY_C(0xF0048A1F, NULL, "vmmul.t M730, E202, M100"), + TEST_ENTRY_C(0xF0048B1F, NULL, "vmmul.t M730, E203, M100"), + TEST_ENTRY_C(0xF0048C1F, NULL, "vmmul.t M730, E300, M100"), + TEST_ENTRY_C(0xF0048D1F, NULL, "vmmul.t M730, E301, M100"), + TEST_ENTRY_C(0xF0048E1F, NULL, "vmmul.t M730, E302, M100"), + TEST_ENTRY_C(0xF0048F1F, NULL, "vmmul.t M730, E303, M100"), + TEST_ENTRY_C(0xF004901F, NULL, "vmmul.t M730, E400, M100"), + TEST_ENTRY_C(0xF004911F, NULL, "vmmul.t M730, E401, M100"), + TEST_ENTRY_C(0xF004921F, NULL, "vmmul.t M730, E402, M100"), + TEST_ENTRY_C(0xF004931F, NULL, "vmmul.t M730, E403, M100"), + TEST_ENTRY_C(0xF004941F, NULL, "vmmul.t M730, E500, M100"), + TEST_ENTRY_C(0xF004951F, NULL, "vmmul.t M730, E501, M100"), + TEST_ENTRY_C(0xF004961F, NULL, "vmmul.t M730, E502, M100"), + TEST_ENTRY_C(0xF004971F, NULL, "vmmul.t M730, E503, M100"), + TEST_ENTRY_C(0xF004981F, NULL, "vmmul.t M730, E600, M100"), + TEST_ENTRY_C(0xF004991F, NULL, "vmmul.t M730, E601, M100"), + TEST_ENTRY_C(0xF0049A1F, NULL, "vmmul.t M730, E602, M100"), + TEST_ENTRY_C(0xF0049B1F, NULL, "vmmul.t M730, E603, M100"), + TEST_ENTRY_C(0xF0049C08, NULL, "vmmul.t M200, E700, M100"), + TEST_ENTRY_C(0xF0049D08, NULL, "vmmul.t M200, E701, M100"), + TEST_ENTRY_C(0xF0049E08, NULL, "vmmul.t M200, E702, M100"), + TEST_ENTRY_C(0xF0049F08, NULL, "vmmul.t M200, E703, M100"), + TEST_ENTRY_C(0xF004A01F, NULL, "vmmul.t M730, M000, M100"), + TEST_ENTRY_C(0xF004A11F, NULL, "vmmul.t M730, M010, M100"), + TEST_ENTRY_C(0xF004A21F, NULL, "vmmul.t M730, M020, M100"), + TEST_ENTRY_C(0xF004A31F, NULL, "vmmul.t M730, M030, M100"), + TEST_ENTRY_C(0xF004A41F, NULL, "vmmul.t M730, M100, M100"), + TEST_ENTRY_C(0xF004A51F, NULL, "vmmul.t M730, M110, M100"), + TEST_ENTRY_C(0xF004A61F, NULL, "vmmul.t M730, M120, M100"), + TEST_ENTRY_C(0xF004A71F, NULL, "vmmul.t M730, M130, M100"), + TEST_ENTRY_C(0xF004A81F, NULL, "vmmul.t M730, M200, M100"), + TEST_ENTRY_C(0xF004A91F, NULL, "vmmul.t M730, M210, M100"), + TEST_ENTRY_C(0xF004AA1F, NULL, "vmmul.t M730, M220, M100"), + TEST_ENTRY_C(0xF004AB1F, NULL, "vmmul.t M730, M230, M100"), + TEST_ENTRY_C(0xF004AC1F, NULL, "vmmul.t M730, M300, M100"), + TEST_ENTRY_C(0xF004AD1F, NULL, "vmmul.t M730, M310, M100"), + TEST_ENTRY_C(0xF004AE1F, NULL, "vmmul.t M730, M320, M100"), + TEST_ENTRY_C(0xF004AF1F, NULL, "vmmul.t M730, M330, M100"), + TEST_ENTRY_C(0xF004B01F, NULL, "vmmul.t M730, M400, M100"), + TEST_ENTRY_C(0xF004B11F, NULL, "vmmul.t M730, M410, M100"), + TEST_ENTRY_C(0xF004B21F, NULL, "vmmul.t M730, M420, M100"), + TEST_ENTRY_C(0xF004B31F, NULL, "vmmul.t M730, M430, M100"), + TEST_ENTRY_C(0xF004B41F, NULL, "vmmul.t M730, M500, M100"), + TEST_ENTRY_C(0xF004B51F, NULL, "vmmul.t M730, M510, M100"), + TEST_ENTRY_C(0xF004B61F, NULL, "vmmul.t M730, M520, M100"), + TEST_ENTRY_C(0xF004B71F, NULL, "vmmul.t M730, M530, M100"), + TEST_ENTRY_C(0xF004B81F, NULL, "vmmul.t M730, M600, M100"), + TEST_ENTRY_C(0xF004B91F, NULL, "vmmul.t M730, M610, M100"), + TEST_ENTRY_C(0xF004BA1F, NULL, "vmmul.t M730, M620, M100"), + TEST_ENTRY_C(0xF004BB1F, NULL, "vmmul.t M730, M630, M100"), + TEST_ENTRY_C(0xF004BC08, NULL, "vmmul.t M200, M700, M100"), + TEST_ENTRY_C(0xF004BD08, NULL, "vmmul.t M200, M710, M100"), + TEST_ENTRY_C(0xF004BE08, NULL, "vmmul.t M200, M720, M100"), + TEST_ENTRY_C(0xF004BF08, NULL, "vmmul.t M200, M730, M100"), + TEST_ENTRY_C(0xF004C01F, NULL, "vmmul.t M730, E010, M100"), + TEST_ENTRY_C(0xF004C11F, NULL, "vmmul.t M730, E011, M100"), + TEST_ENTRY_C(0xF004C21F, NULL, "vmmul.t M730, E012, M100"), + TEST_ENTRY_C(0xF004C31F, NULL, "vmmul.t M730, E013, M100"), + TEST_ENTRY_C(0xF004C41F, NULL, "vmmul.t M730, E110, M100"), + TEST_ENTRY_C(0xF004C51F, NULL, "vmmul.t M730, E111, M100"), + TEST_ENTRY_C(0xF004C61F, NULL, "vmmul.t M730, E112, M100"), + TEST_ENTRY_C(0xF004C71F, NULL, "vmmul.t M730, E113, M100"), + TEST_ENTRY_C(0xF004C81F, NULL, "vmmul.t M730, E210, M100"), + TEST_ENTRY_C(0xF004C91F, NULL, "vmmul.t M730, E211, M100"), + TEST_ENTRY_C(0xF004CA1F, NULL, "vmmul.t M730, E212, M100"), + TEST_ENTRY_C(0xF004CB1F, NULL, "vmmul.t M730, E213, M100"), + TEST_ENTRY_C(0xF004CC1F, NULL, "vmmul.t M730, E310, M100"), + TEST_ENTRY_C(0xF004CD1F, NULL, "vmmul.t M730, E311, M100"), + TEST_ENTRY_C(0xF004CE1F, NULL, "vmmul.t M730, E312, M100"), + TEST_ENTRY_C(0xF004CF1F, NULL, "vmmul.t M730, E313, M100"), + TEST_ENTRY_C(0xF004D01F, NULL, "vmmul.t M730, E410, M100"), + TEST_ENTRY_C(0xF004D11F, NULL, "vmmul.t M730, E411, M100"), + TEST_ENTRY_C(0xF004D21F, NULL, "vmmul.t M730, E412, M100"), + TEST_ENTRY_C(0xF004D31F, NULL, "vmmul.t M730, E413, M100"), + TEST_ENTRY_C(0xF004D41F, NULL, "vmmul.t M730, E510, M100"), + TEST_ENTRY_C(0xF004D51F, NULL, "vmmul.t M730, E511, M100"), + TEST_ENTRY_C(0xF004D61F, NULL, "vmmul.t M730, E512, M100"), + TEST_ENTRY_C(0xF004D71F, NULL, "vmmul.t M730, E513, M100"), + TEST_ENTRY_C(0xF004D81F, NULL, "vmmul.t M730, E610, M100"), + TEST_ENTRY_C(0xF004D91F, NULL, "vmmul.t M730, E611, M100"), + TEST_ENTRY_C(0xF004DA1F, NULL, "vmmul.t M730, E612, M100"), + TEST_ENTRY_C(0xF004DB1F, NULL, "vmmul.t M730, E613, M100"), + TEST_ENTRY_C(0xF004DC08, NULL, "vmmul.t M200, E710, M100"), + TEST_ENTRY_C(0xF004DD08, NULL, "vmmul.t M200, E711, M100"), + TEST_ENTRY_C(0xF004DE08, NULL, "vmmul.t M200, E712, M100"), + TEST_ENTRY_C(0xF004DF08, NULL, "vmmul.t M200, E713, M100"), + TEST_ENTRY_C(0xF004E01F, NULL, "vmmul.t M730, M001, M100"), + TEST_ENTRY_C(0xF004E11F, NULL, "vmmul.t M730, M011, M100"), + TEST_ENTRY_C(0xF004E21F, NULL, "vmmul.t M730, M021, M100"), + TEST_ENTRY_C(0xF004E31F, NULL, "vmmul.t M730, M031, M100"), + TEST_ENTRY_C(0xF004E41F, NULL, "vmmul.t M730, M101, M100"), + TEST_ENTRY_C(0xF004E51F, NULL, "vmmul.t M730, M111, M100"), + TEST_ENTRY_C(0xF004E61F, NULL, "vmmul.t M730, M121, M100"), + TEST_ENTRY_C(0xF004E71F, NULL, "vmmul.t M730, M131, M100"), + TEST_ENTRY_C(0xF004E81F, NULL, "vmmul.t M730, M201, M100"), + TEST_ENTRY_C(0xF004E91F, NULL, "vmmul.t M730, M211, M100"), + TEST_ENTRY_C(0xF004EA1F, NULL, "vmmul.t M730, M221, M100"), + TEST_ENTRY_C(0xF004EB1F, NULL, "vmmul.t M730, M231, M100"), + TEST_ENTRY_C(0xF004EC1F, NULL, "vmmul.t M730, M301, M100"), + TEST_ENTRY_C(0xF004ED1F, NULL, "vmmul.t M730, M311, M100"), + TEST_ENTRY_C(0xF004EE1F, NULL, "vmmul.t M730, M321, M100"), + TEST_ENTRY_C(0xF004EF1F, NULL, "vmmul.t M730, M331, M100"), + TEST_ENTRY_C(0xF004F01F, NULL, "vmmul.t M730, M401, M100"), + TEST_ENTRY_C(0xF004F11F, NULL, "vmmul.t M730, M411, M100"), + TEST_ENTRY_C(0xF004F21F, NULL, "vmmul.t M730, M421, M100"), + TEST_ENTRY_C(0xF004F31F, NULL, "vmmul.t M730, M431, M100"), + TEST_ENTRY_C(0xF004F41F, NULL, "vmmul.t M730, M501, M100"), + TEST_ENTRY_C(0xF004F51F, NULL, "vmmul.t M730, M511, M100"), + TEST_ENTRY_C(0xF004F61F, NULL, "vmmul.t M730, M521, M100"), + TEST_ENTRY_C(0xF004F71F, NULL, "vmmul.t M730, M531, M100"), + TEST_ENTRY_C(0xF004F81F, NULL, "vmmul.t M730, M601, M100"), + TEST_ENTRY_C(0xF004F91F, NULL, "vmmul.t M730, M611, M100"), + TEST_ENTRY_C(0xF004FA1F, NULL, "vmmul.t M730, M621, M100"), + TEST_ENTRY_C(0xF004FB1F, NULL, "vmmul.t M730, M631, M100"), + TEST_ENTRY_C(0xF004FC08, NULL, "vmmul.t M200, M701, M100"), + TEST_ENTRY_C(0xF004FD08, NULL, "vmmul.t M200, M711, M100"), + TEST_ENTRY_C(0xF004FE08, NULL, "vmmul.t M200, M721, M100"), + TEST_ENTRY_C(0xF004FF08, NULL, "vmmul.t M200, M731, M100"), + TEST_ENTRY_C(0xF004809F, NULL, "vmmul.q M730, E000, M100"), + TEST_ENTRY_C(0xF004819F, NULL, "vmmul.q M730, E001, M100"), + TEST_ENTRY_C(0xF004829F, NULL, "vmmul.q M730, E002, M100"), + TEST_ENTRY_C(0xF004839F, NULL, "vmmul.q M730, E003, M100"), + TEST_ENTRY_C(0xF004849F, NULL, "vmmul.q M730, E100, M100"), + TEST_ENTRY_C(0xF004859F, NULL, "vmmul.q M730, E101, M100"), + TEST_ENTRY_C(0xF004869F, NULL, "vmmul.q M730, E102, M100"), + TEST_ENTRY_C(0xF004879F, NULL, "vmmul.q M730, E103, M100"), + TEST_ENTRY_C(0xF004889F, NULL, "vmmul.q M730, E200, M100"), + TEST_ENTRY_C(0xF004899F, NULL, "vmmul.q M730, E201, M100"), + TEST_ENTRY_C(0xF0048A9F, NULL, "vmmul.q M730, E202, M100"), + TEST_ENTRY_C(0xF0048B9F, NULL, "vmmul.q M730, E203, M100"), + TEST_ENTRY_C(0xF0048C9F, NULL, "vmmul.q M730, E300, M100"), + TEST_ENTRY_C(0xF0048D9F, NULL, "vmmul.q M730, E301, M100"), + TEST_ENTRY_C(0xF0048E9F, NULL, "vmmul.q M730, E302, M100"), + TEST_ENTRY_C(0xF0048F9F, NULL, "vmmul.q M730, E303, M100"), + TEST_ENTRY_C(0xF004909F, NULL, "vmmul.q M730, E400, M100"), + TEST_ENTRY_C(0xF004919F, NULL, "vmmul.q M730, E401, M100"), + TEST_ENTRY_C(0xF004929F, NULL, "vmmul.q M730, E402, M100"), + TEST_ENTRY_C(0xF004939F, NULL, "vmmul.q M730, E403, M100"), + TEST_ENTRY_C(0xF004949F, NULL, "vmmul.q M730, E500, M100"), + TEST_ENTRY_C(0xF004959F, NULL, "vmmul.q M730, E501, M100"), + TEST_ENTRY_C(0xF004969F, NULL, "vmmul.q M730, E502, M100"), + TEST_ENTRY_C(0xF004979F, NULL, "vmmul.q M730, E503, M100"), + TEST_ENTRY_C(0xF004989F, NULL, "vmmul.q M730, E600, M100"), + TEST_ENTRY_C(0xF004999F, NULL, "vmmul.q M730, E601, M100"), + TEST_ENTRY_C(0xF0049A9F, NULL, "vmmul.q M730, E602, M100"), + TEST_ENTRY_C(0xF0049B9F, NULL, "vmmul.q M730, E603, M100"), + TEST_ENTRY_C(0xF0049C9F, NULL, "vmmul.q M730, E700, M100"), + TEST_ENTRY_C(0xF0049D9F, NULL, "vmmul.q M730, E701, M100"), + TEST_ENTRY_C(0xF0049E9F, NULL, "vmmul.q M730, E702, M100"), + TEST_ENTRY_C(0xF0049F9F, NULL, "vmmul.q M730, E703, M100"), + TEST_ENTRY_C(0xF004A09F, NULL, "vmmul.q M730, M000, M100"), + TEST_ENTRY_C(0xF004A19F, NULL, "vmmul.q M730, M010, M100"), + TEST_ENTRY_C(0xF004A29F, NULL, "vmmul.q M730, M020, M100"), + TEST_ENTRY_C(0xF004A39F, NULL, "vmmul.q M730, M030, M100"), + TEST_ENTRY_C(0xF004A49F, NULL, "vmmul.q M730, M100, M100"), + TEST_ENTRY_C(0xF004A59F, NULL, "vmmul.q M730, M110, M100"), + TEST_ENTRY_C(0xF004A69F, NULL, "vmmul.q M730, M120, M100"), + TEST_ENTRY_C(0xF004A79F, NULL, "vmmul.q M730, M130, M100"), + TEST_ENTRY_C(0xF004A89F, NULL, "vmmul.q M730, M200, M100"), + TEST_ENTRY_C(0xF004A99F, NULL, "vmmul.q M730, M210, M100"), + TEST_ENTRY_C(0xF004AA9F, NULL, "vmmul.q M730, M220, M100"), + TEST_ENTRY_C(0xF004AB9F, NULL, "vmmul.q M730, M230, M100"), + TEST_ENTRY_C(0xF004AC9F, NULL, "vmmul.q M730, M300, M100"), + TEST_ENTRY_C(0xF004AD9F, NULL, "vmmul.q M730, M310, M100"), + TEST_ENTRY_C(0xF004AE9F, NULL, "vmmul.q M730, M320, M100"), + TEST_ENTRY_C(0xF004AF9F, NULL, "vmmul.q M730, M330, M100"), + TEST_ENTRY_C(0xF004B09F, NULL, "vmmul.q M730, M400, M100"), + TEST_ENTRY_C(0xF004B19F, NULL, "vmmul.q M730, M410, M100"), + TEST_ENTRY_C(0xF004B29F, NULL, "vmmul.q M730, M420, M100"), + TEST_ENTRY_C(0xF004B39F, NULL, "vmmul.q M730, M430, M100"), + TEST_ENTRY_C(0xF004B49F, NULL, "vmmul.q M730, M500, M100"), + TEST_ENTRY_C(0xF004B59F, NULL, "vmmul.q M730, M510, M100"), + TEST_ENTRY_C(0xF004B69F, NULL, "vmmul.q M730, M520, M100"), + TEST_ENTRY_C(0xF004B79F, NULL, "vmmul.q M730, M530, M100"), + TEST_ENTRY_C(0xF004B89F, NULL, "vmmul.q M730, M600, M100"), + TEST_ENTRY_C(0xF004B99F, NULL, "vmmul.q M730, M610, M100"), + TEST_ENTRY_C(0xF004BA9F, NULL, "vmmul.q M730, M620, M100"), + TEST_ENTRY_C(0xF004BB9F, NULL, "vmmul.q M730, M630, M100"), + TEST_ENTRY_C(0xF004BC9F, NULL, "vmmul.q M730, M700, M100"), + TEST_ENTRY_C(0xF004BD9F, NULL, "vmmul.q M730, M710, M100"), + TEST_ENTRY_C(0xF004BE9F, NULL, "vmmul.q M730, M720, M100"), + TEST_ENTRY_C(0xF004BF9F, NULL, "vmmul.q M730, M730, M100"), + TEST_ENTRY_C(0xF004C09F, NULL, "vmmul.q M730, E020, M100"), + TEST_ENTRY_C(0xF004C19F, NULL, "vmmul.q M730, E021, M100"), + TEST_ENTRY_C(0xF004C29F, NULL, "vmmul.q M730, E022, M100"), + TEST_ENTRY_C(0xF004C39F, NULL, "vmmul.q M730, E023, M100"), + TEST_ENTRY_C(0xF004C49F, NULL, "vmmul.q M730, E120, M100"), + TEST_ENTRY_C(0xF004C59F, NULL, "vmmul.q M730, E121, M100"), + TEST_ENTRY_C(0xF004C69F, NULL, "vmmul.q M730, E122, M100"), + TEST_ENTRY_C(0xF004C79F, NULL, "vmmul.q M730, E123, M100"), + TEST_ENTRY_C(0xF004C89F, NULL, "vmmul.q M730, E220, M100"), + TEST_ENTRY_C(0xF004C99F, NULL, "vmmul.q M730, E221, M100"), + TEST_ENTRY_C(0xF004CA9F, NULL, "vmmul.q M730, E222, M100"), + TEST_ENTRY_C(0xF004CB9F, NULL, "vmmul.q M730, E223, M100"), + TEST_ENTRY_C(0xF004CC9F, NULL, "vmmul.q M730, E320, M100"), + TEST_ENTRY_C(0xF004CD9F, NULL, "vmmul.q M730, E321, M100"), + TEST_ENTRY_C(0xF004CE9F, NULL, "vmmul.q M730, E322, M100"), + TEST_ENTRY_C(0xF004CF9F, NULL, "vmmul.q M730, E323, M100"), + TEST_ENTRY_C(0xF004D09F, NULL, "vmmul.q M730, E420, M100"), + TEST_ENTRY_C(0xF004D19F, NULL, "vmmul.q M730, E421, M100"), + TEST_ENTRY_C(0xF004D29F, NULL, "vmmul.q M730, E422, M100"), + TEST_ENTRY_C(0xF004D39F, NULL, "vmmul.q M730, E423, M100"), + TEST_ENTRY_C(0xF004D49F, NULL, "vmmul.q M730, E520, M100"), + TEST_ENTRY_C(0xF004D59F, NULL, "vmmul.q M730, E521, M100"), + TEST_ENTRY_C(0xF004D69F, NULL, "vmmul.q M730, E522, M100"), + TEST_ENTRY_C(0xF004D79F, NULL, "vmmul.q M730, E523, M100"), + TEST_ENTRY_C(0xF004D89F, NULL, "vmmul.q M730, E620, M100"), + TEST_ENTRY_C(0xF004D99F, NULL, "vmmul.q M730, E621, M100"), + TEST_ENTRY_C(0xF004DA9F, NULL, "vmmul.q M730, E622, M100"), + TEST_ENTRY_C(0xF004DB9F, NULL, "vmmul.q M730, E623, M100"), + TEST_ENTRY_C(0xF004DC9F, NULL, "vmmul.q M730, E720, M100"), + TEST_ENTRY_C(0xF004DD9F, NULL, "vmmul.q M730, E721, M100"), + TEST_ENTRY_C(0xF004DE9F, NULL, "vmmul.q M730, E722, M100"), + TEST_ENTRY_C(0xF004DF9F, NULL, "vmmul.q M730, E723, M100"), + TEST_ENTRY_C(0xF004E09F, NULL, "vmmul.q M730, M002, M100"), + TEST_ENTRY_C(0xF004E19F, NULL, "vmmul.q M730, M012, M100"), + TEST_ENTRY_C(0xF004E29F, NULL, "vmmul.q M730, M022, M100"), + TEST_ENTRY_C(0xF004E39F, NULL, "vmmul.q M730, M032, M100"), + TEST_ENTRY_C(0xF004E49F, NULL, "vmmul.q M730, M102, M100"), + TEST_ENTRY_C(0xF004E59F, NULL, "vmmul.q M730, M112, M100"), + TEST_ENTRY_C(0xF004E69F, NULL, "vmmul.q M730, M122, M100"), + TEST_ENTRY_C(0xF004E79F, NULL, "vmmul.q M730, M132, M100"), + TEST_ENTRY_C(0xF004E89F, NULL, "vmmul.q M730, M202, M100"), + TEST_ENTRY_C(0xF004E99F, NULL, "vmmul.q M730, M212, M100"), + TEST_ENTRY_C(0xF004EA9F, NULL, "vmmul.q M730, M222, M100"), + TEST_ENTRY_C(0xF004EB9F, NULL, "vmmul.q M730, M232, M100"), + TEST_ENTRY_C(0xF004EC9F, NULL, "vmmul.q M730, M302, M100"), + TEST_ENTRY_C(0xF004ED9F, NULL, "vmmul.q M730, M312, M100"), + TEST_ENTRY_C(0xF004EE9F, NULL, "vmmul.q M730, M322, M100"), + TEST_ENTRY_C(0xF004EF9F, NULL, "vmmul.q M730, M332, M100"), + TEST_ENTRY_C(0xF004F09F, NULL, "vmmul.q M730, M402, M100"), + TEST_ENTRY_C(0xF004F19F, NULL, "vmmul.q M730, M412, M100"), + TEST_ENTRY_C(0xF004F29F, NULL, "vmmul.q M730, M422, M100"), + TEST_ENTRY_C(0xF004F39F, NULL, "vmmul.q M730, M432, M100"), + TEST_ENTRY_C(0xF004F49F, NULL, "vmmul.q M730, M502, M100"), + TEST_ENTRY_C(0xF004F59F, NULL, "vmmul.q M730, M512, M100"), + TEST_ENTRY_C(0xF004F69F, NULL, "vmmul.q M730, M522, M100"), + TEST_ENTRY_C(0xF004F79F, NULL, "vmmul.q M730, M532, M100"), + TEST_ENTRY_C(0xF004F89F, NULL, "vmmul.q M730, M602, M100"), + TEST_ENTRY_C(0xF004F99F, NULL, "vmmul.q M730, M612, M100"), + TEST_ENTRY_C(0xF004FA9F, NULL, "vmmul.q M730, M622, M100"), + TEST_ENTRY_C(0xF004FB9F, NULL, "vmmul.q M730, M632, M100"), + TEST_ENTRY_C(0xF004FC9F, NULL, "vmmul.q M730, M702, M100"), + TEST_ENTRY_C(0xF004FD9F, NULL, "vmmul.q M730, M712, M100"), + TEST_ENTRY_C(0xF004FE9F, NULL, "vmmul.q M730, M722, M100"), + TEST_ENTRY_C(0xF004FF9F, NULL, "vmmul.q M730, M732, M100"), + + /* vrot */ + TEST_ENTRY_C(0xF3A0009F, NULL, "vrot.p C730, S000, [C,S]"), + TEST_ENTRY_C(0xF3A1009F, NULL, "vrot.p C730, S000, [S,C]"), + TEST_ENTRY_C(0xF3A2009F, NULL, "vrot.p C730, S000, [S,0]"), + TEST_ENTRY_C(0xF3A3009F, NULL, "vrot.p C730, S000, [S,0]"), + TEST_ENTRY_C(0xF3A4009F, NULL, "vrot.p C730, S000, [C,S]"), + TEST_ENTRY_C(0xF3A5009F, NULL, "vrot.p C730, S000, [S,C]"), + TEST_ENTRY_C(0xF3A6009F, NULL, "vrot.p C730, S000, [0,S]"), + TEST_ENTRY_C(0xF3A7009F, NULL, "vrot.p C730, S000, [0,S]"), + TEST_ENTRY_C(0xF3A8009F, NULL, "vrot.p C730, S000, [C,0]"), + TEST_ENTRY_C(0xF3A9009F, NULL, "vrot.p C730, S000, [0,C]"), + TEST_ENTRY_C(0xF3AA009F, NULL, "vrot.p C730, S000, [S,S]"), + TEST_ENTRY_C(0xF3AB009F, NULL, "vrot.p C730, S000, [0,0]"), + TEST_ENTRY_C(0xF3AC009F, NULL, "vrot.p C730, S000, [C,0]"), + TEST_ENTRY_C(0xF3AD009F, NULL, "vrot.p C730, S000, [0,C]"), + TEST_ENTRY_C(0xF3AE009F, NULL, "vrot.p C730, S000, [0,0]"), + TEST_ENTRY_C(0xF3AF009F, NULL, "vrot.p C730, S000, [S,S]"), + TEST_ENTRY_C(0xF3B0009F, NULL, "vrot.p C730, S000, [C,-S]"), + TEST_ENTRY_C(0xF3B1009F, NULL, "vrot.p C730, S000, [-S,C]"), + TEST_ENTRY_C(0xF3B2009F, NULL, "vrot.p C730, S000, [-S,0]"), + TEST_ENTRY_C(0xF3B3009F, NULL, "vrot.p C730, S000, [-S,0]"), + TEST_ENTRY_C(0xF3B4009F, NULL, "vrot.p C730, S000, [C,-S]"), + TEST_ENTRY_C(0xF3B5009F, NULL, "vrot.p C730, S000, [-S,C]"), + TEST_ENTRY_C(0xF3B6009F, NULL, "vrot.p C730, S000, [0,-S]"), + TEST_ENTRY_C(0xF3B7009F, NULL, "vrot.p C730, S000, [0,-S]"), + TEST_ENTRY_C(0xF3B8009F, NULL, "vrot.p C730, S000, [C,0]"), + TEST_ENTRY_C(0xF3B9009F, NULL, "vrot.p C730, S000, [0,C]"), + TEST_ENTRY_C(0xF3BA009F, NULL, "vrot.p C730, S000, [-S,-S]"), + TEST_ENTRY_C(0xF3BB009F, NULL, "vrot.p C730, S000, [0,0]"), + TEST_ENTRY_C(0xF3BC009F, NULL, "vrot.p C730, S000, [C,0]"), + TEST_ENTRY_C(0xF3BD009F, NULL, "vrot.p C730, S000, [0,C]"), + TEST_ENTRY_C(0xF3BE009F, NULL, "vrot.p C730, S000, [0,0]"), + TEST_ENTRY_C(0xF3BF009F, NULL, "vrot.p C730, S000, [-S,-S]"), + TEST_ENTRY_C(0xF3A0801F, NULL, "vrot.t C730, S000, [C,S,S]"), + TEST_ENTRY_C(0xF3A1801F, NULL, "vrot.t C730, S000, [S,C,0]"), + TEST_ENTRY_C(0xF3A2801F, NULL, "vrot.t C730, S000, [S,0,C]"), + TEST_ENTRY_C(0xF3A3801F, NULL, "vrot.t C730, S000, [S,0,0]"), + TEST_ENTRY_C(0xF3A4801F, NULL, "vrot.t C730, S000, [C,S,0]"), + TEST_ENTRY_C(0xF3A5801F, NULL, "vrot.t C730, S000, [S,C,S]"), + TEST_ENTRY_C(0xF3A6801F, NULL, "vrot.t C730, S000, [0,S,C]"), + TEST_ENTRY_C(0xF3A7801F, NULL, "vrot.t C730, S000, [0,S,0]"), + TEST_ENTRY_C(0xF3A8801F, NULL, "vrot.t C730, S000, [C,0,S]"), + TEST_ENTRY_C(0xF3A9801F, NULL, "vrot.t C730, S000, [0,C,S]"), + TEST_ENTRY_C(0xF3AA801F, NULL, "vrot.t C730, S000, [S,S,C]"), + TEST_ENTRY_C(0xF3AB801F, NULL, "vrot.t C730, S000, [0,0,S]"), + TEST_ENTRY_C(0xF3AC801F, NULL, "vrot.t C730, S000, [C,0,0]"), + TEST_ENTRY_C(0xF3AD801F, NULL, "vrot.t C730, S000, [0,C,0]"), + TEST_ENTRY_C(0xF3AE801F, NULL, "vrot.t C730, S000, [0,0,C]"), + TEST_ENTRY_C(0xF3AF801F, NULL, "vrot.t C730, S000, [S,S,S]"), + TEST_ENTRY_C(0xF3B0801F, NULL, "vrot.t C730, S000, [C,-S,-S]"), + TEST_ENTRY_C(0xF3B1801F, NULL, "vrot.t C730, S000, [-S,C,0]"), + TEST_ENTRY_C(0xF3B2801F, NULL, "vrot.t C730, S000, [-S,0,C]"), + TEST_ENTRY_C(0xF3B3801F, NULL, "vrot.t C730, S000, [-S,0,0]"), + TEST_ENTRY_C(0xF3B4801F, NULL, "vrot.t C730, S000, [C,-S,0]"), + TEST_ENTRY_C(0xF3B5801F, NULL, "vrot.t C730, S000, [-S,C,-S]"), + TEST_ENTRY_C(0xF3B6801F, NULL, "vrot.t C730, S000, [0,-S,C]"), + TEST_ENTRY_C(0xF3B7801F, NULL, "vrot.t C730, S000, [0,-S,0]"), + TEST_ENTRY_C(0xF3B8801F, NULL, "vrot.t C730, S000, [C,0,-S]"), + TEST_ENTRY_C(0xF3B9801F, NULL, "vrot.t C730, S000, [0,C,-S]"), + TEST_ENTRY_C(0xF3BA801F, NULL, "vrot.t C730, S000, [-S,-S,C]"), + TEST_ENTRY_C(0xF3BB801F, NULL, "vrot.t C730, S000, [0,0,-S]"), + TEST_ENTRY_C(0xF3BC801F, NULL, "vrot.t C730, S000, [C,0,0]"), + TEST_ENTRY_C(0xF3BD801F, NULL, "vrot.t C730, S000, [0,C,0]"), + TEST_ENTRY_C(0xF3BE801F, NULL, "vrot.t C730, S000, [0,0,C]"), + TEST_ENTRY_C(0xF3BF801F, NULL, "vrot.t C730, S000, [-S,-S,-S]"), + TEST_ENTRY_C(0xF3A0809F, NULL, "vrot.q C730, S000, [C,S,S,S]"), + TEST_ENTRY_C(0xF3A1809F, NULL, "vrot.q C730, S000, [S,C,0,0]"), + TEST_ENTRY_C(0xF3A2809F, NULL, "vrot.q C730, S000, [S,0,C,0]"), + TEST_ENTRY_C(0xF3A3809F, NULL, "vrot.q C730, S000, [S,0,0,C]"), + TEST_ENTRY_C(0xF3A4809F, NULL, "vrot.q C730, S000, [C,S,0,0]"), + TEST_ENTRY_C(0xF3A5809F, NULL, "vrot.q C730, S000, [S,C,S,S]"), + TEST_ENTRY_C(0xF3A6809F, NULL, "vrot.q C730, S000, [0,S,C,0]"), + TEST_ENTRY_C(0xF3A7809F, NULL, "vrot.q C730, S000, [0,S,0,C]"), + TEST_ENTRY_C(0xF3A8809F, NULL, "vrot.q C730, S000, [C,0,S,0]"), + TEST_ENTRY_C(0xF3A9809F, NULL, "vrot.q C730, S000, [0,C,S,0]"), + TEST_ENTRY_C(0xF3AA809F, NULL, "vrot.q C730, S000, [S,S,C,S]"), + TEST_ENTRY_C(0xF3AB809F, NULL, "vrot.q C730, S000, [0,0,S,C]"), + TEST_ENTRY_C(0xF3AC809F, NULL, "vrot.q C730, S000, [C,0,0,S]"), + TEST_ENTRY_C(0xF3AD809F, NULL, "vrot.q C730, S000, [0,C,0,S]"), + TEST_ENTRY_C(0xF3AE809F, NULL, "vrot.q C730, S000, [0,0,C,S]"), + TEST_ENTRY_C(0xF3AF809F, NULL, "vrot.q C730, S000, [S,S,S,C]"), + TEST_ENTRY_C(0xF3B0809F, NULL, "vrot.q C730, S000, [C,-S,-S,-S]"), + TEST_ENTRY_C(0xF3B1809F, NULL, "vrot.q C730, S000, [-S,C,0,0]"), + TEST_ENTRY_C(0xF3B2809F, NULL, "vrot.q C730, S000, [-S,0,C,0]"), + TEST_ENTRY_C(0xF3B3809F, NULL, "vrot.q C730, S000, [-S,0,0,C]"), + TEST_ENTRY_C(0xF3B4809F, NULL, "vrot.q C730, S000, [C,-S,0,0]"), + TEST_ENTRY_C(0xF3B5809F, NULL, "vrot.q C730, S000, [-S,C,-S,-S]"), + TEST_ENTRY_C(0xF3B6809F, NULL, "vrot.q C730, S000, [0,-S,C,0]"), + TEST_ENTRY_C(0xF3B7809F, NULL, "vrot.q C730, S000, [0,-S,0,C]"), + TEST_ENTRY_C(0xF3B8809F, NULL, "vrot.q C730, S000, [C,0,-S,0]"), + TEST_ENTRY_C(0xF3B9809F, NULL, "vrot.q C730, S000, [0,C,-S,0]"), + TEST_ENTRY_C(0xF3BA809F, NULL, "vrot.q C730, S000, [-S,-S,C,-S]"), + TEST_ENTRY_C(0xF3BB809F, NULL, "vrot.q C730, S000, [0,0,-S,C]"), + TEST_ENTRY_C(0xF3BC809F, NULL, "vrot.q C730, S000, [C,0,0,-S]"), + TEST_ENTRY_C(0xF3BD809F, NULL, "vrot.q C730, S000, [0,C,0,-S]"), + TEST_ENTRY_C(0xF3BE809F, NULL, "vrot.q C730, S000, [0,0,C,-S]"), + TEST_ENTRY_C(0xF3BF809F, NULL, "vrot.q C730, S000, [-S,-S,-S,C]"), + + /* vpfxs */ + TEST_ENTRY_C(0xDC000001, NULL, "vpfxs Y, X, X, X"), + TEST_ENTRY_C(0xDC000002, NULL, "vpfxs Z, X, X, X"), + TEST_ENTRY_C(0xDC000003, NULL, "vpfxs W, X, X, X"), + TEST_ENTRY_C(0xDC000100, NULL, "vpfxs |X|, X, X, X"), + TEST_ENTRY_C(0xDC000101, NULL, "vpfxs |Y|, X, X, X"), + TEST_ENTRY_C(0xDC000102, NULL, "vpfxs |Z|, X, X, X"), + TEST_ENTRY_C(0xDC000103, NULL, "vpfxs |W|, X, X, X"), + TEST_ENTRY_C(0xDC001000, NULL, "vpfxs 0, X, X, X"), + TEST_ENTRY_C(0xDC001001, NULL, "vpfxs 1, X, X, X"), + TEST_ENTRY_C(0xDC001002, NULL, "vpfxs 2, X, X, X"), + TEST_ENTRY_C(0xDC001003, NULL, "vpfxs 1/2, X, X, X"), + TEST_ENTRY_C(0xDC001100, NULL, "vpfxs 3, X, X, X"), + TEST_ENTRY_C(0xDC001101, NULL, "vpfxs 1/3, X, X, X"), + TEST_ENTRY_C(0xDC001102, NULL, "vpfxs 1/4, X, X, X"), + TEST_ENTRY_C(0xDC001103, NULL, "vpfxs 1/6, X, X, X"), + TEST_ENTRY_C(0xDC010000, NULL, "vpfxs -X, X, X, X"), + TEST_ENTRY_C(0xDC010001, NULL, "vpfxs -Y, X, X, X"), + TEST_ENTRY_C(0xDC010002, NULL, "vpfxs -Z, X, X, X"), + TEST_ENTRY_C(0xDC010003, NULL, "vpfxs -W, X, X, X"), + TEST_ENTRY_C(0xDC010100, NULL, "vpfxs -|X|, X, X, X"), + TEST_ENTRY_C(0xDC010101, NULL, "vpfxs -|Y|, X, X, X"), + TEST_ENTRY_C(0xDC010102, NULL, "vpfxs -|Z|, X, X, X"), + TEST_ENTRY_C(0xDC010103, NULL, "vpfxs -|W|, X, X, X"), + TEST_ENTRY_C(0xDC011000, NULL, "vpfxs -0, X, X, X"), + TEST_ENTRY_C(0xDC011001, NULL, "vpfxs -1, X, X, X"), + TEST_ENTRY_C(0xDC011002, NULL, "vpfxs -2, X, X, X"), + TEST_ENTRY_C(0xDC011003, NULL, "vpfxs -1/2, X, X, X"), + TEST_ENTRY_C(0xDC011100, NULL, "vpfxs -3, X, X, X"), + TEST_ENTRY_C(0xDC011101, NULL, "vpfxs -1/3, X, X, X"), + TEST_ENTRY_C(0xDC011102, NULL, "vpfxs -1/4, X, X, X"), + TEST_ENTRY_C(0xDC011103, NULL, "vpfxs -1/6, X, X, X"), + TEST_ENTRY_C(0xDC000004, NULL, "vpfxs X, Y, X, X"), + TEST_ENTRY_C(0xDC000008, NULL, "vpfxs X, Z, X, X"), + TEST_ENTRY_C(0xDC00000C, NULL, "vpfxs X, W, X, X"), + TEST_ENTRY_C(0xDC000200, NULL, "vpfxs X, |X|, X, X"), + TEST_ENTRY_C(0xDC000204, NULL, "vpfxs X, |Y|, X, X"), + TEST_ENTRY_C(0xDC000208, NULL, "vpfxs X, |Z|, X, X"), + TEST_ENTRY_C(0xDC00020C, NULL, "vpfxs X, |W|, X, X"), + TEST_ENTRY_C(0xDC002000, NULL, "vpfxs X, 0, X, X"), + TEST_ENTRY_C(0xDC002004, NULL, "vpfxs X, 1, X, X"), + TEST_ENTRY_C(0xDC002008, NULL, "vpfxs X, 2, X, X"), + TEST_ENTRY_C(0xDC00200C, NULL, "vpfxs X, 1/2, X, X"), + TEST_ENTRY_C(0xDC002200, NULL, "vpfxs X, 3, X, X"), + TEST_ENTRY_C(0xDC002204, NULL, "vpfxs X, 1/3, X, X"), + TEST_ENTRY_C(0xDC002208, NULL, "vpfxs X, 1/4, X, X"), + TEST_ENTRY_C(0xDC00220C, NULL, "vpfxs X, 1/6, X, X"), + TEST_ENTRY_C(0xDC020000, NULL, "vpfxs X, -X, X, X"), + TEST_ENTRY_C(0xDC020004, NULL, "vpfxs X, -Y, X, X"), + TEST_ENTRY_C(0xDC020008, NULL, "vpfxs X, -Z, X, X"), + TEST_ENTRY_C(0xDC02000C, NULL, "vpfxs X, -W, X, X"), + TEST_ENTRY_C(0xDC020200, NULL, "vpfxs X, -|X|, X, X"), + TEST_ENTRY_C(0xDC020204, NULL, "vpfxs X, -|Y|, X, X"), + TEST_ENTRY_C(0xDC020208, NULL, "vpfxs X, -|Z|, X, X"), + TEST_ENTRY_C(0xDC02020C, NULL, "vpfxs X, -|W|, X, X"), + TEST_ENTRY_C(0xDC022000, NULL, "vpfxs X, -0, X, X"), + TEST_ENTRY_C(0xDC022004, NULL, "vpfxs X, -1, X, X"), + TEST_ENTRY_C(0xDC022008, NULL, "vpfxs X, -2, X, X"), + TEST_ENTRY_C(0xDC02200C, NULL, "vpfxs X, -1/2, X, X"), + TEST_ENTRY_C(0xDC022200, NULL, "vpfxs X, -3, X, X"), + TEST_ENTRY_C(0xDC022204, NULL, "vpfxs X, -1/3, X, X"), + TEST_ENTRY_C(0xDC022208, NULL, "vpfxs X, -1/4, X, X"), + TEST_ENTRY_C(0xDC02220C, NULL, "vpfxs X, -1/6, X, X"), + TEST_ENTRY_C(0xDC000010, NULL, "vpfxs X, X, Y, X"), + TEST_ENTRY_C(0xDC000020, NULL, "vpfxs X, X, Z, X"), + TEST_ENTRY_C(0xDC000030, NULL, "vpfxs X, X, W, X"), + TEST_ENTRY_C(0xDC000400, NULL, "vpfxs X, X, |X|, X"), + TEST_ENTRY_C(0xDC000410, NULL, "vpfxs X, X, |Y|, X"), + TEST_ENTRY_C(0xDC000420, NULL, "vpfxs X, X, |Z|, X"), + TEST_ENTRY_C(0xDC000430, NULL, "vpfxs X, X, |W|, X"), + TEST_ENTRY_C(0xDC004000, NULL, "vpfxs X, X, 0, X"), + TEST_ENTRY_C(0xDC004010, NULL, "vpfxs X, X, 1, X"), + TEST_ENTRY_C(0xDC004020, NULL, "vpfxs X, X, 2, X"), + TEST_ENTRY_C(0xDC004030, NULL, "vpfxs X, X, 1/2, X"), + TEST_ENTRY_C(0xDC004400, NULL, "vpfxs X, X, 3, X"), + TEST_ENTRY_C(0xDC004410, NULL, "vpfxs X, X, 1/3, X"), + TEST_ENTRY_C(0xDC004420, NULL, "vpfxs X, X, 1/4, X"), + TEST_ENTRY_C(0xDC004430, NULL, "vpfxs X, X, 1/6, X"), + TEST_ENTRY_C(0xDC040000, NULL, "vpfxs X, X, -X, X"), + TEST_ENTRY_C(0xDC040010, NULL, "vpfxs X, X, -Y, X"), + TEST_ENTRY_C(0xDC040020, NULL, "vpfxs X, X, -Z, X"), + TEST_ENTRY_C(0xDC040030, NULL, "vpfxs X, X, -W, X"), + TEST_ENTRY_C(0xDC040400, NULL, "vpfxs X, X, -|X|, X"), + TEST_ENTRY_C(0xDC040410, NULL, "vpfxs X, X, -|Y|, X"), + TEST_ENTRY_C(0xDC040420, NULL, "vpfxs X, X, -|Z|, X"), + TEST_ENTRY_C(0xDC040430, NULL, "vpfxs X, X, -|W|, X"), + TEST_ENTRY_C(0xDC044000, NULL, "vpfxs X, X, -0, X"), + TEST_ENTRY_C(0xDC044010, NULL, "vpfxs X, X, -1, X"), + TEST_ENTRY_C(0xDC044020, NULL, "vpfxs X, X, -2, X"), + TEST_ENTRY_C(0xDC044030, NULL, "vpfxs X, X, -1/2, X"), + TEST_ENTRY_C(0xDC044400, NULL, "vpfxs X, X, -3, X"), + TEST_ENTRY_C(0xDC044410, NULL, "vpfxs X, X, -1/3, X"), + TEST_ENTRY_C(0xDC044420, NULL, "vpfxs X, X, -1/4, X"), + TEST_ENTRY_C(0xDC044430, NULL, "vpfxs X, X, -1/6, X"), + TEST_ENTRY_C(0xDC000040, NULL, "vpfxs X, X, X, Y"), + TEST_ENTRY_C(0xDC000080, NULL, "vpfxs X, X, X, Z"), + TEST_ENTRY_C(0xDC0000C0, NULL, "vpfxs X, X, X, W"), + TEST_ENTRY_C(0xDC000800, NULL, "vpfxs X, X, X, |X|"), + TEST_ENTRY_C(0xDC000840, NULL, "vpfxs X, X, X, |Y|"), + TEST_ENTRY_C(0xDC000880, NULL, "vpfxs X, X, X, |Z|"), + TEST_ENTRY_C(0xDC0008C0, NULL, "vpfxs X, X, X, |W|"), + TEST_ENTRY_C(0xDC008000, NULL, "vpfxs X, X, X, 0"), + TEST_ENTRY_C(0xDC008040, NULL, "vpfxs X, X, X, 1"), + TEST_ENTRY_C(0xDC008080, NULL, "vpfxs X, X, X, 2"), + TEST_ENTRY_C(0xDC0080C0, NULL, "vpfxs X, X, X, 1/2"), + TEST_ENTRY_C(0xDC008800, NULL, "vpfxs X, X, X, 3"), + TEST_ENTRY_C(0xDC008840, NULL, "vpfxs X, X, X, 1/3"), + TEST_ENTRY_C(0xDC008880, NULL, "vpfxs X, X, X, 1/4"), + TEST_ENTRY_C(0xDC0088C0, NULL, "vpfxs X, X, X, 1/6"), + TEST_ENTRY_C(0xDC080000, NULL, "vpfxs X, X, X, -X"), + TEST_ENTRY_C(0xDC080040, NULL, "vpfxs X, X, X, -Y"), + TEST_ENTRY_C(0xDC080080, NULL, "vpfxs X, X, X, -Z"), + TEST_ENTRY_C(0xDC0800C0, NULL, "vpfxs X, X, X, -W"), + TEST_ENTRY_C(0xDC080800, NULL, "vpfxs X, X, X, -|X|"), + TEST_ENTRY_C(0xDC080840, NULL, "vpfxs X, X, X, -|Y|"), + TEST_ENTRY_C(0xDC080880, NULL, "vpfxs X, X, X, -|Z|"), + TEST_ENTRY_C(0xDC0808C0, NULL, "vpfxs X, X, X, -|W|"), + TEST_ENTRY_C(0xDC088000, NULL, "vpfxs X, X, X, -0"), + TEST_ENTRY_C(0xDC088040, NULL, "vpfxs X, X, X, -1"), + TEST_ENTRY_C(0xDC088080, NULL, "vpfxs X, X, X, -2"), + TEST_ENTRY_C(0xDC0880C0, NULL, "vpfxs X, X, X, -1/2"), + TEST_ENTRY_C(0xDC088800, NULL, "vpfxs X, X, X, -3"), + TEST_ENTRY_C(0xDC088840, NULL, "vpfxs X, X, X, -1/3"), + TEST_ENTRY_C(0xDC088880, NULL, "vpfxs X, X, X, -1/4"), + TEST_ENTRY_C(0xDC0888C0, NULL, "vpfxs X, X, X, -1/6"), + + /* vpfxt */ + TEST_ENTRY_C(0xDD000001, NULL, "vpfxt Y, X, X, X"), + TEST_ENTRY_C(0xDD000002, NULL, "vpfxt Z, X, X, X"), + TEST_ENTRY_C(0xDD000003, NULL, "vpfxt W, X, X, X"), + TEST_ENTRY_C(0xDD000100, NULL, "vpfxt |X|, X, X, X"), + TEST_ENTRY_C(0xDD000101, NULL, "vpfxt |Y|, X, X, X"), + TEST_ENTRY_C(0xDD000102, NULL, "vpfxt |Z|, X, X, X"), + TEST_ENTRY_C(0xDD000103, NULL, "vpfxt |W|, X, X, X"), + TEST_ENTRY_C(0xDD001000, NULL, "vpfxt 0, X, X, X"), + TEST_ENTRY_C(0xDD001001, NULL, "vpfxt 1, X, X, X"), + TEST_ENTRY_C(0xDD001002, NULL, "vpfxt 2, X, X, X"), + TEST_ENTRY_C(0xDD001003, NULL, "vpfxt 1/2, X, X, X"), + TEST_ENTRY_C(0xDD001100, NULL, "vpfxt 3, X, X, X"), + TEST_ENTRY_C(0xDD001101, NULL, "vpfxt 1/3, X, X, X"), + TEST_ENTRY_C(0xDD001102, NULL, "vpfxt 1/4, X, X, X"), + TEST_ENTRY_C(0xDD001103, NULL, "vpfxt 1/6, X, X, X"), + TEST_ENTRY_C(0xDD010000, NULL, "vpfxt -X, X, X, X"), + TEST_ENTRY_C(0xDD010001, NULL, "vpfxt -Y, X, X, X"), + TEST_ENTRY_C(0xDD010002, NULL, "vpfxt -Z, X, X, X"), + TEST_ENTRY_C(0xDD010003, NULL, "vpfxt -W, X, X, X"), + TEST_ENTRY_C(0xDD010100, NULL, "vpfxt -|X|, X, X, X"), + TEST_ENTRY_C(0xDD010101, NULL, "vpfxt -|Y|, X, X, X"), + TEST_ENTRY_C(0xDD010102, NULL, "vpfxt -|Z|, X, X, X"), + TEST_ENTRY_C(0xDD010103, NULL, "vpfxt -|W|, X, X, X"), + TEST_ENTRY_C(0xDD011000, NULL, "vpfxt -0, X, X, X"), + TEST_ENTRY_C(0xDD011001, NULL, "vpfxt -1, X, X, X"), + TEST_ENTRY_C(0xDD011002, NULL, "vpfxt -2, X, X, X"), + TEST_ENTRY_C(0xDD011003, NULL, "vpfxt -1/2, X, X, X"), + TEST_ENTRY_C(0xDD011100, NULL, "vpfxt -3, X, X, X"), + TEST_ENTRY_C(0xDD011101, NULL, "vpfxt -1/3, X, X, X"), + TEST_ENTRY_C(0xDD011102, NULL, "vpfxt -1/4, X, X, X"), + TEST_ENTRY_C(0xDD011103, NULL, "vpfxt -1/6, X, X, X"), + TEST_ENTRY_C(0xDD000004, NULL, "vpfxt X, Y, X, X"), + TEST_ENTRY_C(0xDD000008, NULL, "vpfxt X, Z, X, X"), + TEST_ENTRY_C(0xDD00000C, NULL, "vpfxt X, W, X, X"), + TEST_ENTRY_C(0xDD000200, NULL, "vpfxt X, |X|, X, X"), + TEST_ENTRY_C(0xDD000204, NULL, "vpfxt X, |Y|, X, X"), + TEST_ENTRY_C(0xDD000208, NULL, "vpfxt X, |Z|, X, X"), + TEST_ENTRY_C(0xDD00020C, NULL, "vpfxt X, |W|, X, X"), + TEST_ENTRY_C(0xDD002000, NULL, "vpfxt X, 0, X, X"), + TEST_ENTRY_C(0xDD002004, NULL, "vpfxt X, 1, X, X"), + TEST_ENTRY_C(0xDD002008, NULL, "vpfxt X, 2, X, X"), + TEST_ENTRY_C(0xDD00200C, NULL, "vpfxt X, 1/2, X, X"), + TEST_ENTRY_C(0xDD002200, NULL, "vpfxt X, 3, X, X"), + TEST_ENTRY_C(0xDD002204, NULL, "vpfxt X, 1/3, X, X"), + TEST_ENTRY_C(0xDD002208, NULL, "vpfxt X, 1/4, X, X"), + TEST_ENTRY_C(0xDD00220C, NULL, "vpfxt X, 1/6, X, X"), + TEST_ENTRY_C(0xDD020000, NULL, "vpfxt X, -X, X, X"), + TEST_ENTRY_C(0xDD020004, NULL, "vpfxt X, -Y, X, X"), + TEST_ENTRY_C(0xDD020008, NULL, "vpfxt X, -Z, X, X"), + TEST_ENTRY_C(0xDD02000C, NULL, "vpfxt X, -W, X, X"), + TEST_ENTRY_C(0xDD020200, NULL, "vpfxt X, -|X|, X, X"), + TEST_ENTRY_C(0xDD020204, NULL, "vpfxt X, -|Y|, X, X"), + TEST_ENTRY_C(0xDD020208, NULL, "vpfxt X, -|Z|, X, X"), + TEST_ENTRY_C(0xDD02020C, NULL, "vpfxt X, -|W|, X, X"), + TEST_ENTRY_C(0xDD022000, NULL, "vpfxt X, -0, X, X"), + TEST_ENTRY_C(0xDD022004, NULL, "vpfxt X, -1, X, X"), + TEST_ENTRY_C(0xDD022008, NULL, "vpfxt X, -2, X, X"), + TEST_ENTRY_C(0xDD02200C, NULL, "vpfxt X, -1/2, X, X"), + TEST_ENTRY_C(0xDD022200, NULL, "vpfxt X, -3, X, X"), + TEST_ENTRY_C(0xDD022204, NULL, "vpfxt X, -1/3, X, X"), + TEST_ENTRY_C(0xDD022208, NULL, "vpfxt X, -1/4, X, X"), + TEST_ENTRY_C(0xDD02220C, NULL, "vpfxt X, -1/6, X, X"), + TEST_ENTRY_C(0xDD000010, NULL, "vpfxt X, X, Y, X"), + TEST_ENTRY_C(0xDD000020, NULL, "vpfxt X, X, Z, X"), + TEST_ENTRY_C(0xDD000030, NULL, "vpfxt X, X, W, X"), + TEST_ENTRY_C(0xDD000400, NULL, "vpfxt X, X, |X|, X"), + TEST_ENTRY_C(0xDD000410, NULL, "vpfxt X, X, |Y|, X"), + TEST_ENTRY_C(0xDD000420, NULL, "vpfxt X, X, |Z|, X"), + TEST_ENTRY_C(0xDD000430, NULL, "vpfxt X, X, |W|, X"), + TEST_ENTRY_C(0xDD004000, NULL, "vpfxt X, X, 0, X"), + TEST_ENTRY_C(0xDD004010, NULL, "vpfxt X, X, 1, X"), + TEST_ENTRY_C(0xDD004020, NULL, "vpfxt X, X, 2, X"), + TEST_ENTRY_C(0xDD004030, NULL, "vpfxt X, X, 1/2, X"), + TEST_ENTRY_C(0xDD004400, NULL, "vpfxt X, X, 3, X"), + TEST_ENTRY_C(0xDD004410, NULL, "vpfxt X, X, 1/3, X"), + TEST_ENTRY_C(0xDD004420, NULL, "vpfxt X, X, 1/4, X"), + TEST_ENTRY_C(0xDD004430, NULL, "vpfxt X, X, 1/6, X"), + TEST_ENTRY_C(0xDD040000, NULL, "vpfxt X, X, -X, X"), + TEST_ENTRY_C(0xDD040010, NULL, "vpfxt X, X, -Y, X"), + TEST_ENTRY_C(0xDD040020, NULL, "vpfxt X, X, -Z, X"), + TEST_ENTRY_C(0xDD040030, NULL, "vpfxt X, X, -W, X"), + TEST_ENTRY_C(0xDD040400, NULL, "vpfxt X, X, -|X|, X"), + TEST_ENTRY_C(0xDD040410, NULL, "vpfxt X, X, -|Y|, X"), + TEST_ENTRY_C(0xDD040420, NULL, "vpfxt X, X, -|Z|, X"), + TEST_ENTRY_C(0xDD040430, NULL, "vpfxt X, X, -|W|, X"), + TEST_ENTRY_C(0xDD044000, NULL, "vpfxt X, X, -0, X"), + TEST_ENTRY_C(0xDD044010, NULL, "vpfxt X, X, -1, X"), + TEST_ENTRY_C(0xDD044020, NULL, "vpfxt X, X, -2, X"), + TEST_ENTRY_C(0xDD044030, NULL, "vpfxt X, X, -1/2, X"), + TEST_ENTRY_C(0xDD044400, NULL, "vpfxt X, X, -3, X"), + TEST_ENTRY_C(0xDD044410, NULL, "vpfxt X, X, -1/3, X"), + TEST_ENTRY_C(0xDD044420, NULL, "vpfxt X, X, -1/4, X"), + TEST_ENTRY_C(0xDD044430, NULL, "vpfxt X, X, -1/6, X"), + TEST_ENTRY_C(0xDD000040, NULL, "vpfxt X, X, X, Y"), + TEST_ENTRY_C(0xDD000080, NULL, "vpfxt X, X, X, Z"), + TEST_ENTRY_C(0xDD0000C0, NULL, "vpfxt X, X, X, W"), + TEST_ENTRY_C(0xDD000800, NULL, "vpfxt X, X, X, |X|"), + TEST_ENTRY_C(0xDD000840, NULL, "vpfxt X, X, X, |Y|"), + TEST_ENTRY_C(0xDD000880, NULL, "vpfxt X, X, X, |Z|"), + TEST_ENTRY_C(0xDD0008C0, NULL, "vpfxt X, X, X, |W|"), + TEST_ENTRY_C(0xDD008000, NULL, "vpfxt X, X, X, 0"), + TEST_ENTRY_C(0xDD008040, NULL, "vpfxt X, X, X, 1"), + TEST_ENTRY_C(0xDD008080, NULL, "vpfxt X, X, X, 2"), + TEST_ENTRY_C(0xDD0080C0, NULL, "vpfxt X, X, X, 1/2"), + TEST_ENTRY_C(0xDD008800, NULL, "vpfxt X, X, X, 3"), + TEST_ENTRY_C(0xDD008840, NULL, "vpfxt X, X, X, 1/3"), + TEST_ENTRY_C(0xDD008880, NULL, "vpfxt X, X, X, 1/4"), + TEST_ENTRY_C(0xDD0088C0, NULL, "vpfxt X, X, X, 1/6"), + TEST_ENTRY_C(0xDD080000, NULL, "vpfxt X, X, X, -X"), + TEST_ENTRY_C(0xDD080040, NULL, "vpfxt X, X, X, -Y"), + TEST_ENTRY_C(0xDD080080, NULL, "vpfxt X, X, X, -Z"), + TEST_ENTRY_C(0xDD0800C0, NULL, "vpfxt X, X, X, -W"), + TEST_ENTRY_C(0xDD080800, NULL, "vpfxt X, X, X, -|X|"), + TEST_ENTRY_C(0xDD080840, NULL, "vpfxt X, X, X, -|Y|"), + TEST_ENTRY_C(0xDD080880, NULL, "vpfxt X, X, X, -|Z|"), + TEST_ENTRY_C(0xDD0808C0, NULL, "vpfxt X, X, X, -|W|"), + TEST_ENTRY_C(0xDD088000, NULL, "vpfxt X, X, X, -0"), + TEST_ENTRY_C(0xDD088040, NULL, "vpfxt X, X, X, -1"), + TEST_ENTRY_C(0xDD088080, NULL, "vpfxt X, X, X, -2"), + TEST_ENTRY_C(0xDD0880C0, NULL, "vpfxt X, X, X, -1/2"), + TEST_ENTRY_C(0xDD088800, NULL, "vpfxt X, X, X, -3"), + TEST_ENTRY_C(0xDD088840, NULL, "vpfxt X, X, X, -1/3"), + TEST_ENTRY_C(0xDD088880, NULL, "vpfxt X, X, X, -1/4"), + TEST_ENTRY_C(0xDD0888C0, NULL, "vpfxt X, X, X, -1/6"), + + /* vpfxd */ + TEST_ENTRY_C(0xDE000001, NULL, "vpfxd 0, , , "), + TEST_ENTRY_C(0xDE000003, NULL, "vpfxd 1, , , "), + TEST_ENTRY_C(0xDE000100, NULL, "vpfxd M, , , "), + TEST_ENTRY_C(0xDE000004, NULL, "vpfxd , 0, , "), + TEST_ENTRY_C(0xDE00000C, NULL, "vpfxd , 1, , "), + TEST_ENTRY_C(0xDE000200, NULL, "vpfxd , M, , "), + TEST_ENTRY_C(0xDE000010, NULL, "vpfxd , , 0, "), + TEST_ENTRY_C(0xDE000030, NULL, "vpfxd , , 1, "), + TEST_ENTRY_C(0xDE000400, NULL, "vpfxd , , M, "), + TEST_ENTRY_C(0xDE000040, NULL, "vpfxd , , , 0"), + TEST_ENTRY_C(0xDE0000C0, NULL, "vpfxd , , , 1"), + TEST_ENTRY_C(0xDE000800, NULL, "vpfxd , , , M"), +}; + +size_t test_entries_len = ARRAY_COUNT(test_entries); diff --git a/tests/c/instruction_checks/r5900_trunc_cvt.c b/tests/c/instruction_checks/r5900_trunc_cvt.c index 3dfaa13a..52620115 100644 --- a/tests/c/instruction_checks/r5900_trunc_cvt.c +++ b/tests/c/instruction_checks/r5900_trunc_cvt.c @@ -7,52 +7,15 @@ #include #include +#include "expected_disasm_utils.h" -typedef struct TestEntry { - uint32_t word; - bool gnuMode; - const char *expectedStr; -} TestEntry; +#define TEST_ENTRY_C(word, gnu, imm, expected) TEST_ENTRY(RABBITIZER_INSTRCAT_R5900, word, imm, expected, .gnuMode=gnu,) - -const TestEntry entries[] = { - { 0x4600600D, true, ".word 0x4600600D # trunc.w.s $f0, $f12 # 00000000 " }, - { 0x46006024, true, ".word 0x46006024 # cvt.w.s $f0, $f12 # 00000000 " }, - { 0x4600600D, false, "trunc.w.s $f0, $f12" }, - { 0x46006024, false, "cvt.w.s $f0, $f12" }, +const TestEntry test_entries[] = { + TEST_ENTRY_C(0x4600600D, true, NULL, ".word 0x4600600D # trunc.w.s $f0, $f12 # 00000000 "), + TEST_ENTRY_C(0x46006024, true, NULL, ".word 0x46006024 # cvt.w.s $f0, $f12 # 00000000 "), + TEST_ENTRY_C(0x4600600D, false, NULL, "trunc.w.s $f0, $f12"), + TEST_ENTRY_C(0x46006024, false, NULL, "cvt.w.s $f0, $f12"), }; -int main() { - int errorCount = 0; - size_t i; - - for (i = 0; i < ARRAY_COUNT(entries); i++) { - const TestEntry *entry = &entries[i]; - RabbitizerConfig_Cfg.toolchainTweaks.gnuMode = entry->gnuMode; - RabbitizerInstruction instr; - char *buffer; - size_t bufferSize; - - RabbitizerInstructionR5900_init(&instr, entry->word, 0x80000000); - RabbitizerInstructionR5900_processUniqueId(&instr); - - bufferSize = RabbitizerInstruction_getSizeForBuffer(&instr, 0, 0); - buffer = malloc(bufferSize + 1); - assert(buffer != NULL); - - RabbitizerInstruction_disassemble(&instr, buffer, NULL, 0, 0); - - if (entry->expectedStr == NULL) { - printf("Word '0x%08X' gnuMode '%s' doesn't have a expected str, got '%s'\n", entry->word, entry->gnuMode ? "true" : "false", buffer); - errorCount++; - } else if (strcmp(buffer, entry->expectedStr) != 0) { - fprintf(stderr, "Error on word '0x%08X' gnuMode '%s'. Expected '%s', got '%s'\n", entry->word, entry->gnuMode ? "true" : "false", entry->expectedStr, buffer); - errorCount++; - } - - free(buffer); - RabbitizerInstructionR5900_destroy(&instr); - } - - return errorCount; -} +size_t test_entries_len = ARRAY_COUNT(test_entries); diff --git a/tests/c/instruction_checks/r5900_vcallms.c b/tests/c/instruction_checks/r5900_vcallms.c index 618da25c..f95e3d13 100644 --- a/tests/c/instruction_checks/r5900_vcallms.c +++ b/tests/c/instruction_checks/r5900_vcallms.c @@ -7,64 +7,22 @@ #include #include -size_t strlen_null(const char *string) { - if (string == NULL) { - return 0; - } - return strlen(string); -} - -typedef struct TestEntry { - uint32_t word; - const char *immOverride; - const char *expectedStr; -} TestEntry; - -const TestEntry entries[] = { - { 0x4A000038, NULL, "vcallms 0x0" }, - { 0x4A004038, NULL, "vcallms 0x800" }, - { 0x4A008038, NULL, "vcallms 0x1000" }, - { 0x4A008838, NULL, "vcallms 0x1100" }, - { 0x4A009038, NULL, "vcallms 0x1200" }, - { 0x4A009838, NULL, "vcallms 0x1300" }, - { 0x4A00a038, NULL, "vcallms 0x1400" }, - { 0x4A07FFF8, NULL, "vcallms 0xFFF8" }, - { 0x4A080038, NULL, "vcallms 0x10000" }, - { 0x4A1F8038, NULL, "vcallms 0x3F000" }, - { 0x4A1FFFB8, NULL, "vcallms 0x3FFF0" }, +#include "expected_disasm_utils.h" + +#define TEST_ENTRY_C(word, imm, expected) TEST_ENTRY(RABBITIZER_INSTRCAT_R5900, word, imm, expected,) + +const TestEntry test_entries[] = { + TEST_ENTRY_C(0x4A000038, NULL, "vcallms 0x0"), + TEST_ENTRY_C(0x4A004038, NULL, "vcallms 0x800"), + TEST_ENTRY_C(0x4A008038, NULL, "vcallms 0x1000"), + TEST_ENTRY_C(0x4A008838, NULL, "vcallms 0x1100"), + TEST_ENTRY_C(0x4A009038, NULL, "vcallms 0x1200"), + TEST_ENTRY_C(0x4A009838, NULL, "vcallms 0x1300"), + TEST_ENTRY_C(0x4A00a038, NULL, "vcallms 0x1400"), + TEST_ENTRY_C(0x4A07FFF8, NULL, "vcallms 0xFFF8"), + TEST_ENTRY_C(0x4A080038, NULL, "vcallms 0x10000"), + TEST_ENTRY_C(0x4A1F8038, NULL, "vcallms 0x3F000"), + TEST_ENTRY_C(0x4A1FFFB8, NULL, "vcallms 0x3FFF0"), }; -int main() { - int errorCount = 0; - size_t i; - - for (i = 0; i < ARRAY_COUNT(entries); i++) { - const TestEntry *entry = &entries[i]; - RabbitizerInstruction instr; - char *buffer; - size_t bufferSize; - size_t immOverrideLength = strlen_null(entry->immOverride); - - RabbitizerInstructionR5900_init(&instr, entry->word, 0); - RabbitizerInstructionR5900_processUniqueId(&instr); - - bufferSize = RabbitizerInstruction_getSizeForBuffer(&instr, immOverrideLength, 0); - buffer = malloc(bufferSize + 1); - assert(buffer != NULL); - - RabbitizerInstruction_disassemble(&instr, buffer, entry->immOverride, immOverrideLength, 0); - - if (entry->expectedStr == NULL) { - printf("Word '0x%08X' doesn't have a expected str, got '%s'\n", entry->word, buffer); - errorCount++; - } else if (strcmp(buffer, entry->expectedStr) != 0) { - fprintf(stderr, "Error on word '0x%08X'. Expected '%s', got '%s'\n", entry->word, entry->expectedStr, buffer); - errorCount++; - } - - free(buffer); - RabbitizerInstructionR5900_destroy(&instr); - } - - return errorCount; -} +size_t test_entries_len = ARRAY_COUNT(test_entries); diff --git a/tests/c/r4000allegrex.c b/tests/c/r4000allegrex.c new file mode 100644 index 00000000..0ee6113e --- /dev/null +++ b/tests/c/r4000allegrex.c @@ -0,0 +1,47 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +#include "instructions/RabbitizerInstructionR4000Allegrex.h" + +#include +#include +#include +#include + + +int main() { + uint32_t word; + RabbitizerInstruction instr; + char *buffer; + int extraLJust = 5; +#if 1 + uint32_t validbits; +#endif + + word = 0x0040080B; // clo + + RabbitizerInstructionR4000Allegrex_init(&instr, word, 0x00100000); + + RabbitizerInstructionR4000Allegrex_processUniqueId(&instr); + + buffer = malloc(RabbitizerInstruction_getSizeForBuffer(&instr, 0, extraLJust) + 1); + assert(buffer != NULL); + + RabbitizerInstruction_disassemble(&instr, buffer, NULL, 0, extraLJust); + + printf("%08X: %s\n", word, buffer); + +#if 1 + validbits = RabbitizerInstruction_getValidBits(&instr); + + printf("word: %08X\n", instr.word); + printf("mandatory bits: %08X\n", instr._mandatorybits); + printf("valid bits: %08X\n", validbits); + printf("invalid bits: %08X\n", (~validbits) & instr.word); +#endif + + free(buffer); + RabbitizerInstructionR4000Allegrex_destroy(&instr); + + return 0; +} diff --git a/tests/run_instruction_checks.sh b/tests/run_instruction_checks.sh index 17cc881f..cb57d5cf 100755 --- a/tests/run_instruction_checks.sh +++ b/tests/run_instruction_checks.sh @@ -8,5 +8,7 @@ set -e ./build/tests/c/instruction_checks/jalr.elf ./build/tests/c/instruction_checks/plain_disassembly.elf ./build/tests/c/instruction_checks/r3000gte_disasm.elf +./build/tests/c/instruction_checks/r4000allegrex_disasm.elf +./build/tests/c/instruction_checks/r4000allegrex_vfpu_disasm.elf ./build/tests/c/instruction_checks/r5900_trunc_cvt.elf ./build/tests/c/instruction_checks/r5900_vcallms.elf