From 069b203f5bdfc75a48ac85a00c698e0f02f98a9b Mon Sep 17 00:00:00 2001 From: angie Date: Tue, 16 Apr 2024 18:22:51 -0400 Subject: [PATCH] Implement COP2 instructions --- CHANGELOG.md | 6 ++ asdf.txt | 94 +------------------ .../generated/OperandType_enum_class.hpp | 1 + .../generated/Registers_enum_classes.hpp | 18 ++++ .../include/generated/UniqueId_enum_class.hpp | 4 + include/common/RabbitizerConfig.h | 1 + .../InstrDescriptor_Descriptors_array.h | 4 + include/generated/InstrId_Names_array.h | 4 + include/generated/InstrId_enum.h | 4 + include/generated/OperandType_enum.h | 1 + .../OperandType_function_declarations.h | 1 + .../RegisterDescriptor_Descriptors_arrays.h | 18 ++++ include/generated/Registers_Names_arrays.h | 18 ++++ include/generated/Registers_enums.h | 18 ++++ .../generated/instrOpercandCallbacks_array.h | 1 + .../RabbitizerInstructionR4000Allegrex.h | 4 + include/instructions/RabbitizerRegister.h | 4 + .../RabbitizerRegisterDescriptor.h | 1 + rabbitizer/Config.pyi | 1 + rabbitizer/InstrId.pyi | 4 + rabbitizer/OperandType.pyi | 1 + rabbitizer/rabbitizer_global_config.c | 2 + rust/src/instr_id_enum.rs | 4 + rust/src/operand_type_enum.rs | 1 + rust/src/registers_enum.rs | 22 +++++ rust/src/registers_methods.rs | 27 ++++++ src/common/RabbitizerConfig.c | 1 + src/instructions/RabbitizerInstrDescriptor.c | 1 + .../RabbitizerInstruction.c | 4 + .../RabbitizerInstruction_Examination.c | 4 + ...izerInstructionR4000Allegrex_OperandType.c | 11 +++ src/instructions/RabbitizerRegister.c | 19 +++- .../r4000allegrex_cop2_mfhc2.inc | 7 ++ .../r4000allegrex_cop2_mfhc2_p.inc | 15 +-- .../r4000allegrex_cop2_mfhc2_p_s.inc | 26 +++++ .../r4000allegrex_cop2_mthc2.inc | 14 +++ .../RabbitizerOperandType_r4000allegrex.inc | 2 + ...tizerRegister_R4000AllegrexVfpuControl.inc | 19 ++++ ...scriptor_Descriptors_arrays.table.template | 4 + .../c/Registers_Names_arrays.table.template | 4 + .../c/Registers_enums.table.template | 4 + .../Registers_enum_classes.table.template | 4 + .../rust/registers_enum.tablers.template | 8 ++ .../r4000allegrex_vfpu_disasm.c | 4 +- 44 files changed, 312 insertions(+), 103 deletions(-) create mode 100644 tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2_p_s.inc create mode 100644 tables/tables/registers/RabbitizerRegister_R4000AllegrexVfpuControl.inc diff --git a/CHANGELOG.md b/CHANGELOG.md index eb795b9f..6a309c41 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,12 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 ## [Unreleased] +### Added + +- The global `regNames.r4000AllegrexVfpuControlNamedRegisters` option controls + if named registers should be used for the VFPU control registers of the R4000 + ALLEGREX. + ### Changed - Cleanups in tests code. diff --git a/asdf.txt b/asdf.txt index 2279065f..4dd0e401 100644 --- a/asdf.txt +++ b/asdf.txt @@ -3592,18 +3592,6 @@ tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x4900000 InstrIdType: 'R4000ALLEGREX_COP2_BC2' gnuMode 'true' -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48640004'. Expected 'mfv $a0, S100', got '.word 0x48640004 # INVALID $v1, $a0, 0x4 # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48E40004'. Expected 'mtv $a0, S100', got '.word 0x48E40004 # INVALID $a3, $a0, 0x4 # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MTHC2' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48E40084'. Expected 'mtvc $a0, $132', got '.word 0x48E40084 # INVALID $a3, $a0, 0x84 # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MTHC2' - gnuMode 'true' - tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0xF2008080'. Expected 'vmscl.q M000, M000, S000', got '.word 0xF2008080 # INVALID $s0, $zero, -0x7F80 # 00000000 ' InstrIdType: 'R4000ALLEGREX_VFPU6' gnuMode 'true' @@ -7976,70 +7964,6 @@ tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x6C40888 InstrIdType: 'R4000ALLEGREX_VFPU3' gnuMode 'true' -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48640080'. Expected 'mfvc $a0, VFPU_PFXS', got '.word 0x48640080 # INVALID $v1, $a0, 0x80 # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48640081'. Expected 'mfvc $a0, VFPU_PFXT', got '.word 0x48640081 # INVALID $v1, $a0, 0x81 # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48640082'. Expected 'mfvc $a0, VFPU_PFXD', got '.word 0x48640082 # INVALID $v1, $a0, 0x82 # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48640083'. Expected 'mfvc $a0, VFPU_CC', got '.word 0x48640083 # INVALID $v1, $a0, 0x83 # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48640084'. Expected 'mfvc $a0, VFPU_INF4', got '.word 0x48640084 # INVALID $v1, $a0, 0x84 # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48640085'. Expected 'mfvc $a0, VFPU_RSV5', got '.word 0x48640085 # INVALID $v1, $a0, 0x85 # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48640086'. Expected 'mfvc $a0, VFPU_RSV6', got '.word 0x48640086 # INVALID $v1, $a0, 0x86 # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48640087'. Expected 'mfvc $a0, VFPU_REV', got '.word 0x48640087 # INVALID $v1, $a0, 0x87 # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48640088'. Expected 'mfvc $a0, VFPU_RCX0', got '.word 0x48640088 # INVALID $v1, $a0, 0x88 # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48640089'. Expected 'mfvc $a0, VFPU_RCX1', got '.word 0x48640089 # INVALID $v1, $a0, 0x89 # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x4864008A'. Expected 'mfvc $a0, VFPU_RCX2', got '.word 0x4864008A # INVALID $v1, $a0, 0x8A # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x4864008B'. Expected 'mfvc $a0, VFPU_RCX3', got '.word 0x4864008B # INVALID $v1, $a0, 0x8B # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x4864008C'. Expected 'mfvc $a0, VFPU_RCX4', got '.word 0x4864008C # INVALID $v1, $a0, 0x8C # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x4864008D'. Expected 'mfvc $a0, VFPU_RCX5', got '.word 0x4864008D # INVALID $v1, $a0, 0x8D # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x4864008E'. Expected 'mfvc $a0, VFPU_RCX6', got '.word 0x4864008E # INVALID $v1, $a0, 0x8E # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x4864008F'. Expected 'mfvc $a0, VFPU_RCX7', got '.word 0x4864008F # INVALID $v1, $a0, 0x8F # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' - gnuMode 'true' - tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48640090'. Expected 'illegal', got '.word 0x48640090 # INVALID $v1, $a0, 0x90 # 00000000 ' InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' gnuMode 'true' @@ -8056,22 +7980,6 @@ tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x486000F InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' gnuMode 'true' -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48650000'. Expected 'mfv $a1, S000', got '.word 0x48650000 # INVALID $v1, $a1, 0x0 # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48650081'. Expected 'mfvc $a1, VFPU_PFXT', got '.word 0x48650081 # INVALID $v1, $a1, 0x81 # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MFHC2_P' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48E50000'. Expected 'mtv $a1, S000', got '.word 0x48E50000 # INVALID $a3, $a1, 0x0 # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MTHC2' - gnuMode 'true' - -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0x48E50081'. Expected 'mtvc $a1, VFPU_PFXT', got '.word 0x48E50081 # INVALID $a3, $a1, 0x81 # 00000000 ' - InstrIdType: 'R4000ALLEGREX_COP2_MTHC2' - gnuMode 'true' - tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0xD0001001'. Expected 'vmov.s S010, S400', got '.word 0xD0001001 # INVALID $zero, $zero, 0x1001 # 00000000 ' InstrIdType: 'R4000ALLEGREX_VFPU4_FMT0_FMT0_FMT0' gnuMode 'true' @@ -17784,5 +17692,5 @@ tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: Error on word '0xFFFF032 InstrIdType: 'R4000ALLEGREX_VFPU7' gnuMode 'true' -tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: 4445 errors out of 4771 entries. 6.83% correct. +tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c: 4422 errors out of 4771 entries. 7.32% correct. diff --git a/cplusplus/include/generated/OperandType_enum_class.hpp b/cplusplus/include/generated/OperandType_enum_class.hpp index 43dd5f78..2abec864 100644 --- a/cplusplus/include/generated/OperandType_enum_class.hpp +++ b/cplusplus/include/generated/OperandType_enum_class.hpp @@ -67,6 +67,7 @@ enum class OperandType { r4000allegrex_q_vt, r4000allegrex_q_vd, r4000allegrex_q_vt_imm, + r4000allegrex_cop2cd_128, r4000allegrex_pos, r4000allegrex_size, r4000allegrex_size_plus_pos, diff --git a/cplusplus/include/generated/Registers_enum_classes.hpp b/cplusplus/include/generated/Registers_enum_classes.hpp index a0996de2..b6369825 100644 --- a/cplusplus/include/generated/Registers_enum_classes.hpp +++ b/cplusplus/include/generated/Registers_enum_classes.hpp @@ -1347,6 +1347,24 @@ R4000ALLEGREX_M4X4_INVALID_126, R4000ALLEGREX_M4X4_INVALID_127, }; + enum class VfpuControl { + R4000ALLEGREX_VFPUCONTROL_VFPU_PFXS, + R4000ALLEGREX_VFPUCONTROL_VFPU_PFXT, + R4000ALLEGREX_VFPUCONTROL_VFPU_PFXD, + R4000ALLEGREX_VFPUCONTROL_VFPU_CC, + R4000ALLEGREX_VFPUCONTROL_VFPU_INF4, + R4000ALLEGREX_VFPUCONTROL_VFPU_RSV5, + R4000ALLEGREX_VFPUCONTROL_VFPU_RSV6, + R4000ALLEGREX_VFPUCONTROL_VFPU_REV, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX0, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX1, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX2, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX3, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX4, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX5, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX6, + R4000ALLEGREX_VFPUCONTROL_VFPU_RCX7, + }; }; namespace R5900 { enum class VF { diff --git a/cplusplus/include/generated/UniqueId_enum_class.hpp b/cplusplus/include/generated/UniqueId_enum_class.hpp index 4c29a52b..a6978555 100644 --- a/cplusplus/include/generated/UniqueId_enum_class.hpp +++ b/cplusplus/include/generated/UniqueId_enum_class.hpp @@ -491,6 +491,10 @@ enum class UniqueId { r4000allegrex_bvt, r4000allegrex_bvfl, r4000allegrex_bvtl, + r4000allegrex_mfv, + r4000allegrex_mfvc, + r4000allegrex_mtv, + r4000allegrex_mtvc, r4000allegrex_vadd_s, r4000allegrex_vadd_p, r4000allegrex_vadd_t, diff --git a/include/common/RabbitizerConfig.h b/include/common/RabbitizerConfig.h index 1be6ae7f..b74cb81f 100644 --- a/include/common/RabbitizerConfig.h +++ b/include/common/RabbitizerConfig.h @@ -23,6 +23,7 @@ typedef struct RabbitizerConfig_RegisterNames { bool userFpcCsr; // Use FpcCsr as register $31 for the FP control/status register bool vr4300Cop0NamedRegisters; // Use named registers for VR4300's coprocessor 0 registers bool vr4300RspCop0NamedRegisters; // Use named registers for VR4300's RSP's coprocessor 0 registers + bool r4000AllegrexVfpuControlNamedRegisters; // Use named registers for R4000 Allegrex's VFPU control registers } RabbitizerConfig_RegisterNames; typedef struct RabbitizerConfig_PseudoInstr { diff --git a/include/generated/InstrDescriptor_Descriptors_array.h b/include/generated/InstrDescriptor_Descriptors_array.h index 0fc9f60e..1315953a 100644 --- a/include/generated/InstrDescriptor_Descriptors_array.h +++ b/include/generated/InstrDescriptor_Descriptors_array.h @@ -491,6 +491,10 @@ const RabbitizerInstrDescriptor RabbitizerInstrDescriptor_Descriptors[] = { [RABBITIZER_INSTR_ID_r4000allegrex_bvt] = { .operands={RAB_OPERAND_r4000allegrex_imm3, RAB_OPERAND_cpu_branch_target_label}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, .isBranch=true }, [RABBITIZER_INSTR_ID_r4000allegrex_bvfl] = { .operands={RAB_OPERAND_r4000allegrex_imm3, RAB_OPERAND_cpu_branch_target_label}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, .isBranch=true, .isBranchLikely=true }, [RABBITIZER_INSTR_ID_r4000allegrex_bvtl] = { .operands={RAB_OPERAND_r4000allegrex_imm3, RAB_OPERAND_cpu_branch_target_label}, .instrType=RABBITIZER_INSTR_TYPE_UNKNOWN, .isBranch=true, .isBranchLikely=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_mfv] = { .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_r4000allegrex_s_vd}, .instrType=RABBITIZER_INSTR_TYPE_R, .readsRs=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_mfvc] = { .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_r4000allegrex_cop2cd_128}, .instrType=RABBITIZER_INSTR_TYPE_R, .readsRs=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_mtv] = { .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_r4000allegrex_s_vd}, .instrType=RABBITIZER_INSTR_TYPE_R, .readsRs=true }, + [RABBITIZER_INSTR_ID_r4000allegrex_mtvc] = { .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_r4000allegrex_cop2cd_128}, .instrType=RABBITIZER_INSTR_TYPE_R, .readsRs=true }, [RABBITIZER_INSTR_ID_r4000allegrex_vadd_s] = { .operands={RAB_OPERAND_r4000allegrex_s_vd, RAB_OPERAND_r4000allegrex_s_vs, RAB_OPERAND_r4000allegrex_s_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, [RABBITIZER_INSTR_ID_r4000allegrex_vadd_p] = { .operands={RAB_OPERAND_r4000allegrex_p_vd, RAB_OPERAND_r4000allegrex_p_vs, RAB_OPERAND_r4000allegrex_p_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, [RABBITIZER_INSTR_ID_r4000allegrex_vadd_t] = { .operands={RAB_OPERAND_r4000allegrex_t_vd, RAB_OPERAND_r4000allegrex_t_vs, RAB_OPERAND_r4000allegrex_t_vt}, .instrType=RABBITIZER_INSTR_TYPE_R }, diff --git a/include/generated/InstrId_Names_array.h b/include/generated/InstrId_Names_array.h index 1e0021df..1d2dbf4a 100644 --- a/include/generated/InstrId_Names_array.h +++ b/include/generated/InstrId_Names_array.h @@ -491,6 +491,10 @@ const char *RabbitizerInstrId_Names[] = { [RABBITIZER_INSTR_ID_r4000allegrex_bvt] = "bvt", [RABBITIZER_INSTR_ID_r4000allegrex_bvfl] = "bvfl", [RABBITIZER_INSTR_ID_r4000allegrex_bvtl] = "bvtl", + [RABBITIZER_INSTR_ID_r4000allegrex_mfv] = "mfv", + [RABBITIZER_INSTR_ID_r4000allegrex_mfvc] = "mfvc", + [RABBITIZER_INSTR_ID_r4000allegrex_mtv] = "mtv", + [RABBITIZER_INSTR_ID_r4000allegrex_mtvc] = "mtvc", [RABBITIZER_INSTR_ID_r4000allegrex_vadd_s] = "vadd.s", [RABBITIZER_INSTR_ID_r4000allegrex_vadd_p] = "vadd.p", [RABBITIZER_INSTR_ID_r4000allegrex_vadd_t] = "vadd.t", diff --git a/include/generated/InstrId_enum.h b/include/generated/InstrId_enum.h index 5b53641d..4dafaafc 100644 --- a/include/generated/InstrId_enum.h +++ b/include/generated/InstrId_enum.h @@ -491,6 +491,10 @@ typedef enum RabbitizerInstrId { RABBITIZER_INSTR_ID_r4000allegrex_bvt, RABBITIZER_INSTR_ID_r4000allegrex_bvfl, RABBITIZER_INSTR_ID_r4000allegrex_bvtl, + RABBITIZER_INSTR_ID_r4000allegrex_mfv, + RABBITIZER_INSTR_ID_r4000allegrex_mfvc, + RABBITIZER_INSTR_ID_r4000allegrex_mtv, + RABBITIZER_INSTR_ID_r4000allegrex_mtvc, RABBITIZER_INSTR_ID_r4000allegrex_vadd_s, RABBITIZER_INSTR_ID_r4000allegrex_vadd_p, RABBITIZER_INSTR_ID_r4000allegrex_vadd_t, diff --git a/include/generated/OperandType_enum.h b/include/generated/OperandType_enum.h index 8441f45c..6bea5fea 100644 --- a/include/generated/OperandType_enum.h +++ b/include/generated/OperandType_enum.h @@ -67,6 +67,7 @@ typedef enum RabbitizerOperandType { RAB_OPERAND_r4000allegrex_q_vt, RAB_OPERAND_r4000allegrex_q_vd, RAB_OPERAND_r4000allegrex_q_vt_imm, + RAB_OPERAND_r4000allegrex_cop2cd_128, RAB_OPERAND_r4000allegrex_pos, RAB_OPERAND_r4000allegrex_size, RAB_OPERAND_r4000allegrex_size_plus_pos, diff --git a/include/generated/OperandType_function_declarations.h b/include/generated/OperandType_function_declarations.h index 32a10c59..dba7a210 100644 --- a/include/generated/OperandType_function_declarations.h +++ b/include/generated/OperandType_function_declarations.h @@ -65,6 +65,7 @@ size_t RabbitizerOperandType_process_r4000allegrex_q_vt (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); size_t RabbitizerOperandType_process_r4000allegrex_q_vd (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); size_t RabbitizerOperandType_process_r4000allegrex_q_vt_imm (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); + size_t RabbitizerOperandType_process_r4000allegrex_cop2cd_128 (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); size_t RabbitizerOperandType_process_r4000allegrex_pos (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); size_t RabbitizerOperandType_process_r4000allegrex_size (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); size_t RabbitizerOperandType_process_r4000allegrex_size_plus_pos (const struct RabbitizerInstruction *self, char *dst, const char *immOverride, size_t immOverrideLength); diff --git a/include/generated/RegisterDescriptor_Descriptors_arrays.h b/include/generated/RegisterDescriptor_Descriptors_arrays.h index 62704d3c..7bfa5205 100644 --- a/include/generated/RegisterDescriptor_Descriptors_arrays.h +++ b/include/generated/RegisterDescriptor_Descriptors_arrays.h @@ -1342,6 +1342,24 @@ const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexM4x4_Descript [RABBITIZER_REG_R4000ALLEGREX_M4X4_INVALID_126] = { 0 }, [RABBITIZER_REG_R4000ALLEGREX_M4X4_INVALID_127] = { 0 }, }; +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexVfpuControl_Descriptors[] = { + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXS] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXT] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXD] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_CC] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_INF4] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RSV5] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RSV6] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_REV] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX0] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX1] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX2] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX3] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX4] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX5] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX6] = { 0 }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX7] = { 0 }, +}; const RabbitizerRegisterDescriptor RabbitizerRegister_R5900VF_Descriptors[] = { [RABBITIZER_REG_R5900_VF_vf0] = { 0 }, [RABBITIZER_REG_R5900_VF_vf1] = { 0 }, diff --git a/include/generated/Registers_Names_arrays.h b/include/generated/Registers_Names_arrays.h index 32341392..31cec21a 100644 --- a/include/generated/Registers_Names_arrays.h +++ b/include/generated/Registers_Names_arrays.h @@ -1342,6 +1342,24 @@ const char *RabbitizerRegister_R4000AllegrexM4x4_Names[][2] = { [RABBITIZER_REG_R4000ALLEGREX_M4X4_INVALID_126] = { "$" "126", "INVALID_126" }, [RABBITIZER_REG_R4000ALLEGREX_M4X4_INVALID_127] = { "$" "127", "INVALID_127" }, }; +const char *RabbitizerRegister_R4000AllegrexVfpuControl_Names[][2] = { + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXS] = { "$" "128", "VFPU_PFXS" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXT] = { "$" "129", "VFPU_PFXT" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXD] = { "$" "130", "VFPU_PFXD" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_CC] = { "$" "131", "VFPU_CC" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_INF4] = { "$" "132", "VFPU_INF4" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RSV5] = { "$" "133", "VFPU_RSV5" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RSV6] = { "$" "134", "VFPU_RSV6" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_REV] = { "$" "135", "VFPU_REV" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX0] = { "$" "136", "VFPU_RCX0" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX1] = { "$" "137", "VFPU_RCX1" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX2] = { "$" "138", "VFPU_RCX2" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX3] = { "$" "139", "VFPU_RCX3" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX4] = { "$" "140", "VFPU_RCX4" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX5] = { "$" "141", "VFPU_RCX5" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX6] = { "$" "142", "VFPU_RCX6" }, + [RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX7] = { "$" "143", "VFPU_RCX7" }, +}; const char *RabbitizerRegister_R5900VF_Names[][2] = { [RABBITIZER_REG_R5900_VF_vf0] = { "$" "vf0", "$" "vf0" }, [RABBITIZER_REG_R5900_VF_vf1] = { "$" "vf1", "$" "vf1" }, diff --git a/include/generated/Registers_enums.h b/include/generated/Registers_enums.h index 98010abb..d07f2f84 100644 --- a/include/generated/Registers_enums.h +++ b/include/generated/Registers_enums.h @@ -1342,6 +1342,24 @@ typedef enum RabbitizerRegister_R4000AllegrexM4x4 { RABBITIZER_REG_R4000ALLEGREX_M4X4_INVALID_126, RABBITIZER_REG_R4000ALLEGREX_M4X4_INVALID_127, } RabbitizerRegister_R4000AllegrexM4x4; +typedef enum RabbitizerRegister_R4000AllegrexVfpuControl { + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXS, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXT, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_PFXD, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_CC, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_INF4, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RSV5, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RSV6, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_REV, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX0, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX1, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX2, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX3, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX4, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX5, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX6, + RABBITIZER_REG_R4000ALLEGREX_VFPUCONTROL_VFPU_RCX7, +} RabbitizerRegister_R4000AllegrexVfpuControl; typedef enum RabbitizerRegister_R5900VF { RABBITIZER_REG_R5900_VF_vf0, RABBITIZER_REG_R5900_VF_vf1, diff --git a/include/generated/instrOpercandCallbacks_array.h b/include/generated/instrOpercandCallbacks_array.h index a67beb00..76f5de83 100644 --- a/include/generated/instrOpercandCallbacks_array.h +++ b/include/generated/instrOpercandCallbacks_array.h @@ -66,6 +66,7 @@ const OperandCallback instrOpercandCallbacks[] = { [RAB_OPERAND_r4000allegrex_q_vt] = RabbitizerOperandType_process_r4000allegrex_q_vt, [RAB_OPERAND_r4000allegrex_q_vd] = RabbitizerOperandType_process_r4000allegrex_q_vd, [RAB_OPERAND_r4000allegrex_q_vt_imm] = RabbitizerOperandType_process_r4000allegrex_q_vt_imm, + [RAB_OPERAND_r4000allegrex_cop2cd_128] = RabbitizerOperandType_process_r4000allegrex_cop2cd_128, [RAB_OPERAND_r4000allegrex_pos] = RabbitizerOperandType_process_r4000allegrex_pos, [RAB_OPERAND_r4000allegrex_size] = RabbitizerOperandType_process_r4000allegrex_size, [RAB_OPERAND_r4000allegrex_size_plus_pos] = RabbitizerOperandType_process_r4000allegrex_size_plus_pos, diff --git a/include/instructions/RabbitizerInstructionR4000Allegrex.h b/include/instructions/RabbitizerInstructionR4000Allegrex.h index e91d1cbe..6bd22d2f 100644 --- a/include/instructions/RabbitizerInstructionR4000Allegrex.h +++ b/include/instructions/RabbitizerInstructionR4000Allegrex.h @@ -21,6 +21,8 @@ extern "C" { #define RAB_INSTR_R4000ALLEGREX_GET_vt_6_imm(self) ((SHIFTR((self)->word, 0, 1) << 5) | (SHIFTR((self)->word, 16, 5))) +#define RAB_INSTR_R4000ALLEGREX_GET_cop2cd_128(self) (SHIFTR((self)->word, 0, 4)) + #define RAB_INSTR_R4000ALLEGREX_GET_pos(self) (SHIFTR((self)->word, 6, 5)) #define RAB_INSTR_R4000ALLEGREX_GET_size(self) (SHIFTR((self)->word, 11, 5)) #define RAB_INSTR_R4000ALLEGREX_GET_size_plus_pos(self) (SHIFTR((self)->word, 11, 5)) @@ -56,6 +58,8 @@ extern "C" { #define RAB_INSTR_R4000ALLEGREX_PACK_vt_6_imm(word, value) (BITREPACK(BITREPACK((word), (value) >> 5, 0, 1), (value), 16, 5)) +#define RAB_INSTR_R4000ALLEGREX_PACK_cop2cd_128(word, value) (BITREPACK((word), (value), 0, 4)) + #define RAB_INSTR_R4000ALLEGREX_PACK_pos(word, value) (BITREPACK((word), (value), 6, 5)) #define RAB_INSTR_R4000ALLEGREX_PACK_size(word, value) (BITREPACK((word), (value), 11, 5)) #define RAB_INSTR_R4000ALLEGREX_PACK_size_plus_pos(word, value) (BITREPACK((word), (value), 11, 5)) diff --git a/include/instructions/RabbitizerRegister.h b/include/instructions/RabbitizerRegister.h index d815f3e7..36b3ef68 100644 --- a/include/instructions/RabbitizerRegister.h +++ b/include/instructions/RabbitizerRegister.h @@ -72,6 +72,8 @@ NODISCARD PURE RETURNS_NON_NULL const char *RabbitizerRegister_getNameR4000AllegrexM3x3(uint8_t regValue); NODISCARD PURE RETURNS_NON_NULL const char *RabbitizerRegister_getNameR4000AllegrexM4x4(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const char *RabbitizerRegister_getNameR4000AllegrexVfpuControl(uint8_t regValue); NODISCARD PURE RETURNS_NON_NULL const char *RabbitizerRegister_getNameR5900VF(uint8_t regValue); @@ -116,6 +118,8 @@ NODISCARD PURE RETURNS_NON_NULL const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexM3x3(uint8_t regValue); NODISCARD PURE RETURNS_NON_NULL const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexM4x4(uint8_t regValue); +NODISCARD PURE RETURNS_NON_NULL +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexVfpuControl(uint8_t regValue); NODISCARD PURE RETURNS_NON_NULL const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R5900VF(uint8_t regValue); diff --git a/include/instructions/RabbitizerRegisterDescriptor.h b/include/instructions/RabbitizerRegisterDescriptor.h index cc777ad6..fec429f3 100644 --- a/include/instructions/RabbitizerRegisterDescriptor.h +++ b/include/instructions/RabbitizerRegisterDescriptor.h @@ -60,6 +60,7 @@ extern const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexV4D_De extern const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexM2x2_Descriptors[]; extern const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexM3x3_Descriptors[]; extern const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexM4x4_Descriptors[]; +extern const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexVfpuControl_Descriptors[]; /* R4000ALLEGREX */ diff --git a/rabbitizer/Config.pyi b/rabbitizer/Config.pyi index 662b9c39..accf3445 100644 --- a/rabbitizer/Config.pyi +++ b/rabbitizer/Config.pyi @@ -15,6 +15,7 @@ class _RabbitizerConfig: regNames_userFpcCsr: bool = True regNames_vr4300Cop0NamedRegisters: bool = True regNames_vr4300RspCop0NamedRegisters: bool = True + regNames_r4000AllegrexVfpuControlNamedRegisters: bool = True pseudos_enablePseudos: bool = True pseudos_pseudoBeqz: bool = True diff --git a/rabbitizer/InstrId.pyi b/rabbitizer/InstrId.pyi index 8275e426..68268ef2 100644 --- a/rabbitizer/InstrId.pyi +++ b/rabbitizer/InstrId.pyi @@ -432,6 +432,10 @@ class InstrId: r4000allegrex_bvt: Enum r4000allegrex_bvfl: Enum r4000allegrex_bvtl: Enum + r4000allegrex_mfv: Enum + r4000allegrex_mfvc: Enum + r4000allegrex_mtv: Enum + r4000allegrex_mtvc: Enum r4000allegrex_vadd_s: Enum r4000allegrex_vadd_p: Enum r4000allegrex_vadd_t: Enum diff --git a/rabbitizer/OperandType.pyi b/rabbitizer/OperandType.pyi index 0c1d1b65..1d82ba24 100644 --- a/rabbitizer/OperandType.pyi +++ b/rabbitizer/OperandType.pyi @@ -68,6 +68,7 @@ class OperandType: r4000allegrex_q_vt: Enum r4000allegrex_q_vd: Enum r4000allegrex_q_vt_imm: Enum + r4000allegrex_cop2cd_128: Enum r4000allegrex_pos: Enum r4000allegrex_size: Enum r4000allegrex_size_plus_pos: Enum diff --git a/rabbitizer/rabbitizer_global_config.c b/rabbitizer/rabbitizer_global_config.c index 55151eac..b210a568 100644 --- a/rabbitizer/rabbitizer_global_config.c +++ b/rabbitizer/rabbitizer_global_config.c @@ -106,6 +106,7 @@ DEF_MEMBER_GET_SET_ABI(regNames, fprAbiNames) DEF_MEMBER_GET_SET_BOOL(regNames, userFpcCsr) DEF_MEMBER_GET_SET_BOOL(regNames, vr4300Cop0NamedRegisters) DEF_MEMBER_GET_SET_BOOL(regNames, vr4300RspCop0NamedRegisters) +DEF_MEMBER_GET_SET_BOOL(regNames, r4000AllegrexVfpuControlNamedRegisters) DEF_MEMBER_GET_SET_BOOL(pseudos, enablePseudos) DEF_MEMBER_GET_SET_BOOL(pseudos, pseudoBeqz) @@ -134,6 +135,7 @@ static PyGetSetDef rabbitizer_global_config_GetSets[] = { MEMBER_GET_SET(regNames, userFpcCsr, "", NULL), MEMBER_GET_SET(regNames, vr4300Cop0NamedRegisters, "", NULL), MEMBER_GET_SET(regNames, vr4300RspCop0NamedRegisters, "", NULL), + MEMBER_GET_SET(regNames, r4000AllegrexVfpuControlNamedRegisters, "", NULL), MEMBER_GET_SET(pseudos, enablePseudos, "", NULL), MEMBER_GET_SET(pseudos, pseudoBeqz, "", NULL), diff --git a/rust/src/instr_id_enum.rs b/rust/src/instr_id_enum.rs index c4e22bd9..41acf6cc 100644 --- a/rust/src/instr_id_enum.rs +++ b/rust/src/instr_id_enum.rs @@ -491,6 +491,10 @@ pub enum InstrId { r4000allegrex_bvt, r4000allegrex_bvfl, r4000allegrex_bvtl, + r4000allegrex_mfv, + r4000allegrex_mfvc, + r4000allegrex_mtv, + r4000allegrex_mtvc, r4000allegrex_vadd_s, r4000allegrex_vadd_p, r4000allegrex_vadd_t, diff --git a/rust/src/operand_type_enum.rs b/rust/src/operand_type_enum.rs index ca866f32..3062267c 100644 --- a/rust/src/operand_type_enum.rs +++ b/rust/src/operand_type_enum.rs @@ -67,6 +67,7 @@ pub enum OperandType { r4000allegrex_q_vt, r4000allegrex_q_vd, r4000allegrex_q_vt_imm, + r4000allegrex_cop2cd_128, r4000allegrex_pos, r4000allegrex_size, r4000allegrex_size_plus_pos, diff --git a/rust/src/registers_enum.rs b/rust/src/registers_enum.rs index 577845a7..4bfea379 100644 --- a/rust/src/registers_enum.rs +++ b/rust/src/registers_enum.rs @@ -1424,6 +1424,28 @@ pub mod registers { #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] #[allow(non_camel_case_types)] #[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)] + pub enum R4000AllegrexVfpuControl { + VFPU_PFXS, + VFPU_PFXT, + VFPU_PFXD, + VFPU_CC, + VFPU_INF4, + VFPU_RSV5, + VFPU_RSV6, + VFPU_REV, + VFPU_RCX0, + VFPU_RCX1, + VFPU_RCX2, + VFPU_RCX3, + VFPU_RCX4, + VFPU_RCX5, + VFPU_RCX6, + VFPU_RCX7, + } + #[repr(u32)] + #[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)] + #[allow(non_camel_case_types)] + #[derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)] pub enum R5900VF { vf0, vf1, diff --git a/rust/src/registers_methods.rs b/rust/src/registers_methods.rs index 452853b9..50a2c365 100644 --- a/rust/src/registers_methods.rs +++ b/rust/src/registers_methods.rs @@ -33,6 +33,8 @@ extern "C" { [[*const core::ffi::c_char; 2usize]; 0usize]; pub static mut RabbitizerRegister_R4000AllegrexM4x4_Names: [[*const core::ffi::c_char; 2usize]; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexVfpuControl_Names: + [[*const core::ffi::c_char; 2usize]; 0usize]; pub static mut RabbitizerRegister_R5900VF_Names: [[*const core::ffi::c_char; 2usize]; 0usize]; pub static mut RabbitizerRegister_R5900VI_Names: [[*const core::ffi::c_char; 2usize]; 0usize]; @@ -79,6 +81,8 @@ extern "C" { pub static mut RabbitizerRegister_R4000AllegrexM2x2_Descriptors: [RegisterDescriptor; 0usize]; pub static mut RabbitizerRegister_R4000AllegrexM3x3_Descriptors: [RegisterDescriptor; 0usize]; pub static mut RabbitizerRegister_R4000AllegrexM4x4_Descriptors: [RegisterDescriptor; 0usize]; + pub static mut RabbitizerRegister_R4000AllegrexVfpuControl_Descriptors: + [RegisterDescriptor; 0usize]; /* R5900 */ @@ -466,6 +470,29 @@ impl registers_enum::registers::R4000AllegrexM4x4 { } } +impl registers_enum::registers::R4000AllegrexVfpuControl { + pub fn name(self) -> &'static str { + let reg_value: u32 = self.into(); + + unsafe { + std::ffi::CStr::from_ptr( + RabbitizerRegister_R4000AllegrexVfpuControl_Names[reg_value as usize][1], + ) + .to_str() + .unwrap() + } + } + + pub fn descriptor(&self) -> &RegisterDescriptor { + let reg_value: u32 = (*self).into(); + + unsafe { + RabbitizerRegister_R4000AllegrexVfpuControl_Descriptors + .get_unchecked(reg_value as usize) + } + } +} + impl registers_enum::registers::R5900VF { pub fn name(self) -> &'static str { let reg_value: u32 = self.into(); diff --git a/src/common/RabbitizerConfig.c b/src/common/RabbitizerConfig.c index 351be722..343ca1ae 100644 --- a/src/common/RabbitizerConfig.c +++ b/src/common/RabbitizerConfig.c @@ -26,6 +26,7 @@ RabbitizerConfig RabbitizerConfig_Cfg = { .userFpcCsr = true, .vr4300Cop0NamedRegisters = true, .vr4300RspCop0NamedRegisters = true, + .r4000AllegrexVfpuControlNamedRegisters = true, }, .pseudos = { .enablePseudos = true, diff --git a/src/instructions/RabbitizerInstrDescriptor.c b/src/instructions/RabbitizerInstrDescriptor.c index 4740fdcb..cd5c5bf4 100644 --- a/src/instructions/RabbitizerInstrDescriptor.c +++ b/src/instructions/RabbitizerInstrDescriptor.c @@ -286,6 +286,7 @@ bool RabbitizerInstrDescriptor_hasOperandAlias(const RabbitizerInstrDescriptor * case RAB_OPERAND_r4000allegrex_q_vt: case RAB_OPERAND_r4000allegrex_q_vd: case RAB_OPERAND_r4000allegrex_q_vt_imm: + case RAB_OPERAND_r4000allegrex_cop2cd_128: break; case RAB_OPERAND_r4000allegrex_pos: diff --git a/src/instructions/RabbitizerInstruction/RabbitizerInstruction.c b/src/instructions/RabbitizerInstruction/RabbitizerInstruction.c index 51146ef8..dda80b10 100644 --- a/src/instructions/RabbitizerInstruction/RabbitizerInstruction.c +++ b/src/instructions/RabbitizerInstruction/RabbitizerInstruction.c @@ -390,6 +390,10 @@ void RabbitizerInstruction_blankOut(RabbitizerInstruction *self) { self->word = RAB_INSTR_R4000ALLEGREX_PACK_vt_6_imm(self->word, 0); break; + case RAB_OPERAND_r4000allegrex_cop2cd_128: + self->word = RAB_INSTR_R4000ALLEGREX_PACK_cop2cd_128(self->word, 0); + break; + case RAB_OPERAND_r4000allegrex_pos: self->word = RAB_INSTR_R4000ALLEGREX_PACK_pos(self->word, 0); break; diff --git a/src/instructions/RabbitizerInstruction/RabbitizerInstruction_Examination.c b/src/instructions/RabbitizerInstruction/RabbitizerInstruction_Examination.c index b193aefd..2f71e3b0 100644 --- a/src/instructions/RabbitizerInstruction/RabbitizerInstruction_Examination.c +++ b/src/instructions/RabbitizerInstruction/RabbitizerInstruction_Examination.c @@ -436,6 +436,10 @@ uint32_t RabbitizerInstruction_getValidBits(const RabbitizerInstruction *self) { validbits = RAB_INSTR_R4000ALLEGREX_PACK_vt_6_imm(validbits, ~0); break; + case RAB_OPERAND_r4000allegrex_cop2cd_128: + validbits = RAB_INSTR_R4000ALLEGREX_PACK_cop2cd_128(validbits, ~0); + break; + case RAB_OPERAND_r4000allegrex_pos: validbits = RAB_INSTR_R4000ALLEGREX_PACK_pos(validbits, ~0); break; diff --git a/src/instructions/RabbitizerInstructionR4000Allegrex/RabbitizerInstructionR4000Allegrex_OperandType.c b/src/instructions/RabbitizerInstructionR4000Allegrex/RabbitizerInstructionR4000Allegrex_OperandType.c index 5f6e7f4b..f880a0c1 100644 --- a/src/instructions/RabbitizerInstructionR4000Allegrex/RabbitizerInstructionR4000Allegrex_OperandType.c +++ b/src/instructions/RabbitizerInstructionR4000Allegrex/RabbitizerInstructionR4000Allegrex_OperandType.c @@ -176,6 +176,17 @@ size_t RabbitizerOperandType_process_r4000allegrex_q_vt_imm(const RabbitizerInst return totalSize; } +size_t RabbitizerOperandType_process_r4000allegrex_cop2cd_128(const RabbitizerInstruction *self, char *dst, + UNUSED const char *immOverride, + UNUSED size_t immOverrideLength) { + size_t totalSize = 0; + const char *reg = RabbitizerRegister_getNameR4000AllegrexVfpuControl(RAB_INSTR_R4000ALLEGREX_GET_cop2cd_128(self)); + + RABUTILS_BUFFER_CPY(dst, totalSize, reg); + + return totalSize; +} + size_t RabbitizerOperandType_process_r4000allegrex_pos(const RabbitizerInstruction *self, char *dst, UNUSED const char *immOverride, UNUSED size_t immOverrideLength) { diff --git a/src/instructions/RabbitizerRegister.c b/src/instructions/RabbitizerRegister.c index 9caeecdc..fdd8dc02 100644 --- a/src/instructions/RabbitizerRegister.c +++ b/src/instructions/RabbitizerRegister.c @@ -140,7 +140,18 @@ const char *RabbitizerRegister_getNameR4000AllegrexM3x3(uint8_t regValue) { const char *RabbitizerRegister_getNameR4000AllegrexM4x4(uint8_t regValue) { assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexM4x4_Names)); - return RabbitizerRegister_R4000AllegrexM4x4_Names[regValue][RabbitizerConfig_Cfg.regNames.namedRegisters ? 1 : 0]; + return RabbitizerRegister_R4000AllegrexM4x4_Names[regValue][RabbitizerConfig_Cfg.regNames.namedRegisters && + RabbitizerConfig_Cfg.regNames + .r4000AllegrexVfpuControlNamedRegisters + ? 1 + : 0]; +} + +const char *RabbitizerRegister_getNameR4000AllegrexVfpuControl(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexVfpuControl_Names)); + + return RabbitizerRegister_R4000AllegrexVfpuControl_Names[regValue] + [RabbitizerConfig_Cfg.regNames.namedRegisters ? 1 : 0]; } const char *RabbitizerRegister_getNameR5900VF(uint8_t regValue) { @@ -270,6 +281,12 @@ const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000Allegr return &RabbitizerRegister_R4000AllegrexM4x4_Descriptors[regValue]; } +const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R4000AllegrexVfpuControl(uint8_t regValue) { + assert(regValue < ARRAY_COUNT(RabbitizerRegister_R4000AllegrexVfpuControl_Names)); + + return &RabbitizerRegister_R4000AllegrexVfpuControl_Descriptors[regValue]; +} + const RabbitizerRegisterDescriptor *RabbitizerRegister_getDescriptor_R5900VF(uint8_t regValue) { assert(regValue < ARRAY_COUNT(RabbitizerRegister_R5900VF_Names)); diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2.inc index fbf2ab6b..6a4398e4 100644 --- a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2.inc +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2.inc @@ -17,3 +17,10 @@ mfv | COP2 |0 0 0 1 1| rt |0 0 0 0 0 0 0 0|0| vd | ------6----------5---------5---------------------1-------7------- */ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0, mfv, + .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_r4000allegrex_s_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .readsRs=true + ) // Move word From Vfpu diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2_p.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2_p.inc index 0cd00076..981ee9ee 100644 --- a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2_p.inc +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2_p.inc @@ -6,8 +6,9 @@ | = COP2 | MFHC2 | |1| fmt | | ------6----------5-------------------------------1---3----------- |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| fmt - | mfvc | --- | --- | --- | --- | --- | --- | vsync2| + | mfvc | --- | --- | --- | --- | --- | --- | *1 | |-------|-------|-------|-------|-------|-------|-------|-------| + *1 See S list */ /* @@ -17,9 +18,9 @@ mfvc ------6----------5---------5---------------------1---3------4---- */ -/* -vsync2 - 31--------26-25-----21---------------------------7-6---4-3------0 - | COP2 |0 0 0 1 1| |1|1 1 1|1 1 1 1| - ------6----------5---------5---------------------1---3------4---- -*/ + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x0, mfvc, + .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_r4000allegrex_cop2cd_128}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .readsRs=true + ) // Move word From Vfpu Control diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2_p_s.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2_p_s.inc new file mode 100644 index 00000000..ed572ecd --- /dev/null +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mfhc2_p_s.inc @@ -0,0 +1,26 @@ +/* SPDX-FileCopyrightText: © 2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + +/* + 31--------26-25------21 -------------------------7-6---4--------0 + | = COP2 | MFHC2 | |1|1 1 1| fmt | + ------6----------5-------------------------------1---3------4---- + |--000--|--001--|--010--|--011--|--100--|--101--|--110--|--111--| lo + 0 | --- | --- | --- | --- | --- | --- | --- | --- | + 1 | --- | --- | --- | --- | --- | --- | --- | vsync2| + hi |-------|-------|-------|-------|-------|-------|-------|-------| +*/ + +/* +vsync2 + 31--------26-25-----21---------------------------7-6---4-3------0 + | COP2 |0 0 0 1 1| |1|1 1 1|1 1 1 1| + ------6----------5---------5---------------------1---3------4---- +*/ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0xF, vsync2, + .operands={0}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .readsRs=true + ) // SYNChronize2 diff --git a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mthc2.inc b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mthc2.inc index e3375979..02574c0e 100644 --- a/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mthc2.inc +++ b/tables/tables/instr_id/r4000allegrex/r4000allegrex_cop2_mthc2.inc @@ -17,9 +17,23 @@ mtv ------6----------5---------5---------------------1-------7------- */ + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x0, mtv, + .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_r4000allegrex_s_vd}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .readsRs=true + ) // Move word To Vfpu + /* mtvc 31--------26-25-----21-20-----16-----------------7-6---4-3------0 | COP2 |0 0 1 1 1| rt |0 0 0 0 0 0 0 0|1|0 0 0|cop2cd_128| ------6----------5---------5---------------------1---3------4---- */ + + RABBITIZER_DEF_INSTR_ID( + r4000allegrex, 0x1, mtvc, + .operands={RAB_OPERAND_cpu_rt, RAB_OPERAND_r4000allegrex_cop2cd_128}, + .instrType=RABBITIZER_INSTR_TYPE_R, + .readsRs=true + ) // Move word To Vfpu Control diff --git a/tables/tables/operands/RabbitizerOperandType_r4000allegrex.inc b/tables/tables/operands/RabbitizerOperandType_r4000allegrex.inc index 3c19c6eb..a5aca038 100644 --- a/tables/tables/operands/RabbitizerOperandType_r4000allegrex.inc +++ b/tables/tables/operands/RabbitizerOperandType_r4000allegrex.inc @@ -20,6 +20,8 @@ RAB_DEF_OPERAND(r4000allegrex, q_vd) RAB_DEF_OPERAND(r4000allegrex, q_vt_imm) + RAB_DEF_OPERAND(r4000allegrex, cop2cd_128) + RAB_DEF_OPERAND(r4000allegrex, pos) RAB_DEF_OPERAND(r4000allegrex, size) RAB_DEF_OPERAND(r4000allegrex, size_plus_pos) diff --git a/tables/tables/registers/RabbitizerRegister_R4000AllegrexVfpuControl.inc b/tables/tables/registers/RabbitizerRegister_R4000AllegrexVfpuControl.inc new file mode 100644 index 00000000..08f2ccb0 --- /dev/null +++ b/tables/tables/registers/RabbitizerRegister_R4000AllegrexVfpuControl.inc @@ -0,0 +1,19 @@ +/* SPDX-FileCopyrightText: © 2022-2024 Decompollaborate */ +/* SPDX-License-Identifier: MIT */ + + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_PFXS, 128, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_PFXT, 129, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_PFXD, 130, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_CC, 131, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_INF4, 132, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RSV5, 133, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RSV6, 134, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_REV, 135, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RCX0, 136, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RCX1, 137, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RCX2, 138, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RCX3, 139, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RCX4, 140, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RCX5, 141, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RCX6, 142, 0) + RABBITIZER_DEF_REG_NODOLLAR(R4000ALLEGREX_VFPUCONTROL, VFPU_RCX7, 143, 0) diff --git a/tables/templates/c/RegisterDescriptor_Descriptors_arrays.table.template b/tables/templates/c/RegisterDescriptor_Descriptors_arrays.table.template index 39a67cd6..e6d6d0d8 100644 --- a/tables/templates/c/RegisterDescriptor_Descriptors_arrays.table.template +++ b/tables/templates/c/RegisterDescriptor_Descriptors_arrays.table.template @@ -96,6 +96,10 @@ const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexM4x4_Descript #include "registers/RabbitizerRegister_R4000AllegrexM4x4.inc" }; +const RabbitizerRegisterDescriptor RabbitizerRegister_R4000AllegrexVfpuControl_Descriptors[] = { +#include "registers/RabbitizerRegister_R4000AllegrexVfpuControl.inc" +}; + /* R4000ALLEGREX */ /* R5900 */ diff --git a/tables/templates/c/Registers_Names_arrays.table.template b/tables/templates/c/Registers_Names_arrays.table.template index c343fd49..858c1191 100644 --- a/tables/templates/c/Registers_Names_arrays.table.template +++ b/tables/templates/c/Registers_Names_arrays.table.template @@ -98,6 +98,10 @@ const char *RabbitizerRegister_R4000AllegrexM4x4_Names[][2] = { #include "registers/RabbitizerRegister_R4000AllegrexM4x4.inc" }; +const char *RabbitizerRegister_R4000AllegrexVfpuControl_Names[][2] = { +#include "registers/RabbitizerRegister_R4000AllegrexVfpuControl.inc" +}; + /* R4000ALLEGREX */ /* R5900 */ diff --git a/tables/templates/c/Registers_enums.table.template b/tables/templates/c/Registers_enums.table.template index 5b532619..821b3321 100644 --- a/tables/templates/c/Registers_enums.table.template +++ b/tables/templates/c/Registers_enums.table.template @@ -99,6 +99,10 @@ typedef enum RabbitizerRegister_R4000AllegrexM4x4 { #include "registers/RabbitizerRegister_R4000AllegrexM4x4.inc" } RabbitizerRegister_R4000AllegrexM4x4; +typedef enum RabbitizerRegister_R4000AllegrexVfpuControl { + #include "registers/RabbitizerRegister_R4000AllegrexVfpuControl.inc" +} RabbitizerRegister_R4000AllegrexVfpuControl; + /* R4000ALLEGREX */ /* R5900 */ diff --git a/tables/templates/cplusplus/Registers_enum_classes.table.template b/tables/templates/cplusplus/Registers_enum_classes.table.template index d2d69fc9..9508e1ed 100644 --- a/tables/templates/cplusplus/Registers_enum_classes.table.template +++ b/tables/templates/cplusplus/Registers_enum_classes.table.template @@ -97,6 +97,10 @@ enum class M4x4 { #include "registers/RabbitizerRegister_R4000AllegrexM4x4.inc" }; + + enum class VfpuControl { + #include "registers/RabbitizerRegister_R4000AllegrexVfpuControl.inc" + }; }; namespace R5900 { diff --git a/tables/templates/rust/registers_enum.tablers.template b/tables/templates/rust/registers_enum.tablers.template index 80e67109..676a6676 100644 --- a/tables/templates/rust/registers_enum.tablers.template +++ b/tables/templates/rust/registers_enum.tablers.template @@ -203,6 +203,14 @@ pub mod registers { #include "registers/RabbitizerRegister_R4000AllegrexM4x4.inc" } + SPECIAL_RS_TAG(repr(u32)) + SPECIAL_RS_TAG(derive(Debug, Copy, Clone, Hash, PartialEq, Eq)) + SPECIAL_RS_TAG(allow(non_camel_case_types)) + SPECIAL_RS_TAG(derive(num_enum::TryFromPrimitive, num_enum::IntoPrimitive)) + pub enum R4000AllegrexVfpuControl { + #include "registers/RabbitizerRegister_R4000AllegrexVfpuControl.inc" + } + /* R4000ALLEGREX */ /* R5900 */ diff --git a/tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c b/tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c index b5d217af..5e2ec558 100644 --- a/tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c +++ b/tests/c/instruction_checks/r4000allegrex_vfpu_disasm.c @@ -1192,8 +1192,8 @@ const TestEntry test_entries[] = { // TEST_ENTRY_C(0x48640084, NULL, "mfvc $a0, $132"), // TEST_ENTRY_C(0x48640084, NULL, "mfvc $a0, VFPU_INF4"), TEST_ENTRY_C(0x48E40004, NULL, "mtv $a0, S100"), - TEST_ENTRY_C(0x48E40084, NULL, "mtvc $a0, $132"), - // TEST_ENTRY_C(0x48E40084, NULL, "mtvc $a0, VFPU_INF4"), + // TEST_ENTRY_C(0x48E40084, NULL, "mtvc $a0, $132"), + TEST_ENTRY_C(0x48E40084, NULL, "mtvc $a0, VFPU_INF4"), TEST_ENTRY_C(0xE8800040, NULL, "sv.s S000, 0x40($a0)"), TEST_ENTRY_C(0xF8800040, NULL, "sv.q C000, 0x40($a0)"), TEST_ENTRY_C(0xF8800042, NULL, "sv.q C000, 0x40($a0), wb"),